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Michael Hennerich24742ac2011-04-06 11:42:49 +02001/*
Michael Hennerich617156f2011-12-14 20:25:13 +01002 * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
Michael Hennerich24742ac2011-04-06 11:42:49 +02003 *
4 * Copyright 2011 Analog Devices Inc.
5 *
Michael Hennerichcaca8c82011-04-29 14:17:00 +02006 * Licensed under the GPL-2.
Michael Hennerich24742ac2011-04-06 11:42:49 +02007 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
Michael Hennerich24742ac2011-04-06 11:42:49 +020011#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
Paul Gortmaker99c97852011-07-03 15:49:50 -040019#include <linux/module.h>
Michael Hennerich24742ac2011-04-06 11:42:49 +020020
Jonathan Cameron06458e22012-04-25 15:54:58 +010021#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
Michael Hennerich24742ac2011-04-06 11:42:49 +020023
Lars-Peter Clausen53ac8502013-01-31 14:27:00 +000024#define ADXRS450_STARTUP_DELAY 50 /* ms */
25
26/* The MSB for the spi commands */
27#define ADXRS450_SENSOR_DATA (0x20 << 24)
28#define ADXRS450_WRITE_DATA (0x40 << 24)
29#define ADXRS450_READ_DATA (0x80 << 24)
30
31#define ADXRS450_RATE1 0x00 /* Rate Registers */
32#define ADXRS450_TEMP1 0x02 /* Temperature Registers */
33#define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
34#define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
35#define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
36#define ADXRS450_FAULT1 0x0A /* Fault Registers */
37#define ADXRS450_PID1 0x0C /* Part ID Register 1 */
38#define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
39#define ADXRS450_SNL 0x10
40#define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
41/* Check bits */
42#define ADXRS450_P 0x01
43#define ADXRS450_CHK 0x02
44#define ADXRS450_CST 0x04
45#define ADXRS450_PWR 0x08
46#define ADXRS450_POR 0x10
47#define ADXRS450_NVM 0x20
48#define ADXRS450_Q 0x40
49#define ADXRS450_PLL 0x80
50#define ADXRS450_UV 0x100
51#define ADXRS450_OV 0x200
52#define ADXRS450_AMP 0x400
53#define ADXRS450_FAIL 0x800
54
55#define ADXRS450_WRERR_MASK (0x7 << 29)
56
57#define ADXRS450_MAX_RX 4
58#define ADXRS450_MAX_TX 4
59
60#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
61
62enum {
63 ID_ADXRS450,
64 ID_ADXRS453,
65};
66
67/**
68 * struct adxrs450_state - device instance specific data
69 * @us: actual spi_device
70 * @buf_lock: mutex to protect tx and rx
71 * @tx: transmit buffer
72 * @rx: receive buffer
73 **/
74struct adxrs450_state {
75 struct spi_device *us;
76 struct mutex buf_lock;
77 __be32 tx ____cacheline_aligned;
78 __be32 rx;
79
80};
Michael Hennerich24742ac2011-04-06 11:42:49 +020081
82/**
83 * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
Lars-Peter Clausend5e69c82013-01-31 14:27:00 +000084 * @indio_dev: device associated with child of actual iio_dev
Lars-Peter Clausen1439b6e2013-01-31 14:27:00 +000085 * @reg_address: the address of the lower of the two registers, which should be
86 * an even address, the second register's address is reg_address + 1.
Michael Hennerich24742ac2011-04-06 11:42:49 +020087 * @val: somewhere to pass back the value read
88 **/
Jonathan Cameron58ea7782011-08-12 17:47:54 +010089static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
90 u8 reg_address,
91 u16 *val)
Michael Hennerich24742ac2011-04-06 11:42:49 +020092{
Jonathan Cameronba61bb182011-06-27 13:07:47 +010093 struct adxrs450_state *st = iio_priv(indio_dev);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +000094 u32 tx;
Michael Hennerich24742ac2011-04-06 11:42:49 +020095 int ret;
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +000096 struct spi_transfer xfers[] = {
97 {
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +000098 .tx_buf = &st->tx,
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +000099 .bits_per_word = 8,
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000100 .len = sizeof(st->tx),
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000101 .cs_change = 1,
102 }, {
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000103 .rx_buf = &st->rx,
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000104 .bits_per_word = 8,
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000105 .len = sizeof(st->rx),
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000106 },
107 };
Michael Hennerich31f6a292011-04-29 14:16:59 +0200108
Michael Hennerich24742ac2011-04-06 11:42:49 +0200109 mutex_lock(&st->buf_lock);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000110 tx = ADXRS450_READ_DATA | (reg_address << 17);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200111
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000112 if (!(hweight32(tx) & 1))
113 tx |= ADXRS450_P;
Michael Hennerich232b1642011-04-29 14:17:01 +0200114
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000115 st->tx = cpu_to_be32(tx);
Lars-Peter Clausen35734fb2013-10-05 08:45:00 +0100116 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
Michael Hennerich24742ac2011-04-06 11:42:49 +0200117 if (ret) {
118 dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
119 reg_address);
120 goto error_ret;
121 }
122
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000123 *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200124
125error_ret:
126 mutex_unlock(&st->buf_lock);
127 return ret;
128}
129
130/**
131 * adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
Lars-Peter Clausend5e69c82013-01-31 14:27:00 +0000132 * @indio_dev: device associated with child of actual actual iio_dev
Lars-Peter Clausen1439b6e2013-01-31 14:27:00 +0000133 * @reg_address: the address of the lower of the two registers,which should be
134 * an even address, the second register's address is reg_address + 1.
Michael Hennerich24742ac2011-04-06 11:42:49 +0200135 * @val: value to be written.
136 **/
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100137static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
138 u8 reg_address,
139 u16 val)
Michael Hennerich24742ac2011-04-06 11:42:49 +0200140{
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100141 struct adxrs450_state *st = iio_priv(indio_dev);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000142 u32 tx;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200143 int ret;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200144
145 mutex_lock(&st->buf_lock);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000146 tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
Michael Hennerich232b1642011-04-29 14:17:01 +0200147
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000148 if (!(hweight32(tx) & 1))
149 tx |= ADXRS450_P;
Michael Hennerich232b1642011-04-29 14:17:01 +0200150
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000151 st->tx = cpu_to_be32(tx);
152 ret = spi_write(st->us, &st->tx, sizeof(st->tx));
Michael Hennerich24742ac2011-04-06 11:42:49 +0200153 if (ret)
154 dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
Jonathan Cameroncb4496872011-08-12 17:47:55 +0100155 reg_address);
Lars-Peter Clausen619036e2013-01-31 14:27:00 +0000156 usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
Michael Hennerich24742ac2011-04-06 11:42:49 +0200157 mutex_unlock(&st->buf_lock);
158 return ret;
159}
160
161/**
162 * adxrs450_spi_sensor_data() - read 2 bytes sensor data
Lars-Peter Clausend5e69c82013-01-31 14:27:00 +0000163 * @indio_dev: device associated with child of actual iio_dev
Michael Hennerich24742ac2011-04-06 11:42:49 +0200164 * @val: somewhere to pass back the value read
165 **/
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100166static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
Michael Hennerich24742ac2011-04-06 11:42:49 +0200167{
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100168 struct adxrs450_state *st = iio_priv(indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200169 int ret;
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000170 struct spi_transfer xfers[] = {
171 {
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000172 .tx_buf = &st->tx,
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000173 .bits_per_word = 8,
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000174 .len = sizeof(st->tx),
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000175 .cs_change = 1,
176 }, {
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000177 .rx_buf = &st->rx,
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000178 .bits_per_word = 8,
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000179 .len = sizeof(st->rx),
Lars-Peter Clausen6a6df2d2013-01-31 14:27:00 +0000180 },
181 };
Michael Hennerich24742ac2011-04-06 11:42:49 +0200182
183 mutex_lock(&st->buf_lock);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000184 st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200185
Lars-Peter Clausen35734fb2013-10-05 08:45:00 +0100186 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
Michael Hennerich24742ac2011-04-06 11:42:49 +0200187 if (ret) {
188 dev_err(&st->us->dev, "Problem while reading sensor data\n");
189 goto error_ret;
190 }
191
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000192 *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
Michael Hennerichcaca8c82011-04-29 14:17:00 +0200193
Michael Hennerich24742ac2011-04-06 11:42:49 +0200194error_ret:
195 mutex_unlock(&st->buf_lock);
196 return ret;
197}
198
199/**
200 * adxrs450_spi_initial() - use for initializing procedure.
201 * @st: device instance specific data
202 * @val: somewhere to pass back the value read
Lars-Peter Clausend5e69c82013-01-31 14:27:00 +0000203 * @chk: Whether to perform fault check
Michael Hennerich24742ac2011-04-06 11:42:49 +0200204 **/
205static int adxrs450_spi_initial(struct adxrs450_state *st,
206 u32 *val, char chk)
207{
Michael Hennerich24742ac2011-04-06 11:42:49 +0200208 int ret;
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000209 u32 tx;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200210 struct spi_transfer xfers = {
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000211 .tx_buf = &st->tx,
212 .rx_buf = &st->rx,
Michael Hennerich24742ac2011-04-06 11:42:49 +0200213 .bits_per_word = 8,
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000214 .len = sizeof(st->tx),
Michael Hennerich24742ac2011-04-06 11:42:49 +0200215 };
216
217 mutex_lock(&st->buf_lock);
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000218 tx = ADXRS450_SENSOR_DATA;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200219 if (chk)
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000220 tx |= (ADXRS450_CHK | ADXRS450_P);
221 st->tx = cpu_to_be32(tx);
Lars-Peter Clausen14543a02013-01-09 17:31:00 +0000222 ret = spi_sync_transfer(st->us, &xfers, 1);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200223 if (ret) {
224 dev_err(&st->us->dev, "Problem while reading initializing data\n");
225 goto error_ret;
226 }
227
Lars-Peter Clausen1a87e4f2013-01-31 14:27:00 +0000228 *val = be32_to_cpu(st->rx);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200229
230error_ret:
231 mutex_unlock(&st->buf_lock);
232 return ret;
233}
234
Michael Hennerich24742ac2011-04-06 11:42:49 +0200235/* Recommended Startup Sequence by spec */
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100236static int adxrs450_initial_setup(struct iio_dev *indio_dev)
Michael Hennerich24742ac2011-04-06 11:42:49 +0200237{
238 u32 t;
239 u16 data;
240 int ret;
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100241 struct adxrs450_state *st = iio_priv(indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200242
243 msleep(ADXRS450_STARTUP_DELAY*2);
244 ret = adxrs450_spi_initial(st, &t, 1);
245 if (ret)
246 return ret;
Michael Hennerich1810b3b2011-04-29 14:17:04 +0200247 if (t != 0x01)
Lars-Peter Clausen457b71d2013-01-31 14:27:00 +0000248 dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
Michael Hennerich24742ac2011-04-06 11:42:49 +0200249
250 msleep(ADXRS450_STARTUP_DELAY);
251 ret = adxrs450_spi_initial(st, &t, 0);
252 if (ret)
253 return ret;
254
255 msleep(ADXRS450_STARTUP_DELAY);
256 ret = adxrs450_spi_initial(st, &t, 0);
257 if (ret)
258 return ret;
259 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
260 dev_err(&st->us->dev, "The second response is not correct!\n");
261 return -EIO;
262
263 }
264 ret = adxrs450_spi_initial(st, &t, 0);
265 if (ret)
266 return ret;
267 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
268 dev_err(&st->us->dev, "The third response is not correct!\n");
269 return -EIO;
270
271 }
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100272 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200273 if (ret)
274 return ret;
275 if (data & 0x0fff) {
276 dev_err(&st->us->dev, "The device is not in normal status!\n");
277 return -EINVAL;
278 }
Michael Hennerich24742ac2011-04-06 11:42:49 +0200279
280 return 0;
281}
282
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100283static int adxrs450_write_raw(struct iio_dev *indio_dev,
284 struct iio_chan_spec const *chan,
285 int val,
286 int val2,
287 long mask)
288{
289 int ret;
290 switch (mask) {
Jonathan Cameronc8a9f802011-10-26 17:41:36 +0100291 case IIO_CHAN_INFO_CALIBBIAS:
Lars-Peter Clausen9a265782013-01-31 14:27:00 +0000292 if (val < -0x400 || val >= 0x400)
293 return -EINVAL;
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100294 ret = adxrs450_spi_write_reg_16(indio_dev,
Lars-Peter Clausen9a265782013-01-31 14:27:00 +0000295 ADXRS450_DNC1, val);
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100296 break;
297 default:
298 ret = -EINVAL;
299 break;
300 }
301 return ret;
302}
Michael Hennerich24742ac2011-04-06 11:42:49 +0200303
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100304static int adxrs450_read_raw(struct iio_dev *indio_dev,
305 struct iio_chan_spec const *chan,
306 int *val,
307 int *val2,
308 long mask)
309{
310 int ret;
Jonathan Cameron037bad92011-08-12 17:47:56 +0100311 s16 t;
Michael Hennerich90b9b2272011-12-14 20:25:11 +0100312
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100313 switch (mask) {
Jonathan Cameronfbaff212012-04-15 17:41:20 +0100314 case IIO_CHAN_INFO_RAW:
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100315 switch (chan->type) {
Jonathan Cameron41ea0402011-10-05 15:27:59 +0100316 case IIO_ANGL_VEL:
Jonathan Cameron037bad92011-08-12 17:47:56 +0100317 ret = adxrs450_spi_sensor_data(indio_dev, &t);
318 if (ret)
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100319 break;
Jonathan Cameron037bad92011-08-12 17:47:56 +0100320 *val = t;
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100321 ret = IIO_VAL_INT;
322 break;
323 case IIO_TEMP:
Jonathan Cameron037bad92011-08-12 17:47:56 +0100324 ret = adxrs450_spi_read_reg_16(indio_dev,
Michael Hennerich90b9b2272011-12-14 20:25:11 +0100325 ADXRS450_TEMP1, &t);
Jonathan Cameron037bad92011-08-12 17:47:56 +0100326 if (ret)
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100327 break;
Michael Hennerich90b9b2272011-12-14 20:25:11 +0100328 *val = (t >> 6) + 225;
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100329 ret = IIO_VAL_INT;
330 break;
331 default:
332 ret = -EINVAL;
333 break;
334 }
335 break;
Michael Hennerich90b9b2272011-12-14 20:25:11 +0100336 case IIO_CHAN_INFO_SCALE:
337 switch (chan->type) {
338 case IIO_ANGL_VEL:
339 *val = 0;
340 *val2 = 218166;
341 return IIO_VAL_INT_PLUS_NANO;
342 case IIO_TEMP:
343 *val = 200;
344 *val2 = 0;
345 return IIO_VAL_INT;
346 default:
347 return -EINVAL;
348 }
Jonathan Cameronc8a9f802011-10-26 17:41:36 +0100349 case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
Jonathan Cameron037bad92011-08-12 17:47:56 +0100350 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
351 if (ret)
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100352 break;
Jonathan Cameron037bad92011-08-12 17:47:56 +0100353 *val = t;
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100354 ret = IIO_VAL_INT;
355 break;
Michael Hennerich96311352011-12-14 20:25:12 +0100356 case IIO_CHAN_INFO_CALIBBIAS:
357 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
358 if (ret)
359 break;
Lars-Peter Clausenc62b89c2013-01-31 14:27:00 +0000360 *val = sign_extend32(t, 9);
Michael Hennerich96311352011-12-14 20:25:12 +0100361 ret = IIO_VAL_INT;
362 break;
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100363 default:
364 ret = -EINVAL;
365 break;
366 }
Michael Hennerich24742ac2011-04-06 11:42:49 +0200367
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100368 return ret;
369}
370
Michael Hennerich617156f2011-12-14 20:25:13 +0100371static const struct iio_chan_spec adxrs450_channels[2][2] = {
372 [ID_ADXRS450] = {
373 {
374 .type = IIO_ANGL_VEL,
375 .modified = 1,
376 .channel2 = IIO_MOD_Z,
Jonathan Cameron98bfb6e2013-02-27 19:30:18 +0000377 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
378 BIT(IIO_CHAN_INFO_CALIBBIAS) |
379 BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) |
380 BIT(IIO_CHAN_INFO_SCALE),
Michael Hennerich617156f2011-12-14 20:25:13 +0100381 }, {
382 .type = IIO_TEMP,
383 .indexed = 1,
384 .channel = 0,
Jonathan Cameron98bfb6e2013-02-27 19:30:18 +0000385 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
386 BIT(IIO_CHAN_INFO_SCALE),
Michael Hennerich617156f2011-12-14 20:25:13 +0100387 }
388 },
389 [ID_ADXRS453] = {
390 {
391 .type = IIO_ANGL_VEL,
392 .modified = 1,
393 .channel2 = IIO_MOD_Z,
Jonathan Cameron98bfb6e2013-02-27 19:30:18 +0000394 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
395 BIT(IIO_CHAN_INFO_SCALE) |
396 BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW),
Michael Hennerich617156f2011-12-14 20:25:13 +0100397 }, {
398 .type = IIO_TEMP,
399 .indexed = 1,
400 .channel = 0,
Jonathan Cameron98bfb6e2013-02-27 19:30:18 +0000401 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
402 BIT(IIO_CHAN_INFO_SCALE),
Michael Hennerich617156f2011-12-14 20:25:13 +0100403 }
404 },
Michael Hennerich24742ac2011-04-06 11:42:49 +0200405};
406
Jonathan Cameron6fe81352011-05-18 14:42:37 +0100407static const struct iio_info adxrs450_info = {
Jonathan Cameron6fe81352011-05-18 14:42:37 +0100408 .driver_module = THIS_MODULE,
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100409 .read_raw = &adxrs450_read_raw,
410 .write_raw = &adxrs450_write_raw,
Jonathan Cameron6fe81352011-05-18 14:42:37 +0100411};
412
Bill Pemberton4ae1c612012-11-19 13:21:57 -0500413static int adxrs450_probe(struct spi_device *spi)
Michael Hennerich24742ac2011-04-06 11:42:49 +0200414{
Jonathan Camerond2fffd62011-10-14 14:46:58 +0100415 int ret;
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100416 struct adxrs450_state *st;
417 struct iio_dev *indio_dev;
418
419 /* setup the industrialio driver allocated elements */
Sachin Kamat6694cf92013-08-13 07:34:00 +0100420 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
421 if (!indio_dev)
422 return -ENOMEM;
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100423 st = iio_priv(indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200424 st->us = spi;
425 mutex_init(&st->buf_lock);
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100426 /* This is only used for removal purposes */
427 spi_set_drvdata(spi, indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200428
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100429 indio_dev->dev.parent = &spi->dev;
430 indio_dev->info = &adxrs450_info;
431 indio_dev->modes = INDIO_DIRECT_MODE;
Michael Hennerich617156f2011-12-14 20:25:13 +0100432 indio_dev->channels =
433 adxrs450_channels[spi_get_device_id(spi)->driver_data];
Jonathan Cameron58ea7782011-08-12 17:47:54 +0100434 indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
435 indio_dev->name = spi->dev.driver->name;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200436
Sachin Kamat9bcbf022013-10-29 11:39:00 +0000437 ret = devm_iio_device_register(&spi->dev, indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200438 if (ret)
Sachin Kamat6694cf92013-08-13 07:34:00 +0100439 return ret;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200440
441 /* Get the device into a sane initial state */
Jonathan Cameronba61bb182011-06-27 13:07:47 +0100442 ret = adxrs450_initial_setup(indio_dev);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200443 if (ret)
Sachin Kamat9bcbf022013-10-29 11:39:00 +0000444 return ret;
Michael Hennerich24742ac2011-04-06 11:42:49 +0200445
446 return 0;
447}
448
Michael Hennerich617156f2011-12-14 20:25:13 +0100449static const struct spi_device_id adxrs450_id[] = {
450 {"adxrs450", ID_ADXRS450},
451 {"adxrs453", ID_ADXRS453},
452 {}
453};
454MODULE_DEVICE_TABLE(spi, adxrs450_id);
455
Michael Hennerich24742ac2011-04-06 11:42:49 +0200456static struct spi_driver adxrs450_driver = {
457 .driver = {
458 .name = "adxrs450",
459 .owner = THIS_MODULE,
460 },
461 .probe = adxrs450_probe,
Michael Hennerich617156f2011-12-14 20:25:13 +0100462 .id_table = adxrs450_id,
Michael Hennerich24742ac2011-04-06 11:42:49 +0200463};
Lars-Peter Clausenae6ae6f2011-11-16 10:13:39 +0100464module_spi_driver(adxrs450_driver);
Michael Hennerich24742ac2011-04-06 11:42:49 +0200465
466MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
Michael Hennerich617156f2011-12-14 20:25:13 +0100467MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
Michael Hennerich24742ac2011-04-06 11:42:49 +0200468MODULE_LICENSE("GPL v2");