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Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -05001/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#ifndef _CXLFLASH_COMMON_H
16#define _CXLFLASH_COMMON_H
17
Matthew R. Ochscba06e62017-04-12 14:13:20 -050018#include <linux/irq_poll.h>
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050019#include <linux/list.h>
Matthew R. Ochs0a27ae52015-10-21 15:11:52 -050020#include <linux/rwsem.h>
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050021#include <linux/types.h>
22#include <scsi/scsi.h>
Matthew R. Ochs5fbb96c2016-11-28 18:42:19 -060023#include <scsi/scsi_cmnd.h>
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050024#include <scsi/scsi_device.h>
25
Matthew R. Ochs17ead262015-10-21 15:15:37 -050026extern const struct file_operations cxlflash_cxl_fops;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050027
Matthew R. Ochs78ae0282017-04-12 14:13:50 -050028#define MAX_CONTEXT CXLFLASH_MAX_CONTEXT /* num contexts per afu */
Matthew R. Ochs565180722017-04-12 14:14:28 -050029#define MAX_FC_PORTS CXLFLASH_MAX_FC_PORTS /* max ports per AFU */
30#define LEGACY_FC_PORTS 2 /* legacy ports per AFU */
31
32#define CHAN2PORTBANK(_x) ((_x) >> ilog2(CXLFLASH_NUM_FC_PORTS_PER_BANK))
33#define CHAN2BANKPORT(_x) ((_x) & (CXLFLASH_NUM_FC_PORTS_PER_BANK - 1))
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050034
Matthew R. Ochs8fa4f172017-04-12 14:14:05 -050035#define CHAN2PORTMASK(_x) (1 << (_x)) /* channel to port mask */
36#define PORTMASK2CHAN(_x) (ilog2((_x))) /* port mask to channel */
37#define PORTNUM2CHAN(_x) ((_x) - 1) /* port number to channel */
38
Matthew R. Ochsfcc87e72017-04-12 14:15:20 -050039#define CXLFLASH_BLOCK_SIZE 4096 /* 4K blocks */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050040#define CXLFLASH_MAX_XFER_SIZE 16777216 /* 16MB transfer */
41#define CXLFLASH_MAX_SECTORS (CXLFLASH_MAX_XFER_SIZE/512) /* SCSI wants
Matthew R. Ochsfcc87e72017-04-12 14:15:20 -050042 * max_sectors
43 * in units of
44 * 512 byte
45 * sectors
46 */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050047
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050048#define MAX_RHT_PER_CONTEXT (PAGE_SIZE / sizeof(struct sisl_rht_entry))
49
50/* AFU command retry limit */
Matthew R. Ochsfcc87e72017-04-12 14:15:20 -050051#define MC_RETRY_CNT 5 /* Sufficient for SCSI and certain AFU errors */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050052
53/* Command management definitions */
Manoj N. Kumar83430832016-03-04 15:55:20 -060054#define CXLFLASH_MAX_CMDS 256
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050055#define CXLFLASH_MAX_CMDS_PER_LUN CXLFLASH_MAX_CMDS
56
Manoj N. Kumar83430832016-03-04 15:55:20 -060057/* RRQ for master issued cmds */
58#define NUM_RRQ_ENTRY CXLFLASH_MAX_CMDS
59
Matthew R. Ochs696d0b02017-01-11 19:19:33 -060060/* SQ for master issued cmds */
61#define NUM_SQ_ENTRY CXLFLASH_MAX_CMDS
62
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050063
64static inline void check_sizes(void)
65{
Matthew R. Ochs565180722017-04-12 14:14:28 -050066 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_NUM_FC_PORTS_PER_BANK);
Matthew R. Ochscd41e182017-04-12 14:15:11 -050067 BUILD_BUG_ON_NOT_POWER_OF_2(CXLFLASH_MAX_CMDS);
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050068}
69
70/* AFU defines a fixed size of 4K for command buffers (borrow 4K page define) */
71#define CMD_BUFSIZE SIZE_4K
72
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050073enum cxlflash_lr_state {
74 LINK_RESET_INVALID,
75 LINK_RESET_REQUIRED,
76 LINK_RESET_COMPLETE
77};
78
79enum cxlflash_init_state {
80 INIT_STATE_NONE,
81 INIT_STATE_PCI,
82 INIT_STATE_AFU,
83 INIT_STATE_SCSI
84};
85
Matthew R. Ochs5cdac812015-08-13 21:47:34 -050086enum cxlflash_state {
Matthew R. Ochs323e3342017-04-12 14:14:51 -050087 STATE_PROBING, /* Initial state during probe */
88 STATE_PROBED, /* Temporary state, probe completed but EEH occurred */
Matthew R. Ochs5cdac812015-08-13 21:47:34 -050089 STATE_NORMAL, /* Normal running state, everything good */
Matthew R. Ochs439e85c2015-10-21 15:12:00 -050090 STATE_RESET, /* Reset state, trying to reset/recover */
Matthew R. Ochs5cdac812015-08-13 21:47:34 -050091 STATE_FAILTERM /* Failed/terminating state, error out users/threads */
92};
93
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -050094/*
95 * Each context has its own set of resource handles that is visible
96 * only from that context.
97 */
98
99struct cxlflash_cfg {
100 struct afu *afu;
101 struct cxl_context *mcctx;
102
103 struct pci_dev *dev;
104 struct pci_device_id *dev_id;
105 struct Scsi_Host *host;
Matthew R. Ochs78ae0282017-04-12 14:13:50 -0500106 int num_fc_ports;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500107
108 ulong cxlflash_regs_pci;
109
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500110 struct work_struct work_q;
111 enum cxlflash_init_state init_state;
112 enum cxlflash_lr_state lr_state;
113 int lr_port;
Matthew R. Ochsef510742015-10-21 15:13:37 -0500114 atomic_t scan_host_needed;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500115
116 struct cxl_afu *cxl_afu;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500117
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500118 atomic_t recovery_threads;
119 struct mutex ctx_recovery_mutex;
120 struct mutex ctx_tbl_list_mutex;
Matthew R. Ochs0a27ae52015-10-21 15:11:52 -0500121 struct rw_semaphore ioctl_rwsem;
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500122 struct ctx_info *ctx_tbl[MAX_CONTEXT];
123 struct list_head ctx_err_recovery; /* contexts w/ recovery pending */
124 struct file_operations cxl_fops;
125
Matthew R. Ochs2cb79262015-08-13 21:47:53 -0500126 /* Parameters that are LUN table related */
Matthew R. Ochs78ae0282017-04-12 14:13:50 -0500127 int last_lun_index[MAX_FC_PORTS];
Matthew R. Ochs2cb79262015-08-13 21:47:53 -0500128 int promote_lun_index;
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500129 struct list_head lluns; /* list of llun_info structs */
130
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500131 wait_queue_head_t tmf_waitq;
Matthew R. Ochs018d1dc952015-10-21 15:13:21 -0500132 spinlock_t tmf_slock;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500133 bool tmf_active;
Matthew R. Ochs439e85c2015-10-21 15:12:00 -0500134 wait_queue_head_t reset_waitq;
Matthew R. Ochs5cdac812015-08-13 21:47:34 -0500135 enum cxlflash_state state;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500136};
137
138struct afu_cmd {
139 struct sisl_ioarcb rcb; /* IOARCB (cache line aligned) */
140 struct sisl_ioasa sa; /* IOASA must follow IOARCB */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500141 struct afu *parent;
Matthew R. Ochsfe7f9692016-11-28 18:43:18 -0600142 struct scsi_cmnd *scp;
Matthew R. Ochs9ba848a2016-11-28 18:42:42 -0600143 struct completion cevent;
Matthew R. Ochsf918b4a2017-04-12 14:12:55 -0500144 struct list_head queue;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500145
146 u8 cmd_tmf:1;
147
148 /* As per the SISLITE spec the IOARCB EA has to be 16-byte aligned.
149 * However for performance reasons the IOARCB/IOASA should be
150 * cache line aligned.
151 */
152} __aligned(cache_line_size());
153
Matthew R. Ochs5fbb96c2016-11-28 18:42:19 -0600154static inline struct afu_cmd *sc_to_afuc(struct scsi_cmnd *sc)
155{
156 return PTR_ALIGN(scsi_cmd_priv(sc), __alignof__(struct afu_cmd));
157}
158
159static inline struct afu_cmd *sc_to_afucz(struct scsi_cmnd *sc)
160{
161 struct afu_cmd *afuc = sc_to_afuc(sc);
162
163 memset(afuc, 0, sizeof(*afuc));
164 return afuc;
165}
166
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500167struct afu {
168 /* Stuff requiring alignment go first. */
Matthew R. Ochs696d0b02017-01-11 19:19:33 -0600169 struct sisl_ioarcb sq[NUM_SQ_ENTRY]; /* 16K SQ */
170 u64 rrq_entry[NUM_RRQ_ENTRY]; /* 2K RRQ */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500171
172 /* Beware of alignment till here. Preferably introduce new
173 * fields after this point
174 */
175
Matthew R. Ochs48b4be32016-11-28 18:43:09 -0600176 int (*send_cmd)(struct afu *, struct afu_cmd *);
177 void (*context_reset)(struct afu_cmd *);
178
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500179 /* AFU HW */
180 struct cxl_ioctl_start_work work;
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500181 struct cxlflash_afu_map __iomem *afu_map; /* entire MMIO map */
182 struct sisl_host_map __iomem *host_map; /* MC host map */
183 struct sisl_ctrl_map __iomem *ctrl_map; /* MC control map */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500184
185 ctx_hndl_t ctx_hndl; /* master's context handle */
Matthew R. Ochs696d0b02017-01-11 19:19:33 -0600186
187 atomic_t hsq_credits;
188 spinlock_t hsq_slock;
189 struct sisl_ioarcb *hsq_start;
190 struct sisl_ioarcb *hsq_end;
191 struct sisl_ioarcb *hsq_curr;
Matthew R. Ochsf918b4a2017-04-12 14:12:55 -0500192 spinlock_t hrrq_slock;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500193 u64 *hrrq_start;
194 u64 *hrrq_end;
195 u64 *hrrq_curr;
196 bool toggle;
Matthew R. Ochsde012832016-11-28 18:42:33 -0600197 atomic_t cmds_active; /* Number of currently active AFU commands */
Uma Krishnan11f7b182016-11-28 18:41:45 -0600198 s64 room;
199 spinlock_t rrin_slock; /* Lock to rrin queuing and cmd_room updates */
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500200 u64 hb;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500201 u32 internal_lun; /* User-desired LUN mode for this AFU */
202
Matthew R. Ochse5ce0672015-10-21 15:14:01 -0500203 char version[16];
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500204 u64 interface_version;
205
Matthew R. Ochscba06e62017-04-12 14:13:20 -0500206 u32 irqpoll_weight;
207 struct irq_poll irqpoll;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500208 struct cxlflash_cfg *parent; /* Pointer back to parent cxlflash_cfg */
209
210};
211
Matthew R. Ochscba06e62017-04-12 14:13:20 -0500212static inline bool afu_is_irqpoll_enabled(struct afu *afu)
213{
214 return !!afu->irqpoll_weight;
215}
216
Matthew R. Ochs696d0b02017-01-11 19:19:33 -0600217static inline bool afu_is_cmd_mode(struct afu *afu, u64 cmd_mode)
218{
219 u64 afu_cap = afu->interface_version >> SISL_INTVER_CAP_SHIFT;
220
221 return afu_cap & cmd_mode;
222}
223
224static inline bool afu_is_sq_cmd_mode(struct afu *afu)
225{
226 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_SQ_CMD_MODE);
227}
228
229static inline bool afu_is_ioarrin_cmd_mode(struct afu *afu)
230{
231 return afu_is_cmd_mode(afu, SISL_INTVER_CAP_IOARRIN_CMD_MODE);
232}
233
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500234static inline u64 lun_to_lunid(u64 lun)
235{
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500236 __be64 lun_id;
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500237
238 int_to_scsilun(lun, (struct scsi_lun *)&lun_id);
Matthew R. Ochs1786f4a2015-10-21 15:14:48 -0500239 return be64_to_cpu(lun_id);
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500240}
241
Matthew R. Ochs565180722017-04-12 14:14:28 -0500242static inline struct fc_port_bank __iomem *get_fc_port_bank(
243 struct cxlflash_cfg *cfg, int i)
Matthew R. Ochs0aa148872017-04-12 14:14:17 -0500244{
245 struct afu *afu = cfg->afu;
246
Matthew R. Ochs565180722017-04-12 14:14:28 -0500247 return &afu->afu_map->global.bank[CHAN2PORTBANK(i)];
248}
249
250static inline __be64 __iomem *get_fc_port_regs(struct cxlflash_cfg *cfg, int i)
251{
252 struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
253
254 return &fcpb->fc_port_regs[CHAN2BANKPORT(i)][0];
Matthew R. Ochs0aa148872017-04-12 14:14:17 -0500255}
256
257static inline __be64 __iomem *get_fc_port_luns(struct cxlflash_cfg *cfg, int i)
258{
Matthew R. Ochs565180722017-04-12 14:14:28 -0500259 struct fc_port_bank __iomem *fcpb = get_fc_port_bank(cfg, i);
Matthew R. Ochs0aa148872017-04-12 14:14:17 -0500260
Matthew R. Ochs565180722017-04-12 14:14:28 -0500261 return &fcpb->fc_port_luns[CHAN2BANKPORT(i)][0];
Matthew R. Ochs0aa148872017-04-12 14:14:17 -0500262}
263
Matthew R. Ochsfcc87e72017-04-12 14:15:20 -0500264int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t c, res_hndl_t r, u8 mode);
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500265void cxlflash_list_init(void);
266void cxlflash_term_global_luns(void);
267void cxlflash_free_errpage(void);
Matthew R. Ochsfcc87e72017-04-12 14:15:20 -0500268int cxlflash_ioctl(struct scsi_device *sdev, int cmd, void __user *arg);
269void cxlflash_stop_term_user_contexts(struct cxlflash_cfg *cfg);
270int cxlflash_mark_contexts_error(struct cxlflash_cfg *cfg);
271void cxlflash_term_local_luns(struct cxlflash_cfg *cfg);
272void cxlflash_restore_luntable(struct cxlflash_cfg *cfg);
Matthew R. Ochs65be2c72015-08-13 21:47:43 -0500273
Matthew R. Ochsc21e0bb2015-06-09 17:15:52 -0500274#endif /* ifndef _CXLFLASH_COMMON_H */