Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 1 | menu "Clock Source drivers" |
| 2 | |
Stephen Warren | ae278a9 | 2012-11-19 16:41:20 -0700 | [diff] [blame] | 3 | config CLKSRC_OF |
| 4 | bool |
Marc Zyngier | aad83b15 | 2015-09-28 15:49:16 +0100 | [diff] [blame] | 5 | select CLKSRC_PROBE |
| 6 | |
| 7 | config CLKSRC_ACPI |
| 8 | bool |
| 9 | select CLKSRC_PROBE |
| 10 | |
| 11 | config CLKSRC_PROBE |
| 12 | bool |
Stephen Warren | ae278a9 | 2012-11-19 16:41:20 -0700 | [diff] [blame] | 13 | |
Russell King | 89c0b8e | 2011-05-08 18:47:58 +0100 | [diff] [blame] | 14 | config CLKSRC_I8253 |
| 15 | bool |
Russell King | 442c817 | 2011-05-08 14:06:52 +0100 | [diff] [blame] | 16 | |
Thomas Gleixner | e6220bd | 2011-06-09 13:08:25 +0000 | [diff] [blame] | 17 | config CLKEVT_I8253 |
| 18 | bool |
| 19 | |
Ralf Baechle | 15f304b | 2011-06-01 19:04:59 +0100 | [diff] [blame] | 20 | config I8253_LOCK |
| 21 | bool |
| 22 | |
| 23 | config CLKBLD_I8253 |
Thomas Gleixner | e6220bd | 2011-06-09 13:08:25 +0000 | [diff] [blame] | 24 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
Ralf Baechle | 15f304b | 2011-06-01 19:04:59 +0100 | [diff] [blame] | 25 | |
Russell King | 442c817 | 2011-05-08 14:06:52 +0100 | [diff] [blame] | 26 | config CLKSRC_MMIO |
| 27 | bool |
Jamie Iles | 06c3df4 | 2011-06-06 12:43:07 +0100 | [diff] [blame] | 28 | |
Baruch Siach | 9b8bb77 | 2015-01-26 20:35:18 +0200 | [diff] [blame] | 29 | config DIGICOLOR_TIMER |
| 30 | bool |
| 31 | |
Jamie Iles | 06c3df4 | 2011-06-06 12:43:07 +0100 | [diff] [blame] | 32 | config DW_APB_TIMER |
| 33 | bool |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 34 | |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 35 | config DW_APB_TIMER_OF |
| 36 | bool |
Heiko Stuebner | 1b4eca0 | 2013-06-04 11:38:11 +0200 | [diff] [blame] | 37 | select DW_APB_TIMER |
Heiko Stuebner | 1002148 | 2013-06-04 11:38:42 +0200 | [diff] [blame] | 38 | select CLKSRC_OF |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 39 | |
Daniel Lezcano | 468b8c4 | 2015-01-25 22:06:02 +0100 | [diff] [blame] | 40 | config ROCKCHIP_TIMER |
| 41 | bool |
| 42 | select CLKSRC_OF |
| 43 | |
Gregory CLEMENT | 6fe9cbd | 2012-06-13 18:58:09 +0200 | [diff] [blame] | 44 | config ARMADA_370_XP_TIMER |
| 45 | bool |
Jean Pihet | 7b0dd72 | 2013-09-18 20:55:09 +0200 | [diff] [blame] | 46 | select CLKSRC_OF |
Gregory CLEMENT | 6fe9cbd | 2012-06-13 18:58:09 +0200 | [diff] [blame] | 47 | |
Carlo Caione | e4a6b37 | 2014-09-29 01:50:05 +0200 | [diff] [blame] | 48 | config MESON6_TIMER |
| 49 | bool |
Beniamino Galvani | 7b6b0a4 | 2014-11-18 16:41:20 +0100 | [diff] [blame] | 50 | select CLKSRC_MMIO |
Carlo Caione | e4a6b37 | 2014-09-29 01:50:05 +0200 | [diff] [blame] | 51 | |
Sebastian Hesselbarth | 0c1dcfd | 2013-06-11 08:38:50 +0200 | [diff] [blame] | 52 | config ORION_TIMER |
| 53 | select CLKSRC_OF |
| 54 | select CLKSRC_MMIO |
| 55 | bool |
| 56 | |
Maxime Ripard | 119fd63 | 2013-03-24 11:49:25 +0100 | [diff] [blame] | 57 | config SUN4I_TIMER |
Maxime Ripard | 71c568c | 2013-10-14 21:07:46 +0200 | [diff] [blame] | 58 | select CLKSRC_MMIO |
Maxime Ripard | b2ac5d7 | 2012-11-12 15:07:50 +0100 | [diff] [blame] | 59 | bool |
| 60 | |
Maxime Ripard | 6790554 | 2013-11-07 12:01:48 +0100 | [diff] [blame] | 61 | config SUN5I_HSTIMER |
| 62 | select CLKSRC_MMIO |
| 63 | bool |
| 64 | |
Thierry Reding | 910978e7 | 2014-07-07 15:26:30 +0200 | [diff] [blame] | 65 | config TEGRA_TIMER |
| 66 | bool |
| 67 | |
Tony Prisk | ff7ec34 | 2013-01-14 17:58:21 +1300 | [diff] [blame] | 68 | config VT8500_TIMER |
| 69 | bool |
| 70 | |
Michal Simek | 4f0f234 | 2013-03-20 10:46:01 +0100 | [diff] [blame] | 71 | config CADENCE_TTC_TIMER |
| 72 | bool |
| 73 | |
Daniel Lezcano | a8b1b9f | 2015-02-23 19:54:16 +0100 | [diff] [blame] | 74 | config ASM9260_TIMER |
| 75 | bool |
| 76 | select CLKSRC_MMIO |
| 77 | select CLKSRC_OF |
| 78 | |
Linus Walleij | 694e33a | 2012-10-18 14:01:25 +0200 | [diff] [blame] | 79 | config CLKSRC_NOMADIK_MTU |
| 80 | bool |
| 81 | depends on (ARCH_NOMADIK || ARCH_U8500) |
| 82 | select CLKSRC_MMIO |
| 83 | help |
| 84 | Support for Multi Timer Unit. MTU provides access |
| 85 | to multiple interrupt generating programmable |
| 86 | 32-bit free running decrementing counters. |
| 87 | |
| 88 | config CLKSRC_NOMADIK_MTU_SCHED_CLOCK |
| 89 | bool |
| 90 | depends on CLKSRC_NOMADIK_MTU |
| 91 | help |
| 92 | Use the Multi Timer Unit as the sched_clock. |
| 93 | |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 94 | config CLKSRC_DBX500_PRCMU |
| 95 | bool "Clocksource PRCMU Timer" |
Linus Walleij | 29746f4 | 2012-04-13 13:16:31 +0200 | [diff] [blame] | 96 | depends on UX500_SOC_DB8500 |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 97 | default y |
| 98 | help |
| 99 | Use the always on PRCMU Timer as clocksource |
| 100 | |
| 101 | config CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
| 102 | bool "Clocksource PRCMU Timer sched_clock" |
Linus Walleij | 694e33a | 2012-10-18 14:01:25 +0200 | [diff] [blame] | 103 | depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 104 | default y |
| 105 | help |
| 106 | Use the always on PRCMU Timer as sched_clock |
Marc Zyngier | 985c067 | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 107 | |
Uwe Kleine-König | 9c9b781 | 2013-10-03 21:56:29 +0200 | [diff] [blame] | 108 | config CLKSRC_EFM32 |
| 109 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 |
| 110 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) |
Axel Lin | 09ca275 | 2013-11-20 10:15:11 +0800 | [diff] [blame] | 111 | select CLKSRC_MMIO |
Uwe Kleine-König | 9c9b781 | 2013-10-03 21:56:29 +0200 | [diff] [blame] | 112 | default ARCH_EFM32 |
| 113 | help |
| 114 | Support to use the timers of EFM32 SoCs as clock source and clock |
| 115 | event device. |
| 116 | |
Joachim Eastwood | 050dd32 | 2015-05-12 00:00:48 +0200 | [diff] [blame] | 117 | config CLKSRC_LPC32XX |
| 118 | bool |
| 119 | select CLKSRC_MMIO |
| 120 | select CLKSRC_OF |
| 121 | |
Ezequiel Garcia | 8458398 | 2015-08-07 16:39:31 +0100 | [diff] [blame] | 122 | config CLKSRC_PISTACHIO |
| 123 | bool |
| 124 | select CLKSRC_OF |
| 125 | |
Maxime Coquelin | e37e459 | 2015-05-22 23:03:33 +0200 | [diff] [blame] | 126 | config CLKSRC_STM32 |
Paul Gortmaker | 1cb6c21 | 2015-06-20 19:02:32 -0400 | [diff] [blame] | 127 | bool "Clocksource for STM32 SoCs" if !ARCH_STM32 |
| 128 | depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST) |
Maxime Coquelin | e37e459 | 2015-05-22 23:03:33 +0200 | [diff] [blame] | 129 | select CLKSRC_MMIO |
| 130 | |
Mark Rutland | 8a4da6e | 2012-11-12 14:33:44 +0000 | [diff] [blame] | 131 | config ARM_ARCH_TIMER |
| 132 | bool |
Rob Herring | 0583fe4 | 2013-04-10 18:27:51 -0500 | [diff] [blame] | 133 | select CLKSRC_OF if OF |
Marc Zyngier | ae281cb | 2015-09-28 15:49:17 +0100 | [diff] [blame] | 134 | select CLKSRC_ACPI if ACPI |
James Hogan | a2c5d4e | 2012-10-09 10:54:39 +0100 | [diff] [blame] | 135 | |
Will Deacon | 037f637 | 2013-08-23 15:32:29 +0100 | [diff] [blame] | 136 | config ARM_ARCH_TIMER_EVTSTREAM |
| 137 | bool "Support for ARM architected timer event stream generation" |
| 138 | default y if ARM_ARCH_TIMER |
Stephen Boyd | 77f7ce9 | 2013-11-20 12:02:03 -0800 | [diff] [blame] | 139 | depends on ARM_ARCH_TIMER |
Will Deacon | 037f637 | 2013-08-23 15:32:29 +0100 | [diff] [blame] | 140 | help |
| 141 | This option enables support for event stream generation based on |
| 142 | the ARM architected timer. It is used for waking up CPUs executing |
| 143 | the wfe instruction at a frequency represented as a power-of-2 |
| 144 | divisor of the clock rate. |
| 145 | The main use of the event stream is wfe-based timeouts of userspace |
| 146 | locking implementations. It might also be useful for imposing timeout |
| 147 | on wfe to safeguard against any programming errors in case an expected |
| 148 | event is not generated. |
| 149 | This must be disabled for hardware validation purposes to detect any |
| 150 | hardware anomalies of missing events. |
| 151 | |
Stuart Menefy | c1b40e4 | 2013-06-26 12:48:38 +0100 | [diff] [blame] | 152 | config ARM_GLOBAL_TIMER |
| 153 | bool |
| 154 | select CLKSRC_OF if OF |
| 155 | help |
| 156 | This options enables support for the ARM global timer unit |
| 157 | |
Sudeep Holla | 0b7402d | 2015-05-18 16:29:40 +0100 | [diff] [blame] | 158 | config ARM_TIMER_SP804 |
| 159 | bool "Support for Dual Timer SP804 module" |
Guenter Roeck | 002af19 | 2015-06-23 20:49:05 -0700 | [diff] [blame] | 160 | depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP |
Sudeep Holla | 0b7402d | 2015-05-18 16:29:40 +0100 | [diff] [blame] | 161 | select CLKSRC_MMIO |
| 162 | select CLKSRC_OF if OF |
| 163 | |
Stuart Menefy | c1b40e4 | 2013-06-26 12:48:38 +0100 | [diff] [blame] | 164 | config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK |
| 165 | bool |
| 166 | depends on ARM_GLOBAL_TIMER |
| 167 | default y |
| 168 | help |
| 169 | Use ARM global timer clock source as sched_clock |
| 170 | |
Maxime Coquelin | 4958ebb | 2015-05-09 09:53:46 +0200 | [diff] [blame] | 171 | config ARMV7M_SYSTICK |
| 172 | bool |
| 173 | select CLKSRC_OF if OF |
| 174 | select CLKSRC_MMIO |
| 175 | help |
| 176 | This options enables support for the ARMv7M system timer unit |
| 177 | |
Maxime Ripard | b052ff3 | 2014-09-02 18:12:35 +0200 | [diff] [blame] | 178 | config ATMEL_PIT |
| 179 | select CLKSRC_OF if OF |
| 180 | def_bool SOC_AT91SAM9 || SOC_SAMA5 |
| 181 | |
Alexandre Belloni | b53cdd0 | 2015-03-12 13:07:31 +0100 | [diff] [blame] | 182 | config ATMEL_ST |
| 183 | bool |
| 184 | select CLKSRC_OF |
Alexandre Belloni | 7ab7ef7 | 2015-03-19 14:17:48 +0100 | [diff] [blame] | 185 | select MFD_SYSCON |
Alexandre Belloni | b53cdd0 | 2015-03-12 13:07:31 +0100 | [diff] [blame] | 186 | |
James Hogan | a2c5d4e | 2012-10-09 10:54:39 +0100 | [diff] [blame] | 187 | config CLKSRC_METAG_GENERIC |
| 188 | def_bool y if METAG |
| 189 | help |
| 190 | This option enables support for the Meta per-thread timers. |
Thomas Abraham | 6938d75a | 2013-03-09 16:16:13 +0900 | [diff] [blame] | 191 | |
| 192 | config CLKSRC_EXYNOS_MCT |
| 193 | def_bool y if ARCH_EXYNOS |
Doug Anderson | 3252a64 | 2014-07-05 06:43:26 +0900 | [diff] [blame] | 194 | depends on !ARM64 |
Thomas Abraham | 6938d75a | 2013-03-09 16:16:13 +0900 | [diff] [blame] | 195 | help |
| 196 | Support for Multi Core Timer controller on Exynos SoCs. |
Arnd Bergmann | 241a987 | 2013-05-06 23:49:09 +0200 | [diff] [blame] | 197 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 198 | config CLKSRC_SAMSUNG_PWM |
Tomasz Figa | 77d8443 | 2013-04-23 17:46:23 +0200 | [diff] [blame] | 199 | bool |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 200 | help |
| 201 | This is a new clocksource driver for the PWM timer found in |
| 202 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver |
| 203 | for all devicetree enabled platforms. This driver will be |
| 204 | needed only on systems that do not have the Exynos MCT available. |
Jingchang Lu | c196724 | 2013-05-29 10:12:17 +0200 | [diff] [blame] | 205 | |
Xiubo Li | 2529c3a | 2014-05-23 10:12:04 +0200 | [diff] [blame] | 206 | config FSL_FTM_TIMER |
| 207 | bool |
| 208 | help |
| 209 | Support for Freescale FlexTimer Module (FTM) timer. |
| 210 | |
Jingchang Lu | c196724 | 2013-05-29 10:12:17 +0200 | [diff] [blame] | 211 | config VF_PIT_TIMER |
| 212 | bool |
| 213 | help |
| 214 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 215 | |
| 216 | config SYS_SUPPORTS_SH_CMT |
| 217 | bool |
| 218 | |
Matthias Brugger | ecb3530 | 2014-07-18 11:36:43 +0200 | [diff] [blame] | 219 | config MTK_TIMER |
| 220 | select CLKSRC_OF |
| 221 | select CLKSRC_MMIO |
| 222 | bool |
| 223 | |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 224 | config SYS_SUPPORTS_SH_MTU2 |
| 225 | bool |
| 226 | |
| 227 | config SYS_SUPPORTS_SH_TMU |
| 228 | bool |
| 229 | |
| 230 | config SYS_SUPPORTS_EM_STI |
| 231 | bool |
| 232 | |
| 233 | config SH_TIMER_CMT |
| 234 | bool "Renesas CMT timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 235 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 236 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 237 | default SYS_SUPPORTS_SH_CMT |
| 238 | help |
| 239 | This enables build of a clocksource and clockevent driver for |
| 240 | the Compare Match Timer (CMT) hardware available in 16/32/48-bit |
| 241 | variants on a wide range of Mobile and Automotive SoCs from Renesas. |
| 242 | |
| 243 | config SH_TIMER_MTU2 |
| 244 | bool "Renesas MTU2 timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 245 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 246 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 247 | default SYS_SUPPORTS_SH_MTU2 |
| 248 | help |
| 249 | This enables build of a clockevent driver for the Multi-Function |
Kuninori Morimoto | 7e13918 | 2014-07-18 11:36:36 +0200 | [diff] [blame] | 250 | Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas. |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 251 | This hardware comes with 16 bit-timer registers. |
| 252 | |
| 253 | config SH_TIMER_TMU |
| 254 | bool "Renesas TMU timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 255 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 256 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 257 | default SYS_SUPPORTS_SH_TMU |
| 258 | help |
| 259 | This enables build of a clocksource and clockevent driver for |
| 260 | the 32-bit Timer Unit (TMU) hardware available on a wide range |
| 261 | SoCs from Renesas. |
| 262 | |
| 263 | config EM_TIMER_STI |
| 264 | bool "Renesas STI timer driver" if COMPILE_TEST |
Chen Gang | 40c9631 | 2014-07-08 20:39:40 +0800 | [diff] [blame] | 265 | depends on GENERIC_CLOCKEVENTS && HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 266 | default SYS_SUPPORTS_EM_STI |
| 267 | help |
| 268 | This enables build of a clocksource and clockevent driver for |
| 269 | the 48-bit System Timer (STI) hardware available on a SoCs |
| 270 | such as EMEV2 from former NEC Electronics. |
Linus Torvalds | dfc25e4 | 2014-04-05 13:51:19 -0700 | [diff] [blame] | 271 | |
Kumar Gala | 3f8e8ce | 2014-01-29 16:17:30 -0600 | [diff] [blame] | 272 | config CLKSRC_QCOM |
| 273 | bool |
Pawel Moll | 220e2a8 | 2014-04-16 18:22:59 +0100 | [diff] [blame] | 274 | |
| 275 | config CLKSRC_VERSATILE |
| 276 | bool "ARM Versatile (Express) reference platforms clock source" |
Deng-Cheng Zhu | ff37015 | 2015-03-07 10:30:22 -0800 | [diff] [blame] | 277 | depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET |
Pawel Moll | 220e2a8 | 2014-04-16 18:22:59 +0100 | [diff] [blame] | 278 | select CLKSRC_OF |
| 279 | default y if MFD_VEXPRESS_SYSREG |
| 280 | help |
| 281 | This option enables clock source based on free running |
| 282 | counter available in the "System Registers" block of |
| 283 | ARM Versatile, RealView and Versatile Express reference |
| 284 | platforms. |
Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 285 | |
Andrew Bresticker | fa5635a | 2014-10-20 12:03:58 -0700 | [diff] [blame] | 286 | config CLKSRC_MIPS_GIC |
| 287 | bool |
| 288 | depends on MIPS_GIC |
Andrew Bresticker | e12aa82 | 2014-11-12 11:43:39 -0800 | [diff] [blame] | 289 | select CLKSRC_OF |
Andrew Bresticker | fa5635a | 2014-10-20 12:03:58 -0700 | [diff] [blame] | 290 | |
Marc Gonzalez | ccd63ce | 2015-10-09 16:59:18 +0200 | [diff] [blame] | 291 | config CLKSRC_TANGO_XTAL |
| 292 | bool |
| 293 | select CLKSRC_OF |
| 294 | |
Dmitry Eremin-Solenikov | e074ff8 | 2014-12-21 16:07:09 +0100 | [diff] [blame] | 295 | config CLKSRC_PXA |
| 296 | def_bool y if ARCH_PXA || ARCH_SA1100 |
Antonio Borneo | 02760b1 | 2015-06-17 19:42:30 +0800 | [diff] [blame] | 297 | select CLKSRC_OF if OF |
Dmitry Eremin-Solenikov | e074ff8 | 2014-12-21 16:07:09 +0100 | [diff] [blame] | 298 | help |
| 299 | This enables OST0 support available on PXA and SA-11x0 |
| 300 | platforms. |
Yoshinori Sato | 618b902 | 2015-01-28 02:52:42 +0900 | [diff] [blame] | 301 | |
| 302 | config H8300_TMR16 |
| 303 | bool |
| 304 | |
| 305 | config H8300_TPU |
| 306 | bool |
| 307 | |
Shawn Guo | bea5af4 | 2015-05-15 15:41:00 +0800 | [diff] [blame] | 308 | config CLKSRC_IMX_GPT |
| 309 | bool "Clocksource using i.MX GPT" if COMPILE_TEST |
| 310 | depends on ARM && CLKDEV_LOOKUP |
| 311 | select CLKSRC_MMIO |
| 312 | |
Lee Jones | 70bef01 | 2015-05-26 13:39:43 +0100 | [diff] [blame] | 313 | config CLKSRC_ST_LPC |
| 314 | bool |
| 315 | depends on ARCH_STI |
| 316 | select CLKSRC_OF if OF |
| 317 | help |
| 318 | Enable this option to use the Low Power controller timer |
| 319 | as clocksource. |
| 320 | |
Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 321 | endmenu |