Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Broadcom Corporation |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/types.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/platform_device.h> |
| 18 | #include <linux/interrupt.h> |
| 19 | #include <linux/sysfs.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/string.h> |
| 22 | #include <linux/device.h> |
| 23 | #include <linux/list.h> |
| 24 | #include <linux/of.h> |
| 25 | #include <linux/bitops.h> |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 26 | #include <linux/pm.h> |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 27 | |
Kevin Cernekee | dd1d78a | 2014-11-25 16:49:49 -0800 | [diff] [blame] | 28 | #ifdef CONFIG_ARM |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 29 | #include <asm/bug.h> |
| 30 | #include <asm/signal.h> |
Kevin Cernekee | dd1d78a | 2014-11-25 16:49:49 -0800 | [diff] [blame] | 31 | #endif |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 32 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 33 | #define ARB_ERR_CAP_CLEAR (1 << 0) |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 34 | #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12) |
| 35 | #define ARB_ERR_CAP_STATUS_TEA (1 << 11) |
| 36 | #define ARB_ERR_CAP_STATUS_BS_SHIFT (1 << 2) |
| 37 | #define ARB_ERR_CAP_STATUS_BS_MASK 0x3c |
| 38 | #define ARB_ERR_CAP_STATUS_WRITE (1 << 1) |
| 39 | #define ARB_ERR_CAP_STATUS_VALID (1 << 0) |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 40 | |
| 41 | enum { |
| 42 | ARB_TIMER, |
| 43 | ARB_ERR_CAP_CLR, |
| 44 | ARB_ERR_CAP_HI_ADDR, |
| 45 | ARB_ERR_CAP_ADDR, |
| 46 | ARB_ERR_CAP_DATA, |
| 47 | ARB_ERR_CAP_STATUS, |
| 48 | ARB_ERR_CAP_MASTER, |
| 49 | }; |
| 50 | |
Kevin Cernekee | d1d6786 | 2014-11-25 16:49:52 -0800 | [diff] [blame] | 51 | static const int gisb_offsets_bcm7038[] = { |
| 52 | [ARB_TIMER] = 0x00c, |
| 53 | [ARB_ERR_CAP_CLR] = 0x0c4, |
| 54 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 55 | [ARB_ERR_CAP_ADDR] = 0x0c8, |
| 56 | [ARB_ERR_CAP_DATA] = 0x0cc, |
| 57 | [ARB_ERR_CAP_STATUS] = 0x0d0, |
| 58 | [ARB_ERR_CAP_MASTER] = -1, |
| 59 | }; |
| 60 | |
| 61 | static const int gisb_offsets_bcm7400[] = { |
| 62 | [ARB_TIMER] = 0x00c, |
| 63 | [ARB_ERR_CAP_CLR] = 0x0c8, |
| 64 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 65 | [ARB_ERR_CAP_ADDR] = 0x0cc, |
| 66 | [ARB_ERR_CAP_DATA] = 0x0d0, |
| 67 | [ARB_ERR_CAP_STATUS] = 0x0d4, |
| 68 | [ARB_ERR_CAP_MASTER] = 0x0d8, |
| 69 | }; |
| 70 | |
| 71 | static const int gisb_offsets_bcm7435[] = { |
| 72 | [ARB_TIMER] = 0x00c, |
| 73 | [ARB_ERR_CAP_CLR] = 0x168, |
| 74 | [ARB_ERR_CAP_HI_ADDR] = -1, |
| 75 | [ARB_ERR_CAP_ADDR] = 0x16c, |
| 76 | [ARB_ERR_CAP_DATA] = 0x170, |
| 77 | [ARB_ERR_CAP_STATUS] = 0x174, |
| 78 | [ARB_ERR_CAP_MASTER] = 0x178, |
| 79 | }; |
| 80 | |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 81 | static const int gisb_offsets_bcm7445[] = { |
| 82 | [ARB_TIMER] = 0x008, |
| 83 | [ARB_ERR_CAP_CLR] = 0x7e4, |
| 84 | [ARB_ERR_CAP_HI_ADDR] = 0x7e8, |
| 85 | [ARB_ERR_CAP_ADDR] = 0x7ec, |
| 86 | [ARB_ERR_CAP_DATA] = 0x7f0, |
| 87 | [ARB_ERR_CAP_STATUS] = 0x7f4, |
| 88 | [ARB_ERR_CAP_MASTER] = 0x7f8, |
| 89 | }; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 90 | |
| 91 | struct brcmstb_gisb_arb_device { |
| 92 | void __iomem *base; |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 93 | const int *gisb_offsets; |
Kevin Cernekee | fbf4e26 | 2014-11-25 16:49:53 -0800 | [diff] [blame] | 94 | bool big_endian; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 95 | struct mutex lock; |
| 96 | struct list_head next; |
| 97 | u32 valid_mask; |
| 98 | const char *master_names[sizeof(u32) * BITS_PER_BYTE]; |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 99 | u32 saved_timeout; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 100 | }; |
| 101 | |
| 102 | static LIST_HEAD(brcmstb_gisb_arb_device_list); |
| 103 | |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 104 | static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) |
| 105 | { |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 106 | int offset = gdev->gisb_offsets[reg]; |
| 107 | |
| 108 | /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */ |
| 109 | if (offset == -1) |
| 110 | return 1; |
| 111 | |
Kevin Cernekee | fbf4e26 | 2014-11-25 16:49:53 -0800 | [diff] [blame] | 112 | if (gdev->big_endian) |
| 113 | return ioread32be(gdev->base + offset); |
| 114 | else |
| 115 | return ioread32(gdev->base + offset); |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) |
| 119 | { |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 120 | int offset = gdev->gisb_offsets[reg]; |
| 121 | |
| 122 | if (offset == -1) |
| 123 | return; |
Kevin Cernekee | fbf4e26 | 2014-11-25 16:49:53 -0800 | [diff] [blame] | 124 | |
| 125 | if (gdev->big_endian) |
| 126 | iowrite32be(val, gdev->base + reg); |
| 127 | else |
| 128 | iowrite32(val, gdev->base + reg); |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 129 | } |
| 130 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 131 | static ssize_t gisb_arb_get_timeout(struct device *dev, |
| 132 | struct device_attribute *attr, |
| 133 | char *buf) |
| 134 | { |
| 135 | struct platform_device *pdev = to_platform_device(dev); |
| 136 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 137 | u32 timeout; |
| 138 | |
| 139 | mutex_lock(&gdev->lock); |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 140 | timeout = gisb_read(gdev, ARB_TIMER); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 141 | mutex_unlock(&gdev->lock); |
| 142 | |
| 143 | return sprintf(buf, "%d", timeout); |
| 144 | } |
| 145 | |
| 146 | static ssize_t gisb_arb_set_timeout(struct device *dev, |
| 147 | struct device_attribute *attr, |
| 148 | const char *buf, size_t count) |
| 149 | { |
| 150 | struct platform_device *pdev = to_platform_device(dev); |
| 151 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 152 | int val, ret; |
| 153 | |
| 154 | ret = kstrtoint(buf, 10, &val); |
| 155 | if (ret < 0) |
| 156 | return ret; |
| 157 | |
| 158 | if (val == 0 || val >= 0xffffffff) |
| 159 | return -EINVAL; |
| 160 | |
| 161 | mutex_lock(&gdev->lock); |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 162 | gisb_write(gdev, val, ARB_TIMER); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 163 | mutex_unlock(&gdev->lock); |
| 164 | |
| 165 | return count; |
| 166 | } |
| 167 | |
| 168 | static const char * |
| 169 | brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev, |
| 170 | u32 masters) |
| 171 | { |
| 172 | u32 mask = gdev->valid_mask & masters; |
| 173 | |
| 174 | if (hweight_long(mask) != 1) |
| 175 | return NULL; |
| 176 | |
| 177 | return gdev->master_names[ffs(mask) - 1]; |
| 178 | } |
| 179 | |
| 180 | static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev, |
| 181 | const char *reason) |
| 182 | { |
| 183 | u32 cap_status; |
| 184 | unsigned long arb_addr; |
| 185 | u32 master; |
| 186 | const char *m_name; |
| 187 | char m_fmt[11]; |
| 188 | |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 189 | cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 190 | |
| 191 | /* Invalid captured address, bail out */ |
| 192 | if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) |
| 193 | return 1; |
| 194 | |
| 195 | /* Read the address and master */ |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 196 | arb_addr = gisb_read(gdev, ARB_ERR_CAP_ADDR) & 0xffffffff; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 197 | #if (IS_ENABLED(CONFIG_PHYS_ADDR_T_64BIT)) |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 198 | arb_addr |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 199 | #endif |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 200 | master = gisb_read(gdev, ARB_ERR_CAP_MASTER); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 201 | |
| 202 | m_name = brcmstb_gisb_master_to_str(gdev, master); |
| 203 | if (!m_name) { |
| 204 | snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master); |
| 205 | m_name = m_fmt; |
| 206 | } |
| 207 | |
| 208 | pr_crit("%s: %s at 0x%lx [%c %s], core: %s\n", |
| 209 | __func__, reason, arb_addr, |
| 210 | cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R', |
| 211 | cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "", |
| 212 | m_name); |
| 213 | |
| 214 | /* clear the GISB error */ |
Kevin Cernekee | 2b53ead | 2014-11-25 16:49:50 -0800 | [diff] [blame] | 215 | gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
Kevin Cernekee | dd1d78a | 2014-11-25 16:49:49 -0800 | [diff] [blame] | 220 | #ifdef CONFIG_ARM |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 221 | static int brcmstb_bus_error_handler(unsigned long addr, unsigned int fsr, |
| 222 | struct pt_regs *regs) |
| 223 | { |
| 224 | int ret = 0; |
| 225 | struct brcmstb_gisb_arb_device *gdev; |
| 226 | |
| 227 | /* iterate over each GISB arb registered handlers */ |
| 228 | list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) |
| 229 | ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error"); |
| 230 | /* |
| 231 | * If it was an imprecise abort, then we need to correct the |
| 232 | * return address to be _after_ the instruction. |
| 233 | */ |
| 234 | if (fsr & (1 << 10)) |
| 235 | regs->ARM_pc += 4; |
| 236 | |
| 237 | return ret; |
| 238 | } |
Kevin Cernekee | dd1d78a | 2014-11-25 16:49:49 -0800 | [diff] [blame] | 239 | #endif |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 240 | |
| 241 | static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) |
| 242 | { |
| 243 | brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); |
| 244 | |
| 245 | return IRQ_HANDLED; |
| 246 | } |
| 247 | |
| 248 | static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id) |
| 249 | { |
| 250 | brcmstb_gisb_arb_decode_addr(dev_id, "target abort"); |
| 251 | |
| 252 | return IRQ_HANDLED; |
| 253 | } |
| 254 | |
| 255 | static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO, |
| 256 | gisb_arb_get_timeout, gisb_arb_set_timeout); |
| 257 | |
| 258 | static struct attribute *gisb_arb_sysfs_attrs[] = { |
| 259 | &dev_attr_gisb_arb_timeout.attr, |
| 260 | NULL, |
| 261 | }; |
| 262 | |
| 263 | static struct attribute_group gisb_arb_sysfs_attr_group = { |
| 264 | .attrs = gisb_arb_sysfs_attrs, |
| 265 | }; |
| 266 | |
Kevin Cernekee | d1d6786 | 2014-11-25 16:49:52 -0800 | [diff] [blame] | 267 | static const struct of_device_id brcmstb_gisb_arb_of_match[] = { |
| 268 | { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 }, |
| 269 | { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 }, |
| 270 | { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 }, |
| 271 | { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 }, |
| 272 | { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 }, |
| 273 | { }, |
| 274 | }; |
| 275 | |
Florian Fainelli | 2e8a29a | 2014-11-20 10:14:46 -0800 | [diff] [blame] | 276 | static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 277 | { |
| 278 | struct device_node *dn = pdev->dev.of_node; |
| 279 | struct brcmstb_gisb_arb_device *gdev; |
Kevin Cernekee | d1d6786 | 2014-11-25 16:49:52 -0800 | [diff] [blame] | 280 | const struct of_device_id *of_id; |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 281 | struct resource *r; |
| 282 | int err, timeout_irq, tea_irq; |
| 283 | unsigned int num_masters, j = 0; |
| 284 | int i, first, last; |
| 285 | |
| 286 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 287 | timeout_irq = platform_get_irq(pdev, 0); |
| 288 | tea_irq = platform_get_irq(pdev, 1); |
| 289 | |
| 290 | gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL); |
| 291 | if (!gdev) |
| 292 | return -ENOMEM; |
| 293 | |
| 294 | mutex_init(&gdev->lock); |
| 295 | INIT_LIST_HEAD(&gdev->next); |
| 296 | |
Jingoo Han | c9d53c0 | 2014-06-11 14:00:05 +0900 | [diff] [blame] | 297 | gdev->base = devm_ioremap_resource(&pdev->dev, r); |
| 298 | if (IS_ERR(gdev->base)) |
| 299 | return PTR_ERR(gdev->base); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 300 | |
Kevin Cernekee | d1d6786 | 2014-11-25 16:49:52 -0800 | [diff] [blame] | 301 | of_id = of_match_node(brcmstb_gisb_arb_of_match, dn); |
| 302 | if (!of_id) { |
| 303 | pr_err("failed to look up compatible string\n"); |
| 304 | return -EINVAL; |
| 305 | } |
| 306 | gdev->gisb_offsets = of_id->data; |
Kevin Cernekee | fbf4e26 | 2014-11-25 16:49:53 -0800 | [diff] [blame] | 307 | gdev->big_endian = of_device_is_big_endian(dn); |
Kevin Cernekee | f808358 | 2014-11-25 16:49:51 -0800 | [diff] [blame] | 308 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 309 | err = devm_request_irq(&pdev->dev, timeout_irq, |
| 310 | brcmstb_gisb_timeout_handler, 0, pdev->name, |
| 311 | gdev); |
| 312 | if (err < 0) |
| 313 | return err; |
| 314 | |
| 315 | err = devm_request_irq(&pdev->dev, tea_irq, |
| 316 | brcmstb_gisb_tea_handler, 0, pdev->name, |
| 317 | gdev); |
| 318 | if (err < 0) |
| 319 | return err; |
| 320 | |
| 321 | /* If we do not have a valid mask, assume all masters are enabled */ |
| 322 | if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask", |
| 323 | &gdev->valid_mask)) |
| 324 | gdev->valid_mask = 0xffffffff; |
| 325 | |
| 326 | /* Proceed with reading the litteral names if we agree on the |
| 327 | * number of masters |
| 328 | */ |
| 329 | num_masters = of_property_count_strings(dn, |
| 330 | "brcm,gisb-arb-master-names"); |
| 331 | if (hweight_long(gdev->valid_mask) == num_masters) { |
| 332 | first = ffs(gdev->valid_mask) - 1; |
| 333 | last = fls(gdev->valid_mask) - 1; |
| 334 | |
| 335 | for (i = first; i < last; i++) { |
| 336 | if (!(gdev->valid_mask & BIT(i))) |
| 337 | continue; |
| 338 | |
| 339 | of_property_read_string_index(dn, |
| 340 | "brcm,gisb-arb-master-names", j, |
| 341 | &gdev->master_names[i]); |
| 342 | j++; |
| 343 | } |
| 344 | } |
| 345 | |
| 346 | err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group); |
| 347 | if (err) |
| 348 | return err; |
| 349 | |
| 350 | platform_set_drvdata(pdev, gdev); |
| 351 | |
| 352 | list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); |
| 353 | |
Arnd Bergmann | 7135466 | 2014-12-08 17:16:03 +0100 | [diff] [blame] | 354 | #ifdef CONFIG_ARM |
Florian Fainelli | f1bee78 | 2014-09-18 12:32:10 -0700 | [diff] [blame] | 355 | hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0, |
| 356 | "imprecise external abort"); |
Arnd Bergmann | 7135466 | 2014-12-08 17:16:03 +0100 | [diff] [blame] | 357 | #endif |
Florian Fainelli | f1bee78 | 2014-09-18 12:32:10 -0700 | [diff] [blame] | 358 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 359 | dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n", |
| 360 | gdev->base, timeout_irq, tea_irq); |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 365 | #ifdef CONFIG_PM_SLEEP |
| 366 | static int brcmstb_gisb_arb_suspend(struct device *dev) |
| 367 | { |
| 368 | struct platform_device *pdev = to_platform_device(dev); |
| 369 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 370 | |
Arnd Bergmann | 7135466 | 2014-12-08 17:16:03 +0100 | [diff] [blame] | 371 | gdev->saved_timeout = gisb_read(gdev, ARB_TIMER); |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 372 | |
| 373 | return 0; |
| 374 | } |
| 375 | |
| 376 | /* Make sure we provide the same timeout value that was configured before, and |
| 377 | * do this before the GISB timeout interrupt handler has any chance to run. |
| 378 | */ |
| 379 | static int brcmstb_gisb_arb_resume_noirq(struct device *dev) |
| 380 | { |
| 381 | struct platform_device *pdev = to_platform_device(dev); |
| 382 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); |
| 383 | |
Arnd Bergmann | 7135466 | 2014-12-08 17:16:03 +0100 | [diff] [blame] | 384 | gisb_write(gdev, gdev->saved_timeout, ARB_TIMER); |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 385 | |
| 386 | return 0; |
| 387 | } |
| 388 | #else |
| 389 | #define brcmstb_gisb_arb_suspend NULL |
| 390 | #define brcmstb_gisb_arb_resume_noirq NULL |
| 391 | #endif |
| 392 | |
| 393 | static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = { |
| 394 | .suspend = brcmstb_gisb_arb_suspend, |
| 395 | .resume_noirq = brcmstb_gisb_arb_resume_noirq, |
| 396 | }; |
| 397 | |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 398 | static struct platform_driver brcmstb_gisb_arb_driver = { |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 399 | .driver = { |
| 400 | .name = "brcm-gisb-arb", |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 401 | .of_match_table = brcmstb_gisb_arb_of_match, |
Florian Fainelli | 203bb85 | 2014-09-18 12:37:14 -0700 | [diff] [blame] | 402 | .pm = &brcmstb_gisb_arb_pm_ops, |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 403 | }, |
| 404 | }; |
| 405 | |
| 406 | static int __init brcm_gisb_driver_init(void) |
| 407 | { |
Florian Fainelli | 2e8a29a | 2014-11-20 10:14:46 -0800 | [diff] [blame] | 408 | return platform_driver_probe(&brcmstb_gisb_arb_driver, |
| 409 | brcmstb_gisb_arb_probe); |
Florian Fainelli | 44127b7 | 2014-05-19 13:05:59 -0700 | [diff] [blame] | 410 | } |
| 411 | |
| 412 | module_init(brcm_gisb_driver_init); |