blob: 549e537d2e6e81df1918f04a54472b8b62c9b8c1 [file] [log] [blame]
Kalle Valo2f01a1f2009-04-29 23:33:31 +03001/*
2 * This file is part of wl12xx
3 *
4 * Copyright (c) 1998-2007 Texas Instruments Incorporated
5 * Copyright (C) 2008 Nokia Corporation
6 *
7 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_ACX_H__
26#define __WL12XX_ACX_H__
27
28#include "wl12xx.h"
Kalle Valoff258392009-06-12 14:14:19 +030029#include "cmd.h"
Kalle Valo2f01a1f2009-04-29 23:33:31 +030030
31/* Target's information element */
32struct acx_header {
Kalle Valoff258392009-06-12 14:14:19 +030033 struct wl12xx_cmd_header cmd;
34
35 /* acx (or information element) header */
Kalle Valo2f01a1f2009-04-29 23:33:31 +030036 u16 id;
Kalle Valoff258392009-06-12 14:14:19 +030037
38 /* payload length (not including headers */
Kalle Valo2f01a1f2009-04-29 23:33:31 +030039 u16 len;
40};
41
42struct acx_error_counter {
43 struct acx_header header;
44
45 /* The number of PLCP errors since the last time this */
46 /* information element was interrogated. This field is */
47 /* automatically cleared when it is interrogated.*/
48 u32 PLCP_error;
49
50 /* The number of FCS errors since the last time this */
51 /* information element was interrogated. This field is */
52 /* automatically cleared when it is interrogated.*/
53 u32 FCS_error;
54
55 /* The number of MPDUs without PLCP header errors received*/
56 /* since the last time this information element was interrogated. */
57 /* This field is automatically cleared when it is interrogated.*/
58 u32 valid_frame;
59
60 /* the number of missed sequence numbers in the squentially */
61 /* values of frames seq numbers */
62 u32 seq_num_miss;
63} __attribute__ ((packed));
64
65struct acx_revision {
66 struct acx_header header;
67
68 /*
69 * The WiLink firmware version, an ASCII string x.x.x.x,
70 * that uniquely identifies the current firmware.
71 * The left most digit is incremented each time a
72 * significant change is made to the firmware, such as
73 * code redesign or new platform support.
74 * The second digit is incremented when major enhancements
75 * are added or major fixes are made.
76 * The third digit is incremented for each GA release.
77 * The fourth digit is incremented for each build.
78 * The first two digits identify a firmware release version,
79 * in other words, a unique set of features.
80 * The first three digits identify a GA release.
81 */
82 char fw_version[20];
83
84 /*
85 * This 4 byte field specifies the WiLink hardware version.
86 * bits 0 - 15: Reserved.
87 * bits 16 - 23: Version ID - The WiLink version ID
88 * (1 = first spin, 2 = second spin, and so on).
89 * bits 24 - 31: Chip ID - The WiLink chip ID.
90 */
91 u32 hw_version;
92} __attribute__ ((packed));
93
94enum wl12xx_psm_mode {
95 /* Active mode */
96 WL12XX_PSM_CAM = 0,
97
98 /* Power save mode */
99 WL12XX_PSM_PS = 1,
100
101 /* Extreme low power */
102 WL12XX_PSM_ELP = 2,
103};
104
105struct acx_sleep_auth {
106 struct acx_header header;
107
108 /* The sleep level authorization of the device. */
109 /* 0 - Always active*/
110 /* 1 - Power down mode: light / fast sleep*/
111 /* 2 - ELP mode: Deep / Max sleep*/
112 u8 sleep_auth;
113 u8 padding[3];
114} __attribute__ ((packed));
115
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300116enum {
117 HOSTIF_PCI_MASTER_HOST_INDIRECT,
118 HOSTIF_PCI_MASTER_HOST_DIRECT,
119 HOSTIF_SLAVE,
120 HOSTIF_PKT_RING,
121 HOSTIF_DONTCARE = 0xFF
122};
123
124#define DEFAULT_UCAST_PRIORITY 0
125#define DEFAULT_RX_Q_PRIORITY 0
126#define DEFAULT_NUM_STATIONS 1
127#define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
128#define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
129#define TRACE_BUFFER_MAX_SIZE 256
130
131#define DP_RX_PACKET_RING_CHUNK_SIZE 1600
132#define DP_TX_PACKET_RING_CHUNK_SIZE 1600
133#define DP_RX_PACKET_RING_CHUNK_NUM 2
134#define DP_TX_PACKET_RING_CHUNK_NUM 2
135#define DP_TX_COMPLETE_TIME_OUT 20
136#define FW_TX_CMPLT_BLOCK_SIZE 16
137
138struct acx_data_path_params {
139 struct acx_header header;
140
141 u16 rx_packet_ring_chunk_size;
142 u16 tx_packet_ring_chunk_size;
143
144 u8 rx_packet_ring_chunk_num;
145 u8 tx_packet_ring_chunk_num;
146
147 /*
148 * Maximum number of packets that can be gathered
149 * in the TX complete ring before an interrupt
150 * is generated.
151 */
152 u8 tx_complete_threshold;
153
154 /* Number of pending TX complete entries in cyclic ring.*/
155 u8 tx_complete_ring_depth;
156
157 /*
158 * Max num microseconds since a packet enters the TX
159 * complete ring until an interrupt is generated.
160 */
161 u32 tx_complete_timeout;
162} __attribute__ ((packed));
163
164
165struct acx_data_path_params_resp {
166 struct acx_header header;
167
168 u16 rx_packet_ring_chunk_size;
169 u16 tx_packet_ring_chunk_size;
170
171 u8 rx_packet_ring_chunk_num;
172 u8 tx_packet_ring_chunk_num;
173
174 u8 pad[2];
175
176 u32 rx_packet_ring_addr;
177 u32 tx_packet_ring_addr;
178
179 u32 rx_control_addr;
180 u32 tx_control_addr;
181
182 u32 tx_complete_addr;
183} __attribute__ ((packed));
184
185#define TX_MSDU_LIFETIME_MIN 0
186#define TX_MSDU_LIFETIME_MAX 3000
187#define TX_MSDU_LIFETIME_DEF 512
188#define RX_MSDU_LIFETIME_MIN 0
189#define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
190#define RX_MSDU_LIFETIME_DEF 512000
191
Kalle Valoff258392009-06-12 14:14:19 +0300192struct acx_rx_msdu_lifetime {
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300193 struct acx_header header;
194
195 /*
196 * The maximum amount of time, in TU, before the
197 * firmware discards the MSDU.
198 */
199 u32 lifetime;
200} __attribute__ ((packed));
201
202/*
203 * RX Config Options Table
204 * Bit Definition
205 * === ==========
206 * 31:14 Reserved
207 * 13 Copy RX Status - when set, write three receive status words
208 * to top of rx'd MPDUs.
209 * When cleared, do not write three status words (added rev 1.5)
210 * 12 Reserved
211 * 11 RX Complete upon FCS error - when set, give rx complete
212 * interrupt for FCS errors, after the rx filtering, e.g. unicast
213 * frames not to us with FCS error will not generate an interrupt.
214 * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
215 * probe request, and probe response frames with an SSID that does
216 * not match the SSID specified by the host in the START/JOIN
217 * command.
218 * When clear, the WiLink receives frames with any SSID.
219 * 9 Broadcast Filter Enable - When set, the WiLink discards all
220 * broadcast frames. When clear, the WiLink receives all received
221 * broadcast frames.
222 * 8:6 Reserved
223 * 5 BSSID Filter Enable - When set, the WiLink discards any frames
224 * with a BSSID that does not match the BSSID specified by the
225 * host.
226 * When clear, the WiLink receives frames from any BSSID.
227 * 4 MAC Addr Filter - When set, the WiLink discards any frames
228 * with a destination address that does not match the MAC address
229 * of the adaptor.
230 * When clear, the WiLink receives frames destined to any MAC
231 * address.
232 * 3 Promiscuous - When set, the WiLink receives all valid frames
233 * (i.e., all frames that pass the FCS check).
234 * When clear, only frames that pass the other filters specified
235 * are received.
236 * 2 FCS - When set, the WiLink includes the FCS with the received
237 * frame.
238 * When cleared, the FCS is discarded.
239 * 1 PLCP header - When set, write all data from baseband to frame
240 * buffer including PHY header.
241 * 0 Reserved - Always equal to 0.
242 *
243 * RX Filter Options Table
244 * Bit Definition
245 * === ==========
246 * 31:12 Reserved - Always equal to 0.
247 * 11 Association - When set, the WiLink receives all association
248 * related frames (association request/response, reassocation
249 * request/response, and disassociation). When clear, these frames
250 * are discarded.
251 * 10 Auth/De auth - When set, the WiLink receives all authentication
252 * and de-authentication frames. When clear, these frames are
253 * discarded.
254 * 9 Beacon - When set, the WiLink receives all beacon frames.
255 * When clear, these frames are discarded.
256 * 8 Contention Free - When set, the WiLink receives all contention
257 * free frames.
258 * When clear, these frames are discarded.
259 * 7 Control - When set, the WiLink receives all control frames.
260 * When clear, these frames are discarded.
261 * 6 Data - When set, the WiLink receives all data frames.
262 * When clear, these frames are discarded.
263 * 5 FCS Error - When set, the WiLink receives frames that have FCS
264 * errors.
265 * When clear, these frames are discarded.
266 * 4 Management - When set, the WiLink receives all management
267 * frames.
268 * When clear, these frames are discarded.
269 * 3 Probe Request - When set, the WiLink receives all probe request
270 * frames.
271 * When clear, these frames are discarded.
272 * 2 Probe Response - When set, the WiLink receives all probe
273 * response frames.
274 * When clear, these frames are discarded.
275 * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
276 * frames.
277 * When clear, these frames are discarded.
278 * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
279 * that have reserved frame types and sub types as defined by the
280 * 802.11 specification.
281 * When clear, these frames are discarded.
282 */
283struct acx_rx_config {
284 struct acx_header header;
285
286 u32 config_options;
287 u32 filter_options;
288} __attribute__ ((packed));
289
290enum {
291 QOS_AC_BE = 0,
292 QOS_AC_BK,
293 QOS_AC_VI,
294 QOS_AC_VO,
295 QOS_HIGHEST_AC_INDEX = QOS_AC_VO,
296};
297
298#define MAX_NUM_OF_AC (QOS_HIGHEST_AC_INDEX+1)
299#define FIRST_AC_INDEX QOS_AC_BE
300#define MAX_NUM_OF_802_1d_TAGS 8
301#define AC_PARAMS_MAX_TSID 15
302#define MAX_APSD_CONF 0xffff
303
304#define QOS_TX_HIGH_MIN (0)
305#define QOS_TX_HIGH_MAX (100)
306
307#define QOS_TX_HIGH_BK_DEF (25)
308#define QOS_TX_HIGH_BE_DEF (35)
309#define QOS_TX_HIGH_VI_DEF (35)
310#define QOS_TX_HIGH_VO_DEF (35)
311
312#define QOS_TX_LOW_BK_DEF (15)
313#define QOS_TX_LOW_BE_DEF (25)
314#define QOS_TX_LOW_VI_DEF (25)
315#define QOS_TX_LOW_VO_DEF (25)
316
317struct acx_tx_queue_qos_config {
318 struct acx_header header;
319
320 u8 qid;
321 u8 pad[3];
322
323 /* Max number of blocks allowd in the queue */
324 u16 high_threshold;
325
326 /* Lowest memory blocks guaranteed for this queue */
327 u16 low_threshold;
328} __attribute__ ((packed));
329
330struct acx_packet_detection {
331 struct acx_header header;
332
333 u32 threshold;
334} __attribute__ ((packed));
335
336
337enum acx_slot_type {
338 SLOT_TIME_LONG = 0,
339 SLOT_TIME_SHORT = 1,
340 DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
341 MAX_SLOT_TIMES = 0xFF
342};
343
344#define STATION_WONE_INDEX 0
345
346struct acx_slot {
347 struct acx_header header;
348
349 u8 wone_index; /* Reserved */
350 u8 slot_time;
351 u8 reserved[6];
352} __attribute__ ((packed));
353
354
355#define ADDRESS_GROUP_MAX (8)
356#define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX)
357
Kalle Valoff258392009-06-12 14:14:19 +0300358struct acx_dot11_grp_addr_tbl {
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300359 struct acx_header header;
360
361 u8 enabled;
362 u8 num_groups;
363 u8 pad[2];
364 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
365} __attribute__ ((packed));
366
367
368#define RX_TIMEOUT_PS_POLL_MIN 0
369#define RX_TIMEOUT_PS_POLL_MAX (200000)
370#define RX_TIMEOUT_PS_POLL_DEF (15)
371#define RX_TIMEOUT_UPSD_MIN 0
372#define RX_TIMEOUT_UPSD_MAX (200000)
373#define RX_TIMEOUT_UPSD_DEF (15)
374
375struct acx_rx_timeout {
376 struct acx_header header;
377
378 /*
379 * The longest time the STA will wait to receive
380 * traffic from the AP after a PS-poll has been
381 * transmitted.
382 */
383 u16 ps_poll_timeout;
384
385 /*
386 * The longest time the STA will wait to receive
387 * traffic from the AP after a frame has been sent
388 * from an UPSD enabled queue.
389 */
390 u16 upsd_timeout;
391} __attribute__ ((packed));
392
393#define RTS_THRESHOLD_MIN 0
394#define RTS_THRESHOLD_MAX 4096
395#define RTS_THRESHOLD_DEF 2347
396
397struct acx_rts_threshold {
398 struct acx_header header;
399
400 u16 threshold;
401 u8 pad[2];
402} __attribute__ ((packed));
403
404struct acx_beacon_filter_option {
405 struct acx_header header;
406
407 u8 enable;
408
409 /*
410 * The number of beacons without the unicast TIM
411 * bit set that the firmware buffers before
412 * signaling the host about ready frames.
413 * When set to 0 and the filter is enabled, beacons
414 * without the unicast TIM bit set are dropped.
415 */
416 u8 max_num_beacons;
417 u8 pad[2];
418} __attribute__ ((packed));
419
420/*
421 * ACXBeaconFilterEntry (not 221)
422 * Byte Offset Size (Bytes) Definition
423 * =========== ============ ==========
424 * 0 1 IE identifier
425 * 1 1 Treatment bit mask
426 *
427 * ACXBeaconFilterEntry (221)
428 * Byte Offset Size (Bytes) Definition
429 * =========== ============ ==========
430 * 0 1 IE identifier
431 * 1 1 Treatment bit mask
432 * 2 3 OUI
433 * 5 1 Type
434 * 6 2 Version
435 *
436 *
437 * Treatment bit mask - The information element handling:
438 * bit 0 - The information element is compared and transferred
439 * in case of change.
440 * bit 1 - The information element is transferred to the host
441 * with each appearance or disappearance.
442 * Note that both bits can be set at the same time.
443 */
444#define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
445#define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
446#define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
447#define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
448#define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
449 BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
450 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
451 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
452
453struct acx_beacon_filter_ie_table {
454 struct acx_header header;
455
456 u8 num_ie;
457 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
458 u8 pad[3];
459} __attribute__ ((packed));
460
461enum {
462 SG_ENABLE = 0,
463 SG_DISABLE,
464 SG_SENSE_NO_ACTIVITY,
465 SG_SENSE_ACTIVE
466};
467
468struct acx_bt_wlan_coex {
469 struct acx_header header;
470
471 /*
472 * 0 -> PTA enabled
473 * 1 -> PTA disabled
474 * 2 -> sense no active mode, i.e.
475 * an interrupt is sent upon
476 * BT activity.
477 * 3 -> PTA is switched on in response
478 * to the interrupt sending.
479 */
480 u8 enable;
481 u8 pad[3];
482} __attribute__ ((packed));
483
484#define PTA_ANTENNA_TYPE_DEF (0)
485#define PTA_BT_HP_MAXTIME_DEF (2000)
486#define PTA_WLAN_HP_MAX_TIME_DEF (5000)
487#define PTA_SENSE_DISABLE_TIMER_DEF (1350)
488#define PTA_PROTECTIVE_RX_TIME_DEF (1500)
489#define PTA_PROTECTIVE_TX_TIME_DEF (1500)
490#define PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF (3000)
491#define PTA_SIGNALING_TYPE_DEF (1)
492#define PTA_AFH_LEVERAGE_ON_DEF (0)
493#define PTA_NUMBER_QUIET_CYCLE_DEF (0)
494#define PTA_MAX_NUM_CTS_DEF (3)
495#define PTA_NUMBER_OF_WLAN_PACKETS_DEF (2)
496#define PTA_NUMBER_OF_BT_PACKETS_DEF (2)
497#define PTA_PROTECTIVE_RX_TIME_FAST_DEF (1500)
498#define PTA_PROTECTIVE_TX_TIME_FAST_DEF (3000)
499#define PTA_CYCLE_TIME_FAST_DEF (8700)
500#define PTA_RX_FOR_AVALANCHE_DEF (5)
501#define PTA_ELP_HP_DEF (0)
502#define PTA_ANTI_STARVE_PERIOD_DEF (500)
503#define PTA_ANTI_STARVE_NUM_CYCLE_DEF (4)
504#define PTA_ALLOW_PA_SD_DEF (1)
505#define PTA_TIME_BEFORE_BEACON_DEF (6300)
506#define PTA_HPDM_MAX_TIME_DEF (1600)
507#define PTA_TIME_OUT_NEXT_WLAN_DEF (2550)
508#define PTA_AUTO_MODE_NO_CTS_DEF (0)
509#define PTA_BT_HP_RESPECTED_DEF (3)
510#define PTA_WLAN_RX_MIN_RATE_DEF (24)
511#define PTA_ACK_MODE_DEF (1)
512
513struct acx_bt_wlan_coex_param {
514 struct acx_header header;
515
516 /*
517 * The minimum rate of a received WLAN packet in the STA,
518 * during protective mode, of which a new BT-HP request
519 * during this Rx will always be respected and gain the antenna.
520 */
521 u32 min_rate;
522
523 /* Max time the BT HP will be respected. */
524 u16 bt_hp_max_time;
525
526 /* Max time the WLAN HP will be respected. */
527 u16 wlan_hp_max_time;
528
529 /*
530 * The time between the last BT activity
531 * and the moment when the sense mode returns
532 * to SENSE_INACTIVE.
533 */
534 u16 sense_disable_timer;
535
536 /* Time before the next BT HP instance */
537 u16 rx_time_bt_hp;
538 u16 tx_time_bt_hp;
539
540 /* range: 10-20000 default: 1500 */
541 u16 rx_time_bt_hp_fast;
542 u16 tx_time_bt_hp_fast;
543
544 /* range: 2000-65535 default: 8700 */
545 u16 wlan_cycle_fast;
546
547 /* range: 0 - 15000 (Msec) default: 1000 */
548 u16 bt_anti_starvation_period;
549
550 /* range 400-10000(Usec) default: 3000 */
551 u16 next_bt_lp_packet;
552
553 /* Deafult: worst case for BT DH5 traffic */
554 u16 wake_up_beacon;
555
556 /* range: 0-50000(Usec) default: 1050 */
557 u16 hp_dm_max_guard_time;
558
559 /*
560 * This is to prevent both BT & WLAN antenna
561 * starvation.
562 * Range: 100-50000(Usec) default:2550
563 */
564 u16 next_wlan_packet;
565
566 /* 0 -> shared antenna */
567 u8 antenna_type;
568
569 /*
570 * 0 -> TI legacy
571 * 1 -> Palau
572 */
573 u8 signal_type;
574
575 /*
576 * BT AFH status
577 * 0 -> no AFH
578 * 1 -> from dedicated GPIO
579 * 2 -> AFH on (from host)
580 */
581 u8 afh_leverage_on;
582
583 /*
584 * The number of cycles during which no
585 * TX will be sent after 1 cycle of RX
586 * transaction in protective mode
587 */
588 u8 quiet_cycle_num;
589
590 /*
591 * The maximum number of CTSs that will
592 * be sent for receiving RX packet in
593 * protective mode
594 */
595 u8 max_cts;
596
597 /*
598 * The number of WLAN packets
599 * transferred in common mode before
600 * switching to BT.
601 */
602 u8 wlan_packets_num;
603
604 /*
605 * The number of BT packets
606 * transferred in common mode before
607 * switching to WLAN.
608 */
609 u8 bt_packets_num;
610
611 /* range: 1-255 default: 5 */
612 u8 missed_rx_avalanche;
613
614 /* range: 0-1 default: 1 */
615 u8 wlan_elp_hp;
616
617 /* range: 0 - 15 default: 4 */
618 u8 bt_anti_starvation_cycles;
619
620 u8 ack_mode_dual_ant;
621
622 /*
623 * Allow PA_SD assertion/de-assertion
624 * during enabled BT activity.
625 */
626 u8 pa_sd_enable;
627
628 /*
629 * Enable/Disable PTA in auto mode:
630 * Support Both Active & P.S modes
631 */
632 u8 pta_auto_mode_enable;
633
634 /* range: 0 - 20 default: 1 */
635 u8 bt_hp_respected_num;
636} __attribute__ ((packed));
637
638#define CCA_THRSH_ENABLE_ENERGY_D 0x140A
639#define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF
640
641struct acx_energy_detection {
642 struct acx_header header;
643
644 /* The RX Clear Channel Assessment threshold in the PHY */
645 u16 rx_cca_threshold;
646 u8 tx_energy_detection;
647 u8 pad;
648} __attribute__ ((packed));
649
650#define BCN_RX_TIMEOUT_DEF_VALUE 10000
651#define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000
652#define RX_BROADCAST_IN_PS_DEF_VALUE 1
653#define CONSECUTIVE_PS_POLL_FAILURE_DEF 4
654
655struct acx_beacon_broadcast {
656 struct acx_header header;
657
658 u16 beacon_rx_timeout;
659 u16 broadcast_timeout;
660
661 /* Enables receiving of broadcast packets in PS mode */
662 u8 rx_broadcast_in_ps;
663
664 /* Consecutive PS Poll failures before updating the host */
665 u8 ps_poll_threshold;
666 u8 pad[2];
667} __attribute__ ((packed));
668
669struct acx_event_mask {
670 struct acx_header header;
671
672 u32 event_mask;
673 u32 high_event_mask; /* Unused */
674} __attribute__ ((packed));
675
676#define CFG_RX_FCS BIT(2)
677#define CFG_RX_ALL_GOOD BIT(3)
678#define CFG_UNI_FILTER_EN BIT(4)
679#define CFG_BSSID_FILTER_EN BIT(5)
680#define CFG_MC_FILTER_EN BIT(6)
681#define CFG_MC_ADDR0_EN BIT(7)
682#define CFG_MC_ADDR1_EN BIT(8)
683#define CFG_BC_REJECT_EN BIT(9)
684#define CFG_SSID_FILTER_EN BIT(10)
685#define CFG_RX_INT_FCS_ERROR BIT(11)
686#define CFG_RX_INT_ENCRYPTED BIT(12)
687#define CFG_RX_WR_RX_STATUS BIT(13)
688#define CFG_RX_FILTER_NULTI BIT(14)
689#define CFG_RX_RESERVE BIT(15)
690#define CFG_RX_TIMESTAMP_TSF BIT(16)
691
692#define CFG_RX_RSV_EN BIT(0)
693#define CFG_RX_RCTS_ACK BIT(1)
694#define CFG_RX_PRSP_EN BIT(2)
695#define CFG_RX_PREQ_EN BIT(3)
696#define CFG_RX_MGMT_EN BIT(4)
697#define CFG_RX_FCS_ERROR BIT(5)
698#define CFG_RX_DATA_EN BIT(6)
699#define CFG_RX_CTL_EN BIT(7)
700#define CFG_RX_CF_EN BIT(8)
701#define CFG_RX_BCN_EN BIT(9)
702#define CFG_RX_AUTH_EN BIT(10)
703#define CFG_RX_ASSOC_EN BIT(11)
704
705#define SCAN_PASSIVE BIT(0)
706#define SCAN_5GHZ_BAND BIT(1)
707#define SCAN_TRIGGERED BIT(2)
708#define SCAN_PRIORITY_HIGH BIT(3)
709
710struct acx_fw_gen_frame_rates {
711 struct acx_header header;
712
713 u8 tx_ctrl_frame_rate; /* RATE_* */
714 u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */
715 u8 tx_mgt_frame_rate;
716 u8 tx_mgt_frame_mod;
717} __attribute__ ((packed));
718
719/* STA MAC */
Kalle Valoff258392009-06-12 14:14:19 +0300720struct acx_dot11_station_id {
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300721 struct acx_header header;
722
723 u8 mac[ETH_ALEN];
724 u8 pad[2];
725} __attribute__ ((packed));
726
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300727struct acx_feature_config {
728 struct acx_header header;
729
730 u32 options;
731 u32 data_flow_options;
732} __attribute__ ((packed));
733
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300734struct acx_current_tx_power {
735 struct acx_header header;
736
737 u8 current_tx_power;
738 u8 padding[3];
739} __attribute__ ((packed));
740
741struct acx_dot11_default_key {
742 struct acx_header header;
743
744 u8 id;
745 u8 pad[3];
746} __attribute__ ((packed));
747
748struct acx_tsf_info {
749 struct acx_header header;
750
751 u32 current_tsf_msb;
752 u32 current_tsf_lsb;
753 u32 last_TBTT_msb;
754 u32 last_TBTT_lsb;
755 u8 last_dtim_count;
756 u8 pad[3];
757} __attribute__ ((packed));
758
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300759enum acx_wake_up_event {
760 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/
761 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/
762 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */
763 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */
764 WAKE_UP_EVENT_BITS_MASK = 0x0F
765};
766
767struct acx_wake_up_condition {
768 struct acx_header header;
769
770 u8 wake_up_event; /* Only one bit can be set */
771 u8 listen_interval;
772 u8 pad[2];
773} __attribute__ ((packed));
774
775struct acx_aid {
776 struct acx_header header;
777
778 /*
779 * To be set when associated with an AP.
780 */
781 u16 aid;
782 u8 pad[2];
783} __attribute__ ((packed));
784
785enum acx_preamble_type {
786 ACX_PREAMBLE_LONG = 0,
787 ACX_PREAMBLE_SHORT = 1
788};
789
790struct acx_preamble {
791 struct acx_header header;
Kalle Valoff258392009-06-12 14:14:19 +0300792
Kalle Valo2f01a1f2009-04-29 23:33:31 +0300793 /*
794 * When set, the WiLink transmits the frames with a short preamble and
795 * when cleared, the WiLink transmits the frames with a long preamble.
796 */
797 u8 preamble;
798 u8 padding[3];
799} __attribute__ ((packed));
800
801enum acx_ctsprotect_type {
802 CTSPROTECT_DISABLE = 0,
803 CTSPROTECT_ENABLE = 1
804};
805
806struct acx_ctsprotect {
807 struct acx_header header;
808 u8 ctsprotect;
809 u8 padding[3];
810} __attribute__ ((packed));
811
812struct acx_tx_statistics {
813 u32 internal_desc_overflow;
814} __attribute__ ((packed));
815
816struct acx_rx_statistics {
817 u32 out_of_mem;
818 u32 hdr_overflow;
819 u32 hw_stuck;
820 u32 dropped;
821 u32 fcs_err;
822 u32 xfr_hint_trig;
823 u32 path_reset;
824 u32 reset_counter;
825} __attribute__ ((packed));
826
827struct acx_dma_statistics {
828 u32 rx_requested;
829 u32 rx_errors;
830 u32 tx_requested;
831 u32 tx_errors;
832} __attribute__ ((packed));
833
834struct acx_isr_statistics {
835 /* host command complete */
836 u32 cmd_cmplt;
837
838 /* fiqisr() */
839 u32 fiqs;
840
841 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
842 u32 rx_headers;
843
844 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
845 u32 rx_completes;
846
847 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
848 u32 rx_mem_overflow;
849
850 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
851 u32 rx_rdys;
852
853 /* irqisr() */
854 u32 irqs;
855
856 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
857 u32 tx_procs;
858
859 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
860 u32 decrypt_done;
861
862 /* (INT_STS_ND & INT_TRIG_DMA0) */
863 u32 dma0_done;
864
865 /* (INT_STS_ND & INT_TRIG_DMA1) */
866 u32 dma1_done;
867
868 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
869 u32 tx_exch_complete;
870
871 /* (INT_STS_ND & INT_TRIG_COMMAND) */
872 u32 commands;
873
874 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
875 u32 rx_procs;
876
877 /* (INT_STS_ND & INT_TRIG_PM_802) */
878 u32 hw_pm_mode_changes;
879
880 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
881 u32 host_acknowledges;
882
883 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
884 u32 pci_pm;
885
886 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
887 u32 wakeups;
888
889 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
890 u32 low_rssi;
891} __attribute__ ((packed));
892
893struct acx_wep_statistics {
894 /* WEP address keys configured */
895 u32 addr_key_count;
896
897 /* default keys configured */
898 u32 default_key_count;
899
900 u32 reserved;
901
902 /* number of times that WEP key not found on lookup */
903 u32 key_not_found;
904
905 /* number of times that WEP key decryption failed */
906 u32 decrypt_fail;
907
908 /* WEP packets decrypted */
909 u32 packets;
910
911 /* WEP decrypt interrupts */
912 u32 interrupt;
913} __attribute__ ((packed));
914
915#define ACX_MISSED_BEACONS_SPREAD 10
916
917struct acx_pwr_statistics {
918 /* the amount of enters into power save mode (both PD & ELP) */
919 u32 ps_enter;
920
921 /* the amount of enters into ELP mode */
922 u32 elp_enter;
923
924 /* the amount of missing beacon interrupts to the host */
925 u32 missing_bcns;
926
927 /* the amount of wake on host-access times */
928 u32 wake_on_host;
929
930 /* the amount of wake on timer-expire */
931 u32 wake_on_timer_exp;
932
933 /* the number of packets that were transmitted with PS bit set */
934 u32 tx_with_ps;
935
936 /* the number of packets that were transmitted with PS bit clear */
937 u32 tx_without_ps;
938
939 /* the number of received beacons */
940 u32 rcvd_beacons;
941
942 /* the number of entering into PowerOn (power save off) */
943 u32 power_save_off;
944
945 /* the number of entries into power save mode */
946 u16 enable_ps;
947
948 /*
949 * the number of exits from power save, not including failed PS
950 * transitions
951 */
952 u16 disable_ps;
953
954 /*
955 * the number of times the TSF counter was adjusted because
956 * of drift
957 */
958 u32 fix_tsf_ps;
959
960 /* Gives statistics about the spread continuous missed beacons.
961 * The 16 LSB are dedicated for the PS mode.
962 * The 16 MSB are dedicated for the PS mode.
963 * cont_miss_bcns_spread[0] - single missed beacon.
964 * cont_miss_bcns_spread[1] - two continuous missed beacons.
965 * cont_miss_bcns_spread[2] - three continuous missed beacons.
966 * ...
967 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
968 */
969 u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
970
971 /* the number of beacons in awake mode */
972 u32 rcvd_awake_beacons;
973} __attribute__ ((packed));
974
975struct acx_mic_statistics {
976 u32 rx_pkts;
977 u32 calc_failure;
978} __attribute__ ((packed));
979
980struct acx_aes_statistics {
981 u32 encrypt_fail;
982 u32 decrypt_fail;
983 u32 encrypt_packets;
984 u32 decrypt_packets;
985 u32 encrypt_interrupt;
986 u32 decrypt_interrupt;
987} __attribute__ ((packed));
988
989struct acx_event_statistics {
990 u32 heart_beat;
991 u32 calibration;
992 u32 rx_mismatch;
993 u32 rx_mem_empty;
994 u32 rx_pool;
995 u32 oom_late;
996 u32 phy_transmit_error;
997 u32 tx_stuck;
998} __attribute__ ((packed));
999
1000struct acx_ps_statistics {
1001 u32 pspoll_timeouts;
1002 u32 upsd_timeouts;
1003 u32 upsd_max_sptime;
1004 u32 upsd_max_apturn;
1005 u32 pspoll_max_apturn;
1006 u32 pspoll_utilization;
1007 u32 upsd_utilization;
1008} __attribute__ ((packed));
1009
1010struct acx_rxpipe_statistics {
1011 u32 rx_prep_beacon_drop;
1012 u32 descr_host_int_trig_rx_data;
1013 u32 beacon_buffer_thres_host_int_trig_rx_data;
1014 u32 missed_beacon_host_int_trig_rx_data;
1015 u32 tx_xfr_host_int_trig_rx_data;
1016} __attribute__ ((packed));
1017
1018struct acx_statistics {
1019 struct acx_header header;
1020
1021 struct acx_tx_statistics tx;
1022 struct acx_rx_statistics rx;
1023 struct acx_dma_statistics dma;
1024 struct acx_isr_statistics isr;
1025 struct acx_wep_statistics wep;
1026 struct acx_pwr_statistics pwr;
1027 struct acx_aes_statistics aes;
1028 struct acx_mic_statistics mic;
1029 struct acx_event_statistics event;
1030 struct acx_ps_statistics ps;
1031 struct acx_rxpipe_statistics rxpipe;
1032} __attribute__ ((packed));
1033
1034enum {
1035 ACX_WAKE_UP_CONDITIONS = 0x0002,
1036 ACX_MEM_CFG = 0x0003,
1037 ACX_SLOT = 0x0004,
1038 ACX_QUEUE_HEAD = 0x0005, /* for MASTER mode only */
1039 ACX_AC_CFG = 0x0007,
1040 ACX_MEM_MAP = 0x0008,
1041 ACX_AID = 0x000A,
1042 ACX_RADIO_PARAM = 0x000B, /* Not used */
1043 ACX_CFG = 0x000C, /* Not used */
1044 ACX_FW_REV = 0x000D,
1045 ACX_MEDIUM_USAGE = 0x000F,
1046 ACX_RX_CFG = 0x0010,
1047 ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
1048 ACX_BSS_IN_PS = 0x0012, /* for AP only */
1049 ACX_STATISTICS = 0x0013, /* Debug API */
1050 ACX_FEATURE_CFG = 0x0015,
1051 ACX_MISC_CFG = 0x0017, /* Not used */
1052 ACX_TID_CFG = 0x001A,
1053 ACX_BEACON_FILTER_OPT = 0x001F,
1054 ACX_LOW_RSSI = 0x0020,
1055 ACX_NOISE_HIST = 0x0021,
1056 ACX_HDK_VERSION = 0x0022, /* ??? */
1057 ACX_PD_THRESHOLD = 0x0023,
1058 ACX_DATA_PATH_PARAMS = 0x0024, /* WO */
1059 ACX_DATA_PATH_RESP_PARAMS = 0x0024, /* RO */
1060 ACX_CCA_THRESHOLD = 0x0025,
1061 ACX_EVENT_MBOX_MASK = 0x0026,
1062#ifdef FW_RUNNING_AS_AP
1063 ACX_DTIM_PERIOD = 0x0027, /* for AP only */
1064#else
1065 ACX_WR_TBTT_AND_DTIM = 0x0027, /* STA only */
1066#endif
1067 ACX_ACI_OPTION_CFG = 0x0029, /* OBSOLETE (for 1251)*/
1068 ACX_GPIO_CFG = 0x002A, /* Not used */
1069 ACX_GPIO_SET = 0x002B, /* Not used */
1070 ACX_PM_CFG = 0x002C, /* To Be Documented */
1071 ACX_CONN_MONIT_PARAMS = 0x002D,
1072 ACX_AVERAGE_RSSI = 0x002E, /* Not used */
1073 ACX_CONS_TX_FAILURE = 0x002F,
1074 ACX_BCN_DTIM_OPTIONS = 0x0031,
1075 ACX_SG_ENABLE = 0x0032,
1076 ACX_SG_CFG = 0x0033,
1077 ACX_ANTENNA_DIVERSITY_CFG = 0x0035, /* To Be Documented */
1078 ACX_LOW_SNR = 0x0037, /* To Be Documented */
1079 ACX_BEACON_FILTER_TABLE = 0x0038,
1080 ACX_ARP_IP_FILTER = 0x0039,
1081 ACX_ROAMING_STATISTICS_TBL = 0x003B,
1082 ACX_RATE_POLICY = 0x003D,
1083 ACX_CTS_PROTECTION = 0x003E,
1084 ACX_SLEEP_AUTH = 0x003F,
1085 ACX_PREAMBLE_TYPE = 0x0040,
1086 ACX_ERROR_CNT = 0x0041,
1087 ACX_FW_GEN_FRAME_RATES = 0x0042,
1088 ACX_IBSS_FILTER = 0x0044,
1089 ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
1090 ACX_TSF_INFO = 0x0046,
1091 ACX_CONFIG_PS_WMM = 0x0049,
1092 ACX_ENABLE_RX_DATA_FILTER = 0x004A,
1093 ACX_SET_RX_DATA_FILTER = 0x004B,
1094 ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
1095 ACX_POWER_LEVEL_TABLE = 0x004D,
1096 ACX_BET_ENABLE = 0x0050,
1097 DOT11_STATION_ID = 0x1001,
1098 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1099 DOT11_CUR_TX_PWR = 0x100D,
1100 DOT11_DEFAULT_KEY = 0x1010,
1101 DOT11_RX_DOT11_MODE = 0x1012,
1102 DOT11_RTS_THRESHOLD = 0x1013,
1103 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1104
1105 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1106
1107 MAX_IE = 0xFFFF
1108};
1109
1110
1111int wl12xx_acx_frame_rates(struct wl12xx *wl, u8 ctrl_rate, u8 ctrl_mod,
1112 u8 mgt_rate, u8 mgt_mod);
1113int wl12xx_acx_station_id(struct wl12xx *wl);
1114int wl12xx_acx_default_key(struct wl12xx *wl, u8 key_id);
1115int wl12xx_acx_wake_up_conditions(struct wl12xx *wl, u8 listen_interval);
1116int wl12xx_acx_sleep_auth(struct wl12xx *wl, u8 sleep_auth);
1117int wl12xx_acx_fw_version(struct wl12xx *wl, char *buf, size_t len);
1118int wl12xx_acx_tx_power(struct wl12xx *wl, int power);
1119int wl12xx_acx_feature_cfg(struct wl12xx *wl);
Kalle Valoff258392009-06-12 14:14:19 +03001120int wl12xx_acx_mem_map(struct wl12xx *wl,
1121 struct acx_header *mem_map, size_t len);
Kalle Valo2f01a1f2009-04-29 23:33:31 +03001122int wl12xx_acx_data_path_params(struct wl12xx *wl,
1123 struct acx_data_path_params_resp *data_path);
1124int wl12xx_acx_rx_msdu_life_time(struct wl12xx *wl, u32 life_time);
1125int wl12xx_acx_rx_config(struct wl12xx *wl, u32 config, u32 filter);
1126int wl12xx_acx_pd_threshold(struct wl12xx *wl);
1127int wl12xx_acx_slot(struct wl12xx *wl, enum acx_slot_type slot_time);
1128int wl12xx_acx_group_address_tbl(struct wl12xx *wl);
1129int wl12xx_acx_service_period_timeout(struct wl12xx *wl);
1130int wl12xx_acx_rts_threshold(struct wl12xx *wl, u16 rts_threshold);
1131int wl12xx_acx_beacon_filter_opt(struct wl12xx *wl);
1132int wl12xx_acx_beacon_filter_table(struct wl12xx *wl);
1133int wl12xx_acx_sg_enable(struct wl12xx *wl);
1134int wl12xx_acx_sg_cfg(struct wl12xx *wl);
1135int wl12xx_acx_cca_threshold(struct wl12xx *wl);
1136int wl12xx_acx_bcn_dtim_options(struct wl12xx *wl);
1137int wl12xx_acx_aid(struct wl12xx *wl, u16 aid);
1138int wl12xx_acx_event_mbox_mask(struct wl12xx *wl, u32 event_mask);
1139int wl12xx_acx_set_preamble(struct wl12xx *wl, enum acx_preamble_type preamble);
1140int wl12xx_acx_cts_protect(struct wl12xx *wl,
1141 enum acx_ctsprotect_type ctsprotect);
1142int wl12xx_acx_statistics(struct wl12xx *wl, struct acx_statistics *stats);
Kalle Valoff258392009-06-12 14:14:19 +03001143int wl12xx_acx_tsf_info(struct wl12xx *wl, u64 *mactime);
Kalle Valo2f01a1f2009-04-29 23:33:31 +03001144
1145#endif /* __WL12XX_ACX_H__ */