Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Device Tree Source for OMAP3 SoC |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public License |
| 7 | * version 2. This program is licensed "as is" without any warranty of any |
| 8 | * kind, whether express or implied. |
| 9 | */ |
| 10 | |
| 11 | /include/ "skeleton.dtsi" |
| 12 | |
| 13 | / { |
| 14 | compatible = "ti,omap3430", "ti,omap3"; |
Benoit Cousson | 4c94ac2 | 2012-10-24 10:47:52 +0200 | [diff] [blame] | 15 | interrupt-parent = <&intc>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 16 | |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 17 | aliases { |
| 18 | serial0 = &uart1; |
| 19 | serial1 = &uart2; |
| 20 | serial2 = &uart3; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 21 | }; |
| 22 | |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 23 | cpus { |
| 24 | cpu@0 { |
| 25 | compatible = "arm,cortex-a8"; |
| 26 | }; |
| 27 | }; |
| 28 | |
Jon Hunter | 9b07b47 | 2012-10-18 09:28:52 -0500 | [diff] [blame] | 29 | pmu { |
| 30 | compatible = "arm,cortex-a8-pmu"; |
| 31 | interrupts = <3>; |
| 32 | ti,hwmods = "debugss"; |
| 33 | }; |
| 34 | |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 35 | /* |
| 36 | * The soc node represents the soc top level view. It is uses for IPs |
| 37 | * that are not memory mapped in the MPU view or for the MPU itself. |
| 38 | */ |
| 39 | soc { |
| 40 | compatible = "ti,omap-infra"; |
Benoit Cousson | 476b679 | 2011-08-16 11:49:08 +0200 | [diff] [blame] | 41 | mpu { |
| 42 | compatible = "ti,omap3-mpu"; |
| 43 | ti,hwmods = "mpu"; |
| 44 | }; |
| 45 | |
| 46 | iva { |
| 47 | compatible = "ti,iva2.2"; |
| 48 | ti,hwmods = "iva"; |
| 49 | |
| 50 | dsp { |
| 51 | compatible = "ti,omap3-c64"; |
| 52 | }; |
| 53 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 54 | }; |
| 55 | |
| 56 | /* |
| 57 | * XXX: Use a flat representation of the OMAP3 interconnect. |
| 58 | * The real OMAP interconnect network is quite complex. |
| 59 | * Since that will not bring real advantage to represent that in DT for |
| 60 | * the moment, just use a fake OCP bus entry to represent the whole bus |
| 61 | * hierarchy. |
| 62 | */ |
| 63 | ocp { |
| 64 | compatible = "simple-bus"; |
| 65 | #address-cells = <1>; |
| 66 | #size-cells = <1>; |
| 67 | ranges; |
| 68 | ti,hwmods = "l3_main"; |
| 69 | |
Jon Hunter | 510c0ff | 2012-10-25 14:24:14 -0500 | [diff] [blame] | 70 | counter32k: counter@48320000 { |
| 71 | compatible = "ti,omap-counter32k"; |
| 72 | reg = <0x48320000 0x20>; |
| 73 | ti,hwmods = "counter_32k"; |
| 74 | }; |
| 75 | |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 76 | intc: interrupt-controller@48200000 { |
| 77 | compatible = "ti,omap2-intc"; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 78 | interrupt-controller; |
| 79 | #interrupt-cells = <1>; |
Benoit Cousson | d65c542 | 2011-11-30 19:26:42 +0100 | [diff] [blame] | 80 | ti,intc-size = <96>; |
| 81 | reg = <0x48200000 0x1000>; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 82 | }; |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 83 | |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 84 | sdma: dma-controller@48056000 { |
| 85 | compatible = "ti,omap3630-sdma", "ti,omap3430-sdma"; |
| 86 | reg = <0x48056000 0x1000>; |
| 87 | interrupts = <12>, |
| 88 | <13>, |
| 89 | <14>, |
| 90 | <15>; |
| 91 | #dma-cells = <1>; |
| 92 | #dma-channels = <32>; |
| 93 | #dma-requests = <96>; |
| 94 | }; |
| 95 | |
Tony Lindgren | 679e331 | 2012-09-10 10:34:51 -0700 | [diff] [blame] | 96 | omap3_pmx_core: pinmux@48002030 { |
| 97 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
| 98 | reg = <0x48002030 0x05cc>; |
| 99 | #address-cells = <1>; |
| 100 | #size-cells = <0>; |
| 101 | pinctrl-single,register-width = <16>; |
| 102 | pinctrl-single,function-mask = <0x7fff>; |
| 103 | }; |
| 104 | |
| 105 | omap3_pmx_wkup: pinmux@0x48002a58 { |
| 106 | compatible = "ti,omap3-padconf", "pinctrl-single"; |
| 107 | reg = <0x48002a58 0x5c>; |
| 108 | #address-cells = <1>; |
| 109 | #size-cells = <0>; |
| 110 | pinctrl-single,register-width = <16>; |
| 111 | pinctrl-single,function-mask = <0x7fff>; |
| 112 | }; |
| 113 | |
Benoit Cousson | 385a64b | 2011-08-16 11:51:54 +0200 | [diff] [blame] | 114 | gpio1: gpio@48310000 { |
| 115 | compatible = "ti,omap3-gpio"; |
| 116 | ti,hwmods = "gpio1"; |
| 117 | gpio-controller; |
| 118 | #gpio-cells = <2>; |
| 119 | interrupt-controller; |
| 120 | #interrupt-cells = <1>; |
| 121 | }; |
| 122 | |
| 123 | gpio2: gpio@49050000 { |
| 124 | compatible = "ti,omap3-gpio"; |
| 125 | ti,hwmods = "gpio2"; |
| 126 | gpio-controller; |
| 127 | #gpio-cells = <2>; |
| 128 | interrupt-controller; |
| 129 | #interrupt-cells = <1>; |
| 130 | }; |
| 131 | |
| 132 | gpio3: gpio@49052000 { |
| 133 | compatible = "ti,omap3-gpio"; |
| 134 | ti,hwmods = "gpio3"; |
| 135 | gpio-controller; |
| 136 | #gpio-cells = <2>; |
| 137 | interrupt-controller; |
| 138 | #interrupt-cells = <1>; |
| 139 | }; |
| 140 | |
| 141 | gpio4: gpio@49054000 { |
| 142 | compatible = "ti,omap3-gpio"; |
| 143 | ti,hwmods = "gpio4"; |
| 144 | gpio-controller; |
| 145 | #gpio-cells = <2>; |
| 146 | interrupt-controller; |
| 147 | #interrupt-cells = <1>; |
| 148 | }; |
| 149 | |
| 150 | gpio5: gpio@49056000 { |
| 151 | compatible = "ti,omap3-gpio"; |
| 152 | ti,hwmods = "gpio5"; |
| 153 | gpio-controller; |
| 154 | #gpio-cells = <2>; |
| 155 | interrupt-controller; |
| 156 | #interrupt-cells = <1>; |
| 157 | }; |
| 158 | |
| 159 | gpio6: gpio@49058000 { |
| 160 | compatible = "ti,omap3-gpio"; |
| 161 | ti,hwmods = "gpio6"; |
| 162 | gpio-controller; |
| 163 | #gpio-cells = <2>; |
| 164 | interrupt-controller; |
| 165 | #interrupt-cells = <1>; |
| 166 | }; |
| 167 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 168 | uart1: serial@4806a000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 169 | compatible = "ti,omap3-uart"; |
| 170 | ti,hwmods = "uart1"; |
| 171 | clock-frequency = <48000000>; |
| 172 | }; |
| 173 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 174 | uart2: serial@4806c000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 175 | compatible = "ti,omap3-uart"; |
| 176 | ti,hwmods = "uart2"; |
| 177 | clock-frequency = <48000000>; |
| 178 | }; |
| 179 | |
Benoit Cousson | 19bfb76 | 2012-02-16 11:55:27 +0100 | [diff] [blame] | 180 | uart3: serial@49020000 { |
Rajendra Nayak | cf3c79d | 2011-12-14 17:25:46 +0530 | [diff] [blame] | 181 | compatible = "ti,omap3-uart"; |
| 182 | ti,hwmods = "uart3"; |
| 183 | clock-frequency = <48000000>; |
| 184 | }; |
| 185 | |
Benoit Cousson | ca59a5c | 2011-08-30 16:50:24 +0200 | [diff] [blame] | 186 | i2c1: i2c@48070000 { |
| 187 | compatible = "ti,omap3-i2c"; |
| 188 | #address-cells = <1>; |
| 189 | #size-cells = <0>; |
| 190 | ti,hwmods = "i2c1"; |
| 191 | }; |
| 192 | |
| 193 | i2c2: i2c@48072000 { |
| 194 | compatible = "ti,omap3-i2c"; |
| 195 | #address-cells = <1>; |
| 196 | #size-cells = <0>; |
| 197 | ti,hwmods = "i2c2"; |
| 198 | }; |
| 199 | |
| 200 | i2c3: i2c@48060000 { |
| 201 | compatible = "ti,omap3-i2c"; |
| 202 | #address-cells = <1>; |
| 203 | #size-cells = <0>; |
| 204 | ti,hwmods = "i2c3"; |
| 205 | }; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 206 | |
| 207 | mcspi1: spi@48098000 { |
| 208 | compatible = "ti,omap2-mcspi"; |
| 209 | #address-cells = <1>; |
| 210 | #size-cells = <0>; |
| 211 | ti,hwmods = "mcspi1"; |
| 212 | ti,spi-num-cs = <4>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 213 | dmas = <&sdma 35>, |
| 214 | <&sdma 36>, |
| 215 | <&sdma 37>, |
| 216 | <&sdma 38>, |
| 217 | <&sdma 39>, |
| 218 | <&sdma 40>, |
| 219 | <&sdma 41>, |
| 220 | <&sdma 42>; |
| 221 | dma-names = "tx0", "rx0", "tx1", "rx1", |
| 222 | "tx2", "rx2", "tx3", "rx3"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 223 | }; |
| 224 | |
| 225 | mcspi2: spi@4809a000 { |
| 226 | compatible = "ti,omap2-mcspi"; |
| 227 | #address-cells = <1>; |
| 228 | #size-cells = <0>; |
| 229 | ti,hwmods = "mcspi2"; |
| 230 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 231 | dmas = <&sdma 43>, |
| 232 | <&sdma 44>, |
| 233 | <&sdma 45>, |
| 234 | <&sdma 46>; |
| 235 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 236 | }; |
| 237 | |
| 238 | mcspi3: spi@480b8000 { |
| 239 | compatible = "ti,omap2-mcspi"; |
| 240 | #address-cells = <1>; |
| 241 | #size-cells = <0>; |
| 242 | ti,hwmods = "mcspi3"; |
| 243 | ti,spi-num-cs = <2>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 244 | dmas = <&sdma 15>, |
| 245 | <&sdma 16>, |
| 246 | <&sdma 23>, |
| 247 | <&sdma 24>; |
| 248 | dma-names = "tx0", "rx0", "tx1", "rx1"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 249 | }; |
| 250 | |
| 251 | mcspi4: spi@480ba000 { |
| 252 | compatible = "ti,omap2-mcspi"; |
| 253 | #address-cells = <1>; |
| 254 | #size-cells = <0>; |
| 255 | ti,hwmods = "mcspi4"; |
| 256 | ti,spi-num-cs = <1>; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 257 | dmas = <&sdma 70>, <&sdma 71>; |
| 258 | dma-names = "tx0", "rx0"; |
Benoit Cousson | fc72d24 | 2012-01-20 14:15:58 +0100 | [diff] [blame] | 259 | }; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 260 | |
| 261 | mmc1: mmc@4809c000 { |
| 262 | compatible = "ti,omap3-hsmmc"; |
| 263 | ti,hwmods = "mmc1"; |
| 264 | ti,dual-volt; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 265 | dmas = <&sdma 61>, <&sdma 62>; |
| 266 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 267 | }; |
| 268 | |
| 269 | mmc2: mmc@480b4000 { |
| 270 | compatible = "ti,omap3-hsmmc"; |
| 271 | ti,hwmods = "mmc2"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 272 | dmas = <&sdma 47>, <&sdma 48>; |
| 273 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 274 | }; |
| 275 | |
| 276 | mmc3: mmc@480ad000 { |
| 277 | compatible = "ti,omap3-hsmmc"; |
| 278 | ti,hwmods = "mmc3"; |
Jon Hunter | 2c2dc54 | 2012-04-26 13:47:59 -0500 | [diff] [blame] | 279 | dmas = <&sdma 77>, <&sdma 78>; |
| 280 | dma-names = "tx", "rx"; |
Rajendra Nayak | b3431f5 | 2012-02-22 17:42:27 +0530 | [diff] [blame] | 281 | }; |
Xiao Jiang | 94c3073 | 2012-06-01 12:44:14 +0800 | [diff] [blame] | 282 | |
| 283 | wdt2: wdt@48314000 { |
| 284 | compatible = "ti,omap3-wdt"; |
| 285 | ti,hwmods = "wd_timer2"; |
| 286 | }; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 287 | |
| 288 | mcbsp1: mcbsp@48074000 { |
| 289 | compatible = "ti,omap3-mcbsp"; |
| 290 | reg = <0x48074000 0xff>; |
| 291 | reg-names = "mpu"; |
| 292 | interrupts = <16>, /* OCP compliant interrupt */ |
| 293 | <59>, /* TX interrupt */ |
| 294 | <60>; /* RX interrupt */ |
| 295 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 296 | ti,buffer-size = <128>; |
| 297 | ti,hwmods = "mcbsp1"; |
| 298 | }; |
| 299 | |
| 300 | mcbsp2: mcbsp@49022000 { |
| 301 | compatible = "ti,omap3-mcbsp"; |
| 302 | reg = <0x49022000 0xff>, |
| 303 | <0x49028000 0xff>; |
| 304 | reg-names = "mpu", "sidetone"; |
| 305 | interrupts = <17>, /* OCP compliant interrupt */ |
| 306 | <62>, /* TX interrupt */ |
| 307 | <63>, /* RX interrupt */ |
| 308 | <4>; /* Sidetone */ |
| 309 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 310 | ti,buffer-size = <1280>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 311 | ti,hwmods = "mcbsp2", "mcbsp2_sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 312 | }; |
| 313 | |
| 314 | mcbsp3: mcbsp@49024000 { |
| 315 | compatible = "ti,omap3-mcbsp"; |
| 316 | reg = <0x49024000 0xff>, |
| 317 | <0x4902a000 0xff>; |
| 318 | reg-names = "mpu", "sidetone"; |
| 319 | interrupts = <22>, /* OCP compliant interrupt */ |
| 320 | <89>, /* TX interrupt */ |
| 321 | <90>, /* RX interrupt */ |
| 322 | <5>; /* Sidetone */ |
| 323 | interrupt-names = "common", "tx", "rx", "sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 324 | ti,buffer-size = <128>; |
Peter Ujfalusi | eef6fca | 2012-10-18 11:25:07 +0200 | [diff] [blame] | 325 | ti,hwmods = "mcbsp3", "mcbsp3_sidetone"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 326 | }; |
| 327 | |
| 328 | mcbsp4: mcbsp@49026000 { |
| 329 | compatible = "ti,omap3-mcbsp"; |
| 330 | reg = <0x49026000 0xff>; |
| 331 | reg-names = "mpu"; |
| 332 | interrupts = <23>, /* OCP compliant interrupt */ |
| 333 | <54>, /* TX interrupt */ |
| 334 | <55>; /* RX interrupt */ |
| 335 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 336 | ti,buffer-size = <128>; |
| 337 | ti,hwmods = "mcbsp4"; |
| 338 | }; |
| 339 | |
| 340 | mcbsp5: mcbsp@48096000 { |
| 341 | compatible = "ti,omap3-mcbsp"; |
| 342 | reg = <0x48096000 0xff>; |
| 343 | reg-names = "mpu"; |
| 344 | interrupts = <27>, /* OCP compliant interrupt */ |
| 345 | <81>, /* TX interrupt */ |
| 346 | <82>; /* RX interrupt */ |
| 347 | interrupt-names = "common", "tx", "rx"; |
Peter Ujfalusi | 0be484b | 2012-09-05 14:21:22 +0300 | [diff] [blame] | 348 | ti,buffer-size = <128>; |
| 349 | ti,hwmods = "mcbsp5"; |
| 350 | }; |
Jon Hunter | fab8ad0 | 2012-10-19 09:59:00 -0500 | [diff] [blame] | 351 | |
| 352 | timer1: timer@48318000 { |
| 353 | compatible = "ti,omap2-timer"; |
| 354 | reg = <0x48318000 0x400>; |
| 355 | interrupts = <37>; |
| 356 | ti,hwmods = "timer1"; |
| 357 | ti,timer-alwon; |
| 358 | }; |
| 359 | |
| 360 | timer2: timer@49032000 { |
| 361 | compatible = "ti,omap2-timer"; |
| 362 | reg = <0x49032000 0x400>; |
| 363 | interrupts = <38>; |
| 364 | ti,hwmods = "timer2"; |
| 365 | }; |
| 366 | |
| 367 | timer3: timer@49034000 { |
| 368 | compatible = "ti,omap2-timer"; |
| 369 | reg = <0x49034000 0x400>; |
| 370 | interrupts = <39>; |
| 371 | ti,hwmods = "timer3"; |
| 372 | }; |
| 373 | |
| 374 | timer4: timer@49036000 { |
| 375 | compatible = "ti,omap2-timer"; |
| 376 | reg = <0x49036000 0x400>; |
| 377 | interrupts = <40>; |
| 378 | ti,hwmods = "timer4"; |
| 379 | }; |
| 380 | |
| 381 | timer5: timer@49038000 { |
| 382 | compatible = "ti,omap2-timer"; |
| 383 | reg = <0x49038000 0x400>; |
| 384 | interrupts = <41>; |
| 385 | ti,hwmods = "timer5"; |
| 386 | ti,timer-dsp; |
| 387 | }; |
| 388 | |
| 389 | timer6: timer@4903a000 { |
| 390 | compatible = "ti,omap2-timer"; |
| 391 | reg = <0x4903a000 0x400>; |
| 392 | interrupts = <42>; |
| 393 | ti,hwmods = "timer6"; |
| 394 | ti,timer-dsp; |
| 395 | }; |
| 396 | |
| 397 | timer7: timer@4903c000 { |
| 398 | compatible = "ti,omap2-timer"; |
| 399 | reg = <0x4903c000 0x400>; |
| 400 | interrupts = <43>; |
| 401 | ti,hwmods = "timer7"; |
| 402 | ti,timer-dsp; |
| 403 | }; |
| 404 | |
| 405 | timer8: timer@4903e000 { |
| 406 | compatible = "ti,omap2-timer"; |
| 407 | reg = <0x4903e000 0x400>; |
| 408 | interrupts = <44>; |
| 409 | ti,hwmods = "timer8"; |
| 410 | ti,timer-pwm; |
| 411 | ti,timer-dsp; |
| 412 | }; |
| 413 | |
| 414 | timer9: timer@49040000 { |
| 415 | compatible = "ti,omap2-timer"; |
| 416 | reg = <0x49040000 0x400>; |
| 417 | interrupts = <45>; |
| 418 | ti,hwmods = "timer9"; |
| 419 | ti,timer-pwm; |
| 420 | }; |
| 421 | |
| 422 | timer10: timer@48086000 { |
| 423 | compatible = "ti,omap2-timer"; |
| 424 | reg = <0x48086000 0x400>; |
| 425 | interrupts = <46>; |
| 426 | ti,hwmods = "timer10"; |
| 427 | ti,timer-pwm; |
| 428 | }; |
| 429 | |
| 430 | timer11: timer@48088000 { |
| 431 | compatible = "ti,omap2-timer"; |
| 432 | reg = <0x48088000 0x400>; |
| 433 | interrupts = <47>; |
| 434 | ti,hwmods = "timer11"; |
| 435 | ti,timer-pwm; |
| 436 | }; |
| 437 | |
| 438 | timer12: timer@48304000 { |
| 439 | compatible = "ti,omap2-timer"; |
| 440 | reg = <0x48304000 0x400>; |
| 441 | interrupts = <95>; |
| 442 | ti,hwmods = "timer12"; |
| 443 | ti,timer-alwon; |
| 444 | ti,timer-secure; |
| 445 | }; |
Roger Quadros | af3eb36 | 2013-03-20 17:44:59 +0200 | [diff] [blame] | 446 | |
| 447 | usbhstll: usbhstll@48062000 { |
| 448 | compatible = "ti,usbhs-tll"; |
| 449 | reg = <0x48062000 0x1000>; |
| 450 | interrupts = <78>; |
| 451 | ti,hwmods = "usb_tll_hs"; |
| 452 | }; |
| 453 | |
| 454 | usbhshost: usbhshost@48064000 { |
| 455 | compatible = "ti,usbhs-host"; |
| 456 | reg = <0x48064000 0x400>; |
| 457 | ti,hwmods = "usb_host_hs"; |
| 458 | #address-cells = <1>; |
| 459 | #size-cells = <1>; |
| 460 | ranges; |
| 461 | |
| 462 | usbhsohci: ohci@48064400 { |
| 463 | compatible = "ti,ohci-omap3", "usb-ohci"; |
| 464 | reg = <0x48064400 0x400>; |
| 465 | interrupt-parent = <&intc>; |
| 466 | interrupts = <76>; |
| 467 | }; |
| 468 | |
| 469 | usbhsehci: ehci@48064800 { |
| 470 | compatible = "ti,ehci-omap", "usb-ehci"; |
| 471 | reg = <0x48064800 0x400>; |
| 472 | interrupt-parent = <&intc>; |
| 473 | interrupts = <77>; |
| 474 | }; |
| 475 | }; |
| 476 | |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 477 | gpmc: gpmc@6e000000 { |
| 478 | compatible = "ti,omap3430-gpmc"; |
| 479 | ti,hwmods = "gpmc"; |
Javier Martinez Canillas | 41644e7 | 2013-02-27 02:30:51 +0100 | [diff] [blame] | 480 | reg = <0x6e000000 0x02d0>; |
Florian Vaussard | 6e8489d | 2013-01-28 18:54:07 +0100 | [diff] [blame] | 481 | interrupts = <20>; |
| 482 | gpmc,num-cs = <8>; |
| 483 | gpmc,num-waitpins = <4>; |
| 484 | #address-cells = <2>; |
| 485 | #size-cells = <1>; |
| 486 | }; |
Kishon Vijay Abraham I | ad871c1 | 2013-03-07 19:05:16 +0530 | [diff] [blame] | 487 | |
| 488 | usb_otg_hs: usb_otg_hs@480ab000 { |
| 489 | compatible = "ti,omap3-musb"; |
| 490 | reg = <0x480ab000 0x1000>; |
| 491 | interrupts = <0 92 0x4>, <0 93 0x4>; |
| 492 | interrupt-names = "mc", "dma"; |
| 493 | ti,hwmods = "usb_otg_hs"; |
| 494 | usb-phy = <&usb2_phy>; |
| 495 | multipoint = <1>; |
| 496 | num-eps = <16>; |
| 497 | ram-bits = <12>; |
| 498 | }; |
Benoit Cousson | 189892f | 2011-08-16 21:02:01 +0530 | [diff] [blame] | 499 | }; |
| 500 | }; |