1. 7b7bcef OMAP3 SDRC: set FIXEDDELAY when disabling SDRC DLL by Paul Walmsley · 16 years ago
  2. 3afec633 OMAP3: Add support for DPLL3 divisor values higher than 2 by Tero Kristo · 16 years ago
  3. df14e47 OMAP3 SRAM: convert SRAM code to use macros rather than magic numbers by Paul Walmsley · 16 years ago
  4. 4267b5d OMAP3 SRAM: add more comments on the SRAM code by Paul Walmsley · 16 years ago
  5. d0ba392 OMAP3 clock/SDRC: program SDRC_MR register during SDRC clock change by Paul Walmsley · 16 years ago
  6. c9812d0 OMAP3 clock: add a short delay when lowering CORE clk rate by Paul Walmsley · 16 years ago
  7. 6adb8f3 OMAP3 clock: remove wait for DPLL3 M2 clock to stabilize by Paul Walmsley · 16 years ago
  8. 4519c2b OMAP3 clock: only unlock SDRC DLL if SDRC clk < 83MHz by Paul Walmsley · 16 years ago
  9. b2abb27 OMAP3 SRAM: renumber registers to make space for argument passing by Paul Walmsley · 16 years ago
  10. fa0406a OMAP3 SRAM: clear the SDRC PWRENA bit during SDRC frequency change by Paul Walmsley · 16 years ago
  11. d75d9e7 OMAP3 clock: add interconnect barriers to CORE DPLL M2 change by Paul Walmsley · 16 years ago
  12. 69d4255 OMAP3 SRAM: add ARM barriers to omap3_sram_configure_core_dpll by Paul Walmsley · 16 years ago
  13. cc26b3b ARM: OMAP3: Add minimal omap3430 support by Syed Mohammed, Khasim · 16 years ago