- ae6baa8 clk: ingenic/jz4770: Exit with error if CGU init failed by Paul Cercueil · 4 years, 6 months ago
- aa586e25e clk: qcom: rcg: Return failure for RCG update by Taniya Das · 5 years ago
- aec48d8 clk: uniphier: Add SCSSI clock gate for each channel by Kunihiko Hayashi · 4 years, 7 months ago
- 34143df clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock by Icenowy Zheng · 4 years, 7 months ago
- 087f8bf clk: qcom: rcg2: Don't crash if our parent can't be found; return an error by Douglas Anderson · 4 years, 6 months ago
- b984c4a clk: tegra: Mark fuse clock as critical by Stephen Warren · 4 years, 10 months ago
- 6822994 clk: mmp2: Fix the order of timer mux parents by Lubomir Rintel · 4 years, 8 months ago
- e37ee4b1 clk: sunxi-ng: h6-r: Fix AR100/R_APB2 parent order by Samuel Holland · 4 years, 7 months ago
- 12ed084 clk: actions: Fix factor clk struct member access by Manivannan Sadhasivam · 4 years, 11 months ago
- 07542c8 clk: sunxi-ng: v3s: add the missing PLL_DDR1 by Icenowy Zheng · 5 years ago
- fe9968a6a clk: qcom: Fix -Wunused-const-variable by Nathan Huckleberry · 5 years ago
- e252889 clk: sunxi-ng: sun50i-h6-r: Fix incorrect W1 clock gate register by Ondrej Jirman · 5 years ago
- cbd69e7 clk: meson: axg: spread spectrum is on mpll2 by Jerome Brunet · 5 years ago
- 3dffd74 clk: meson: gxbb: no spread spectrum on mpll0 by Jerome Brunet · 5 years ago
- 86ed527 clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998 by Marc Gonzalez · 5 years ago
- bb35bf0 clk: ingenic: jz4740: Fix gating of UDC clock by Paul Cercueil · 6 years ago
- b0d3cef clk: sunxi-ng: sun8i-a23: Enable PLL-MIPI LDOs when ungating it by Chen-Yu Tsai · 6 years ago
- d99352c clk: dove: fix refcount leak in dove_clk_init() by Yangtao Li · 6 years ago
- 239ca8d clk: mv98dx3236: fix refcount leak in mv98dx3236_clk_init() by Yangtao Li · 6 years ago
- eadcc9e clk: armada-xp: fix refcount leak in axp_clk_init() by Yangtao Li · 6 years ago
- ef86a8b clk: kirkwood: fix refcount leak in kirkwood_clk_init() by Yangtao Li · 6 years ago
- 6de0b7c clk: armada-370: fix refcount leak in a370_clk_init() by Yangtao Li · 6 years ago
- c4b4e38 clk: vf610: fix refcount leak in vf610_clocks_init() by Yangtao Li · 6 years ago
- 9c88ab3 clk: imx7d: fix refcount leak in imx7d_clocks_init() by Yangtao Li · 6 years ago
- 9fde7ee clk: imx6sx: fix refcount leak in imx6sx_clocks_init() by Yangtao Li · 6 years ago
- 4b19efc clk: imx6q: fix refcount leak in imx6q_clocks_init() by Yangtao Li · 6 years ago
- 735081c clk: samsung: exynos4: fix refcount leak in exynos4_get_xom() by Yangtao Li · 6 years ago
- e114250 clk: socfpga: fix refcount leak by Yangtao Li · 6 years ago
- f96bcc2 clk: ti: fix refcount leak in ti_dt_clocks_register() by Yangtao Li · 6 years ago
- ecc3b93 clk: qoriq: fix refcount leak in clockgen_init() by Yangtao Li · 6 years ago
- 4d2a906 clk: highbank: fix refcount leak in hb_clk_init() by Yangtao Li · 6 years ago
- 8e94de4 clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle() by Baolin Wang · 4 years, 10 months ago
- 5f047e3 clk: Don't try to enable critical clocks if prepare failed by Guenter Roeck · 4 years, 7 months ago
- d8a8258 clk: qcom: gcc-sdm845: Add missing flag to votable GDSCs by Georgi Djakov · 4 years, 8 months ago
- 9039155 clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume by Marian Mihailescu · 4 years, 9 months ago
- 468e5cb clk: pxa: fix one of the pxa RTC clocks by Robert Jarzmik · 4 years, 9 months ago
- e3c5635 clk: clk-gpio: propagate rate change to parent by Michael Hennerich · 4 years, 9 months ago
- 4572d2a clk: qcom: Allow constant ratio freq tables for rcg by Jeffrey Hugo · 4 years, 9 months ago
- 1f8d72a clk: renesas: rcar-gen3: Set state when registering SD clocks by Niklas Söderlund · 6 years ago
- 253c617 clk: qcom: gcc-msm8998: Disable halt check of UFS clocks by Bjorn Andersson · 6 years ago
- 66371d5 clk: renesas: r8a77995: Correct parent clock of DU by Geert Uytterhoeven · 6 years ago
- 7718f9e clk: renesas: r8a77990: Correct parent clock of DU by Takeshi Kihara · 6 years ago
- 7f095bd clk: qcom: Fix MSM8998 resets by Jeffrey Hugo · 6 years ago
- 5c6493d clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent by Chen-Yu Tsai · 6 years ago
- 9122845 clk: meson: meson8b: fix the offset of vid_pll_dco's N value by Martin Blumenstingl · 6 years ago
- 5f21842 clk: mediatek: Drop more __init markings for driver probe by Stephen Boyd · 6 years ago
- 3d4343f clk: mediatek: Drop __init from mtk_clk_register_cpumuxes() by Stephen Boyd · 6 years ago
- 0dcdd33 clk: meson: Fix GXL HDMI PLL fractional bits width by Neil Armstrong · 6 years ago
- 66bee51 clk: rockchip: fix I2S1 clock gate register for rk3328 by Katsuhiro Suzuki · 6 years ago
- e9ad6c9 clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering by Heiko Stuebner · 6 years ago
- d499bc7 clk: rockchip: fix rk3188 sclk_smc gate data by Finley Xiao · 6 years ago
- ac3750e clk: sunxi-ng: a64: Fix gate bit of DSI DPHY by Jagan Teki · 6 years ago
- 115160f clk: stm32mp1: parent clocks update by Gabriel Fernandez · 5 years ago
- 6887765 clk: stm32mp1: add CLK_SET_RATE_NO_REPARENT to Kernel clocks by Gabriel Fernandez · 5 years ago
- 8b4c365 clk: stm32mp1: fix mcu divider table by Gabriel Fernandez · 5 years ago
- f802418 clk: stm32mp1: fix HSI divider flag by Gabriel Fernandez · 5 years ago
- d7b3292 clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated() by Alexandre Belloni · 6 years ago
- 6e82a4e clk: at91: fix update bit maps on CFG_MOR write by Eugen Hristev · 5 years ago
- 28f3429 clk: ti: clkctrl: Fix failed to enable error with double udelay timeout by Tony Lindgren · 4 years, 10 months ago
- cb5a404 clk: ti: dra7-atl-clock: Remove ti_clk_add_alias call by Peter Ujfalusi · 4 years, 10 months ago
- 40017db clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 by Colin Ian King · 4 years, 9 months ago
- 49ade06 clk: sunxi: Fix operator precedence in sunxi_divs_clk_setup by Nathan Chancellor · 4 years, 9 months ago
- 15fc2f3 clk: at91: avoid sleeping early by Alexandre Belloni · 4 years, 10 months ago
- a055420 clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume by Marek Szyprowski · 4 years, 9 months ago
- a2c2cf1 clk: samsung: exynos5433: Fix error paths by Marek Szyprowski · 4 years, 10 months ago
- 9c65bb9 clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate by Martin Blumenstingl · 4 years, 10 months ago
- d15b8b6 clk: tegra20: Turn EMC clock gate into divider by Dmitry Osipenko · 6 years ago
- 9cdfff0 clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock by Icenowy Zheng · 6 years ago
- f1f1002 clk: at91: audio-pll: fix audio pmc type by Alexandre Belloni · 6 years ago
- f15b802 clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk by Lubomir Rintel · 6 years ago
- 6288f52 clk: tegra: Fixes for MBIST work around by Joseph Lo · 6 years ago
- 8b3e444 clk: samsung: Use clk_hw API for calling clk framework from clk notifiers by Marek Szyprowski · 6 years ago
- 599d535 clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420 by Joonyoung Shim · 6 years ago
- 06da394 clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume by Marek Szyprowski · 6 years ago
- 7e4602e clk: keystone: Enable TISCI clocks if K3_ARCH by Nishanth Menon · 6 years ago
- 38d1ecc clk: sunxi-ng: h6: fix PWM gate/reset offset by Rongyi Chen · 6 years ago
- 9aafa29 clk: boston: unregister clks on failure in clk_boston_setup() by Yi Wang · 6 years ago
- c6304d4 clk: sprd: add missing kfree by Chunyan Zhang · 5 years ago
- 7288442 clk: at91: select parent if main oscillator or bypass is enabled by Eugen Hristev · 5 years ago
- ae089bf clk: qcom: gcc-sdm845: Use floor ops for sdcc clks by Stephen Boyd · 5 years ago
- 38dfc97 clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domain by Geert Uytterhoeven · 5 years ago
- 0b5ac60 clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domain by Geert Uytterhoeven · 5 years ago
- 2cca24b clk: zx296718: Don't reference clk_init_data after registration by Stephen Boyd · 5 years ago
- efa0fe4 clk: sprd: Don't reference clk_init_data after registration by Stephen Boyd · 5 years ago
- 89dc59f clk: sirf: Don't reference clk_init_data after registration by Stephen Boyd · 5 years ago
- bd3a445 clk: actions: Don't reference clk_init_data after registration by Stephen Boyd · 5 years ago
- efb0e1e clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks by Icenowy Zheng · 5 years ago
- a227955 clk: qoriq: Fix -Wunused-const-variable by Nathan Huckleberry · 5 years ago
- 6da56f8 clk: rockchip: Don't yell about bad mmc phases when getting by Douglas Anderson · 5 years ago
- fa717fc clk: tegra210: Fix default rates for HDA clocks by Jon Hunter · 5 years ago
- 350503c clk: tegra: Fix maximum audio sync clock for Tegra124/210 by Jon Hunter · 6 years ago
- 56944c0 clk: s2mps11: Add used attribute to s2mps11_dt_match by Nathan Chancellor · 6 years ago
- a8f7703 clk: socfpga: stratix10: fix rate caclulationg for cnt_clks by Dinh Nguyen · 5 years ago
- ca5b26a clk: renesas: cpg-mssr: Fix reset control race condition by Geert Uytterhoeven · 5 years ago
- af2ed1a clk: sprd: Select REGMAP_MMIO to avoid compile errors by Chunyan Zhang · 5 years ago
- 3e5f29b clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1 by Codrin Ciubotariu · 5 years ago
- e7fcc58 clk: sprd: Add check for return value of sprd_clk_regmap_init() by Chunyan Zhang · 5 years ago
- 85d854b clk: tegra210: fix PLLU and PLLU_OUT1 by JC Kuo · 5 years ago
- cf4deb2 clk: ti: clkctrl: Fix returning uninitialized data by Tony Lindgren · 5 years ago
- bcfed14 clk: socfpga: stratix10: fix divider entry for the emac clocks by Dinh Nguyen · 5 years ago