Merge "drm/msm: add YUV422 format support"
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a5deca6..811316c 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1169,77 +1169,77 @@
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9,},
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
/* 94 - 3840x2160p@25Hz 16:9 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
/* 95 - 3840x2160p@30Hz 16:9 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
/* 96 - 3840x2160p@50Hz 16:9 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
/* 97 - 3840x2160p@60Hz 16:9 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9},
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
/* 98 - 4096x2160p@24Hz 256:135 */
{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
/* 99 - 4096x2160p@25Hz 256:135 */
{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
/* 100 - 4096x2160p@30Hz 256:135 */
{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
/* 101 - 4096x2160p@50Hz 256:135 */
{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
/* 102 - 4096x2160p@60Hz 256:135 */
{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135},
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
/* 103 - 3840x2160p@24Hz 64:27 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
/* 104 - 3840x2160p@25Hz 64:27 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
/* 105 - 3840x2160p@30Hz 64:27 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
/* 106 - 3840x2160p@50Hz 64:27 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
/* 107 - 3840x2160p@60Hz 64:27 */
{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27},
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
};
/*
@@ -4313,11 +4313,11 @@
* modes and forbids YCRCB422 support for all video modes per
* HDMI 1.3 spec.
*/
- info->color_formats = DRM_COLOR_FORMAT_RGB444;
+ info->color_formats |= DRM_COLOR_FORMAT_DC_RGB444;
/* YCRCB444 is optional according to spec. */
if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
- info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
+ info->color_formats |= DRM_COLOR_FORMAT_DC_YCRCB444;
DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
connector->name);
}
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 97387cf..615c85a 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -997,6 +997,7 @@
mode1->vsync_end == mode2->vsync_end &&
mode1->vtotal == mode2->vtotal &&
mode1->vscan == mode2->vscan &&
+ mode1->picture_aspect_ratio == mode2->picture_aspect_ratio &&
(mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
(mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
return true;
@@ -1506,6 +1507,27 @@
out->vrefresh = in->vrefresh;
out->flags = in->flags;
out->type = in->type;
+ out->flags &= ~DRM_MODE_FLAG_PIC_AR_MASK;
+
+ switch (in->picture_aspect_ratio) {
+ case HDMI_PICTURE_ASPECT_4_3:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_4_3;
+ break;
+ case HDMI_PICTURE_ASPECT_16_9:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_16_9;
+ break;
+ case HDMI_PICTURE_ASPECT_64_27:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_64_27;
+ break;
+ case DRM_MODE_PICTURE_ASPECT_256_135:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_256_135;
+ break;
+ case HDMI_PICTURE_ASPECT_RESERVED:
+ default:
+ out->flags |= DRM_MODE_FLAG_PIC_AR_NONE;
+ break;
+ }
+
strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
}
@@ -1551,6 +1573,27 @@
strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
+ /* Clearing picture aspect ratio bits from out flags */
+ out->flags &= ~DRM_MODE_FLAG_PIC_AR_MASK;
+
+ switch (in->flags & DRM_MODE_FLAG_PIC_AR_MASK) {
+ case DRM_MODE_FLAG_PIC_AR_4_3:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_4_3;
+ break;
+ case DRM_MODE_FLAG_PIC_AR_16_9:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_16_9;
+ break;
+ case DRM_MODE_FLAG_PIC_AR_64_27:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_64_27;
+ break;
+ case DRM_MODE_FLAG_PIC_AR_256_135:
+ out->picture_aspect_ratio |= HDMI_PICTURE_ASPECT_256_135;
+ break;
+ default:
+ out->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
+ break;
+ }
+
out->status = drm_mode_validate_basic(out);
if (out->status != MODE_OK)
goto out;
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index efd6a77..25523b0 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -53,12 +53,16 @@
*/
/* Enable RGB444 30 bit deep color */
#define MSM_MODE_FLAG_RGB444_DC_ENABLE (1<<5)
+/* Enable YUV422 30 bit deep color */
+#define MSM_MODE_FLAG_YUV422_DC_ENABLE (1<<6)
/* Enable YUV420 30 bit deep color */
-#define MSM_MODE_FLAG_YUV420_DC_ENABLE (1<<6)
+#define MSM_MODE_FLAG_YUV420_DC_ENABLE (1<<7)
/* Choose RGB444 format to display */
-#define MSM_MODE_FLAG_COLOR_FORMAT_RGB444 (1<<7)
+#define MSM_MODE_FLAG_COLOR_FORMAT_RGB444 (1<<8)
+/* Choose YUV422 format to display */
+#define MSM_MODE_FLAG_COLOR_FORMAT_YCBCR422 (1<<9)
/* Choose YUV420 format to display */
-#define MSM_MODE_FLAG_COLOR_FORMAT_YCBCR420 (1<<8)
+#define MSM_MODE_FLAG_COLOR_FORMAT_YCBCR420 (1<<10)
/* As there are different display controller blocks depending on the
* snapdragon version, the kms support is split out and the appropriate
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder.c b/drivers/gpu/drm/msm/sde/sde_encoder.c
index 66016fc..0956c01 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder.c
@@ -199,6 +199,18 @@
{ 0x0040, 0x03ac, 0x0040, 0x03c0, 0x0040, 0x03c0,},
},
+ [SDE_CSC_RGB2YUV_709FR] = {
+ {
+ TO_S15D16(0x006d), TO_S15D16(0x016e), TO_S15D16(0x0025),
+ TO_S15D16(0xffc5), TO_S15D16(0xff3b), TO_S15D16(0x0100),
+ TO_S15D16(0x0100), TO_S15D16(0xff17), TO_S15D16(0xffe9),
+ },
+ { 0x0, 0x0, 0x0,},
+ { 0x0040, 0x0200, 0x0200,},
+ { 0x0, 0x3ff, 0x0, 0x3ff, 0x0, 0x3ff,},
+ { 0x0, 0x3ff, 0x0, 0x3ff, 0x0, 0x3ff,},
+ },
+
[SDE_CSC_RGB2YUV_2020L] = {
{
TO_S15D16(0x0073), TO_S15D16(0x0129), TO_S15D16(0x001a),
@@ -5318,12 +5330,12 @@
if (output_type == CDM_CDWN_OUTPUT_HDMI) {
if (connector && connector->yuv_qs)
- csc_type = SDE_CSC_RGB2YUV_601FR;
+ csc_type = SDE_CSC_RGB2YUV_709FR;
else if (connector &&
sde_connector_mode_needs_full_range(connector))
- csc_type = SDE_CSC_RGB2YUV_601FR;
+ csc_type = SDE_CSC_RGB2YUV_709FR;
else
- csc_type = SDE_CSC_RGB2YUV_601L;
+ csc_type = SDE_CSC_RGB2YUV_709L;
} else if (output_type == CDM_CDWN_OUTPUT_WB) {
csc_type = SDE_CSC_RGB2YUV_601L;
}
diff --git a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
index 116da82..a1c3bfa 100644
--- a/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c
@@ -792,6 +792,8 @@
if (mode.private_flags & MSM_MODE_FLAG_COLOR_FORMAT_YCBCR420)
fmt = sde_get_sde_format(DRM_FORMAT_YUV420);
+ else if (mode.private_flags & MSM_MODE_FLAG_COLOR_FORMAT_YCBCR422)
+ fmt = sde_get_sde_format(DRM_FORMAT_NV61);
if (fmt) {
struct sde_rect hdmi_roi;
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
index 151a721..322613d 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
+++ b/drivers/gpu/drm/msm/sde/sde_hw_mdss.h
@@ -397,6 +397,7 @@
SDE_CSC_RGB2YUV_601L,
SDE_CSC_RGB2YUV_601FR,
SDE_CSC_RGB2YUV_709L,
+ SDE_CSC_RGB2YUV_709FR,
SDE_CSC_RGB2YUV_2020L,
SDE_CSC_RGB2YUV_2020FR,
SDE_MAX_CSC
diff --git a/drivers/gpu/drm/msm/sde/sde_hw_top.c b/drivers/gpu/drm/msm/sde/sde_hw_top.c
index cf646bd..48fedfd 100644
--- a/drivers/gpu/drm/msm/sde/sde_hw_top.c
+++ b/drivers/gpu/drm/msm/sde/sde_hw_top.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -159,7 +159,7 @@
if (cfg->wb_en)
out_ctl |= BIT(24);
else if (cfg->intf_en)
- out_ctl |= BIT(19);
+ out_ctl |= BIT(28);
SDE_REG_WRITE(c, MDP_OUT_CTL_0, out_ctl);
}
diff --git a/drivers/gpu/drm/msm/sde_edid_parser.c b/drivers/gpu/drm/msm/sde_edid_parser.c
index c2ba3b97..89b5e3e 100644
--- a/drivers/gpu/drm/msm/sde_edid_parser.c
+++ b/drivers/gpu/drm/msm/sde_edid_parser.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -242,7 +242,7 @@
if ((cea_mode != 0) && (cea_mode == video_format)) {
SDE_EDID_DEBUG("%s found match for %d ", __func__,
video_format);
- mode->flags |= DRM_MODE_FLAG_SUPPORTS_YUV;
+ mode->flags |= DRM_MODE_FLAG_SUPPORTS_YUV420;
}
}
}
@@ -251,12 +251,13 @@
struct drm_connector *connector, struct sde_edid_ctrl *edid_ctrl,
const u8 *db)
{
- u32 offset = 0;
u8 cmdb_len = 0;
u8 svd_len = 0;
const u8 *svd = NULL;
- u32 i = 0, j = 0;
+ u32 i = 0;
u32 video_format = 0;
+ u32 num_cmdb_svd = 0;
+ const u32 mult = 8;
if (!edid_ctrl) {
SDE_ERROR("%s: edid_ctrl is NULL\n", __func__);
@@ -270,8 +271,8 @@
SDE_EDID_DEBUG("%s +\n", __func__);
cmdb_len = db[0] & 0x1f;
- /* Byte 3 to L+1 contain SVDs */
- offset += 2;
+ if (cmdb_len < 1)
+ return;
svd = sde_edid_find_block(edid_ctrl->edid, VIDEO_DATA_BLOCK);
@@ -281,21 +282,26 @@
++svd;
}
- for (i = 0; i < svd_len; i++, j++) {
- video_format = *(svd + i) & 0x7F;
- if (cmdb_len == 1) {
- /* If cmdb_len is 1, it means all SVDs support YUV */
- sde_edid_set_y420_support(connector, video_format);
- } else if (db[offset] & (1 << j)) {
- sde_edid_set_y420_support(connector, video_format);
+ if (cmdb_len == 1)
+ num_cmdb_svd = svd_len;
+ else {
+ num_cmdb_svd = (cmdb_len - 1) * mult;
+ if (num_cmdb_svd > svd_len)
+ num_cmdb_svd = svd_len;
+ }
- if (j & 0x80) {
- j = j/8;
- offset++;
- if (offset >= cmdb_len)
- break;
- }
- }
+ for (i = 0; i < num_cmdb_svd; i++) {
+ video_format = *(svd + i) & 0x7F;
+ /*
+ * If cmdb_len is 1, it means all SVDs support YUV
+ * Else, we check each byte of the cmdb bitmap bitwise
+ * and match those bits with the formats populated
+ * during the parsing of the Video Data Blocks.
+ * Refer to CTA 861-F section 7.5.11 YCBCR 4:2:0 Capability
+ * Map Data Block for more details on this.
+ */
+ if (cmdb_len == 1 || (db[2 + i / mult] & (1 << (i % mult))))
+ sde_edid_set_y420_support(connector, video_format);
}
SDE_EDID_DEBUG("%s -\n", __func__);
@@ -335,6 +341,7 @@
{
const u8 *db = NULL;
struct drm_display_mode *mode;
+ struct drm_display_info *info = &connector->display_info;
SDE_EDID_DEBUG("%s +\n", __func__);
/* Set YUV mode support flags for YCbcr420VDB */
@@ -347,8 +354,11 @@
/* Set RGB supported on all modes where YUV is not set */
list_for_each_entry(mode, &connector->probed_modes, head) {
- if (!(mode->flags & DRM_MODE_FLAG_SUPPORTS_YUV))
+ if (!(mode->flags & DRM_MODE_FLAG_SUPPORTS_YUV420)) {
mode->flags |= DRM_MODE_FLAG_SUPPORTS_RGB;
+ if (info->color_formats & DRM_COLOR_FORMAT_YCRCB422)
+ mode->flags |= DRM_MODE_FLAG_SUPPORTS_YUV422;
+ }
}
@@ -359,6 +369,34 @@
else
SDE_EDID_DEBUG("YCbCr420 CMDB is not present\n");
+ /*
+ * As per HDMI 2.0 spec, a sink supporting any modes
+ * requiring more than 340Mhz clock rate should support
+ * SCDC as well. This is required because we need the SCDC
+ * channel to set the TMDS clock ratio. However in cases
+ * where the TV publishes such a mode in its list of modes
+ * but does not have SCDC support as per HDMI HFVSDB block
+ * remove RGB mode support from the flags. Currently, in
+ * the list of modes not having deep color support only RGB
+ * modes shall requre a clock of 340Mhz and above such as the
+ * 4K@60fps case. All other modes shall be YUV.
+ * Deep color case is handled separately while choosing the
+ * best mode in the _sde_hdmi_choose_best_format API where
+ * we enable deep color only if it satisfies both source and
+ * sink requirements. However, that API assumes that at least
+ * RGB mode is supported on the mode. Hence, it would be better
+ * to remove the format support flags while parsing the EDID
+ * itself if it doesn't satisfy the HDMI spec requirement.
+ */
+
+ list_for_each_entry(mode, &connector->probed_modes, head) {
+ if ((mode->clock > MIN_SCRAMBLER_REQ_RATE) &&
+ !connector->scdc_present) {
+ mode->flags &= ~DRM_MODE_FLAG_SUPPORTS_RGB;
+ mode->flags &= ~DRM_MODE_FLAG_SUPPORTS_YUV422;
+ }
+ }
+
SDE_EDID_DEBUG("%s -\n", __func__);
}
@@ -378,6 +416,7 @@
}
disp_info = &connector->display_info;
+ disp_info->y420_bpc = 8;
edid_ext = sde_find_cea_extension(edid_ctrl->edid);
@@ -398,16 +437,19 @@
continue;
if (hdmi[7] & DRM_EDID_YCBCR420_DC_30) {
+ disp_info->y420_bpc = 10;
hdmi_dc_yuv_modes |= DRM_EDID_YCBCR420_DC_30;
SDE_EDID_DEBUG("Y420 30-bit supported\n");
}
if (hdmi[7] & DRM_EDID_YCBCR420_DC_36) {
+ disp_info->y420_bpc = 12;
hdmi_dc_yuv_modes |= DRM_EDID_YCBCR420_DC_36;
SDE_EDID_DEBUG("Y420 36-bit supported\n");
}
if (hdmi[7] & DRM_EDID_YCBCR420_DC_48) {
+ disp_info->y420_bpc = 16;
hdmi_dc_yuv_modes |= DRM_EDID_YCBCR420_DC_36;
SDE_EDID_DEBUG("Y420 48-bit supported\n");
}
@@ -548,6 +590,12 @@
{
int rc = 0;
struct sde_edid_ctrl *edid_ctrl = (struct sde_edid_ctrl *)(input);
+ struct drm_display_info *disp_info;
+
+ disp_info = &connector->display_info;
+
+ if (disp_info)
+ disp_info->edid_hdmi_dc_modes = 0;
SDE_EDID_DEBUG("%s +", __func__);
if (edid_ctrl->edid) {
diff --git a/drivers/gpu/drm/msm/sde_edid_parser.h b/drivers/gpu/drm/msm/sde_edid_parser.h
index fd56116..422ce08 100644
--- a/drivers/gpu/drm/msm/sde_edid_parser.h
+++ b/drivers/gpu/drm/msm/sde_edid_parser.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -33,7 +33,11 @@
#define SDE_CEA_EXT 0x02
#define SDE_EXTENDED_TAG 0x07
-#define SDE_DRM_MODE_FLAG_FMT_MASK (0x3 << 20)
+#define MIN_SCRAMBLER_REQ_RATE 340000
+
+#define SDE_DRM_MODE_FLAG_FMT_MASK (DRM_MODE_FLAG_SUPPORTS_RGB | \
+ DRM_MODE_FLAG_SUPPORTS_YUV422 | \
+ DRM_MODE_FLAG_SUPPORTS_YUV420)
enum extended_data_block_types {
VIDEO_CAPABILITY_DATA_BLOCK = 0x0,
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 961156a..0acf72e 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -126,6 +126,12 @@
unsigned int bpc;
/**
+ * @bpc: Maximum bits per color channel for YCbCr420 modes.
+ * Used by HDMI and DP outputs.
+ */
+ unsigned int y420_bpc;
+
+ /**
* @subpixel_order: Subpixel order of LCD panels.
*/
enum subpixel_order subpixel_order;
@@ -133,6 +139,8 @@
#define DRM_COLOR_FORMAT_RGB444 (1<<0)
#define DRM_COLOR_FORMAT_YCRCB444 (1<<1)
#define DRM_COLOR_FORMAT_YCRCB422 (1<<2)
+#define DRM_COLOR_FORMAT_DC_RGB444 (1<<3)
+#define DRM_COLOR_FORMAT_DC_YCRCB444 (1<<4)
/**
* @color_formats: HDMI Color formats, selects between RGB and YCrCb
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 9c927a5..b420f2a 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -78,7 +78,29 @@
#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
#define DRM_MODE_FLAG_SEAMLESS (1<<19)
#define DRM_MODE_FLAG_SUPPORTS_RGB (1<<20)
-#define DRM_MODE_FLAG_SUPPORTS_YUV (1<<21)
+#define DRM_MODE_FLAG_SUPPORTS_YUV422 (1<<21)
+#define DRM_MODE_FLAG_SUPPORTS_YUV420 (1<<22)
+
+
+/* Picture aspect ratio options */
+#define DRM_MODE_PICTURE_ASPECT_NONE 0
+#define DRM_MODE_PICTURE_ASPECT_4_3 1
+#define DRM_MODE_PICTURE_ASPECT_16_9 2
+#define DRM_MODE_PICTURE_ASPECT_64_27 3
+#define DRM_MODE_PICTURE_ASPECT_256_135 4
+
+/* Aspect ratio flag bitmask (4 bits 27:24) */
+#define DRM_MODE_FLAG_PIC_AR_MASK (0x0F<<24)
+#define DRM_MODE_FLAG_PIC_AR_NONE \
+ (DRM_MODE_PICTURE_ASPECT_NONE<<24)
+#define DRM_MODE_FLAG_PIC_AR_4_3 \
+ (DRM_MODE_PICTURE_ASPECT_4_3<<24)
+#define DRM_MODE_FLAG_PIC_AR_16_9 \
+ (DRM_MODE_PICTURE_ASPECT_16_9<<24)
+#define DRM_MODE_FLAG_PIC_AR_64_27 \
+ (DRM_MODE_PICTURE_ASPECT_64_27<<24)
+#define DRM_MODE_FLAG_PIC_AR_256_135 \
+ (DRM_MODE_PICTURE_ASPECT_256_135<<24)
/* DPMS flags */
/* bit compatible with the xorg definitions. */
@@ -94,11 +116,6 @@
#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
-/* Picture aspect ratio options */
-#define DRM_MODE_PICTURE_ASPECT_NONE 0
-#define DRM_MODE_PICTURE_ASPECT_4_3 1
-#define DRM_MODE_PICTURE_ASPECT_16_9 2
-
/* Dithering mode options */
#define DRM_MODE_DITHERING_OFF 0
#define DRM_MODE_DITHERING_ON 1