[MIPS] No need to write c0_compare in plat_timer_setup
If R4k counter was used for hpt_timer and interrupt source,
c0_hpt_timer_init() initializes the c0_compare register.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
index 14c5516..b27b47c 100644
--- a/arch/mips/lasat/setup.c
+++ b/arch/mips/lasat/setup.c
@@ -116,7 +116,6 @@
void __init plat_timer_setup(struct irqaction *irq)
{
- write_c0_compare( read_c0_count() + mips_hpt_frequency / HZ);
change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
}
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c
index a3c3a1d..df2a2bd 100644
--- a/arch/mips/mips-boards/generic/time.c
+++ b/arch/mips/mips-boards/generic/time.c
@@ -295,7 +295,4 @@
irq_desc[mips_cpu_timer_irq].status |= IRQ_PER_CPU;
set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
#endif
-
- /* to generate the first timer interrupt */
- write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
}
diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c
index 30711d0..d3a21c7 100644
--- a/arch/mips/mips-boards/sim/sim_time.c
+++ b/arch/mips/mips-boards/sim/sim_time.c
@@ -199,7 +199,4 @@
irq_desc[mips_cpu_timer_irq].flags |= IRQ_PER_CPU;
set_irq_handler(mips_cpu_timer_irq, handle_percpu_irq);
#endif
-
- /* to generate the first timer interrupt */
- write_c0_compare(read_c0_count() + (mips_hpt_frequency/HZ));
}
diff --git a/arch/mips/tx4927/common/tx4927_setup.c b/arch/mips/tx4927/common/tx4927_setup.c
index 941c441..c8e49fe 100644
--- a/arch/mips/tx4927/common/tx4927_setup.c
+++ b/arch/mips/tx4927/common/tx4927_setup.c
@@ -81,18 +81,8 @@
void __init plat_timer_setup(struct irqaction *irq)
{
- u32 count;
- u32 c1;
- u32 c2;
-
setup_irq(TX4927_IRQ_CPU_TIMER, irq);
- /* to generate the first timer interrupt */
- c1 = read_c0_count();
- count = c1 + (mips_hpt_frequency / HZ);
- write_c0_compare(count);
- c2 = read_c0_count();
-
#ifdef CONFIG_TOSHIBA_RBTX4927
{
extern void toshiba_rbtx4927_timer_setup(struct irqaction
diff --git a/arch/mips/tx4938/common/setup.c b/arch/mips/tx4938/common/setup.c
index dc87d92..142abf4 100644
--- a/arch/mips/tx4938/common/setup.c
+++ b/arch/mips/tx4938/common/setup.c
@@ -55,14 +55,5 @@
void __init plat_timer_setup(struct irqaction *irq)
{
- u32 count;
- u32 c1;
- u32 c2;
-
setup_irq(TX4938_IRQ_CPU_TIMER, irq);
-
- c1 = read_c0_count();
- count = c1 + (mips_hpt_frequency / HZ);
- write_c0_compare(count);
- c2 = read_c0_count();
}