Merge "Merge android-4.9.213(cff739f) into msm-4.9"
diff --git a/Documentation/devicetree/bindings/arm/msm/sdx-ext-ipc.txt b/Documentation/devicetree/bindings/arm/msm/sdx-ext-ipc.txt
new file mode 100644
index 0000000..689c5b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/sdx-ext-ipc.txt
@@ -0,0 +1,31 @@
+Modem chipset attached to Application processor
+
+Modem chipset can be connected to an external apss processor. The control
+channel between the two chipsets consists of gpios that can relay the
+state of one subsytem to another. Modem can indicate different events
+(bootup/crash etc.) to AP and can get the same information from AP.
+
+Required Properties:
+- compatible:	"qcom,sdx-ext-ipc".
+
+Required named gpio properties:
+- qcom,mdm2ap-status-gpio: gpio for modem to indicate the boot status to APQ.
+
+- qcom,ap2mdm-status-gpio: gpio for APQ to indicate the boot status to modem.
+
+
+
+Optional named gpio properties:
+- qcom,mdm2ap-status2-gpio: gpio for modem to indicate to APQ that it is in
+		E911 call or doing firmware upgrade.
+
+- qcom,ap2mdm-status2-gpio: gpio for APQ to indicate graceful shutdown to modem.
+
+Example:
+	sdx_ext_ipc: qcom,sdx_ext_ipc {
+		compatible = "qcom,sdx-ext-ipc";
+		qcom,ap2mdm-status-gpio = <&tlmm 64 0x00>;
+		qcom,ap2mdm-status2-gpio = <&tlmm 65 0x00>;
+		qcom,mdm2ap-status-gpio = <&tlmm 63 0x00>;
+		qcom,mdm2ap-status2-gpio = <&tlmm 66 0x00>;
+	};
diff --git a/Documentation/devicetree/bindings/media/video/msm-cci.txt b/Documentation/devicetree/bindings/media/video/msm-cci.txt
index b43b295..5f118de 100644
--- a/Documentation/devicetree/bindings/media/video/msm-cci.txt
+++ b/Documentation/devicetree/bindings/media/video/msm-cci.txt
@@ -338,6 +338,7 @@
 		clocks = <&clock_mmss clk_mclk0_clk_src>,
 				<&clock_mmss clk_camss_mclk0_clk>;
 		clock-names = "cam_src_clk", "cam_clk";
+		qcom,clock-rates = <24000000 0>;
 	};
 
 &i2c_freq_100Khz {
diff --git a/arch/arm64/boot/dts/qcom/msm8905-camera-sensor-skub.dtsi b/arch/arm64/boot/dts/qcom/msm8905-camera-sensor-skub.dtsi
index 699b8c1..c13c031 100644
--- a/arch/arm64/boot/dts/qcom/msm8905-camera-sensor-skub.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8905-camera-sensor-skub.dtsi
@@ -189,6 +189,7 @@
 		clocks = <&clock_gcc clk_mclk0_clk_src>,
 			<&clock_gcc clk_gcc_camss_mclk0_clk>;
 		clock-names = "cam_src_clk", "cam_clk";
+		qcom,clock-rates = <24000000 0>;
 	};
 
 	qcom,camera@1 {
@@ -225,5 +226,6 @@
 		clocks = <&clock_gcc clk_mclk1_clk_src>,
 			<&clock_gcc clk_gcc_camss_mclk1_clk>;
 		clock-names = "cam_src_clk", "cam_clk";
+		qcom,clock-rates = <24000000 0>;
 	};
 };
diff --git a/arch/arm64/boot/dts/qcom/msm8909-camera.dtsi b/arch/arm64/boot/dts/qcom/msm8909-camera.dtsi
new file mode 100644
index 0000000..634407a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8909-camera.dtsi
@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2014-2015, 2017, 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+&soc {
+	qcom,msm-cam@1800000{
+		compatible = "qcom,msm-cam";
+		reg = <0x1b00000 0x40000>;
+		reg-names = "msm-cam";
+		status = "ok";
+		bus-vectors = "suspend", "svs", "nominal", "turbo";
+		qcom,bus-votes = <0 320000000 640000000 640000000>;
+	};
+
+	qcom,csiphy@1b0ac00 {
+		cell-index = <0>;
+		compatible = "qcom,csiphy-v3.1", "qcom,csiphy";
+		reg = <0x1b0ac00 0x200>,
+			<0x1b00030 0x4>;
+		reg-names = "csiphy", "csiphy_clk_mux";
+		interrupts = <0 78 0>;
+		interrupt-names = "csiphy";
+		clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_ispif_ahb_clk>,
+			<&clock_gcc clk_csi0phytimer_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi0phytimer_clk>,
+			<&clock_gcc clk_camss_top_ahb_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi0phy_clk>,
+			<&clock_gcc clk_gcc_camss_csi1phy_clk>,
+			<&clock_gcc clk_gcc_camss_ahb_clk>;
+		clock-names = "camss_top_ahb_clk", "ispif_ahb_clk",
+			"csiphy_timer_src_clk", "csiphy_timer_clk",
+			"camss_ahb_src", "csi0_phy_clk", "csi1_phy_clk",
+			"camss_ahb_clk";
+		qcom,clock-rates = <0 0 200000000 0 0 0 0 0>;
+	};
+
+	qcom,csid@1b08000  {
+		cell-index = <0>;
+		compatible = "qcom,csid-v3.1", "qcom,csid";
+		reg = <0x1b08000 0x100>;
+		reg-names = "csid";
+		interrupts = <0 49 0>;
+		interrupt-names = "csid";
+		qcom,csi-vdd-voltage = <1200000>;
+		qcom,mipi-csi-vdd-supply = <&pm8909_l2>;
+		clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_top_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_csi0_ahb_clk>,
+			<&clock_gcc clk_csi0_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi0_clk>,
+			<&clock_gcc clk_gcc_camss_csi0pix_clk>,
+			<&clock_gcc clk_gcc_camss_csi0rdi_clk>,
+			<&clock_gcc clk_gcc_camss_ahb_clk>;
+		clock-names = "ispif_ahb_clk", "camss_top_ahb_clk",
+			"csi_ahb_clk", "csi_src_clk",
+			"csi_clk",  "csi_pix_clk",
+			"csi_rdi_clk", "camss_ahb_clk";
+		qcom,clock-rates = <40000000 0 0 200000000 0 0 0 0>;
+	};
+
+	qcom,csid@1b08400 {
+		cell-index = <1>;
+		compatible = "qcom,csid-v3.1", "qcom,csid";
+		reg = <0x1b08400 0x100>;
+		reg-names = "csid";
+		interrupts = <0 50 0>;
+		interrupt-names = "csid";
+		qcom,csi-vdd-voltage = <1200000>;
+		qcom,mipi-csi-vdd-supply = <&pm8909_l2>;
+		clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_top_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_csi1_ahb_clk>,
+			<&clock_gcc clk_csi1_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi1_clk>,
+			<&clock_gcc clk_gcc_camss_csi1pix_clk>,
+			<&clock_gcc clk_gcc_camss_csi1rdi_clk>,
+			<&clock_gcc clk_gcc_camss_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_csi1phy_clk>;
+		clock-names = "ispif_ahb_clk", "camss_top_ahb_clk",
+			"csi_ahb_clk", "csi_src_clk",
+			"csi_clk", "csi_pix_clk",
+			"csi_rdi_clk", "camss_ahb_clk", "camss_csi1_phy";
+		qcom,clock-rates = <40000000 0 0 200000000 0 0 0 0 0>;
+	};
+
+	qcom,ispif@1b0a000 {
+		cell-index = <0>;
+		compatible = "qcom,ispif";
+		reg = <0x1b0a000 0x500>,
+			<0x1b00020 0x10>;
+		reg-names = "ispif", "csi_clk_mux";
+		interrupts = <0 51 0>;
+		interrupt-names = "ispif";
+		qcom,num-isps = <0x1>;
+		vfe0_vdd_supply = <&gdsc_vfe>;
+		clocks = <&clock_gcc clk_gcc_camss_top_ahb_clk>,
+			<&clock_gcc clk_gcc_camss_ispif_ahb_clk>,
+
+			<&clock_gcc clk_csi0_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi0_clk>,
+			<&clock_gcc clk_gcc_camss_csi0rdi_clk>,
+			<&clock_gcc clk_gcc_camss_csi0pix_clk>,
+			<&clock_gcc clk_csi1_clk_src>,
+			<&clock_gcc clk_gcc_camss_csi1_clk>,
+			<&clock_gcc clk_gcc_camss_csi1rdi_clk>,
+			<&clock_gcc clk_gcc_camss_csi1pix_clk>,
+			<&clock_gcc clk_vfe0_clk_src>,
+			<&clock_gcc clk_gcc_camss_vfe0_clk>,
+			<&clock_gcc clk_gcc_camss_csi_vfe0_clk>;
+
+		clock-names = "camss_top_ahb_clk", "ispif_ahb_clk",
+			"csi0_src_clk", "csi0_clk",
+			"csi0_rdi_clk", "csi0_pix_clk",
+			"csi1_src_clk", "csi1_clk",
+			"csi1_rdi_clk", "csi1_pix_clk",
+			"vfe0_clk_src", "camss_vfe_vfe0_clk",
+			"camss_csi_vfe0_clk";
+		qcom,clock-rates = <0 40000000
+			200000000 0 0 0
+			200000000 0 0 0
+			0 0 0>;
+		qcom,clock-control = "NO_SET_RATE", "SET_RATE",
+			"SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE",
+			"SET_RATE", "NO_SET_RATE", "NO_SET_RATE", "NO_SET_RATE",
+			"INIT_RATE", "NO_SET_RATE", "NO_SET_RATE";
+	};
+
+	qcom,vfe@1b10000 {
+			cell-index = <0>;
+			compatible = "qcom,vfe32";
+			reg = <0x1b10000 0x830>,
+			<0x1b40000 0x200>;
+			reg-names = "vfe", "vfe_vbif";
+			interrupts = <0 52 0>;
+			interrupt-names = "vfe";
+			vdd-supply = <&gdsc_vfe>;
+			clocks = <&clock_gcc clk_gcc_camss_ispif_ahb_clk>,
+				<&clock_gcc clk_vfe0_clk_src>,
+				<&clock_gcc clk_gcc_camss_vfe0_clk>,
+				<&clock_gcc clk_gcc_camss_csi_vfe0_clk>,
+				<&clock_gcc clk_gcc_camss_vfe_ahb_clk>,
+				<&clock_gcc clk_gcc_camss_vfe_axi_clk>,
+				<&clock_gcc clk_gcc_camss_ahb_clk>,
+				<&clock_gcc clk_gcc_camss_top_ahb_clk>;
+			clock-names = "camss_top_ahb_clk", "vfe_clk_src",
+			"camss_vfe_vfe_clk", "camss_csi_vfe_clk", "iface_clk",
+			"bus_clk", "camss_ahb_clk", "ispif_ahb_clk";
+			qcom,clock-rates = <40000000 266670000 0 0 0 0 0 0>;
+
+			qos-entries = <8>;
+			qos-regs = <0x7BC 0x7C0 0x7C4 0x7C8 0x7CC 0x7D0
+				0x7D4 0x798>;
+			qos-settings = <0xAAA5AAA5 0xAAA5AAA5 0xAAA5AAA5
+				0xAAA5AAA5 0xAAA5AAA5 0xAAA5AAA5
+				0xAAA5AAA5 0x00010000>;
+			vbif-entries = <1>;
+			vbif-regs = <0x04>;
+			vbif-settings = <0x1>;
+			ds-entries = <15>;
+			ds-regs = <0x7D8 0x7DC 0x7E0 0x7E4 0x7E8
+				0x7EC 0x7F0 0x7F4 0x7F8 0x7FC 0x800
+				0x804 0x808 0x80C 0x810>;
+			ds-settings = <0xCCCC1111 0xCCCC1111 0xCCCC1111
+				0xCCCC1111 0xCCCC1111 0xCCCC1111
+				0xCCCC1111 0xCCCC1111 0xCCCC1111
+				0xCCCC1111 0xCCCC1111 0xCCCC1111
+				0xCCCC1111 0xCCCC1111 0x00000103>;
+
+		bus-util-factor = <1024>;
+	};
+
+	qcom,cam_smmu {
+		status = "ok";
+		compatible = "qcom,msm-cam-smmu";
+		msm_cb1: msm_cb1 {
+			compatible = "qcom,msm-cam-smmu-cb";
+			iommus = <&apps_iommu 0x400 0x0>;
+			label = "vfe";
+			qcom,scratch-buf-support;
+		};
+		};
+
+	qcom,irqrouter@1b00000 {
+		status = "ok";
+		cell-index = <0>;
+		compatible = "qcom,irqrouter";
+		reg = <0x1b00000 0x100>;
+		reg-names = "irqrouter";
+	};
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8909.dtsi b/arch/arm64/boot/dts/qcom/msm8909.dtsi
index 54b070b..94c93b6 100644
--- a/arch/arm64/boot/dts/qcom/msm8909.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8909.dtsi
@@ -243,6 +243,7 @@
 #include "msm8909-vidc.dtsi"
 #include "msm8909-mdss.dtsi"
 #include "msm8909-mdss-pll.dtsi"
+#include "msm8909-camera.dtsi"
 
 &soc {
 	#address-cells = <1>;
@@ -2017,3 +2018,4 @@
 	status = "okay";
 };
 #include "msm8909-thermal.dtsi"
+#include "msm8909-pinctrl.dtsi"
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index cbf1734..6a6fc8c 100644
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -274,6 +274,16 @@
 
                If unsure, say N.
 
+config SDX_EXT_IPC
+	tristate "QCOM external ipc driver"
+	help
+	  This enables the module to help modem communicate with external
+	  Application processor connected to Qualcomm Technologies, Inc
+	  modem chipset. The modem and APQ can understand each other's
+	  state by reading ipc gpios.
+
+	  If unsure, say N.
+
 config PANIC_ON_GLADIATOR_ERROR
        depends on MSM_GLADIATOR_ERP
        bool "Panic on GLADIATOR error report"
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index 1dda5d1..c61594b 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -78,6 +78,7 @@
 obj-$(CONFIG_MSM_BGCOM) += bgcom_spi.o
 
 obj-$(CONFIG_MSM_PERFORMANCE) += msm_performance.o
+obj-$(CONFIG_SDX_EXT_IPC) += sdx_ext_ipc.o
 
 ifdef CONFIG_MSM_SUBSYSTEM_RESTART
        obj-y += subsystem_notif.o
diff --git a/drivers/soc/qcom/sdx_ext_ipc.c b/drivers/soc/qcom/sdx_ext_ipc.c
new file mode 100644
index 0000000..2b18017
--- /dev/null
+++ b/drivers/soc/qcom/sdx_ext_ipc.c
@@ -0,0 +1,267 @@
+/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/gpio.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+
+
+enum subsys_policies {
+	SUBSYS_PANIC = 0,
+	SUBSYS_NOP,
+};
+
+static const char * const policies[] = {
+	[SUBSYS_PANIC] = "PANIC",
+	[SUBSYS_NOP] = "NOP",
+};
+
+enum gpios {
+	AP2MDM_STATUS = 0,
+	MDM2AP_STATUS,
+	MDM2AP_STATUS2,
+	NUM_GPIOS,
+};
+
+static const char * const gpio_map[] = {
+	[AP2MDM_STATUS] = "qcom,ap2mdm-status-gpio",
+	[MDM2AP_STATUS] = "qcom,mdm2ap-status-gpio",
+	[MDM2AP_STATUS2] = "qcom,mdm2ap-status2-gpio",
+};
+
+struct gpio_cntrl {
+	unsigned int gpios[NUM_GPIOS];
+	int status_irq;
+	int policy;
+	struct device *dev;
+	struct mutex policy_lock;
+	struct notifier_block panic_blk;
+};
+
+static ssize_t policy_show(struct device *dev, struct device_attribute *attr,
+				char *buf)
+{
+	int ret;
+	struct gpio_cntrl *mdm = dev_get_drvdata(dev);
+
+	mutex_lock(&mdm->policy_lock);
+	ret = scnprintf(buf, strlen(policies[mdm->policy]) + 1,
+						 policies[mdm->policy]);
+	mutex_unlock(&mdm->policy_lock);
+
+	return ret;
+}
+
+static ssize_t policy_store(struct device *dev, struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct gpio_cntrl *mdm = dev_get_drvdata(dev);
+	const char *p;
+	int i, orig_count = count;
+
+	p = memchr(buf, '\n', count);
+	if (p)
+		count = p - buf;
+
+	for (i = 0; i < ARRAY_SIZE(policies); i++)
+		if (!strncasecmp(buf, policies[i], count)) {
+			mutex_lock(&mdm->policy_lock);
+			mdm->policy = i;
+			mutex_unlock(&mdm->policy_lock);
+			return orig_count;
+		}
+	return -EPERM;
+}
+static DEVICE_ATTR_RW(policy);
+
+static irqreturn_t ap_status_change(int irq, void *dev_id)
+{
+	struct gpio_cntrl *mdm = dev_id;
+	int state;
+	struct gpio_desc *gp_status = gpio_to_desc(mdm->gpios[AP2MDM_STATUS]);
+	int active_low = 0;
+
+	if (gp_status)
+		active_low = gpiod_is_active_low(gp_status);
+
+	state = gpio_get_value(mdm->gpios[AP2MDM_STATUS]);
+	if ((!active_low && !state) || (active_low && state)) {
+		if (mdm->policy)
+			dev_info(mdm->dev, "Host undergoing SSR, leaving SDX as it is\n");
+		else
+			panic("Host undergoing SSR, panicking SDX\n");
+	} else
+		dev_info(mdm->dev, "HOST booted\n");
+
+	return IRQ_HANDLED;
+}
+
+static void remove_ipc(struct gpio_cntrl *mdm)
+{
+	int i;
+
+	for (i = 0; i < NUM_GPIOS; ++i) {
+		if (gpio_is_valid(mdm->gpios[i]))
+			gpio_free(mdm->gpios[i]);
+	}
+}
+
+static int setup_ipc(struct gpio_cntrl *mdm)
+{
+	int i, val, ret, irq;
+	struct device_node *node;
+
+	node = mdm->dev->of_node;
+	for (i = 0; i < ARRAY_SIZE(gpio_map); i++) {
+		val = of_get_named_gpio(node, gpio_map[i], 0);
+		if (val >= 0)
+			mdm->gpios[i] = val;
+	}
+
+	ret = gpio_request(mdm->gpios[AP2MDM_STATUS], "AP2MDM_STATUS");
+	if (ret) {
+		dev_err(mdm->dev, "Failed to configure AP2MDM_STATUS gpio\n");
+		return ret;
+	}
+	gpio_direction_input(mdm->gpios[AP2MDM_STATUS]);
+
+	ret = gpio_request(mdm->gpios[MDM2AP_STATUS], "MDM2AP_STATUS");
+	if (ret) {
+		dev_err(mdm->dev, "Failed to configure MDM2AP_STATUS gpio\n");
+		return ret;
+	}
+	gpio_direction_output(mdm->gpios[MDM2AP_STATUS], 1);
+
+	ret = gpio_request(mdm->gpios[MDM2AP_STATUS2], "MDM2AP_STATUS2");
+	if (ret) {
+		dev_err(mdm->dev, "Failed to configure MDM2AP_STATUS2 gpio\n");
+		return ret;
+	}
+	gpio_direction_output(mdm->gpios[MDM2AP_STATUS2], 0);
+
+	irq = gpio_to_irq(mdm->gpios[AP2MDM_STATUS]);
+	if (irq < 0) {
+		dev_err(mdm->dev, "bad AP2MDM_STATUS IRQ resource\n");
+		return irq;
+	}
+	mdm->status_irq = irq;
+
+	return 0;
+}
+
+static int sdx_ext_ipc_panic(struct notifier_block *this,
+				unsigned long event, void *ptr)
+{
+	struct gpio_cntrl *mdm = container_of(this,
+					struct gpio_cntrl, panic_blk);
+
+	gpio_set_value(mdm->gpios[MDM2AP_STATUS], 0);
+
+	return NOTIFY_DONE;
+}
+
+static int sdx_ext_ipc_probe(struct platform_device *pdev)
+{
+	int ret;
+	struct device_node *node;
+	struct gpio_cntrl *mdm;
+
+	node = pdev->dev.of_node;
+	mdm = devm_kzalloc(&pdev->dev, sizeof(*mdm), GFP_KERNEL);
+	if (!mdm)
+		return -ENOMEM;
+
+	mdm->dev = &pdev->dev;
+	ret = setup_ipc(mdm);
+	if (ret) {
+		dev_err(mdm->dev, "Error setting up gpios\n");
+		devm_kfree(&pdev->dev, mdm);
+		return ret;
+	}
+
+	mdm->panic_blk.notifier_call = sdx_ext_ipc_panic;
+	atomic_notifier_chain_register(&panic_notifier_list, &mdm->panic_blk);
+
+	mutex_init(&mdm->policy_lock);
+	mdm->policy = SUBSYS_PANIC;
+
+	ret = device_create_file(mdm->dev, &dev_attr_policy);
+	if (ret) {
+		dev_err(mdm->dev, "cannot create sysfs attribute\n");
+		goto sys_fail;
+	}
+
+	platform_set_drvdata(pdev, mdm);
+
+	ret = devm_request_irq(mdm->dev, mdm->status_irq, ap_status_change,
+				IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
+							"ap status", mdm);
+	if (ret < 0) {
+		dev_err(mdm->dev, "%s: AP2MDM_STATUS IRQ#%d request failed,\n",
+					__func__, mdm->status_irq);
+		goto irq_fail;
+	}
+	irq_set_irq_wake(mdm->status_irq, 1);
+	return 0;
+
+irq_fail:
+	device_remove_file(mdm->dev, &dev_attr_policy);
+sys_fail:
+	atomic_notifier_chain_unregister(&panic_notifier_list, &mdm->panic_blk);
+	remove_ipc(mdm);
+	devm_kfree(&pdev->dev, mdm);
+	return ret;
+}
+
+static int sdx_ext_ipc_remove(struct platform_device *pdev)
+{
+	struct gpio_cntrl *mdm;
+
+	mdm = dev_get_drvdata(&pdev->dev);
+	disable_irq_wake(mdm->status_irq);
+	atomic_notifier_chain_unregister(&panic_notifier_list, &mdm->panic_blk);
+	remove_ipc(mdm);
+	device_remove_file(mdm->dev, &dev_attr_policy);
+	return 0;
+}
+
+static const struct of_device_id sdx_ext_ipc_of_match[] = {
+	{ .compatible = "qcom,sdx-ext-ipc"},
+	{},
+};
+
+static struct platform_driver sdx_ext_ipc_driver = {
+	.probe		= sdx_ext_ipc_probe,
+	.remove		= sdx_ext_ipc_remove,
+	.driver = {
+		.name	= "sdx-ext-ipc",
+		.owner	= THIS_MODULE,
+		.of_match_table = sdx_ext_ipc_of_match,
+	},
+};
+
+static int __init sdx_ext_ipc_register(void)
+{
+	return platform_driver_register(&sdx_ext_ipc_driver);
+}
+subsys_initcall(sdx_ext_ipc_register);
+
+static void __exit sdx_ext_ipc_unregister(void)
+{
+	platform_driver_unregister(&sdx_ext_ipc_driver);
+}
+module_exit(sdx_ext_ipc_unregister);
+MODULE_LICENSE("GPL v2");