blob: 40f96bd06ee4d6e3c7d59f37bb53ab17d9778662 [file] [log] [blame]
/*
* Insignal's Exynos4412 based Origen board device tree source
*
* Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Device tree source file for Insignal's Origen board which is based on
* Samsung's Exynos4412 SoC.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/include/ "exynos4412.dtsi"
/ {
model = "Insignal Origen evaluation board based on Exynos4412";
compatible = "insignal,origen4412", "samsung,exynos4412";
memory {
reg = <0x40000000 0x40000000>;
};
chosen {
bootargs ="console=ttySAC2,115200";
};
mmc_reg: voltage-regulator {
compatible = "regulator-fixed";
regulator-name = "VMEM_VDD_2.8V";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
gpio = <&gpx1 1 0>;
enable-active-high;
};
sdhci@12530000 {
bus-width = <4>;
pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus4 &sd2_cd>;
pinctrl-names = "default";
vmmc-supply = <&mmc_reg>;
status = "okay";
};
mshc@12550000 {
pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
pinctrl-names = "default";
status = "okay";
num-slots = <1>;
supports-highspeed;
broken-cd;
fifo-depth = <0x80>;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 {
reg = <0>;
bus-width = <8>;
};
};
codec@13400000 {
samsung,mfc-r = <0x43000000 0x800000>;
samsung,mfc-l = <0x51000000 0x800000>;
status = "okay";
};
serial@13800000 {
status = "okay";
};
serial@13810000 {
status = "okay";
};
serial@13820000 {
status = "okay";
};
serial@13830000 {
status = "okay";
};
};