| /* |
| * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| /dts-v1/; |
| |
| #include "dra74x.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/interrupt-controller/irq.h> |
| |
| / { |
| model = "TI AM5728 BeagleBoard-X15"; |
| compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; |
| |
| aliases { |
| rtc0 = &mcp_rtc; |
| rtc1 = &tps659038_rtc; |
| rtc2 = &rtc; |
| display0 = &hdmi0; |
| }; |
| |
| memory { |
| device_type = "memory"; |
| reg = <0x80000000 0x80000000>; |
| }; |
| |
| vdd_3v3: fixedregulator-vdd_3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "vdd_3v3"; |
| vin-supply = <®en1>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| }; |
| |
| aic_dvdd: fixedregulator-aic_dvdd { |
| compatible = "regulator-fixed"; |
| regulator-name = "aic_dvdd_fixed"; |
| vin-supply = <&vdd_3v3>; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| }; |
| |
| vtt_fixed: fixedregulator-vtt { |
| /* TPS51200 */ |
| compatible = "regulator-fixed"; |
| regulator-name = "vtt_fixed"; |
| vin-supply = <&smps3_reg>; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| enable-active-high; |
| gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| leds { |
| compatible = "gpio-leds"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&leds_pins_default>; |
| |
| led@0 { |
| label = "beagle-x15:usr0"; |
| gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "heartbeat"; |
| default-state = "off"; |
| }; |
| |
| led@1 { |
| label = "beagle-x15:usr1"; |
| gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "cpu0"; |
| default-state = "off"; |
| }; |
| |
| led@2 { |
| label = "beagle-x15:usr2"; |
| gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "mmc0"; |
| default-state = "off"; |
| }; |
| |
| led@3 { |
| label = "beagle-x15:usr3"; |
| gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>; |
| linux,default-trigger = "ide-disk"; |
| default-state = "off"; |
| }; |
| }; |
| |
| gpio_fan: gpio_fan { |
| /* Based on 5v 500mA AFB02505HHB */ |
| compatible = "gpio-fan"; |
| gpios = <&tps659038_gpio 2 GPIO_ACTIVE_HIGH>; |
| gpio-fan,speed-map = <0 0>, |
| <13000 1>; |
| #cooling-cells = <2>; |
| }; |
| |
| extcon_usb1: extcon_usb1 { |
| compatible = "linux,extcon-usb-gpio"; |
| id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&extcon_usb1_pins>; |
| }; |
| |
| hdmi0: connector { |
| compatible = "hdmi-connector"; |
| label = "hdmi"; |
| |
| type = "a"; |
| |
| port { |
| hdmi_connector_in: endpoint { |
| remote-endpoint = <&tpd12s015_out>; |
| }; |
| }; |
| }; |
| |
| tpd12s015: encoder { |
| compatible = "ti,tpd12s015"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&tpd12s015_pins>; |
| |
| gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ |
| <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */ |
| <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| reg = <0>; |
| |
| tpd12s015_in: endpoint { |
| remote-endpoint = <&hdmi_out>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| |
| tpd12s015_out: endpoint { |
| remote-endpoint = <&hdmi_connector_in>; |
| }; |
| }; |
| }; |
| }; |
| |
| sound0: sound@0 { |
| compatible = "simple-audio-card"; |
| simple-audio-card,name = "BeagleBoard-X15"; |
| simple-audio-card,widgets = |
| "Line", "Line Out", |
| "Line", "Line In"; |
| simple-audio-card,routing = |
| "Line Out", "LLOUT", |
| "Line Out", "RLOUT", |
| "MIC2L", "Line In", |
| "MIC2R", "Line In"; |
| simple-audio-card,format = "dsp_b"; |
| simple-audio-card,bitclock-master = <&sound0_master>; |
| simple-audio-card,frame-master = <&sound0_master>; |
| simple-audio-card,bitclock-inversion; |
| |
| simple-audio-card,cpu { |
| sound-dai = <&mcasp3>; |
| }; |
| |
| sound0_master: simple-audio-card,codec { |
| sound-dai = <&tlv320aic3104>; |
| clocks = <&clkout2_clk>; |
| }; |
| }; |
| }; |
| |
| &dra7_pmx_core { |
| leds_pins_default: leds_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x37a8, PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */ |
| DRA7XX_CORE_IOPAD(0x37ac, PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */ |
| DRA7XX_CORE_IOPAD(0x37c0, PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */ |
| DRA7XX_CORE_IOPAD(0x37c4, PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */ |
| >; |
| }; |
| |
| i2c1_pins_default: i2c1_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */ |
| DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */ |
| >; |
| }; |
| |
| hdmi_pins: pinmux_hdmi_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ |
| DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ |
| >; |
| }; |
| |
| i2c3_pins_default: i2c3_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x36a4, PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */ |
| DRA7XX_CORE_IOPAD(0x36a8, PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */ |
| >; |
| }; |
| |
| uart3_pins_default: uart3_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ |
| DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ |
| >; |
| }; |
| |
| mmc1_pins_default: mmc1_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ |
| DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */ |
| DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ |
| DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ |
| DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ |
| DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ |
| DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ |
| >; |
| }; |
| |
| mmc2_pins_default: mmc2_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */ |
| DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ |
| DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ |
| DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ |
| DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ |
| DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ |
| DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ |
| DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ |
| DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ |
| DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ |
| >; |
| }; |
| |
| cpsw_pins_default: cpsw_pins_default { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| DRA7XX_CORE_IOPAD(0x3650, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */ |
| DRA7XX_CORE_IOPAD(0x3654, PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */ |
| DRA7XX_CORE_IOPAD(0x3658, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */ |
| DRA7XX_CORE_IOPAD(0x365c, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */ |
| DRA7XX_CORE_IOPAD(0x3660, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */ |
| DRA7XX_CORE_IOPAD(0x3664, PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */ |
| DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */ |
| DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */ |
| DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */ |
| DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */ |
| DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */ |
| DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */ |
| |
| /* Slave 2 */ |
| DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */ |
| DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */ |
| DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */ |
| DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */ |
| DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */ |
| DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */ |
| DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */ |
| DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */ |
| DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */ |
| DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */ |
| DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */ |
| DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */ |
| >; |
| |
| }; |
| |
| cpsw_pins_sleep: cpsw_pins_sleep { |
| pinctrl-single,pins = < |
| /* Slave 1 */ |
| DRA7XX_CORE_IOPAD(0x3650, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3654, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3658, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x365c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3660, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3664, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3668, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x366c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3670, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3674, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3678, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x367c, PIN_INPUT | MUX_MODE15) |
| |
| /* Slave 2 */ |
| DRA7XX_CORE_IOPAD(0x3598, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x359c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a4, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35a8, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35ac, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| |
| davinci_mdio_pins_default: davinci_mdio_pins_default { |
| pinctrl-single,pins = < |
| /* MDIO */ |
| DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */ |
| DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */ |
| >; |
| }; |
| |
| davinci_mdio_pins_sleep: davinci_mdio_pins_sleep { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x363c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| |
| tps659038_pins_default: tps659038_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3818, PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */ |
| >; |
| }; |
| |
| tmp102_pins_default: tmp102_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x37c8, PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */ |
| >; |
| }; |
| |
| mcp79410_pins_default: mcp79410_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ |
| >; |
| }; |
| |
| usb1_pins: pinmux_usb1_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ |
| >; |
| }; |
| |
| extcon_usb1_pins: extcon_usb1_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */ |
| >; |
| }; |
| |
| tpd12s015_pins: pinmux_tpd12s015_pins { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */ |
| DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ |
| DRA7XX_CORE_IOPAD(0x3770, PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */ |
| >; |
| }; |
| |
| clkout2_pins_default: clkout2_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3694, PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */ |
| >; |
| }; |
| |
| clkout2_pins_sleep: clkout2_pins_sleep { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3694, PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */ |
| >; |
| }; |
| |
| mcasp3_pins_default: mcasp3_pins_default { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */ |
| DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */ |
| DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */ |
| DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */ |
| >; |
| }; |
| |
| mcasp3_pins_sleep: mcasp3_pins_sleep { |
| pinctrl-single,pins = < |
| DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT | MUX_MODE15) |
| DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT | MUX_MODE15) |
| >; |
| }; |
| }; |
| |
| &i2c1 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c1_pins_default>; |
| clock-frequency = <400000>; |
| |
| tps659038: tps659038@58 { |
| compatible = "ti,tps659038"; |
| reg = <0x58>; |
| interrupt-parent = <&gpio1>; |
| interrupts = <0 IRQ_TYPE_LEVEL_LOW>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&tps659038_pins_default>; |
| |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| |
| ti,system-power-controller; |
| |
| tps659038_pmic { |
| compatible = "ti,tps659038-pmic"; |
| |
| regulators { |
| smps12_reg: smps12 { |
| /* VDD_MPU */ |
| regulator-name = "smps12"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1250000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps3_reg: smps3 { |
| /* VDD_DDR */ |
| regulator-name = "smps3"; |
| regulator-min-microvolt = <1350000>; |
| regulator-max-microvolt = <1350000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps45_reg: smps45 { |
| /* VDD_DSPEVE, VDD_IVA, VDD_GPU */ |
| regulator-name = "smps45"; |
| regulator-min-microvolt = < 850000>; |
| regulator-max-microvolt = <1150000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| smps6_reg: smps6 { |
| /* VDD_CORE */ |
| regulator-name = "smps6"; |
| regulator-min-microvolt = <850000>; |
| regulator-max-microvolt = <1030000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| /* SMPS7 unused */ |
| |
| smps8_reg: smps8 { |
| /* VDD_1V8 */ |
| regulator-name = "smps8"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| /* SMPS9 unused */ |
| |
| ldo1_reg: ldo1 { |
| /* VDD_SD / VDDSHV8 */ |
| regulator-name = "ldo1"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ldo2_reg: ldo2 { |
| /* VDD_SHV5 */ |
| regulator-name = "ldo2"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo3_reg: ldo3 { |
| /* VDDA_1V8_PHYA */ |
| regulator-name = "ldo3"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo4_reg: ldo4 { |
| /* VDDA_1V8_PHYB */ |
| regulator-name = "ldo4"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldo9_reg: ldo9 { |
| /* VDD_RTC */ |
| regulator-name = "ldo9"; |
| regulator-min-microvolt = <1050000>; |
| regulator-max-microvolt = <1050000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldoln_reg: ldoln { |
| /* VDDA_1V8_PLL */ |
| regulator-name = "ldoln"; |
| regulator-min-microvolt = <1800000>; |
| regulator-max-microvolt = <1800000>; |
| regulator-always-on; |
| regulator-boot-on; |
| }; |
| |
| ldousb_reg: ldousb { |
| /* VDDA_3V_USB: VDDA_USBHS33 */ |
| regulator-name = "ldousb"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| }; |
| |
| regen1: regen1 { |
| /* VDD_3V3_ON */ |
| regulator-name = "regen1"; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| }; |
| }; |
| |
| tps659038_rtc: tps659038_rtc { |
| compatible = "ti,palmas-rtc"; |
| interrupt-parent = <&tps659038>; |
| interrupts = <8 IRQ_TYPE_EDGE_FALLING>; |
| wakeup-source; |
| }; |
| |
| tps659038_pwr_button: tps659038_pwr_button { |
| compatible = "ti,palmas-pwrbutton"; |
| interrupt-parent = <&tps659038>; |
| interrupts = <1 IRQ_TYPE_EDGE_FALLING>; |
| wakeup-source; |
| ti,palmas-long-press-seconds = <12>; |
| }; |
| |
| tps659038_gpio: tps659038_gpio { |
| compatible = "ti,palmas-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| }; |
| |
| extcon_usb2: tps659038_usb { |
| compatible = "ti,palmas-usb-vid"; |
| ti,enable-vbus-detection; |
| ti,enable-id-detection; |
| id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>; |
| }; |
| |
| }; |
| |
| tmp102: tmp102@48 { |
| compatible = "ti,tmp102"; |
| reg = <0x48>; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&tmp102_pins_default>; |
| interrupt-parent = <&gpio7>; |
| interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |
| #thermal-sensor-cells = <1>; |
| }; |
| |
| tlv320aic3104: tlv320aic3104@18 { |
| #sound-dai-cells = <0>; |
| compatible = "ti,tlv320aic3104"; |
| reg = <0x18>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&clkout2_pins_default>; |
| pinctrl-1 = <&clkout2_pins_sleep>; |
| status = "okay"; |
| adc-settle-ms = <40>; |
| |
| AVDD-supply = <&vdd_3v3>; |
| IOVDD-supply = <&vdd_3v3>; |
| DRVDD-supply = <&vdd_3v3>; |
| DVDD-supply = <&aic_dvdd>; |
| }; |
| }; |
| |
| &i2c3 { |
| status = "okay"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&i2c3_pins_default>; |
| clock-frequency = <400000>; |
| |
| mcp_rtc: rtc@6f { |
| compatible = "microchip,mcp7941x"; |
| reg = <0x6f>; |
| interrupts-extended = <&crossbar_mpu GIC_SPI 2 IRQ_TYPE_EDGE_RISING>, |
| <&dra7_pmx_core 0x424>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mcp79410_pins_default>; |
| |
| vcc-supply = <&vdd_3v3>; |
| wakeup-source; |
| }; |
| }; |
| |
| &gpio7 { |
| ti,no-reset-on-init; |
| ti,no-idle-on-init; |
| }; |
| |
| &cpu0 { |
| cpu0-supply = <&smps12_reg>; |
| voltage-tolerance = <1>; |
| }; |
| |
| &uart3 { |
| status = "okay"; |
| interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, |
| <&dra7_pmx_core 0x3f8>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&uart3_pins_default>; |
| }; |
| |
| &mac { |
| status = "okay"; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&cpsw_pins_default>; |
| pinctrl-1 = <&cpsw_pins_sleep>; |
| dual_emac; |
| }; |
| |
| &cpsw_emac0 { |
| phy_id = <&davinci_mdio>, <1>; |
| phy-mode = "rgmii"; |
| dual_emac_res_vlan = <1>; |
| }; |
| |
| &cpsw_emac1 { |
| phy_id = <&davinci_mdio>, <2>; |
| phy-mode = "rgmii"; |
| dual_emac_res_vlan = <2>; |
| }; |
| |
| &davinci_mdio { |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&davinci_mdio_pins_default>; |
| pinctrl-1 = <&davinci_mdio_pins_sleep>; |
| }; |
| |
| &mmc1 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc1_pins_default>; |
| |
| vmmc-supply = <&ldo1_reg>; |
| bus-width = <4>; |
| cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ |
| }; |
| |
| &mmc2 { |
| status = "okay"; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&mmc2_pins_default>; |
| |
| vmmc-supply = <&vdd_3v3>; |
| bus-width = <8>; |
| ti,non-removable; |
| cap-mmc-dual-data-rate; |
| }; |
| |
| &sata { |
| status = "okay"; |
| }; |
| |
| &usb2_phy1 { |
| phy-supply = <&ldousb_reg>; |
| }; |
| |
| &usb2_phy2 { |
| phy-supply = <&ldousb_reg>; |
| }; |
| |
| &usb1 { |
| dr_mode = "host"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&usb1_pins>; |
| }; |
| |
| &omap_dwc3_1 { |
| extcon = <&extcon_usb1>; |
| }; |
| |
| &omap_dwc3_2 { |
| extcon = <&extcon_usb2>; |
| }; |
| |
| &usb2 { |
| /* |
| * Stand alone usage is peripheral only. |
| * However, with some resistor modifications |
| * this port can be used via expansion connectors |
| * as "host" or "dual-role". If so, provide |
| * the necessary dr_mode override in the expansion |
| * board's DT. |
| */ |
| dr_mode = "peripheral"; |
| }; |
| |
| &cpu_trips { |
| cpu_alert1: cpu_alert1 { |
| temperature = <50000>; /* millicelsius */ |
| hysteresis = <2000>; /* millicelsius */ |
| type = "active"; |
| }; |
| }; |
| |
| &cpu_cooling_maps { |
| map1 { |
| trip = <&cpu_alert1>; |
| cooling-device = <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| |
| &thermal_zones { |
| board_thermal: board_thermal { |
| polling-delay-passive = <1250>; /* milliseconds */ |
| polling-delay = <1500>; /* milliseconds */ |
| |
| /* sensor ID */ |
| thermal-sensors = <&tmp102 0>; |
| |
| board_trips: trips { |
| board_alert0: board_alert { |
| temperature = <40000>; /* millicelsius */ |
| hysteresis = <2000>; /* millicelsius */ |
| type = "active"; |
| }; |
| |
| board_crit: board_crit { |
| temperature = <105000>; /* millicelsius */ |
| hysteresis = <0>; /* millicelsius */ |
| type = "critical"; |
| }; |
| }; |
| |
| board_cooling_maps: cooling-maps { |
| map0 { |
| trip = <&board_alert0>; |
| cooling-device = |
| <&gpio_fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| }; |
| }; |
| }; |
| }; |
| |
| &dss { |
| status = "ok"; |
| |
| vdda_video-supply = <&ldoln_reg>; |
| }; |
| |
| &hdmi { |
| status = "ok"; |
| vdda-supply = <&ldo4_reg>; |
| |
| pinctrl-names = "default"; |
| pinctrl-0 = <&hdmi_pins>; |
| |
| port { |
| hdmi_out: endpoint { |
| remote-endpoint = <&tpd12s015_in>; |
| }; |
| }; |
| }; |
| |
| &pcie1 { |
| gpios = <&gpio2 8 GPIO_ACTIVE_LOW>; |
| }; |
| |
| &mcasp3 { |
| #sound-dai-cells = <0>; |
| pinctrl-names = "default", "sleep"; |
| pinctrl-0 = <&mcasp3_pins_default>; |
| pinctrl-1 = <&mcasp3_pins_sleep>; |
| status = "okay"; |
| |
| op-mode = <0>; /* MCASP_IIS_MODE */ |
| tdm-slots = <2>; |
| /* 4 serializers */ |
| serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ |
| 1 2 0 0 |
| >; |
| }; |
| |
| &mailbox5 { |
| status = "okay"; |
| mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { |
| status = "okay"; |
| }; |
| mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { |
| status = "okay"; |
| }; |
| }; |
| |
| &mailbox6 { |
| status = "okay"; |
| mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { |
| status = "okay"; |
| }; |
| mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { |
| status = "okay"; |
| }; |
| }; |