| /* Copyright (c) 2012, 2015-2016, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| #define pr_fmt(fmt) "%s: " fmt, __func__ |
| |
| #include <linux/clk.h> |
| #include <linux/err.h> |
| #include <linux/io.h> |
| #include <linux/regulator/consumer.h> |
| #include <linux/delay.h> |
| |
| #include "sde_rotator_io_util.h" |
| |
| void sde_reg_w(struct sde_io_data *io, u32 offset, u32 value, u32 debug) |
| { |
| u32 in_val; |
| |
| if (!io || !io->base) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return; |
| } |
| |
| if (offset > io->len) { |
| DEV_ERR("%pS->%s: offset out of range\n", |
| __builtin_return_address(0), __func__); |
| return; |
| } |
| |
| DEV_DBG("sdeio:%6.6x:%8.8x\n", offset, value); |
| writel_relaxed(value, io->base + offset); |
| if (debug) { |
| /* ensure register read is ordered after register write */ |
| mb(); |
| in_val = readl_relaxed(io->base + offset); |
| DEV_DBG("[%08x] => %08x [%08x]\n", |
| (u32)(unsigned long)(io->base + offset), |
| value, in_val); |
| } |
| } /* sde_reg_w */ |
| |
| u32 sde_reg_r(struct sde_io_data *io, u32 offset, u32 debug) |
| { |
| u32 value; |
| |
| if (!io || !io->base) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| if (offset > io->len) { |
| DEV_ERR("%pS->%s: offset out of range\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| value = readl_relaxed(io->base + offset); |
| if (debug) |
| DEV_DBG("[%08x] <= %08x\n", |
| (u32)(unsigned long)(io->base + offset), value); |
| |
| DEV_DBG("sdeio:%6.6x:%8.8x\n", offset, value); |
| return value; |
| } /* sde_reg_r */ |
| |
| void sde_reg_dump(void __iomem *base, u32 length, const char *prefix, |
| u32 debug) |
| { |
| if (debug) |
| print_hex_dump(KERN_INFO, prefix, DUMP_PREFIX_OFFSET, 32, 4, |
| (void *)base, length, false); |
| } /* sde_reg_dump */ |
| |
| static struct resource *sde_rot_get_res_byname(struct platform_device *pdev, |
| unsigned int type, const char *name) |
| { |
| struct resource *res = NULL; |
| |
| res = platform_get_resource_byname(pdev, type, name); |
| if (!res) |
| DEV_ERR("%s: '%s' resource not found\n", __func__, name); |
| |
| return res; |
| } /* sde_rot_get_res_byname */ |
| |
| int sde_rot_ioremap_byname(struct platform_device *pdev, |
| struct sde_io_data *io_data, const char *name) |
| { |
| struct resource *res = NULL; |
| |
| if (!pdev || !io_data) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| res = sde_rot_get_res_byname(pdev, IORESOURCE_MEM, name); |
| if (!res) { |
| DEV_ERR("%pS->%s: '%s' sde_rot_get_res_byname failed\n", |
| __builtin_return_address(0), __func__, name); |
| return -ENODEV; |
| } |
| |
| io_data->len = (u32)resource_size(res); |
| io_data->base = ioremap(res->start, io_data->len); |
| if (!io_data->base) { |
| DEV_ERR("%pS->%s: '%s' ioremap failed\n", |
| __builtin_return_address(0), __func__, name); |
| return -EIO; |
| } |
| |
| return 0; |
| } /* sde_rot_ioremap_byname */ |
| |
| void sde_rot_iounmap(struct sde_io_data *io_data) |
| { |
| if (!io_data) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return; |
| } |
| |
| if (io_data->base) { |
| iounmap(io_data->base); |
| io_data->base = NULL; |
| } |
| io_data->len = 0; |
| } /* sde_rot_iounmap */ |
| |
| int sde_rot_config_vreg(struct device *dev, struct sde_vreg *in_vreg, |
| int num_vreg, int config) |
| { |
| int i = 0, rc = 0; |
| struct sde_vreg *curr_vreg = NULL; |
| enum sde_vreg_type type; |
| |
| if (!dev || !in_vreg || !num_vreg) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| if (config) { |
| for (i = 0; i < num_vreg; i++) { |
| curr_vreg = &in_vreg[i]; |
| curr_vreg->vreg = regulator_get(dev, |
| curr_vreg->vreg_name); |
| rc = PTR_RET(curr_vreg->vreg); |
| if (rc) { |
| DEV_ERR("%pS->%s: %s get failed. rc=%d\n", |
| __builtin_return_address(0), __func__, |
| curr_vreg->vreg_name, rc); |
| curr_vreg->vreg = NULL; |
| goto vreg_get_fail; |
| } |
| type = (regulator_count_voltages(curr_vreg->vreg) > 0) |
| ? SDE_REG_LDO : SDE_REG_VS; |
| if (type == SDE_REG_LDO) { |
| rc = regulator_set_voltage( |
| curr_vreg->vreg, |
| curr_vreg->min_voltage, |
| curr_vreg->max_voltage); |
| if (rc < 0) { |
| DEV_ERR("%pS->%s: %s set vltg fail\n", |
| __builtin_return_address(0), |
| __func__, |
| curr_vreg->vreg_name); |
| goto vreg_set_voltage_fail; |
| } |
| } |
| } |
| } else { |
| for (i = num_vreg-1; i >= 0; i--) { |
| curr_vreg = &in_vreg[i]; |
| if (curr_vreg->vreg) { |
| type = (regulator_count_voltages( |
| curr_vreg->vreg) > 0) |
| ? SDE_REG_LDO : SDE_REG_VS; |
| if (type == SDE_REG_LDO) { |
| regulator_set_voltage(curr_vreg->vreg, |
| 0, curr_vreg->max_voltage); |
| } |
| regulator_put(curr_vreg->vreg); |
| curr_vreg->vreg = NULL; |
| } |
| } |
| } |
| return 0; |
| |
| vreg_unconfig: |
| if (type == SDE_REG_LDO) |
| regulator_set_load(curr_vreg->vreg, 0); |
| |
| vreg_set_voltage_fail: |
| regulator_put(curr_vreg->vreg); |
| curr_vreg->vreg = NULL; |
| |
| vreg_get_fail: |
| for (i--; i >= 0; i--) { |
| curr_vreg = &in_vreg[i]; |
| type = (regulator_count_voltages(curr_vreg->vreg) > 0) |
| ? SDE_REG_LDO : SDE_REG_VS; |
| goto vreg_unconfig; |
| } |
| return rc; |
| } /* sde_rot_config_vreg */ |
| |
| int sde_rot_enable_vreg(struct sde_vreg *in_vreg, int num_vreg, int enable) |
| { |
| int i = 0, rc = 0; |
| bool need_sleep; |
| |
| if (!in_vreg) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| if (enable) { |
| for (i = 0; i < num_vreg; i++) { |
| rc = PTR_RET(in_vreg[i].vreg); |
| if (rc) { |
| DEV_ERR("%pS->%s: %s regulator error. rc=%d\n", |
| __builtin_return_address(0), __func__, |
| in_vreg[i].vreg_name, rc); |
| goto vreg_set_opt_mode_fail; |
| } |
| need_sleep = !regulator_is_enabled(in_vreg[i].vreg); |
| if (in_vreg[i].pre_on_sleep && need_sleep) |
| usleep_range(in_vreg[i].pre_on_sleep * 1000, |
| in_vreg[i].pre_on_sleep * 1000); |
| rc = regulator_set_load(in_vreg[i].vreg, |
| in_vreg[i].enable_load); |
| if (rc < 0) { |
| DEV_ERR("%pS->%s: %s set opt m fail\n", |
| __builtin_return_address(0), __func__, |
| in_vreg[i].vreg_name); |
| goto vreg_set_opt_mode_fail; |
| } |
| rc = regulator_enable(in_vreg[i].vreg); |
| if (in_vreg[i].post_on_sleep && need_sleep) |
| usleep_range(in_vreg[i].post_on_sleep * 1000, |
| in_vreg[i].post_on_sleep * 1000); |
| if (rc < 0) { |
| DEV_ERR("%pS->%s: %s enable failed\n", |
| __builtin_return_address(0), __func__, |
| in_vreg[i].vreg_name); |
| goto disable_vreg; |
| } |
| } |
| } else { |
| for (i = num_vreg-1; i >= 0; i--) { |
| if (in_vreg[i].pre_off_sleep) |
| usleep_range(in_vreg[i].pre_off_sleep * 1000, |
| in_vreg[i].pre_off_sleep * 1000); |
| regulator_set_load(in_vreg[i].vreg, |
| in_vreg[i].disable_load); |
| regulator_disable(in_vreg[i].vreg); |
| if (in_vreg[i].post_off_sleep) |
| usleep_range(in_vreg[i].post_off_sleep * 1000, |
| in_vreg[i].post_off_sleep * 1000); |
| } |
| } |
| return rc; |
| |
| disable_vreg: |
| regulator_set_load(in_vreg[i].vreg, in_vreg[i].disable_load); |
| |
| vreg_set_opt_mode_fail: |
| for (i--; i >= 0; i--) { |
| if (in_vreg[i].pre_off_sleep) |
| usleep_range(in_vreg[i].pre_off_sleep * 1000, |
| in_vreg[i].pre_off_sleep * 1000); |
| regulator_set_load(in_vreg[i].vreg, |
| in_vreg[i].disable_load); |
| regulator_disable(in_vreg[i].vreg); |
| if (in_vreg[i].post_off_sleep) |
| usleep_range(in_vreg[i].post_off_sleep * 1000, |
| in_vreg[i].post_off_sleep * 1000); |
| } |
| |
| return rc; |
| } /* sde_rot_enable_vreg */ |
| |
| void sde_rot_put_clk(struct sde_clk *clk_arry, int num_clk) |
| { |
| int i; |
| |
| if (!clk_arry) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return; |
| } |
| |
| for (i = num_clk - 1; i >= 0; i--) { |
| if (clk_arry[i].clk) |
| clk_put(clk_arry[i].clk); |
| clk_arry[i].clk = NULL; |
| } |
| } /* sde_rot_put_clk */ |
| |
| int sde_rot_get_clk(struct device *dev, struct sde_clk *clk_arry, int num_clk) |
| { |
| int i, rc = 0; |
| |
| if (!dev || !clk_arry) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| for (i = 0; i < num_clk; i++) { |
| clk_arry[i].clk = clk_get(dev, clk_arry[i].clk_name); |
| rc = PTR_RET(clk_arry[i].clk); |
| if (rc) { |
| DEV_ERR("%pS->%s: '%s' get failed. rc=%d\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name, rc); |
| goto error; |
| } |
| } |
| |
| return rc; |
| |
| error: |
| sde_rot_put_clk(clk_arry, num_clk); |
| |
| return rc; |
| } /* sde_rot_get_clk */ |
| |
| int sde_rot_clk_set_rate(struct sde_clk *clk_arry, int num_clk) |
| { |
| int i, rc = 0; |
| |
| if (!clk_arry) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| for (i = 0; i < num_clk; i++) { |
| if (clk_arry[i].clk) { |
| if (clk_arry[i].type != SDE_CLK_AHB) { |
| DEV_DBG("%pS->%s: '%s' rate %ld\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name, |
| clk_arry[i].rate); |
| rc = clk_set_rate(clk_arry[i].clk, |
| clk_arry[i].rate); |
| if (rc) { |
| DEV_ERR("%pS->%s: %s failed. rc=%d\n", |
| __builtin_return_address(0), |
| __func__, |
| clk_arry[i].clk_name, rc); |
| break; |
| } |
| } |
| } else { |
| DEV_ERR("%pS->%s: '%s' is not available\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name); |
| rc = -EPERM; |
| break; |
| } |
| } |
| |
| return rc; |
| } /* sde_rot_clk_set_rate */ |
| |
| int sde_rot_enable_clk(struct sde_clk *clk_arry, int num_clk, int enable) |
| { |
| int i, rc = 0; |
| |
| if (!clk_arry) { |
| DEV_ERR("%pS->%s: invalid input\n", |
| __builtin_return_address(0), __func__); |
| return -EINVAL; |
| } |
| |
| if (enable) { |
| for (i = 0; i < num_clk; i++) { |
| DEV_DBG("%pS->%s: enable '%s'\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name); |
| if (clk_arry[i].clk) { |
| rc = clk_prepare_enable(clk_arry[i].clk); |
| if (rc) |
| DEV_ERR("%pS->%s: %s en fail. rc=%d\n", |
| __builtin_return_address(0), |
| __func__, |
| clk_arry[i].clk_name, rc); |
| } else { |
| DEV_ERR("%pS->%s: '%s' is not available\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name); |
| rc = -EPERM; |
| } |
| |
| if (rc) { |
| sde_rot_enable_clk(&clk_arry[i], |
| i, false); |
| break; |
| } |
| } |
| } else { |
| for (i = num_clk - 1; i >= 0; i--) { |
| DEV_DBG("%pS->%s: disable '%s'\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name); |
| |
| if (clk_arry[i].clk) |
| clk_disable_unprepare(clk_arry[i].clk); |
| else |
| DEV_ERR("%pS->%s: '%s' is not available\n", |
| __builtin_return_address(0), __func__, |
| clk_arry[i].clk_name); |
| } |
| } |
| |
| return rc; |
| } /* sde_rot_enable_clk */ |