blob: f2f41fdfcf53c8395e6e5ee887491304d54e2ed9 [file] [log] [blame]
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/{
aliases {
serial0 = &qupv3_se10_2uart;
serial1 = &qupv3_se9_2uart;
spi0 = &qupv3_se8_spi;
i2c0 = &qupv3_se10_i2c;
i2c1 = &qupv3_se3_i2c;
hsuart0 = &qupv3_se6_4uart;
};
};
&qupv3_se9_2uart {
status = "disabled";
};
&qupv3_se8_spi {
status = "disabled";
};
&qupv3_se10_2uart {
status = "ok";
};
&qupv3_se3_i2c {
status = "disabled";
};
&qupv3_se10_i2c {
status = "disabled";
};
&qupv3_se6_4uart {
status = "disabled";
};
&ufsphy_mem {
compatible = "qcom,ufs-phy-qrbtc-sdm845";
vdda-phy-supply = <&pm660l_l1>; /* 0.88v */
vdda-pll-supply = <&pm660_l1>; /* 1.2v */
vdda-phy-max-microamp = <62900>;
vdda-pll-max-microamp = <18300>;
status = "ok";
};
&ufshc_mem {
limit-tx-hs-gear = <1>;
limit-rx-hs-gear = <1>;
scsi-cmd-timeout = <300000>;
vdd-hba-supply = <&ufs_phy_gdsc>;
vdd-hba-fixed-regulator;
vcc-supply = <&pm660l_l4>;
vccq2-supply = <&pm660_l8>;
vcc-max-microamp = <600000>;
vccq2-max-microamp = <600000>;
qcom,vddp-ref-clk-supply = <&pm660_l1>;
qcom,vddp-ref-clk-max-microamp = <100>;
qcom,disable-lpm;
rpm-level = <0>;
spm-level = <0>;
status = "ok";
};
&sdhc_1 {
vdd-supply = <&pm660l_l4>;
qcom,vdd-voltage-level = <2960000 2960000>;
qcom,vdd-current-level = <200 570000>;
vdd-io-supply = <&pm660_l8>;
qcom,vdd-io-always-on;
qcom,vdd-io-lpm-sup;
qcom,vdd-io-voltage-level = <1800000 1800000>;
qcom,vdd-io-current-level = <200 325000>;
pinctrl-names = "active", "sleep";
pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
qcom,clk-rates = <400000 20000000 25000000 50000000>;
qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";
status = "ok";
};