blob: 137e2ba9243e82a85f222e455f852f357df3a5d9 [file] [log] [blame]
/*
* linux/arch/sh/boards/sh03/setup.c
*
* Copyright (C) 2004 Interface Co.,Ltd. Saito.K
*
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/rtc.h>
#include <asm/sh03/io.h>
#include <asm/sh03/sh03.h>
#include <asm/addrspace.h>
static void __init init_sh03_IRQ(void)
{
ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
make_ipr_irq(IRL0_IRQ, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY);
make_ipr_irq(IRL1_IRQ, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY);
make_ipr_irq(IRL2_IRQ, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY);
make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
}
extern void *cf_io_base;
static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
{
if (PXSEG(port))
return (void __iomem *)port;
/* CompactFlash (IDE) */
if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
return (void __iomem *)((unsigned long)cf_io_base + port);
return (void __iomem *)(port + PCI_IO_BASE);
}
/* arch/sh/boards/sh03/rtc.c */
void sh03_time_init(void);
static void __init sh03_setup(char **cmdline_p)
{
board_time_init = sh03_time_init;
}
struct sh_machine_vector mv_sh03 __initmv = {
.mv_name = "Interface (CTP/PCI-SH03)",
.mv_setup = sh03_setup,
.mv_nr_irqs = 48,
.mv_ioport_map = sh03_ioport_map,
.mv_init_irq = init_sh03_IRQ,
#ifdef CONFIG_HEARTBEAT
.mv_heartbeat = heartbeat_sh03,
#endif
};
ALIAS_MV(sh03)