| /* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| tlmm: pinctrl@3900000 { |
| compatible = "qcom,sdxpoorwills-pinctrl"; |
| reg = <0x3900000 0x300000>, |
| <0xB204900 0x280>; |
| reg-names = "pinctrl_regs", "pdc_regs"; |
| interrupts = <0 212 0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| interrupt-parent = <&pdc>; |
| #interrupt-cells = <2>; |
| |
| uart2_console_active: uart2_console_active { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "blsp_uart2"; |
| }; |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| uart3_console_active: uart3_console_active { |
| mux { |
| pins = "gpio8", "gpio9"; |
| function = "blsp_uart3"; |
| }; |
| config { |
| pins = "gpio8", "gpio9"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| uart3_console_sleep: uart3_console_sleep { |
| mux { |
| pins = "gpio8", "gpio9"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio8", "gpio9"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| /* I2C CONFIGURATION */ |
| i2c_1 { |
| i2c_1_active: i2c_1_active { |
| mux { |
| pins = "gpio2", "gpio3"; |
| function = "blsp_i2c1"; |
| }; |
| |
| config { |
| pins = "gpio2", "gpio3"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_1_sleep: i2c_1_sleep { |
| mux { |
| pins = "gpio2", "gpio3"; |
| function = "blsp_i2c1"; |
| }; |
| |
| config { |
| pins = "gpio2", "gpio3"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_2 { |
| i2c_2_active: i2c_2_active { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "blsp_i2c2"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_2_sleep: i2c_2_sleep { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "blsp_i2c2"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_3 { |
| i2c_3_active: i2c_3_active { |
| mux { |
| pins = "gpio10", "gpio11"; |
| function = "blsp_i2c3"; |
| }; |
| |
| config { |
| pins = "gpio10", "gpio11"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_3_sleep: i2c_3_sleep { |
| mux { |
| pins = "gpio10", "gpio11"; |
| function = "blsp_i2c3"; |
| }; |
| |
| config { |
| pins = "gpio10", "gpio11"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_4 { |
| i2c_4_active: i2c_4_active { |
| mux { |
| pins = "gpio76", "gpio77"; |
| function = "blsp_i2c4"; |
| }; |
| |
| config { |
| pins = "gpio76", "gpio77"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_4_sleep: i2c_4_sleep { |
| mux { |
| pins = "gpio76", "gpio77"; |
| function = "blsp_i2c4"; |
| }; |
| |
| config { |
| pins = "gpio76", "gpio77"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_5 { |
| i2c_5_active: i2c_5_active { |
| mux { |
| pins = "gpio74", "gpio75"; |
| function = "blsp_i2c1"; |
| }; |
| |
| config { |
| pins = "gpio74", "gpio75"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_5_sleep: i2c_5_sleep { |
| mux { |
| pins = "gpio74", "gpio75"; |
| function = "blsp_i2c1"; |
| }; |
| |
| config { |
| pins = "gpio74", "gpio75"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_6 { |
| i2c_6_active: i2c_6_active { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "blsp_i2c2"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_6_sleep: i2c_6_sleep { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "blsp_i2c2"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| i2c_7 { |
| i2c_7_active: i2c_7_active { |
| mux { |
| pins = "gpio18", "gpio19"; |
| function = "blsp_i2c4"; |
| }; |
| |
| config { |
| pins = "gpio18", "gpio19"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_7_sleep: i2c_7_sleep { |
| mux { |
| pins = "gpio18", "gpio19"; |
| function = "blsp_i2c4"; |
| }; |
| |
| config { |
| pins = "gpio18", "gpio19"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| /* SPI CONFIGURATION */ |
| spi_1 { |
| spi_1_active: spi_1_active { |
| mux { |
| pins = "gpio72", "gpio73", |
| "gpio74", "gpio75"; |
| function = "blsp_spi1"; |
| }; |
| |
| config { |
| pins = "gpio72", "gpio73", |
| "gpio74", "gpio75"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_1_sleep: spi_1_sleep { |
| mux { |
| pins = "gpio72", "gpio73", |
| "gpio74", "gpio75"; |
| function = "blsp_spi1"; |
| }; |
| |
| config { |
| pins = "gpio72", "gpio73", |
| "gpio74", "gpio75"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| spi_2 { |
| spi_2_active: spi_2_active { |
| mux { |
| pins = "gpio4", "gpio5", |
| "gpio6", "gpio7"; |
| function = "blsp_spi2"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", |
| "gpio6", "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_2_sleep: spi_2_sleep { |
| mux { |
| pins = "gpio4", "gpio5", |
| "gpio6", "gpio7"; |
| function = "blsp_spi2"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", |
| "gpio6", "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| spi_3 { |
| spi_3_active: spi_3_active { |
| mux { |
| pins = "gpio8", "gpio9", |
| "gpio10", "gpio11"; |
| function = "blsp_spi3"; |
| }; |
| |
| config { |
| pins = "gpio8", "gpio9", |
| "gpio10", "gpio11"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_3_sleep: spi_3_sleep { |
| mux { |
| pins = "gpio8", "gpio9", |
| "gpio10", "gpio11"; |
| function = "blsp_spi3"; |
| }; |
| |
| config { |
| pins = "gpio8", "gpio9", |
| "gpio10", "gpio11"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| spi_4 { |
| spi_4_active: spi_4_active { |
| mux { |
| pins = "gpio16", "gpio17", |
| "gpio18", "gpio19"; |
| function = "blsp_spi4"; |
| }; |
| |
| config { |
| pins = "gpio16", "gpio17", |
| "gpio18", "gpio19"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| spi_4_sleep: spi_4_sleep { |
| mux { |
| pins = "gpio16", "gpio17", |
| "gpio18", "gpio19"; |
| function = "blsp_spi4"; |
| }; |
| |
| config { |
| pins = "gpio16", "gpio17", |
| "gpio18", "gpio19"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| pcie0 { |
| pcie0_clkreq_default: pcie0_clkreq_default { |
| mux { |
| pins = "gpio56"; |
| function = "pcie_clkreq"; |
| }; |
| config { |
| pins = "gpio56"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pcie0_perst_default: pcie0_perst_default { |
| mux { |
| pins = "gpio57"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio57"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| pcie0_wake_default: pcie0_wake_default { |
| mux { |
| pins = "gpio53"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio53"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* HS UART CONFIGURATION */ |
| |
| blsp1_uart1a: blsp1_uart1a { |
| blsp1_uart1a_tx_active: blsp1_uart1a_tx_active { |
| mux { |
| pins = "gpio0"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio0"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1a_tx_sleep: blsp1_uart1a_tx_sleep { |
| mux { |
| pins = "gpio0"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart1a_rxcts_active: blsp1_uart1a_rxcts_active { |
| mux { |
| pins = "gpio1", "gpio2"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio1", "gpio2"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1a_rxcts_sleep: blsp1_uart1a_rxcts_sleep { |
| mux { |
| pins = "gpio1", "gpio2"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio1", "gpio2"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart1a_rfr_active: blsp1_uart1a_rfr_active { |
| mux { |
| pins = "gpio3"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio3"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1a_rfr_sleep: blsp1_uart1a_rfr_sleep { |
| mux { |
| pins = "gpio3"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio3"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart1b: blsp1_uart1b { |
| blsp1_uart1b_tx_active: blsp1_uart1b_tx_active { |
| mux { |
| pins = "gpio20"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1b_tx_sleep: blsp1_uart1b_tx_sleep { |
| mux { |
| pins = "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart1b_rxcts_active: blsp1_uart1b_rxcts_active { |
| mux { |
| pins = "gpio21", "gpio22"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio22"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1b_rxcts_sleep: blsp1_uart1b_rxcts_sleep { |
| mux { |
| pins = "gpio21", "gpio22"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio22"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart1b_rfr_active: blsp1_uart1b_rfr_active { |
| mux { |
| pins = "gpio23"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1b_rfr_sleep: blsp1_uart1b_rfr_sleep { |
| mux { |
| pins = "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart2a: blsp1_uart2a { |
| blsp1_uart2a_tx_active: blsp1_uart2a_tx_active { |
| mux { |
| pins = "gpio4"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio4"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2a_tx_sleep: blsp1_uart2a_tx_sleep { |
| mux { |
| pins = "gpio4"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart2a_rxcts_active: blsp1_uart2a_rxcts_active { |
| mux { |
| pins = "gpio5", "gpio6"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio5", "gpio6"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2a_rxcts_sleep: blsp1_uart2a_rxcts_sleep { |
| mux { |
| pins = "gpio5", "gpio6"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio1", "gpio2"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart2a_rfr_active: blsp1_uart2a_rfr_active { |
| mux { |
| pins = "gpio7"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2a_rfr_sleep: blsp1_uart2a_rfr_sleep { |
| mux { |
| pins = "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio7"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart2b: blsp1_uart2b { |
| blsp1_uart2b_tx_active: blsp1_uart2b_tx_active { |
| mux { |
| pins = "gpio63"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2b_tx_sleep: blsp1_uart2b_tx_sleep { |
| mux { |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart2b_rxcts_active: blsp1_uart2b_rxcts_active { |
| mux { |
| pins = "gpio64", "gpio65"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio64", "gpio65"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2b_rxcts_sleep: blsp1_uart2b_rxcts_sleep { |
| mux { |
| pins = "gpio64", "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio64", "gpio65"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart2b_rfr_active: blsp1_uart2b_rfr_active { |
| mux { |
| pins = "gpio66"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart2b_rfr_sleep: blsp1_uart2b_rfr_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart3: blsp1_uart3 { |
| blsp1_uart3_tx_active: blsp1_uart3_tx_active { |
| mux { |
| pins = "gpio8"; |
| function = "blsp_uart3"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart3_tx_sleep: blsp1_uart3_tx_sleep { |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart3_rxcts_active: blsp1_uart3_rxcts_active { |
| mux { |
| pins = "gpio9", "gpio10"; |
| function = "blsp_uart3"; |
| }; |
| |
| config { |
| pins = "gpio9", "gpio10"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart3_rxcts_sleep: blsp1_uart3_rxcts_sleep { |
| mux { |
| pins = "gpio9", "gpio10"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9", "gpio10"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart3_rfr_active: blsp1_uart3_rfr_active { |
| mux { |
| pins = "gpio11"; |
| function = "blsp_uart3"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart3_rfr_sleep: blsp1_uart3_rfr_sleep { |
| mux { |
| pins = "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart4a: blsp1_uart4a { |
| blsp1_uart4a_tx_active: blsp1_uart4a_tx_active { |
| mux { |
| pins = "gpio20"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4a_tx_sleep: blsp1_uart4a_tx_sleep { |
| mux { |
| pins = "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart4a_rxcts_active: blsp1_uart4a_rxcts_active { |
| mux { |
| pins = "gpio21", "gpio22"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio22"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4a_rxcts_sleep: blsp1_uart4a_rxcts_sleep { |
| mux { |
| pins = "gpio21", "gpio22"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21", "gpio22"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart4a_rfr_active: blsp1_uart4a_rfr_active { |
| mux { |
| pins = "gpio23"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4a_rfr_sleep: blsp1_uart4a_rfr_sleep { |
| mux { |
| pins = "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| blsp1_uart4b: blsp1_uart4b { |
| blsp1_uart4b_tx_active: blsp1_uart4b_tx_active { |
| mux { |
| pins = "gpio16"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4b_tx_sleep: blsp1_uart4b_tx_sleep { |
| mux { |
| pins = "gpio16"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| blsp1_uart4b_rxcts_active: blsp1_uart4b_rxcts_active { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4b_rxcts_sleep: blsp1_uart4b_rxcts_sleep { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| blsp1_uart4b_rfr_active: blsp1_uart4b_rfr_active { |
| mux { |
| pins = "gpio19"; |
| function = "blsp_uart4"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart4b_rfr_sleep: blsp1_uart4b_rfr_sleep { |
| mux { |
| pins = "gpio19"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| }; |
| |
| pcie_ep { |
| pcie_ep_clkreq_default: pcie_ep_clkreq_default { |
| mux { |
| pins = "gpio56"; |
| function = "pcie_clkreq"; |
| }; |
| config { |
| pins = "gpio56"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| pcie_ep_perst_default: pcie_ep_perst_default { |
| mux { |
| pins = "gpio57"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio57"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| pcie_ep_wake_default: pcie_ep_wake_default { |
| mux { |
| pins = "gpio53"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio53"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| wcd9xxx_intr { |
| wcd_intr_default: wcd_intr_default{ |
| mux { |
| pins = "gpio90"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio90"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| cdc_reset_ctrl { |
| cdc_reset_sleep: cdc_reset_sleep { |
| mux { |
| pins = "gpio86"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio86"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_reset_active:cdc_reset_active { |
| mux { |
| pins = "gpio86"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio86"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-high; |
| }; |
| }; |
| }; |
| |
| i2s_mclk { |
| i2s_mclk_sleep: i2s_mclk_sleep { |
| mux { |
| pins = "gpio62"; |
| function = "i2s_mclk"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| i2s_mclk_active: i2s_mclk_active { |
| mux { |
| pins = "gpio62"; |
| function = "i2s_mclk"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pmx_pri_mi2s_aux { |
| pri_ws_sleep: pri_ws_sleep { |
| mux { |
| pins = "gpio12"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_sck_sleep: pri_sck_sleep { |
| mux { |
| pins = "gpio15"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_dout_sleep: pri_dout_sleep { |
| mux { |
| pins = "gpio14"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_ws_active_master: pri_ws_active_master { |
| mux { |
| pins = "gpio12"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| |
| pri_sck_active_master: pri_sck_active_master { |
| mux { |
| pins = "gpio15"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| |
| pri_ws_active_slave: pri_ws_active_slave { |
| mux { |
| pins = "gpio12"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| }; |
| }; |
| |
| pri_sck_active_slave: pri_sck_active_slave { |
| mux { |
| pins = "gpio15"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| }; |
| }; |
| |
| pri_dout_active: pri_dout_active { |
| mux { |
| pins = "gpio14"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pmx_pri_mi2s_aux_din { |
| pri_din_sleep: pri_din_sleep { |
| mux { |
| pins = "gpio13"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_din_active: pri_din_active { |
| mux { |
| pins = "gpio13"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pmx_sec_mi2s_aux { |
| sec_ws_sleep: sec_ws_sleep { |
| mux { |
| pins = "gpio16"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_sck_sleep: sec_sck_sleep { |
| mux { |
| pins = "gpio19"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_dout_sleep: sec_dout_sleep { |
| mux { |
| pins = "gpio18"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio18"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_ws_active_master: sec_ws_active_master { |
| mux { |
| pins = "gpio16"; |
| function = "sec_mi2s_ws_a"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| |
| sec_sck_active_master: sec_sck_active_master { |
| mux { |
| pins = "gpio19"; |
| function = "sec_mi2s_sck_a"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| |
| sec_ws_active_slave: sec_ws_active_slave { |
| mux { |
| pins = "gpio16"; |
| function = "sec_mi2s_ws_a"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| }; |
| }; |
| |
| sec_sck_active_slave: sec_sck_active_slave { |
| mux { |
| pins = "gpio19"; |
| function = "sec_mi2s_sck_a"; |
| }; |
| |
| config { |
| pins = "gpio19"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| }; |
| }; |
| |
| sec_dout_active: sec_dout_active { |
| mux { |
| pins = "gpio18"; |
| function = "sec_mi2s_data1_a"; |
| }; |
| |
| config { |
| pins = "gpio18"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| output-high; |
| }; |
| }; |
| }; |
| |
| mdss_cs_active: mdss_cs_active { |
| mux { |
| pins = "gpio21"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive-strength = <10>; /* 10 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_cs_sleep: mdss_cs_sleep { |
| mux { |
| pins = "gpio21"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_te_active: mdss_te_active { |
| mux { |
| pins = "gpio22"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <10>; /* 10 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_te_sleep: mdss_te_sleep { |
| mux { |
| pins = "gpio22"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_rs_active: mdss_rs_active { |
| mux { |
| pins = "gpio23"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <10>; /* 10 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_rs_sleep: mdss_rs_sleep { |
| mux { |
| pins = "gpio23"; |
| function = "ebi2_lcd"; |
| }; |
| |
| config { |
| pins = "gpio23"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_ad_active: mdss_ad_active { |
| mux { |
| pins = "gpio20"; |
| function = "ebi2_a"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <10>; /* 10 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_ad_sleep: mdss_ad_sleep { |
| mux { |
| pins = "gpio20"; |
| function = "ebi2_a"; |
| }; |
| |
| config { |
| pins = "gpio20"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| mdss_bl_active: mdss_bl_active { |
| mux { |
| pins = "gpio91"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio91"; |
| drive-strength = <10>; /* 10 mA */ |
| bias-disable; /* NO pull */ |
| output-high; |
| }; |
| }; |
| |
| mdss_bl_sleep: mdss_bl_sleep { |
| mux { |
| pins = "gpio91"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio91"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO pull */ |
| output-low; |
| }; |
| }; |
| |
| pmx_sec_mi2s_aux_din { |
| sec_din_sleep: sec_din_sleep { |
| mux { |
| pins = "gpio17"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_din_active: sec_din_active { |
| mux { |
| pins = "gpio17"; |
| function = "sec_mi2s_data0_a"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| /* SDC pin type */ |
| sdc1_clk_on: sdc1_clk_on { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc1_clk_off: sdc1_clk_off { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_cmd_on: sdc1_cmd_on { |
| config { |
| pins = "sdc1_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_cmd_off: sdc1_cmd_off { |
| config { |
| pins = "sdc1_cmd"; |
| num-grp-pins = <1>; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_data_on: sdc1_data_on { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_data_off: sdc1_data_off { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_cd_on: cd_on { |
| mux { |
| pins = "gpio93"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| sdc1_cd_off: cd_off { |
| mux { |
| pins = "gpio93"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| sdc1_wlan_gpio_active: sdc1_wlan_gpio_active { |
| mux { |
| pins = "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81"; |
| output-high; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| |
| sdc1_wlan_gpio_sleep: sdc1_wlan_gpio_sleep { |
| mux { |
| pins = "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| smb_int_default: smb_int_default { |
| mux { |
| pins = "gpio42"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio42"; |
| drive-strength = <2>; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| |
| cnss_pins { |
| cnss_wlan_en_active: cnss_wlan_en_active { |
| mux { |
| pins = "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio52"; |
| drive-strength = <16>; |
| output-high; |
| bias-pull-up; |
| }; |
| }; |
| |
| cnss_wlan_en_sleep: cnss_wlan_en_sleep { |
| mux { |
| pins = "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio52"; |
| drive-strength = <2>; |
| output-low; |
| bias-pull-down; |
| }; |
| }; |
| |
| cnss_sdio_active: cnss_sdio_active { |
| mux { |
| pins = "gpio31"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31"; |
| drive-strength = <16>; |
| output-high; |
| bias-pull-up; |
| }; |
| }; |
| |
| cnss_sdio_sleep: cnss_sdio_sleep { |
| mux { |
| pins = "gpio31"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31"; |
| drive-strength = <2>; |
| output-low; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| emac { |
| emac_pin_pps_0: emac_pin_pps_0 { |
| mux { |
| pins = "gpio89"; |
| function = "emac_pps"; |
| }; |
| |
| config { |
| pins = "gpio89"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL*/ |
| }; |
| }; |
| }; |
| |
| sensor_int1_default: sensor_int1_default { |
| mux { |
| pins = "gpio78"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| sensor_int2_default: sensor_int2_default { |
| mux { |
| pins = "gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| pinctrl_pps: ppsgrp { |
| mux { |
| pins = "gpio42"; |
| function = "nav_dr"; |
| }; |
| |
| config { |
| pins = "gpio42"; |
| bias-pull-down; |
| }; |
| }; |
| |
| pmx_can_reset: pmx_can_reset { |
| mux { |
| pins = "gpio99"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio99"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| }; |
| |
| &pmxpoorwills_gpios { |
| ambient_therm { |
| ambient_therm_default: ambient_therm_default { |
| pins = "gpio2"; |
| bias-high-impedance; |
| }; |
| }; |
| |
| vdd_wlan { |
| vdd_wlan_default: vdd_wlan_default { |
| pins = "gpio6"; |
| bias-high-impedance; |
| }; |
| }; |
| }; |