| commit | 732d6913691848db9fabaa6a25b4d6fad10ddccf | [log] [tgz] |
|---|---|---|
| author | Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | Mon Feb 22 11:43:39 2016 +0000 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Mon Feb 22 14:15:53 2016 -0800 |
| tree | 709e8daa51429f280679614510cffa4dd4b8013a | |
| parent | f073cd8a3e7b3b7d5f572b8178aa4abe6115e52f [diff] |
clk: qcom: msm8960: fix ce3_core clk enable register
This patch corrects the enable register offset which is actually 0x36cc
instead of 0x36c4
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>