| /* |
| * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include "sdm439-camera-sensor-mtp.dtsi" |
| |
| &blsp1_uart2 { |
| status = "ok"; |
| }; |
| |
| &pm8953_gpios { |
| nfc_clk { |
| nfc_clk_default: nfc_clk_default { |
| pins = "gpio2"; |
| function = "normal"; |
| input-enable; |
| power-source = <1>; |
| }; |
| }; |
| }; |
| |
| &i2c_5 { /* BLSP2 QUP1 (NFC) */ |
| status = "ok"; |
| nq@28 { |
| compatible = "qcom,nq-nci"; |
| reg = <0x28>; |
| qcom,nq-irq = <&tlmm 17 0x00>; |
| qcom,nq-ven = <&tlmm 16 0x00>; |
| qcom,nq-firm = <&tlmm 130 0x00>; |
| qcom,nq-clkreq = <&pm8953_gpios 2 0x00>; |
| qcom,nq-esepwr = <&tlmm 93 0x00>; |
| interrupt-parent = <&tlmm>; |
| qcom,clk-src = "BBCLK2"; |
| interrupts = <17 0>; |
| interrupt-names = "nfc_irq"; |
| pinctrl-names = "nfc_active", "nfc_suspend"; |
| pinctrl-0 = <&nfc_int_active &nfc_disable_active |
| &nfc_clk_default>; |
| pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>; |
| clocks = <&clock_gcc clk_bb_clk2_pin>; |
| clock-names = "ref_clk"; |
| }; |
| }; |
| |
| &sdhc_1 { |
| /* device core power supply */ |
| vdd-supply = <&pm8953_l8>; |
| qcom,vdd-voltage-level = <2900000 2900000>; |
| qcom,vdd-current-level = <200 570000>; |
| |
| /* device communication power supply */ |
| vdd-io-supply = <&pm8953_l5>; |
| qcom,vdd-io-always-on; |
| qcom,vdd-io-lpm-sup; |
| qcom,vdd-io-voltage-level = <1800000 1800000>; |
| qcom,vdd-io-current-level = <200 325000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>; |
| pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>; |
| |
| qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 |
| 384000000>; |
| qcom,nonremovable; |
| qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; |
| |
| status = "ok"; |
| }; |
| |
| &sdhc_2 { |
| /* device core power supply */ |
| vdd-supply = <&pm8953_l11>; |
| qcom,vdd-voltage-level = <2950000 2950000>; |
| qcom,vdd-current-level = <15000 800000>; |
| |
| /* device communication power supply */ |
| vdd-io-supply = <&pm8953_l12>; |
| qcom,vdd-io-voltage-level = <1800000 2950000>; |
| qcom,vdd-io-current-level = <200 22000>; |
| |
| pinctrl-names = "active", "sleep"; |
| pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; |
| pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>; |
| |
| cd-gpios = <&tlmm 67 0x1>; |
| |
| qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 |
| 200000000>; |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; |
| |
| status = "ok"; |
| }; |
| |
| &soc { |
| gpio_keys { |
| compatible = "gpio-keys"; |
| input-name = "gpio-keys"; |
| pinctrl-names = "default"; |
| pinctrl-0 = <&gpio_key_active>; |
| |
| camera_focus { |
| label = "camera_focus"; |
| gpios = <&tlmm 128 0x1>; |
| linux,input-type = <1>; |
| linux,code = <0x210>; |
| debounce-interval = <15>; |
| linux,can-disable; |
| gpio-key,wakeup; |
| }; |
| |
| camera_snapshot { |
| label = "camera_snapshot"; |
| gpios = <&tlmm 127 0x1>; |
| linux,input-type = <1>; |
| linux,code = <0x2fe>; |
| debounce-interval = <15>; |
| linux,can-disable; |
| gpio-key,wakeup; |
| }; |
| |
| vol_up { |
| label = "volume_up"; |
| gpios = <&tlmm 91 0x1>; |
| linux,input-type = <1>; |
| linux,code = <115>; |
| debounce-interval = <15>; |
| linux,can-disable; |
| gpio-key,wakeup; |
| }; |
| }; |
| }; |
| |
| #include "msm8937-mdss-panels.dtsi" |
| |
| &pm8953_gpios { |
| bklt_en { |
| bklt_en_default: bklt_en_default { |
| pins = "gpio4"; |
| function = "normal"; |
| power-source = <0>; |
| output-high; |
| }; |
| }; |
| }; |
| |
| &pm8953_pwm { |
| status = "ok"; |
| }; |
| |
| &mdss_mdp { |
| qcom,mdss-pref-prim-intf = "dsi"; |
| }; |
| |
| &mdss_dsi { |
| hw-config = "single_dsi"; |
| }; |
| |
| &mdss_dsi0 { |
| qcom,dsi-pref-prim-pan = <&dsi_hx8399c_truly_vid>; |
| pinctrl-names = "mdss_default", "mdss_sleep"; |
| pinctrl-0 = <&mdss_dsi_active &mdss_te_active &bklt_en_default>; |
| pinctrl-1 = <&mdss_dsi_suspend &mdss_te_suspend>; |
| |
| qcom,platform-bklight-en-gpio = <&pm8953_gpios 4 0>; |
| qcom,platform-te-gpio = <&tlmm 24 0>; |
| qcom,platform-reset-gpio = <&tlmm 60 0>; |
| lab-supply = <&lcdb_ldo_vreg>; |
| ibb-supply = <&lcdb_ncp_vreg>; |
| }; |
| |
| &mdss_dsi1 { |
| status = "disabled"; |
| }; |
| |
| &dsi_hx8399c_truly_vid { |
| /delete-property/ qcom,mdss-dsi-panel-timings; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [18 0a 10 06 03 08 06 0e]; |
| qcom,mdss-dsi-t-clk-post = <0x02>; |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| qcom,esd-check-enabled; |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; |
| qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-panel-status-value = <0x9d 0x9d 0x9d 0x9d>; |
| qcom,mdss-dsi-panel-on-check-value = <0x9d 0x9d 0x9d 0x9d>; |
| qcom,mdss-dsi-panel-status-read-length = <4>; |
| qcom,mdss-dsi-panel-max-error-count = <3>; |
| qcom,mdss-dsi-min-refresh-rate = <48>; |
| qcom,mdss-dsi-max-refresh-rate = <60>; |
| qcom,mdss-dsi-pan-enable-dynamic-fps; |
| qcom,mdss-dsi-pan-fps-update = |
| "dfps_immediate_porch_mode_vfp"; |
| }; |
| |
| &dsi_hx8399c_hd_vid { |
| /delete-property/ qcom,mdss-dsi-panel-timings; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [09 06 0a 02 00 05 02 08]; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| qcom,esd-check-enabled; |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; |
| qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-panel-status-value = <0x9d 0x9d 0x9d 0x9d>; |
| qcom,mdss-dsi-panel-on-check-value = <0x9d 0x9d 0x9d 0x9d>; |
| qcom,mdss-dsi-panel-status-read-length = <4>; |
| qcom,mdss-dsi-panel-max-error-count = <3>; |
| qcom,mdss-dsi-min-refresh-rate = <48>; |
| qcom,mdss-dsi-max-refresh-rate = <60>; |
| qcom,mdss-dsi-pan-enable-dynamic-fps; |
| qcom,mdss-dsi-pan-fps-update = |
| "dfps_immediate_porch_mode_vfp"; |
| }; |
| |
| &dsi_nt35695b_truly_fhd_cmd { |
| qcom,mdss-dsi-panel-width = <1080>; |
| qcom,mdss-dsi-panel-height = <1920>; |
| qcom,mdss-dsi-h-front-porch = <120>; |
| qcom,mdss-dsi-h-back-porch = <60>; |
| qcom,mdss-dsi-h-pulse-width = <12>; |
| qcom,mdss-dsi-h-sync-skew = <0>; |
| qcom,mdss-dsi-v-back-porch = <2>; |
| qcom,mdss-dsi-v-front-porch = <12>; |
| qcom,mdss-dsi-v-pulse-width = <2>; |
| qcom,mdss-dsi-h-sync-pulse = <0>; |
| qcom,mdss-dsi-h-left-border = <0>; |
| qcom,mdss-dsi-h-right-border = <0>; |
| qcom,mdss-dsi-v-top-border = <0>; |
| qcom,mdss-dsi-v-bottom-border = <0>; |
| qcom,mdss-dsi-panel-framerate = <60>; |
| qcom,mdss-dsi-on-command = |
| [15 01 00 00 10 00 02 ff 20 |
| 15 01 00 00 00 00 02 fb 01 |
| 15 01 00 00 00 00 02 00 01 |
| 15 01 00 00 00 00 02 01 55 |
| 15 01 00 00 00 00 02 02 45 |
| 15 01 00 00 00 00 02 03 55 |
| 15 01 00 00 00 00 02 05 50 |
| 15 01 00 00 00 00 02 06 a8 |
| 15 01 00 00 00 00 02 07 ad |
| 15 01 00 00 00 00 02 08 0c |
| 15 01 00 00 00 00 02 0b aa |
| 15 01 00 00 00 00 02 0c aa |
| 15 01 00 00 00 00 02 0e b0 |
| 15 01 00 00 00 00 02 0f b3 |
| 15 01 00 00 00 00 02 11 28 |
| 15 01 00 00 00 00 02 12 10 |
| 15 01 00 00 00 00 02 13 01 |
| 15 01 00 00 00 00 02 14 4a |
| 15 01 00 00 00 00 02 15 12 |
| 15 01 00 00 00 00 02 16 12 |
| 15 01 00 00 00 00 02 30 01 |
| 15 01 00 00 00 00 02 72 11 |
| 15 01 00 00 00 00 02 58 82 |
| 15 01 00 00 00 00 02 59 00 |
| 15 01 00 00 00 00 02 5a 02 |
| 15 01 00 00 00 00 02 5b 00 |
| 15 01 00 00 00 00 02 5c 82 |
| 15 01 00 00 00 00 02 5d 80 |
| 15 01 00 00 00 00 02 5e 02 |
| 15 01 00 00 00 00 02 5f 00 |
| 15 01 00 00 00 00 02 ff 24 |
| 15 01 00 00 00 00 02 fb 01 |
| 15 01 00 00 00 00 02 00 01 |
| 15 01 00 00 00 00 02 01 0b |
| 15 01 00 00 00 00 02 02 0c |
| 15 01 00 00 00 00 02 03 89 |
| 15 01 00 00 00 00 02 04 8a |
| 15 01 00 00 00 00 02 05 0f |
| 15 01 00 00 00 00 02 06 10 |
| 15 01 00 00 00 00 02 07 10 |
| 15 01 00 00 00 00 02 08 1c |
| 15 01 00 00 00 00 02 09 00 |
| 15 01 00 00 00 00 02 0a 00 |
| 15 01 00 00 00 00 02 0b 00 |
| 15 01 00 00 00 00 02 0c 00 |
| 15 01 00 00 00 00 02 0d 13 |
| 15 01 00 00 00 00 02 0e 15 |
| 15 01 00 00 00 00 02 0f 17 |
| 15 01 00 00 00 00 02 10 01 |
| 15 01 00 00 00 00 02 11 0b |
| 15 01 00 00 00 00 02 12 0c |
| 15 01 00 00 00 00 02 13 89 |
| 15 01 00 00 00 00 02 14 8a |
| 15 01 00 00 00 00 02 15 0f |
| 15 01 00 00 00 00 02 16 10 |
| 15 01 00 00 00 00 02 17 10 |
| 15 01 00 00 00 00 02 18 1c |
| 15 01 00 00 00 00 02 19 00 |
| 15 01 00 00 00 00 02 1a 00 |
| 15 01 00 00 00 00 02 1b 00 |
| 15 01 00 00 00 00 02 1c 00 |
| 15 01 00 00 00 00 02 1d 13 |
| 15 01 00 00 00 00 02 1e 15 |
| 15 01 00 00 00 00 02 1f 17 |
| 15 01 00 00 00 00 02 20 00 |
| 15 01 00 00 00 00 02 21 01 |
| 15 01 00 00 00 00 02 22 00 |
| 15 01 00 00 00 00 02 23 40 |
| 15 01 00 00 00 00 02 24 40 |
| 15 01 00 00 00 00 02 25 6d |
| 15 01 00 00 00 00 02 26 40 |
| 15 01 00 00 00 00 02 27 40 |
| 15 01 00 00 00 00 02 29 d8 |
| 15 01 00 00 00 00 02 2a 2a |
| 15 01 00 00 00 00 02 4b 03 |
| 15 01 00 00 00 00 02 4c 11 |
| 15 01 00 00 00 00 02 4d 10 |
| 15 01 00 00 00 00 02 4e 01 |
| 15 01 00 00 00 00 02 4f 01 |
| 15 01 00 00 00 00 02 50 10 |
| 15 01 00 00 00 00 02 51 00 |
| 15 01 00 00 00 00 02 52 80 |
| 15 01 00 00 00 00 02 53 00 |
| 15 01 00 00 00 00 02 54 07 |
| 15 01 00 00 00 00 02 55 25 |
| 15 01 00 00 00 00 02 56 00 |
| 15 01 00 00 00 00 02 58 07 |
| 15 01 00 00 00 00 02 5b 43 |
| 15 01 00 00 00 00 02 5c 00 |
| 15 01 00 00 00 00 02 5f 73 |
| 15 01 00 00 00 00 02 60 73 |
| 15 01 00 00 00 00 02 63 22 |
| 15 01 00 00 00 00 02 64 00 |
| 15 01 00 00 00 00 02 67 08 |
| 15 01 00 00 00 00 02 68 04 |
| 15 01 00 00 00 00 02 7a 80 |
| 15 01 00 00 00 00 02 7b 91 |
| 15 01 00 00 00 00 02 7c d8 |
| 15 01 00 00 00 00 02 7d 60 |
| 15 01 00 00 00 00 02 93 06 |
| 15 01 00 00 00 00 02 94 06 |
| 15 01 00 00 00 00 02 8a 00 |
| 15 01 00 00 00 00 02 9b 0f |
| 15 01 00 00 00 00 02 b3 c0 |
| 15 01 00 00 00 00 02 b4 00 |
| 15 01 00 00 00 00 02 b5 00 |
| 15 01 00 00 00 00 02 b6 21 |
| 15 01 00 00 00 00 02 b7 22 |
| 15 01 00 00 00 00 02 b8 07 |
| 15 01 00 00 00 00 02 b9 07 |
| 15 01 00 00 00 00 02 ba 22 |
| 15 01 00 00 00 00 02 bd 20 |
| 15 01 00 00 00 00 02 be 07 |
| 15 01 00 00 00 00 02 bf 07 |
| 15 01 00 00 00 00 02 c1 6d |
| 15 01 00 00 00 00 02 c4 24 |
| 15 01 00 00 00 00 02 e3 00 |
| 15 01 00 00 00 00 02 ec 00 |
| 15 01 00 00 00 00 02 ff 10 |
| 15 01 00 00 00 00 02 bb 10 |
| 15 01 00 00 00 00 02 35 00 |
| 05 01 00 00 78 00 02 11 00 |
| 05 01 00 00 78 00 02 29 00]; |
| qcom,mdss-dsi-off-command = [05 01 00 00 14 |
| 00 02 28 00 05 01 00 00 78 00 02 10 00]; |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [17 0a 0f 06 03 08 06 0e]; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| qcom,ulps-enabled; |
| qcom,esd-check-enabled; |
| qcom,mdss-dsi-panel-status-check-mode = "reg_read"; |
| qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a]; |
| qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-panel-status-value = <0x9c>; |
| qcom,mdss-dsi-panel-on-check-value = <0x9c>; |
| qcom,mdss-dsi-panel-status-read-length = <1>; |
| qcom,mdss-dsi-panel-max-error-count = <3>; |
| /delete-node/ qcom,mdss-dsi-display-timings; |
| }; |
| |
| &dsi_nt35695b_truly_fhd_video { |
| qcom,mdss-dsi-panel-width = <1080>; |
| qcom,mdss-dsi-panel-height = <1920>; |
| qcom,mdss-dsi-h-front-porch = <120>; |
| qcom,mdss-dsi-h-back-porch = <60>; |
| qcom,mdss-dsi-h-pulse-width = <12>; |
| qcom,mdss-dsi-h-sync-skew = <0>; |
| qcom,mdss-dsi-h-sync-pulse = <0>; |
| qcom,mdss-dsi-v-back-porch = <2>; |
| qcom,mdss-dsi-v-front-porch = <12>; |
| qcom,mdss-dsi-v-pulse-width = <2>; |
| qcom,mdss-dsi-h-left-border = <0>; |
| qcom,mdss-dsi-h-right-border = <0>; |
| qcom,mdss-dsi-v-top-border = <0>; |
| qcom,mdss-dsi-v-bottom-border = <0>; |
| qcom,mdss-dsi-panel-framerate = <60>; |
| qcom,mdss-dsi-on-command = |
| [15 01 00 00 10 00 02 ff 20 |
| 15 01 00 00 00 00 02 fb 01 |
| 15 01 00 00 00 00 02 00 01 |
| 15 01 00 00 00 00 02 01 55 |
| 15 01 00 00 00 00 02 02 45 |
| 15 01 00 00 00 00 02 03 55 |
| 15 01 00 00 00 00 02 05 50 |
| 15 01 00 00 00 00 02 06 a8 |
| 15 01 00 00 00 00 02 07 ad |
| 15 01 00 00 00 00 02 08 0c |
| 15 01 00 00 00 00 02 0b aa |
| 15 01 00 00 00 00 02 0c aa |
| 15 01 00 00 00 00 02 0e b0 |
| 15 01 00 00 00 00 02 0f b3 |
| 15 01 00 00 00 00 02 11 28 |
| 15 01 00 00 00 00 02 12 10 |
| 15 01 00 00 00 00 02 13 01 |
| 15 01 00 00 00 00 02 14 4a |
| 15 01 00 00 00 00 02 15 12 |
| 15 01 00 00 00 00 02 16 12 |
| 15 01 00 00 00 00 02 30 01 |
| 15 01 00 00 00 00 02 72 11 |
| 15 01 00 00 00 00 02 58 82 |
| 15 01 00 00 00 00 02 59 00 |
| 15 01 00 00 00 00 02 5a 02 |
| 15 01 00 00 00 00 02 5b 00 |
| 15 01 00 00 00 00 02 5c 82 |
| 15 01 00 00 00 00 02 5d 80 |
| 15 01 00 00 00 00 02 5e 02 |
| 15 01 00 00 00 00 02 5f 00 |
| 15 01 00 00 00 00 02 ff 24 |
| 15 01 00 00 00 00 02 fb 01 |
| 15 01 00 00 00 00 02 00 01 |
| 15 01 00 00 00 00 02 01 0b |
| 15 01 00 00 00 00 02 02 0c |
| 15 01 00 00 00 00 02 03 89 |
| 15 01 00 00 00 00 02 04 8a |
| 15 01 00 00 00 00 02 05 0f |
| 15 01 00 00 00 00 02 06 10 |
| 15 01 00 00 00 00 02 07 10 |
| 15 01 00 00 00 00 02 08 1c |
| 15 01 00 00 00 00 02 09 00 |
| 15 01 00 00 00 00 02 0a 00 |
| 15 01 00 00 00 00 02 0b 00 |
| 15 01 00 00 00 00 02 0c 00 |
| 15 01 00 00 00 00 02 0d 13 |
| 15 01 00 00 00 00 02 0e 15 |
| 15 01 00 00 00 00 02 0f 17 |
| 15 01 00 00 00 00 02 10 01 |
| 15 01 00 00 00 00 02 11 0b |
| 15 01 00 00 00 00 02 12 0c |
| 15 01 00 00 00 00 02 13 89 |
| 15 01 00 00 00 00 02 14 8a |
| 15 01 00 00 00 00 02 15 0f |
| 15 01 00 00 00 00 02 16 10 |
| 15 01 00 00 00 00 02 17 10 |
| 15 01 00 00 00 00 02 18 1c |
| 15 01 00 00 00 00 02 19 00 |
| 15 01 00 00 00 00 02 1a 00 |
| 15 01 00 00 00 00 02 1b 00 |
| 15 01 00 00 00 00 02 1c 00 |
| 15 01 00 00 00 00 02 1d 13 |
| 15 01 00 00 00 00 02 1e 15 |
| 15 01 00 00 00 00 02 1f 17 |
| 15 01 00 00 00 00 02 20 00 |
| 15 01 00 00 00 00 02 21 01 |
| 15 01 00 00 00 00 02 22 00 |
| 15 01 00 00 00 00 02 23 40 |
| 15 01 00 00 00 00 02 24 40 |
| 15 01 00 00 00 00 02 25 6d |
| 15 01 00 00 00 00 02 26 40 |
| 15 01 00 00 00 00 02 27 40 |
| 15 01 00 00 00 00 02 29 d8 |
| 15 01 00 00 00 00 02 2a 2a |
| 15 01 00 00 00 00 02 4b 03 |
| 15 01 00 00 00 00 02 4c 11 |
| 15 01 00 00 00 00 02 4d 10 |
| 15 01 00 00 00 00 02 4e 01 |
| 15 01 00 00 00 00 02 4f 01 |
| 15 01 00 00 00 00 02 50 10 |
| 15 01 00 00 00 00 02 51 00 |
| 15 01 00 00 00 00 02 52 80 |
| 15 01 00 00 00 00 02 53 00 |
| 15 01 00 00 00 00 02 54 07 |
| 15 01 00 00 00 00 02 55 25 |
| 15 01 00 00 00 00 02 56 00 |
| 15 01 00 00 00 00 02 58 07 |
| 15 01 00 00 00 00 02 5b 43 |
| 15 01 00 00 00 00 02 5c 00 |
| 15 01 00 00 00 00 02 5f 73 |
| 15 01 00 00 00 00 02 60 73 |
| 15 01 00 00 00 00 02 63 22 |
| 15 01 00 00 00 00 02 64 00 |
| 15 01 00 00 00 00 02 67 08 |
| 15 01 00 00 00 00 02 68 04 |
| 15 01 00 00 00 00 02 7a 80 |
| 15 01 00 00 00 00 02 7b 91 |
| 15 01 00 00 00 00 02 7c d8 |
| 15 01 00 00 00 00 02 7d 60 |
| 15 01 00 00 00 00 02 93 06 |
| 15 01 00 00 00 00 02 94 06 |
| 15 01 00 00 00 00 02 8a 00 |
| 15 01 00 00 00 00 02 9b 0f |
| 15 01 00 00 00 00 02 b3 c0 |
| 15 01 00 00 00 00 02 b4 00 |
| 15 01 00 00 00 00 02 b5 00 |
| 15 01 00 00 00 00 02 b6 21 |
| 15 01 00 00 00 00 02 b7 22 |
| 15 01 00 00 00 00 02 b8 07 |
| 15 01 00 00 00 00 02 b9 07 |
| 15 01 00 00 00 00 02 ba 22 |
| 15 01 00 00 00 00 02 bd 20 |
| 15 01 00 00 00 00 02 be 07 |
| 15 01 00 00 00 00 02 bf 07 |
| 15 01 00 00 00 00 02 c1 6d |
| 15 01 00 00 00 00 02 c4 24 |
| 15 01 00 00 00 00 02 e3 00 |
| 15 01 00 00 00 00 02 ec 00 |
| 15 01 00 00 00 00 02 ff 10 |
| 15 01 00 00 00 00 02 bb 03 |
| 05 01 00 00 78 00 02 11 00 |
| 05 01 00 00 78 00 02 29 00]; |
| qcom,mdss-dsi-off-command = [05 01 00 00 |
| 14 00 02 28 00 05 01 00 00 78 00 |
| 02 10 00]; |
| qcom,mdss-dsi-on-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [17 0a 0f 06 03 08 06 0e]; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| /delete-node/ qcom,mdss-dsi-display-timings; |
| }; |
| |
| &dsi_truly_1080_vid { |
| /delete-property/ qcom,mdss-dsi-panel-timings; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [17 0a 0f 06 02 08 06 0e]; |
| qcom,mdss-dsi-t-clk-post = <0x02>; |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| }; |
| |
| &dsi_truly_1080_cmd { |
| /delete-property/ qcom,mdss-dsi-panel-timings; |
| qcom,mdss-dsi-panel-timings-phy-12nm = [17 0a 0f 06 02 08 06 0e]; |
| qcom,mdss-dsi-t-clk-post = <0x02>; |
| qcom,mdss-dsi-t-clk-pre = <0x2d>; |
| qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; |
| qcom,mdss-dsi-bl-pmic-pwm-frequency = <100>; |
| qcom,mdss-dsi-bl-pmic-bank-select = <0>; |
| qcom,mdss-dsi-pwm-gpio = <&pm8953_gpios 8 0>; |
| qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; |
| }; |
| |
| &i2c_2 { |
| #include "smb1355.dtsi" |
| }; |
| |
| &pmi632_gpios { |
| smb_en { |
| smb_en_default: smb_en_default { |
| pins = "gpio2"; |
| function = "func1"; |
| output-enable; |
| }; |
| }; |
| |
| pmi632_sense { |
| /* GPIO 7 and 8 are external-sense pins for PMI632 */ |
| pmi632_sense_default: pmi632_sense_default { |
| pins = "gpio7", "gpio8"; |
| bias-high-impedance; /* disable the GPIO */ |
| bias-disable; /* no-pull */ |
| }; |
| }; |
| |
| pmi632_ctm { |
| /* Disable GPIO1 for h/w base mitigation */ |
| pmi632_ctm_default: pmi632_ctm_default { |
| pins = "gpio1"; |
| bias-high-impedance; /* disable the GPIO */ |
| bias-disable; /* no-pull */ |
| }; |
| }; |
| }; |
| |
| &tlmm { |
| smb_int_default: smb_int_default { |
| mux { |
| pins = "gpio61"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; |
| bias-pull-up; |
| input-enable; |
| }; |
| }; |
| }; |
| |
| &smb1355_0 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&smb_int_default |
| &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; |
| interrupt-parent = <&tlmm>; |
| interrupts = <61 IRQ_TYPE_LEVEL_LOW>; |
| smb1355_charger_0: qcom,smb1355-charger@1000 { |
| status ="ok"; |
| /delete-property/ io-channels; |
| /delete-property/ io-channels-names; |
| qcom,parallel-mode = <1>; |
| qcom,disable-ctm; |
| qcom,hw-die-temp-mitigation; |
| }; |
| }; |
| |
| &smb1355_1 { |
| pinctrl-names = "default"; |
| pinctrl-0 = <&smb_int_default |
| &smb_en_default &pmi632_sense_default &pmi632_ctm_default>; |
| interrupt-parent = <&tlmm>; |
| interrupts = <61 IRQ_TYPE_LEVEL_LOW>; |
| smb1355_charger_1: qcom,smb1355-charger@1000 { |
| status ="ok"; |
| /delete-property/ io-channels; |
| /delete-property/ io-channels-names; |
| qcom,parallel-mode = <1>; |
| qcom,disable-ctm; |
| qcom,hw-die-temp-mitigation; |
| }; |
| }; |