| /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| |
| #include "skeleton.dtsi" |
| |
| #include <dt-bindings/clock/qcom,rpmh.h> |
| #include <dt-bindings/clock/qcom,gcc-sdxpoorwills.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| / { |
| model = "Qualcomm Technologies, Inc. SDX POORWILLS"; |
| compatible = "qcom,sdxpoorwills"; |
| qcom,msm-id = <334 0x0>; |
| interrupt-parent = <&intc>; |
| |
| reserved-memory { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| peripheral2_mem: peripheral2_region@8fd00000 { |
| compatible = "removed-dma-pool"; |
| no-map; |
| reg = <0x8fd00000 0x300000>; |
| label = "peripheral2_mem"; |
| }; |
| |
| mss_mem: mss_region@87800000 { |
| compatible = "removed-dma-pool"; |
| no-map; |
| reg = <0x87800000 0x8000000>; |
| label = "mss_mem"; |
| }; |
| }; |
| |
| cpus { |
| #size-cells = <0>; |
| #address-cells = <1>; |
| |
| CPU0: cpu@0 { |
| device-type = "cpu"; |
| compatible = "arm,cortex-a7"; |
| reg = <0x0>; |
| #cooling-cells = <2>; |
| }; |
| }; |
| |
| aliases { |
| qpic_nand1 = &qnand_1; |
| }; |
| |
| soc: soc { }; |
| }; |
| |
| |
| &soc { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| |
| intc: interrupt-controller@17800000 { |
| compatible = "qcom,msm-qgic2"; |
| interrupt-controller; |
| #interrupt-cells = <3>; |
| reg = <0x17800000 0x1000>, |
| <0x17802000 0x1000>; |
| }; |
| |
| timer { |
| compatible = "arm,armv7-timer"; |
| interrupts = <1 13 0xf08>, |
| <1 12 0xf08>, |
| <1 10 0xf08>, |
| <1 11 0xf08>; |
| clock-frequency = <19200000>; |
| }; |
| |
| timer@17820000 { |
| #address-cells = <1>; |
| #size-cells = <1>; |
| ranges; |
| compatible = "arm,armv7-timer-mem"; |
| reg = <0x17820000 0x1000>; |
| clock-frequency = <19200000>; |
| |
| frame@17821000 { |
| frame-number = <0>; |
| interrupts = <0 7 0x4>, |
| <0 6 0x4>; |
| reg = <0x17821000 0x1000>, |
| <0x17822000 0x1000>; |
| }; |
| |
| frame@17823000 { |
| frame-number = <1>; |
| interrupts = <0 8 0x4>; |
| reg = <0x17823000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17824000 { |
| frame-number = <2>; |
| interrupts = <0 9 0x4>; |
| reg = <0x17824000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17825000 { |
| frame-number = <3>; |
| interrupts = <0 10 0x4>; |
| reg = <0x17825000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17826000 { |
| frame-number = <4>; |
| interrupts = <0 11 0x4>; |
| reg = <0x17826000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17827000 { |
| frame-number = <5>; |
| interrupts = <0 12 0x4>; |
| reg = <0x17827000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17828000 { |
| frame-number = <6>; |
| interrupts = <0 13 0x4>; |
| reg = <0x17828000 0x1000>; |
| status = "disabled"; |
| }; |
| |
| frame@17829000 { |
| frame-number = <7>; |
| interrupts = <0 14 0x4>; |
| reg = <0x17829000 0x1000>; |
| status = "disabled"; |
| }; |
| }; |
| |
| clock_gcc: qcom,gcc@100000 { |
| compatible = "qcom,dummycc"; |
| clock-output-names = "gcc_clocks"; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |
| |
| clock_cpu: qcom,clock-a7@17810008 { |
| compatible = "qcom,dummycc"; |
| clock-output-names = "cpu_clocks"; |
| #clock-cells = <1>; |
| }; |
| |
| clock_rpmh: qcom,rpmhclk { |
| compatible = "qcom,dummycc"; |
| clock-output-names = "rpmh_clocks"; |
| #clock-cells = <1>; |
| }; |
| |
| blsp1_uart2: serial@831000 { |
| compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; |
| reg = <0x831000 0x200>; |
| interrupts = <0 26 0>; |
| status = "disabled"; |
| clocks = <&clock_gcc GCC_BLSP1_UART2_APPS_CLK>, |
| <&clock_gcc GCC_BLSP1_AHB_CLK>; |
| clock-names = "core", "iface"; |
| }; |
| |
| gdsc_usb30: qcom,gdsc@10b004 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_usb30"; |
| reg = <0x0010b004 0x4>; |
| status = "ok"; |
| }; |
| |
| qcom,sps { |
| compatible = "qcom,msm_sps_4k"; |
| qcom,pipe-attr-ee; |
| }; |
| |
| gdsc_pcie: qcom,gdsc@137004 { |
| compatible = "qcom,gdsc"; |
| regulator-name = "gdsc_pcie"; |
| reg = <0x00137004 0x4>; |
| status = "ok"; |
| }; |
| |
| qnand_1: nand@1b00000 { |
| compatible = "qcom,msm-nand"; |
| reg = < 0x01b00000 0x10000>, |
| <0x01b04000 0x1a000>; |
| reg-names = "nand_phys", |
| "bam_phys"; |
| qcom,reg-adjustment-offset = <0x4000>; |
| qcom,qpic-clk-rpmh; |
| |
| interrupts = <0 135 0>; |
| interrupt-names = "bam_irq"; |
| |
| qcom,msm-bus,name = "qpic_nand"; |
| qcom,msm-bus,num-cases = <2>; |
| qcom,msm-bus,num-paths = <1>; |
| |
| qcom,msm-bus,vectors-KBps = |
| <91 512 0 0>, |
| /* Voting for max b/w on PNOC bus for now */ |
| <91 512 400000 400000>; |
| |
| status = "disabled"; |
| }; |
| |
| qcom,msm-imem@8600000 { |
| compatible = "qcom,msm-imem"; |
| reg = <0x8600000 0x1000>; /* Address and size of IMEM */ |
| ranges = <0x0 0x8600000 0x1000>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| mem_dump_table@10 { |
| compatible = "qcom,msm-imem-mem_dump_table"; |
| reg = <0x10 8>; |
| }; |
| |
| restart_reason@65c { |
| compatible = "qcom,msm-imem-restart_reason"; |
| reg = <0x65c 4>; |
| }; |
| |
| boot_stats@6b0 { |
| compatible = "qcom,msm-imem-boot_stats"; |
| reg = <0x6b0 32>; |
| }; |
| }; |
| |
| restart@4ab000 { |
| compatible = "qcom,pshold"; |
| reg = <0x4ab000 0x4>, |
| <0x193d100 0x4>; |
| reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| }; |
| |
| tsens0: tsens@c222000 { |
| compatible = "qcom,tsens24xx"; |
| reg = <0xc222000 0x4>, |
| <0xc263000 0x1ff>; |
| reg-names = "tsens_srot_physical", |
| "tsens_tm_physical"; |
| interrupts = <0 163 0>, <0 165 0>; |
| interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| #thermal-sensor-cells = <1>; |
| }; |
| |
| thermal_zones: thermal-zones { }; |
| |
| qcom,ipa_fws { |
| compatible = "qcom,pil-tz-generic"; |
| qcom,pas-id = <0xf>; |
| qcom,firmware-name = "ipa_fws"; |
| }; |
| |
| spmi_bus: qcom,spmi@c440000 { |
| compatible = "qcom,spmi-pmic-arb"; |
| reg = <0xc440000 0x1100>, |
| <0xc600000 0x2000000>, |
| <0xe600000 0x100000>, |
| <0xe700000 0xa0000>, |
| <0xc40a000 0x26000>; |
| reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| interrupt-names = "periph_irq"; |
| interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>; |
| qcom,ee = <0>; |
| qcom,channel = <0>; |
| #address-cells = <2>; |
| #size-cells = <0>; |
| interrupt-controller; |
| #interrupt-cells = <4>; |
| cell-index = <0>; |
| }; |
| |
| qcom,ipc-spinlock@1f40000 { |
| compatible = "qcom,ipc-spinlock-sfpb"; |
| reg = <0x1f40000 0x8000>; |
| qcom,num-locks = <8>; |
| }; |
| |
| qcom,smem@8fe40000 { |
| compatible = "qcom,smem"; |
| reg = <0x8fe40000 0xc0000>, |
| <0x17811008 0x4>, |
| <0x1fd4000 0x8>; |
| reg-names = "smem", "irq-reg-base", |
| "smem_targ_info_reg"; |
| qcom,mpu-enabled; |
| }; |
| |
| qcom,glink-smem-native-xprt-modem@8fe40000 { |
| compatible = "qcom,glink-smem-native-xprt"; |
| reg = <0x8fe40000 0xc0000>, |
| <0x17811008 0x4>; |
| reg-names = "smem", "irq-reg-base"; |
| qcom,irq-mask = <0x8000>; |
| interrupts = <GIC_SPI 114 IRQ_TYPE_EDGE_RISING>; |
| label = "mpss"; |
| }; |
| |
| qcom,ipc_router { |
| compatible = "qcom,ipc_router"; |
| qcom,node-id = <1>; |
| }; |
| |
| qcom,ipc_router_modem_xprt { |
| compatible = "qcom,ipc_router_glink_xprt"; |
| qcom,ch-name = "IPCRTR"; |
| qcom,xprt-remote = "mpss"; |
| qcom,glink-xprt = "smem"; |
| qcom,xprt-linkid = <1>; |
| qcom,xprt-version = <1>; |
| qcom,fragmented-data; |
| }; |
| |
| qcom,glink_pkt { |
| compatible = "qcom,glinkpkt"; |
| |
| qcom,glinkpkt-at-mdm0 { |
| qcom,glinkpkt-transport = "smem"; |
| qcom,glinkpkt-edge = "mpss"; |
| qcom,glinkpkt-ch-name = "DS"; |
| qcom,glinkpkt-dev-name = "at_mdm0"; |
| }; |
| |
| qcom,glinkpkt-loopback_cntl { |
| qcom,glinkpkt-transport = "lloop"; |
| qcom,glinkpkt-edge = "local"; |
| qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| }; |
| |
| qcom,glinkpkt-loopback_data { |
| qcom,glinkpkt-transport = "lloop"; |
| qcom,glinkpkt-edge = "local"; |
| qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| }; |
| |
| qcom,glinkpkt-data40-cntl { |
| qcom,glinkpkt-transport = "smem"; |
| qcom,glinkpkt-edge = "mpss"; |
| qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| qcom,glinkpkt-dev-name = "smdcntl8"; |
| }; |
| |
| qcom,glinkpkt-data1 { |
| qcom,glinkpkt-transport = "smem"; |
| qcom,glinkpkt-edge = "mpss"; |
| qcom,glinkpkt-ch-name = "DATA1"; |
| qcom,glinkpkt-dev-name = "smd7"; |
| }; |
| |
| qcom,glinkpkt-data4 { |
| qcom,glinkpkt-transport = "smem"; |
| qcom,glinkpkt-edge = "mpss"; |
| qcom,glinkpkt-ch-name = "DATA4"; |
| qcom,glinkpkt-dev-name = "smd8"; |
| }; |
| |
| qcom,glinkpkt-data11 { |
| qcom,glinkpkt-transport = "smem"; |
| qcom,glinkpkt-edge = "mpss"; |
| qcom,glinkpkt-ch-name = "DATA11"; |
| qcom,glinkpkt-dev-name = "smd11"; |
| }; |
| }; |
| |
| pil_modem: qcom,mss@4080000 { |
| compatible = "qcom,pil-tz-generic"; |
| reg = <0x4080000 0x100>; |
| interrupts = <0 250 1>; |
| |
| clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| clock-names = "xo"; |
| qcom,proxy-clock-names = "xo"; |
| |
| vdd_cx-supply = <&pmxpoorwills_s5_level>; |
| qcom,proxy-reg-names = "vdd_cx"; |
| |
| qcom,pas-id = <0>; |
| qcom,smem-id = <421>; |
| qcom,proxy-timeout-ms = <10000>; |
| qcom,sysmon-id = <0>; |
| qcom,ssctl-instance-id = <0x12>; |
| qcom,firmware-name = "modem"; |
| memory-region = <&mss_mem>; |
| status = "ok"; |
| |
| /* GPIO inputs from mss */ |
| qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| |
| /* GPIO output to mss */ |
| qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| }; |
| }; |
| |
| #include "pmxpoorwills.dtsi" |
| #include "sdxpoorwills-blsp.dtsi" |
| #include "sdxpoorwills-regulator.dtsi" |
| #include "sdxpoorwills-smp2p.dtsi" |
| #include "sdxpoorwills-usb.dtsi" |
| #include "sdxpoorwills-bus.dtsi" |
| #include "sdxpoorwills-thermal.dtsi" |