| /* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| tlmm: pinctrl@03800000 { |
| compatible = "qcom,sdm845-pinctrl"; |
| reg = <0x03800000 0xc00000>; |
| interrupts = <0 208 0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| |
| wcd9xxx_intr { |
| wcd_intr_default: wcd_intr_default{ |
| mux { |
| pins = "gpio54"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio54"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| cdc_reset_ctrl { |
| cdc_reset_sleep: cdc_reset_sleep { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio64"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_reset_active:cdc_reset_active { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio64"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-high; |
| }; |
| }; |
| }; |
| |
| spkr_i2s_clk_pin { |
| spkr_i2s_clk_sleep: spkr_i2s_clk_sleep { |
| mux { |
| pins = "gpio69"; |
| function = "spkr_i2s"; |
| }; |
| |
| config { |
| pins = "gpio69"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| spkr_i2s_clk_active: spkr_i2s_clk_active { |
| mux { |
| pins = "gpio69"; |
| function = "spkr_i2s"; |
| }; |
| |
| config { |
| pins = "gpio69"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| wcd_gnd_mic_swap { |
| wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active { |
| mux { |
| pins = "gpio51"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio51"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_clk { |
| pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_clk_active: pri_aux_pcm_clk_active { |
| mux { |
| pins = "gpio65"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_sync { |
| pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_sync_active: pri_aux_pcm_sync_active { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_din { |
| pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_din_active: pri_aux_pcm_din_active { |
| mux { |
| pins = "gpio67"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_aux_pcm_dout { |
| pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_aux_pcm_dout_active: pri_aux_pcm_dout_active { |
| mux { |
| pins = "gpio68"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm { |
| sec_aux_pcm_sleep: sec_aux_pcm_sleep { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_active: sec_aux_pcm_active { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm_din { |
| sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_din_active: sec_aux_pcm_din_active { |
| mux { |
| pins = "gpio82"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_aux_pcm_dout { |
| sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio83"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_aux_pcm_dout_active: sec_aux_pcm_dout_active { |
| mux { |
| pins = "gpio83"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm { |
| tert_aux_pcm_sleep: tert_aux_pcm_sleep { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_active: tert_aux_pcm_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm_din { |
| tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio77"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_din_active: tert_aux_pcm_din_active { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_aux_pcm_dout { |
| tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio78"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_aux_pcm_dout_active: tert_aux_pcm_dout_active { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm { |
| quat_aux_pcm_sleep: quat_aux_pcm_sleep { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_active: quat_aux_pcm_active { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm_din { |
| quat_aux_pcm_din_sleep: quat_aux_pcm_din_sleep { |
| mux { |
| pins = "gpio60"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_din_active: quat_aux_pcm_din_active { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_aux_pcm_dout { |
| quat_aux_pcm_dout_sleep: quat_aux_pcm_dout_sleep { |
| mux { |
| pins = "gpio61"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_aux_pcm_dout_active: quat_aux_pcm_dout_active { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_mi2s_mclk { |
| pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_mclk_active: pri_mi2s_mclk_active { |
| mux { |
| pins = "gpio64"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sck { |
| pri_mi2s_sck_sleep: pri_mi2s_sck_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sck_active: pri_mi2s_sck_active { |
| mux { |
| pins = "gpio65"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_ws { |
| pri_mi2s_ws_sleep: pri_mi2s_ws_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_ws_active: pri_mi2s_ws_active { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd0 { |
| pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sd0_active: pri_mi2s_sd0_active { |
| mux { |
| pins = "gpio67"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd1 { |
| pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sd1_active: pri_mi2s_sd1_active { |
| mux { |
| pins = "gpio68"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_mclk { |
| sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_mclk_active: sec_mi2s_mclk_active { |
| mux { |
| pins = "gpio79"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s { |
| sec_mi2s_sleep: sec_mi2s_sleep { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-disable; /* NO PULL */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_active: sec_mi2s_active { |
| mux { |
| pins = "gpio80", "gpio81"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio80", "gpio81"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd0 { |
| sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_sd0_active: sec_mi2s_sd0_active { |
| mux { |
| pins = "gpio82"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio82"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd1 { |
| sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio83"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| sec_mi2s_sd1_active: sec_mi2s_sd1_active { |
| mux { |
| pins = "gpio83"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio83"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s_mclk { |
| tert_mi2s_mclk_sleep: tert_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio74"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio74"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_mclk_active: tert_mi2s_mclk_active { |
| mux { |
| pins = "gpio74"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio74"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s { |
| tert_mi2s_sleep: tert_mi2s_sleep { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_active: tert_mi2s_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| tert_mi2s_sd0 { |
| tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio77"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_sd0_active: tert_mi2s_sd0_active { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| tert_mi2s_sd1 { |
| tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio78"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| tert_mi2s_sd1_active: tert_mi2s_sd1_active { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_mclk { |
| quat_mi2s_mclk_sleep: quat_mi2s_mclk_sleep { |
| mux { |
| pins = "gpio57"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio57"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_mclk_active: quat_mi2s_mclk_active { |
| mux { |
| pins = "gpio57"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio57"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s { |
| quat_mi2s_sleep: quat_mi2s_sleep { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_active: quat_mi2s_active { |
| mux { |
| pins = "gpio58", "gpio59"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio58", "gpio59"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd0 { |
| quat_mi2s_sd0_sleep: quat_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio60"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd0_active: quat_mi2s_sd0_active { |
| mux { |
| pins = "gpio60"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio60"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd1 { |
| quat_mi2s_sd1_sleep: quat_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio61"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd1_active: quat_mi2s_sd1_active { |
| mux { |
| pins = "gpio61"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio61"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd2 { |
| quat_mi2s_sd2_sleep: quat_mi2s_sd2_sleep { |
| mux { |
| pins = "gpio62"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd2_active: quat_mi2s_sd2_active { |
| mux { |
| pins = "gpio62"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio62"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| quat_mi2s_sd3 { |
| quat_mi2s_sd3_sleep: quat_mi2s_sd3_sleep { |
| mux { |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| quat_mi2s_sd3_active: quat_mi2s_sd3_active { |
| mux { |
| pins = "gpio63"; |
| function = "qua_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| }; |
| }; |