Merge "msm: adsprpc: Variable map may UAF due to race conditions"
diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt
index 59c3356..9a9a6d0 100644
--- a/Documentation/devicetree/bindings/arm/coresight.txt
+++ b/Documentation/devicetree/bindings/arm/coresight.txt
@@ -154,6 +154,7 @@
* qcom,msr-fix-req: boolean, indicating if MSRs need to be programmed
after enabling the subunit.
+ * qcom,dump-enable: boolean, specifies to dump MCMB data.
* Optional properties for CTI:
* qcom,cti-gpio-trigin: cti trigger input driven by gpio.
diff --git a/Documentation/devicetree/bindings/arm/msm/rpmh-master-stat.txt b/Documentation/devicetree/bindings/arm/msm/rpmh-master-stat.txt
new file mode 100644
index 0000000..36e1a69
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/msm/rpmh-master-stat.txt
@@ -0,0 +1,18 @@
+* RPMH Master Stats
+
+Differet Subsystems maintains master data in SMEM.
+It tells about the individual masters information at any given
+time like "system sleep counts", "system sleep last entered at"
+and "system sleep accumulated duration" etc. These stats can be
+show to the user using the debugfs interface of the kernel.
+To achieve this, device tree node has been added.
+
+The required properties for rpmh-master-stats are:
+
+- compatible: "qcom,rpmh-master-stats".
+
+Example:
+
+qcom,rpmh-master-stats {
+ compatible = "qcom,rpmh-master-stats";
+};
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
index bdba526..7cfc44b 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt
@@ -13,6 +13,7 @@
* "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc)
* "android,firmware" for firmware image
* "android,vbmeta" for setting system properties for verified boot.
+ * "android,system" for system partition properties.
- clocks: One to three clocks may be required based on compatible.
* Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960"
* Core, iface, and bus clocks required for "qcom,scm"
diff --git a/Documentation/devicetree/bindings/gpu/adreno.txt b/Documentation/devicetree/bindings/gpu/adreno.txt
index 69174ca..cb38d5a 100644
--- a/Documentation/devicetree/bindings/gpu/adreno.txt
+++ b/Documentation/devicetree/bindings/gpu/adreno.txt
@@ -124,6 +124,12 @@
mask - mask for the relevant bits in the efuse register.
shift - number of bits to right shift to get the speed bin
value.
+- qcom,gpu-disable-fuse: GPU disable fuse
+ <offset mask shift>
+ offset - offset of the efuse register from the base.
+ mask - mask for the relevant bits in the efuse register.
+ shift - number of bits to right shift to get the disable_gpu
+ fuse bit value.
- qcom,highest-bank-bit:
Specify the bit of the highest DDR bank. This
is programmed into protected registers and also
@@ -191,6 +197,9 @@
- qcom,gpu-quirk-hfi-use-reg:
Use registers to replace DCVS HFI message to avoid GMU failure
to access system memory during IFPC
+- qcom,gpu-quirk-limit-uche-gbif-rw:
+ Limit number of read and write transactions from UCHE block to
+ GBIF to avoid possible deadlock between GBIF, SMMU and MEMNOC.
KGSL Memory Pools:
- qcom,gpu-mempools: Container for sets of GPU mempools.Multiple sets
diff --git a/Documentation/devicetree/bindings/input/touchscreen/synaptics_dsx_i2c.txt b/Documentation/devicetree/bindings/input/touchscreen/synaptics_dsx_i2c.txt
new file mode 100644
index 0000000..131942d
--- /dev/null
+++ b/Documentation/devicetree/bindings/input/touchscreen/synaptics_dsx_i2c.txt
@@ -0,0 +1,62 @@
+Synaptics DSXV27 touch controller
+
+Please add this description here: The Synaptics Touch controller is connected to the
+host processor via I2C. The controller generates interrupts when the user touches
+the panel. The host controller is expected to read the touch coordinates over I2C and
+pass the coordinates to the rest of the system.
+
+Required properties:
+
+ - compatible : should be "synaptics,dsx-i2c".
+ - reg : i2c slave address of the device.
+ - interrupt-parent : parent of interrupt.
+ - synaptics,irq-gpio : irq gpio.
+ - synaptics,reset-gpio : reset gpio.
+ - vdd_supply : digital voltage power supply needed to power device.
+ - avdd_supply : analog voltage power supply needed to power device.
+ - synaptics,pwr-reg-name : power reg name of digital voltage.
+ - synaptics,bus-reg-name : bus reg name of analog voltage.
+
+Optional property:
+ - synaptics,ub-i2c-addr : addr of ub-i2c.
+ - synaptics,irq-on-state : status of irq gpio.
+ - synaptics,cap-button-codes : virtual key code mappings to be used.
+ - synaptics,vir-button-codes : virtual key code and the response region on panel.
+ - synaptics,x-flip : modify orientation of the x axis.
+ - synaptics,y-flip : modify orientation of the y axis.
+ - synaptics,reset-delay-ms : reset delay for controller (ms), default 100.
+ - synaptics,power-delay-ms : power delay for controller (ms), default 100.
+ - synaptics,reset-active-ms : reset active time for controller (ms), default 20.
+ - synaptics,max-y-for-2d : maximal y value of the panel.
+ - clock-names : Clock names used for secure touch. They are: "iface_clk", "core_clk"
+ - clocks : Defined if 'clock-names' DT property is defined. These clocks
+ are associated with the underlying I2C bus.
+
+Example:
+ i2c@78b7000 {
+ status = "ok";
+ synaptics@4b {
+ compatible = "synaptics,dsx-i2c";
+ reg = <0x4b>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <65 0x2008>;
+ vdd_supply = <&pmtitanium_l17>;
+ avdd_supply = <&pmtitanium_l6>;
+ synaptics,pwr-reg-name = "vdd";
+ synaptics,bus-reg-name = "avdd";
+ synaptics,ub-i2c-addr = <0x2c>;
+ synaptics,irq-gpio = <&tlmm 65 0x2008>;
+ synaptics,reset-gpio = <&tlmm 99 0x2008>;
+ synaptics,irq-on-state = <0>;
+ synaptics,power-delay-ms = <200>;
+ synaptics,reset-delay-ms = <200>;
+ synaptics,reset-active-ms = <20>;
+ synaptics,max-y-for-2d = <1919>; /* remove if no virtual buttons */
+ synaptics,cap-button-codes = <139 172 158>;
+ synaptics,vir-button-codes = <139 180 2000 320 160 172 540 2000 320 160 158 900 2000 320 160>;
+ /* Underlying clocks used by secure touch */
+ clock-names = "iface_clk", "core_clk";
+ clocks = <&clock_gcc clk_gcc_blsp1_ahb_clk>,
+ <&clock_gcc clk_gcc_blsp1_qup3_i2c_apps_clk>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/leds/leds-qpnp-vibrator-ldo.txt b/Documentation/devicetree/bindings/leds/leds-qpnp-vibrator-ldo.txt
new file mode 100644
index 0000000..2865019
--- /dev/null
+++ b/Documentation/devicetree/bindings/leds/leds-qpnp-vibrator-ldo.txt
@@ -0,0 +1,50 @@
+Qualcomm Technologies, Inc. Vibrator-LDO
+
+QPNP (Qualcomm Technologies, Inc. Plug N Play) Vibrator-LDO is a peripheral
+on some QTI PMICs. It can be interfaced with the host processor via SPMI.
+
+Vibrator-LDO peripheral supports Eccentric Rotation Mass (ERM) vibrator.
+
+Properties:
+
+- compatible
+ Usage: required
+ Value type: <string>
+ Definition: "qcom,qpnp-vibrator-ldo".
+
+- reg
+ Usage: required
+ Value type: <u32>
+ Definition: Base address of vibrator-ldo peripheral.
+
+- qcom,vib-ldo-volt-uv
+ Usage: required
+ Value type: <u32>
+ Definition: The optimal voltage requirement of the vibrator motor for
+ a normal vibration. Value is specified in microvolts.
+
+- qcom,disable-overdrive
+ Usage: optional
+ Value type: <empty>
+ Definition: Do not apply overdrive voltage.
+
+- qcom,vib-overdrive-volt-uv
+ Usage: optional and not required if qcom,disable-overdrive present
+ Value type: <u32>
+ Definition: The voltage in microvolts used as overdrive factor for
+ improving motor reactivity at the start of vibration.
+ If this property not specified, a default value of
+ 2 times the value specified in qcom,vib-ldo-volt-uv
+ property is used.
+
+=======
+Example
+=======
+
+pmi632_vib: qcom,vibrator@5700 {
+ compatible = "qcom,qpnp-vibrator-ldo";
+ reg = <0x5700 0x100>;
+ qcom,vib-ldo-volt-uv = <1504000>;
+ qcom,disable-overdrive;
+ qcom,vib-overdrive-volt-uv = <3544000>;
+};
diff --git a/Documentation/devicetree/bindings/net/qcom,emac-dwc-eqos.txt b/Documentation/devicetree/bindings/net/qcom,emac-dwc-eqos.txt
index 8e56180..eff3d82 100644
--- a/Documentation/devicetree/bindings/net/qcom,emac-dwc-eqos.txt
+++ b/Documentation/devicetree/bindings/net/qcom,emac-dwc-eqos.txt
@@ -11,6 +11,16 @@
- interrupts: Interrupt number used by this controller
- io-macro-info: Internal io-macro-info
+Optional:
+- qcom,msm-bus,name: String representing the client-name
+- qcom,msm-bus,num-cases: Total number of usecases
+- qcom,msm-bus,num-paths: Total number of master-slave pairs
+- qcom,msm-bus,vectors-KBps: Arrays of unsigned integers representing:
+ master-id, slave-id, arbitrated bandwidth
+ in KBps, instantaneous bandwidth in KBps
+qcom,bus-vector-names: specifies string IDs for the corresponding bus vectors
+ in the same order as qcom,msm-bus,vectors-KBps property.
+
Internal io-macro-info:
- io-macro-bypass-mode: <0 or 1> internal or external delay configuration
- io-interface: <rgmii/mii/rmii> PHY interface used
@@ -35,6 +45,14 @@
"tx-ch4-intr", "rx-ch0-intr",
"rx-ch1-intr", "rx-ch2-intr",
"rx-ch3-intr";
+ qcom,msm-bus,name = "emac";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <98 512 1250 0>, <1 781 0 40000>, /* 10Mbps vote */
+ <98 512 12500 0>, <1 781 0 40000>, /* 100Mbps vote */
+ <98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */
+ qcom,bus-vector-names = "10", "100", "1000";
io-macro-info {
io-macro-bypass-mode = <0>;
io-interface = "rgmii";
diff --git a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
index abbc560..793a965 100644
--- a/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
+++ b/Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt
@@ -95,6 +95,7 @@
- qcom,qdsp6v56-1-10: Boolean- Present if the qdsp version is v56 1.10
- qcom,override-acc-1: Override the default ACC settings with this value if present.
- qcom,minidump-id: Unique id for each subsystem
+- qcom,reset-clk: Enable clock after MSS restart
One child node to represent the MBA image may be specified, when the MBA image
needs to be loaded in a specifically carved out memory region.
diff --git a/Documentation/devicetree/bindings/qdsp/msm-fastrpc.txt b/Documentation/devicetree/bindings/qdsp/msm-fastrpc.txt
index 0c5f696..fba7204 100644
--- a/Documentation/devicetree/bindings/qdsp/msm-fastrpc.txt
+++ b/Documentation/devicetree/bindings/qdsp/msm-fastrpc.txt
@@ -13,7 +13,7 @@
Optional properties:
- qcom,fastrpc-glink: Flag to use glink instead of smd for IPC
- qcom,rpc-latency-us: FastRPC QoS latency vote
-- qcom,adsp-remoteheap-vmid: FastRPC remote heap VMID number
+- qcom,adsp-remoteheap-vmid: FastRPC remote heap VMID list
Optional subnodes:
- qcom,msm_fastrpc_compute_cb : Child nodes representing the compute context
@@ -29,7 +29,7 @@
compatible = "qcom,msm-fastrpc-adsp";
qcom,fastrpc-glink;
qcom,rpc-latency-us = <2343>;
- qcom,adsp-remoteheap-vmid = <37>;
+ qcom,adsp-remoteheap-vmid = <22 37>;
qcom,msm_fastrpc_compute_cb_1 {
compatible = "qcom,msm-fastrpc-compute-cb";
diff --git a/Documentation/devicetree/bindings/regulator/cpr-regulator.txt b/Documentation/devicetree/bindings/regulator/cpr-regulator.txt
new file mode 100644
index 0000000..1c4dfbf
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/cpr-regulator.txt
@@ -0,0 +1,978 @@
+QTI CPR (Core Power Reduction) Regulator
+
+CPR regulator device is for QTI RBCPR (RapidBridge CPR) on
+ application processor core. It takes voltage corner level
+ as input and converts it to actual voltage based on the
+ suggestions from factory production process. When CPR is
+ enabled for application processer core, it will suggest
+ scaling the voltage up or down for best performance and
+ power of the core. The scaling based on factory production
+ process is called PVS (Process Voltage Scaling) with efuse
+ bits to indicate what bin (and voltage range) a chip is in.
+
+Required properties:
+- compatible: Must be "qcom,cpr-regulator"
+- reg: Register addresses for RBCPR, RBCPR clock
+ select, PVS and CPR eFuse address
+- reg-names: Register names. Must be "rbcpr" and "efuse_addr".
+ "rbcpr_clk" is optional.
+- regulator-name: A string used to describe the regulator
+- interrupts: Interrupt line from RBCPR to interrupt controller.
+- qcom,cpr-fuse-corners: Number of fuse corners present. Many other properties
+ are sized based upon this value.
+- regulator-min-microvolt: Minimum corner value which should be 1 to
+ represent the lowest supported corner.
+- regulator-max-microvolt: Maximum corner value which should be equal to
+ qcom,cpr-fuse-corners if consumers request fuse
+ corners or the length of qcom,cpr-corner-map if
+ consumers request virtual corners.
+- qcom,cpr-voltage-ceiling: Array of ceiling voltages in microvolts for fuse
+ corners ordered from lowest voltage corner to highest
+ voltage corner. This property must be of length
+ defined by qcom,cpr-fuse-corners.
+- qcom,cpr-voltage-floor: Array of floor voltages in microvolts for fuse
+ corners ordered from lowest voltage corner to highest
+ voltage corner. This property must be of length
+ defined by qcom,cpr-fuse-corners.
+- vdd-apc-supply: Regulator to supply VDD APC power
+- qcom,vdd-apc-step-up-limit: Limit of vdd-apc-supply steps for scaling up.
+- qcom,vdd-apc-step-down-limit: Limit of vdd-apc-supply steps for scaling down.
+- qcom,cpr-ref-clk: The reference clock in kHz.
+- qcom,cpr-timer-delay: The delay in microseconds for the timer interval.
+- qcom,cpr-timer-cons-up: Consecutive number of timer interval (qcom,cpr-timer-delay)
+ occurred before issuing UP interrupt.
+- qcom,cpr-timer-cons-down: Consecutive number of timer interval (qcom,cpr-timer-delay)
+ occurred before issuing DOWN interrupt.
+- qcom,cpr-irq-line: Internal interrupt route signal of RBCPR, one of 0, 1 or 2.
+- qcom,cpr-step-quotient: Defines the number of CPR quotient (i.e. Ring Oscillator(RO)
+ count) per vdd-apc-supply output voltage step. A single
+ integer value may be specified which is to be used for all
+ RO's. Alternatively, 8 integer values may be specified which
+ define the step quotients for RO0 to RO7 in order.
+- qcom,cpr-up-threshold: The threshold for CPR to issue interrupt when
+ error_steps is greater than it when stepping up.
+- qcom,cpr-down-threshold: The threshold for CPR to issue interrupt when
+ error_steps is greater than it when stepping down.
+- qcom,cpr-idle-clocks: Idle clock cycles RO can be in.
+- qcom,cpr-gcnt-time: The time for gate count in microseconds.
+- qcom,cpr-apc-volt-step: The voltage in microvolt per CPR step, such as 5000uV.
+- qcom,cpr-fuse-row: Array of row number of CPR fuse and method to read that row. It should have
+ index and value like this:
+ [0] => the fuse row number
+ [1] => fuse reading method, 0 for direct reading or 1 for SCM reading
+- qcom,cpr-fuse-target-quot: Array of bit positions in the primary CPR fuse row defined
+ by qcom,cpr-fuse-row for the target quotients of each
+ fuse corner. Each bit position corresponds to the LSB
+ of the quotient parameter. The elements in the array
+ are ordered from lowest voltage corner to highest voltage
+ corner. This property must be of length defined by
+ qcom,cpr-fuse-corners.
+- qcom,cpr-fuse-ro-sel: Array of bit positions in the primary CPR fuse row defined
+ by qcom,cpr-fuse-row for the ring oscillator selection for each
+ fuse corner. Each bit position corresponds to the LSB
+ of the RO select parameter. The elements in the array
+ are ordered from lowest voltage corner to highest voltage
+ corner. This property must be of length defined by
+ qcom,cpr-fuse-corners.
+
+Optional properties:
+- vdd-mx-supply: Regulator to supply memory power as dependency
+ of VDD APC.
+- qcom,vdd-mx-vmax: The maximum voltage in uV for vdd-mx-supply. This
+ is required when vdd-mx-supply is present.
+- qcom,vdd-mx-vmin-method: The method to determine the minimum voltage for
+ vdd-mx-supply, which can be one of following
+ choices compared with VDD APC:
+ 0 => equal to the voltage(vmin) of VDD APC
+ 1 => equal to PVS corner ceiling voltage
+ 2 => equal to slow speed corner ceiling
+ 3 => equal to qcom,vdd-mx-vmax
+ 4 => equal to VDD_APC fuse corner mapped vdd-mx voltage
+ 5 => equal to VDD_APC virtual corner mapped vdd-mx voltage
+ This is required when vdd-mx-supply is present.
+- qcom,vdd-mx-corner-map: Array of integers which defines the mapping from VDD_APC
+ voltage corners to vdd-mx-supply voltages.
+ Each element is a voltage to request from vdd-mx for the
+ corresponding fuse corner or virtual corner. The elements
+ in the array are ordered from lowest voltage corner
+ to highest voltage corner. The length of this property
+ depends on the value of qcom,vdd-mx-vmin-method property.
+ When qcom,vdd-mx-vmin-method property has a value of 4, the length
+ of this property must be equal to the value defined by qcom,cpr-fuse-corners.
+ When qcom,vdd-mx-vmin-method property has a value of 5, the length of
+ this property must be equal to the number of elements in the qcom,cpr-corner-map
+ property.
+- qcom,pvs-voltage-table: Array of N-tuples in which each tuple specifies the
+ initial voltage in microvolts of the PVS bin for each
+ fuse voltage corner. The location or 0-based index
+ of a tuple in the list corresponds to the PVS bin number.
+ Each tuple must be of length defined by qcom,cpr-fuse-corners.
+ A given cpr-regulator device must have either
+ qcom,pvs-voltage-table specified or
+ qcom,cpr-fuse-init-voltage (and its associated properties).
+- qcom,pvs-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+ compare with in order to decide if the redundant PVS fuse bits would be
+ used instead of the original bits and method to read fuse row, reading
+ register through SCM or directly. The 5 elements with index [0..4] are:
+ [0] => the fuse row number of the selector
+ [1] => LSB bit position of the bits
+ [2] => number of bits
+ [3] => the value to indicate redundant selection
+ [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
+ When the value of the fuse bits specified by first 3 elements equals to
+ the value in 4th element, redundant PVS fuse bits should be selected.
+ Otherwise, the original PVS bits should be selected. If the 5th
+ element is 0, read the fuse row from register directly. Otherwise,
+ read it through SCM.
+ This property is required if qcom,pvs-voltage-table is present.
+- qcom,pvs-fuse: Array of 4 elements to indicate the bits for PVS fuse and read method.
+ The array should have index and value like this:
+ [0] => the PVS fuse row number
+ [1] => LSB bit position of the bits
+ [2] => number of bits
+ [3] => fuse reading method, 0 for direct reading or 1 for SCM reading
+ This property is required if qcom,pvs-voltage-table is present.
+- qcom,pvs-fuse-redun: Array of 4 elements to indicate the bits for redundant PVS fuse.
+ The array should have index and value like this:
+ [0] => the redundant PVS fuse row number
+ [1] => LSB bit position of the bits
+ [2] => number of bits
+ [3] => fuse reading method, 0 for direct reading or 1 for SCM reading
+ This property is required if qcom,pvs-voltage-table is present.
+- qcom,cpr-fuse-redun-sel: Array of 5 elements to indicate where to read the bits, what value to
+ compare with in order to decide if the redundant CPR fuse bits would be
+ used instead of the original bits and method to read fuse row, using SCM
+ to read or read register directly. The 5 elements with index [0..4] are:
+ [0] => the fuse row number of the selector
+ [1] => LSB bit position of the bits
+ [2] => number of bits
+ [3] => the value to indicate redundant selection
+ [4] => fuse reading method, 0 for direct reading or 1 for SCM reading
+ When the value of the fuse bits specified by first 3 elements equals to
+ the value in 4th element, redundant CPR fuse bits should be selected.
+ Otherwise, the original CPR bits should be selected. If the 5th element
+ is 0, read the fuse row from register directly. Otherwise, read it through
+ SCM.
+- qcom,cpr-fuse-redun-row: Array of row number of redundant CPR fuse and method to read that
+ row. It should have index and value like this:
+ [0] => the redundant fuse row number
+ [1] => the value to indicate reading the fuse row directly or using SCM
+ This property is required if qcom,cpr-fuse-redun-sel is present.
+- qcom,cpr-fuse-redun-target-quot: Array of bit positions in the redundant CPR fuse row defined
+ by qcom,cpr-fuse-redun-row for the target quotients of each
+ fuse corner. Each bit position corresponds to the LSB
+ of the quotient parameter. The elements in the array
+ are ordered from lowest voltage corner to highest voltage corner.
+ This property must be of length defined by qcom,cpr-fuse-corners.
+ This property is required if qcom,cpr-fuse-redun-sel is present.
+- qcom,cpr-fuse-redun-ro-sel: Array of bit positions in the redundant CPR fuse row defined
+ by qcom,cpr-fuse-redun-row for the ring oscillator select of each
+ fuse corner. Each bit position corresponds to the LSB of the RO
+ select parameter. The elements in the array are ordered from
+ lowest voltage corner to highest voltage corner.
+ This property must be of length defined by qcom,cpr-fuse-corners.
+ This property is required if qcom,cpr-fuse-redun-sel is present.
+- qcom,cpr-fuse-redun-bp-cpr-disable: Redundant bit position of the bit to indicate if CPR should be disable
+- qcom,cpr-fuse-redun-bp-scheme: Redundant bit position of the bit to indicate if it's a global/local scheme
+ This property is required if cpr-fuse-redun-bp-cpr-disable
+ is present, and vise versa.
+- qcom,cpr-fuse-bp-cpr-disable: Bit position of the bit to indicate if CPR should be disabled
+- qcom,cpr-fuse-bp-scheme: Bit position of the bit to indicate if it's a global/local scheme
+- qcom,cpr-fuse-revision: Array of 4 integer elements which define the location of the bits for
+ the CPR fusing revision fuse parameter. The 4 elements are:
+ [0]: => the fuse row number of the bits
+ [1]: => LSB bit position of the bits
+ [2]: => the number of bits
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
+ The fusing revision value is used to determine which specific adjustments
+ are required on some chips.
+- qcom,cpr-fuse-target-quot-size: Array of target quotient parameter bit sizes in the primary
+ or redundant CPR fuse row for each fuse corner. The elements in the
+ array are ordered from lowest voltage corner to highest voltage corner.
+ If this property is not present, then all target quotient fuse values
+ are assumed to be the default length of 12 bits.
+- qcom,cpr-fuse-target-quot-scale: Array of doubles which defines the scaling coefficients to decode
+ the target quotients of each fuse corner. The first element in each
+ double represents the offset to add to the scaled quotient. The second
+ element represents the multiplier to scale the quotient by. For example,
+ given a tuple <A B>, quot_decoded = A + (B * quot_raw).
+ The doubles in the array are ordered from lowest voltage corner to highest
+ voltage corner. This property must contain a number of doubles equal to
+ the value of qcom,cpr-fuse-corners. If this property is not present,
+ then all target quotient parameters are assumed to have an offset of 0
+ and a multiplier of 1 (i.e. no decoding needed).
+- qcom,cpr-enable: Present: CPR enabled by default.
+ Not Present: CPR disable by default.
+- qcom,cpr-fuse-cond-min-volt-sel: Array of 5 elements to indicate where to read the bits, what value to
+ compare with in order to decide if the conditional minimum apc voltage needs
+ to be applied and the fuse reading method.
+ The 5 elements with index[0..4] are:
+ [0] => the fuse row number;
+ [1] => LSB bit position of the bits;
+ [2] => number of the bits;
+ [3] => the expected data to read;
+ [4] => fuse reading method, 0 for direct reading or 1 for SCM reading;
+ When the value of the fuse bits specified by first 3 elements is not equal to
+ the value in 4th element, then set the apc voltage for all parts running
+ at each voltage corner to be not lower than the voltage defined
+ using "qcom,cpr-cond-min-voltage".
+- qcom,cpr-cond-min-voltage: Minimum voltage in microvolts allowed for cpr-regulator output if the fuse bits
+ defined in qcom,cpr-fuse-cond-min-volt-sel have not been programmed with the
+ expected data. This is required if cpr-fuse-cond-min-volt-sel is present.
+- qcom,cpr-fuse-uplift-sel: Array of 5 elements to indicate where to read the bits, what value to
+ compare with in order to enable or disable the pvs voltage uplift workaround,
+ and the fuse reading method.
+ The 5 elements with index[0..4] are:
+ [0]: => the fuse row number of the selector;
+ [1]: => LSB bit position of the bits;
+ [2]: => number of the bits;
+ [3]: => the value to indicate if the apc pvs voltage uplift workaround will
+ be enabled;
+ [4]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
+ When the value of the fuse bits specified by first 3 elements equals to the
+ value in 4th element, the pvs voltage uplift workaround will be enabled.
+- qcom,speed-bin-fuse-sel: Array of 4 elements to indicate where to read the speed bin of the processor,
+ and the fuse reading method.
+ The 4 elements with index[0..3] are:
+ [0]: => the fuse row number of the selector;
+ [1]: => LSB bit position of the bits;
+ [2]: => number of the bits;
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
+ This is required if cpr-fuse-uplift-disable-sel is present.
+- qcom,cpr-uplift-voltage: Uplift in microvolts used for increasing pvs init voltage. If this property is present,
+ This is required if cpr-fuse-uplift-disable-sel is present.
+- qcom,cpr-uplift-max-volt: Maximum voltage in microvolts used for pvs voltage uplift workaround to limit
+ the maximum pvs voltage.
+ This is required if cpr-fuse-uplift-disable-sel is present.
+- qcom,cpr-uplift-quotient: Array of target quotient increments to add to the fused quotients of each
+ fuse corner as part of the PVS voltage uplift workaround.
+ The elements in the array are ordered from lowest voltage
+ corner to highest voltage corner. This property must be of
+ length defined by qcom,cpr-fuse-corners. This is required
+ if cpr-fuse-uplift-disable-sel is present.
+- qcom,cpr-uplift-speed-bin: The speed bin value corresponding to one type of processor which needs to apply the
+ pvs voltage uplift workaround.
+ This is required if cpr-fuse-uplift-disable-sel is present.
+- qcom,cpr-fuse-version-map: Array of integer tuples which each match to a given combination of CPR
+ fuse parameter values. Each tuple consists of N + 3 elements. Where
+ N is the number of fuse corners defined by the qcom,cpr-fuse-corners
+ property. The elements in one tuple are:
+ [0]: => the speed bin of the CPU
+ [1]: => the PVS version of the CPU
+ [2]: => the CPR fuse revision
+ [3 - N+2]: => the ring oscillator select value of each fuse corner
+ ordered from lowest to highest
+ Any element in a tuple may use the value 0xffffffff as a wildcard
+ which will match against any fuse parameter value. The first tuple
+ that matches against the fuse values read from hardware will be used.
+ This property is used by several properties to provide an index into
+ their lists.
+- qcom,cpr-allowed: Integer values that specifies whether the closed loop CPR is allowed or
+ not for a particular fuse revision. If the qcom,cpr-fuse-version-map
+ property is specified, then qcom,cpr-allowed must contain the same number
+ of integers as that of the number of tuples in qcom,cpr-fuse-version-map.
+ If the integer value has a value 0 for a particular fuse revision, then it
+ is treated as if the closed loop operation is disabled in the fuse. If the
+ integer value has a value 1 for a particular fuse revision, then the closed
+ loop operation is enabled for that fuse revision. If nothing is specified
+ for a particular fuse revision, then the closed loop operation is enabled
+ for that fuse revision by default.
+- qcom,cpr-quotient-adjustment: Array of integer tuples of target quotient adjustments to add to the fused
+ quotients of each fuse corner. The elements in a tuple are ordered from
+ lowest voltage corner to highest voltage corner. Each tuple must be of
+ length defined by qcom,cpr-fuse-corners. If the qcom,cpr-fuse-version-map
+ property is specified, then qcom,cpr-quotient-adjustment must contain the
+ same number of tuples as qcom,cpr-fuse-version-map. These tuples are then
+ mapped one-to-one in the order specified. E.g. if the second
+ qcom,cpr-fuse-version-map tuple matches for a given device, then the quotient
+ adjustments defined in the second qcom,cpr-quotient-adjustment tuple will
+ be applied. If the qcom,cpr-fuse-version-map property is not specified,
+ then qcom,cpr-quotient-adjustment must contain a single tuple which is then
+ applied unconditionally. If this property is specified, then the quotient
+ adjustment values are added to the target quotient values read from fuses
+ before writing them into the CPR GCNT target control registers.
+ This property can be used to add or subtract static voltage margin from the
+ regulator managed by the CPR controller.
+- qcom,cpr-init-voltage-adjustment: Array of integer tuples of initial voltage adjustments in microvolts to
+ add to the fused initial voltage values of each fuse corner. The elements
+ in a tuple are ordered from lowest voltage corner to highest voltage corner.
+ Each tuple must be of the length defined by qcom,cpr-fuse-corners. If the
+ qcom,cpr-fuse-version-map property is specified, then
+ qcom,cpr-init-voltage-adjustment must contain the same number of tuples as
+ qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
+ order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
+ for a given device, then the initial voltage adjustments defined in the
+ second qcom,cpr-init-voltage-adjustment tuple will be applied. If the
+ qcom,cpr-fuse-version-map property is not specified, then
+ qcom,cpr-init-voltage-adjustment must contain a single tuple which is then
+ applied unconditionally. This property can be used to add or subtract
+ static initial voltage margin from the regulator managed by the CPR
+ controller.
+- qcom,cpr-quot-offset-adjustment: Array of integer tuples of target quotient offset adjustments to add
+ to the fused quotient offsets of each fuse corner. The elements in a tuple
+ are ordered from lowest voltage corner to highest voltage corner. Each tuple
+ must be of length defined by qcom,cpr-fuse-corners. If the qcom,cpr-fuse-version-map
+ property is specified, then qcom,cpr-quot-offset-adjustment must contain the
+ same number of tuples as qcom,cpr-fuse-version-map. These tuples are then
+ mapped one-to-one in the order specified. E.g. if the second
+ qcom,cpr-fuse-version-map tuple matches for a given device, then the quotient
+ offset adjustments defined in the second qcom,cpr-quot-offset-adjustment tuple
+ will be applied. If the qcom,cpr-fuse-version-map property is not specified,
+ then qcom,cpr-quot-offset-adjustment must contain a single tuple which is then
+ applied unconditionally. If this property is specified, then the quotient
+ offset adjustment values are added to the target quotient offset values read
+ from fuses.
+ This property can be used to add or subtract static quotient offset margin from
+ the regulator managed by the CPR controller.
+- qcom,cpr-clamp-timer-interval: The number of 64 reference clock cycle blocks to delay for whenever
+ the clamp signal, sensor mask registers or sensor bypass registers
+ change. The CPR controller loop is disabled during this delay.
+ Supported values are 0 to 255. If this property is not specified,
+ then a value of 0 is assumed. Note that if this property has a
+ value greater than 0, then software cannot accurately determine the
+ error_steps value that corresponds to a given CPR measurement
+ unless processor power collapsing is disabled. If this property
+ has a value of 0, then the CPR controller loop is not disabled and
+ re-enabled while idle if the clamp signal changes. Instead, it
+ will remain idle until software issues an ACK or NACK command.
+ This ensures that software can read the error_steps value which
+ resulted in the CPR up or down interrupt. Setting this property to
+ a value greater than 0 is useful for resetting the CPR sensors of a
+ processor that uses BHS type voltage switches in order to avoid
+ anomalous CPR up interrupts when exiting from power collapse.
+- vdd-apc-optional-prim-supply: Present: Regulator of highest priority to supply VDD APC power
+ Not Present: No such regulator.
+- vdd-apc-optional-sec-supply: Present: Regulator of second highest priority to supply VDD APC power.
+ Not Present: No such regulator.
+- qcom,cpr-speed-bin-max-corners: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version to
+ the maximum virtual voltage corner corresponding to each fuse corner. The value N
+ corresponds to the number of fuse corners specified by qcom,cpr-fuse-corners.
+ The elements in one tuple are:
+ [0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
+ wildcard to match any speed bin values.
+ [1]: => the PVS version of the CPU. It may use the value 0xffffffff as
+ a wildcard to match any PVS version values.
+ [2 - N+1]: => the max virtual voltage corner value corresponding to each fuse corner
+ for this speed bin, ordered from lowest voltage corner to highest
+ voltage corner.
+ No CPR target quotient scaling is applied on chips which have a speed bin + PVS version
+ pair that does not appear in one of the tuples in this property. If the property is
+ specified, then quotient scaling is enabled for the highest voltage corner. If this property is
+ not specified, then no quotient scaling can take place.
+- qcom,cpr-corner-map: Array of elements of fuse corner value for each virtual corner.
+ The location or 1-based index of an element in the list corresponds to
+ the virtual corner value. For example, the first element in the list is the fuse corner
+ value that virtual corner 1 maps to.
+ This property is required if qcom,cpr-speed-bin-max-corners is present.
+- qcom,cpr-corner-frequency-map: Array of tuples in which a tuple describes a corner to application processor frequency
+ mapping.
+ The 2 elements in one tuple are:
+ [0]: => a virtual voltage corner.
+ [1]: => the application processor frequency in Hz corresponding to the virtual corner.
+ This property is required if qcom,cpr-speed-bin-max-corners is present.
+- qcom,pvs-version-fuse-sel: Array of 4 elements to indicate where to read the pvs version of the processor,
+ and the fuse reading method.
+ The 4 elements with index[0..3] are:
+ [0]: => the fuse row number of the selector;
+ [1]: => LSB bit position of the bits;
+ [2]: => the number of bits;
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading.
+- qcom,cpr-voltage-ceiling-override: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version
+ to the ceiling voltage to apply for each virtual voltage corner. The value N
+ corresponds to the number of virtual corners as specified by the number of elements
+ in the qcom,cpr-corner-map property.
+ The elements in one tuple are:
+ [0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
+ wildcard to match any speed bin values.
+ [1]: => the PVS version of the CPU. It may use the value 0xffffffff as a
+ wildcard to match any PVS version values.
+ [2 - N+1]: => the ceiling voltage value in microvolts corresponding to each virtual
+ corner for this speed bin, ordered from lowest voltage corner to
+ highest voltage corner.
+ No ceiling override is applied on chips which have a speed bin + PVS version
+ pair that does not appear in one of the tuples in this property. If the property is
+ specified and the speed bin + PVS version matches, then the per-virtual-corner ceiling
+ voltages will be used in place of the per-fuse-corner ceiling voltages defined in the
+ qcom,cpr-voltage-ceiling property. If this property is not specified, then the
+ per-fuse-corner ceiling voltages will always be used.
+- qcom,cpr-voltage-floor-override: Array of (N+2)-tuples in which each tuple maps a CPU speed bin and PVS version
+ to the floor voltage to apply for each virtual voltage corner. The value N
+ corresponds to the number of virtual corners as specified by the number of elements
+ in the qcom,cpr-corner-map property.
+ The elements in one tuple are:
+ [0]: => the speed bin of the CPU. It may use the value 0xffffffff as a
+ wildcard to match any speed bin values.
+ [1]: => the PVS version of the CPU. It may use the value 0xffffffff as a
+ wildcard to match any PVS version values.
+ [2 - N+1]: => the floor voltage value in microvolts corresponding to each virtual
+ corner for this speed bin, ordered from lowest voltage corner to
+ highest voltage corner.
+ No floor override is applied on chips which have a speed bin + PVS version
+ pair that does not appear in one of the tuples in this property. If the property is
+ specified and the speed bin + PVS version matches, then the per-virtual-corner floor
+ voltages will be used in place of the per-fuse-corner floor voltages defined in the
+ qcom,cpr-voltage-floor property. If this property is not specified, then the
+ per-fuse-corner floor voltages will always be used.
+- qcom,cpr-floor-to-ceiling-max-range: Array of integer tuples of floor-to-ceiling max range values in microvolts
+ to be subtracted from the ceiling voltage values of each virtual corner.
+ Supported values are those greater than or equal 0, or (-1). The value 0 for a corner
+ implies that the floor value for that corner has to equal to its ceiling value.
+ The value (-1) for a corner implies that no modification to the default floor voltage
+ is required. The elements in a tuple are ordered from lowest voltage corner to highest
+ voltage corner. Each tuple must be of the length equal to the number of virtual corners
+ as specified by the number of elements in the qcom,cpr-corner-map property. If the
+ qcom,cpr-fuse-version-map property is specified, then
+ qcom,cpr-dynamic-floor-override-adjustment must contain the same number of
+ tuples as qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
+ order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
+ for a given device, then voltage adjustments defined in the second
+ qcom,cpr-dynamic-floor-override-adjustment tuple will be applied. If the
+ qcom,cpr-fuse-version-map property is not specified, then
+ qcom,cpr-dynamic-floor-override-adjustment must contain a single tuple which
+ is then applied unconditionally.
+- qcom,cpr-virtual-corner-init-voltage-adjustment: Array of integer tuples of voltage adjustments in microvolts to be
+ added to the initial voltage values of each virtual corner. The elements
+ in a tuple are ordered from lowest voltage corner to highest voltage corner.
+ Each tuple must be of the length equal to the number of virtual corners as
+ specified by the number of elements in the qcom,cpr-corner-map property. If the
+ qcom,cpr-fuse-version-map property is specified, then
+ qcom,cpr-virtual-corner-init-voltage-adjustment must contain the same number of
+ tuples as qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
+ order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
+ for a given device, then voltage adjustments defined in the second
+ qcom,cpr-virtual-corner-init-voltage-adjustment tuple will be applied. If the
+ qcom,cpr-fuse-version-map property is not specified, then
+ qcom,cpr-virtual-corner-init-voltage-adjustment must contain a single tuple which
+ is then applied unconditionally.
+- qcom,cpr-virtual-corner-quotient-adjustment: Array of integer tuples of quotient offsets to be added to
+ the scaled target quotient of each virtual corner. The elements
+ in a tuple are ordered from lowest voltage corner to highest voltage corner.
+ Each tuple must be of the length equal to the number of virtual corners as
+ specified by the number of elements in the qcom,cpr-corner-map property.
+ If the qcom,cpr-fuse-version-map property is specified, then
+ qcom,cpr-virtual-corner-quotient-adjustment must contain the same number of tuples as
+ qcom,cpr-fuse-version-map. These tuples are then mapped one-to-one in the
+ order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
+ for a given device, then quotient adjustments defined in the second
+ qcom,cpr-virtual-corner-quotient-adjustment tuple will be applied. If the
+ qcom,cpr-fuse-version-map property is not specified, then
+ qcom,cpr-virtual-corner-quotient-adjustment must contain a single tuple which is then
+ applied unconditionally.
+- qcom,cpr-cpus: Array of CPU phandles which correspond to the cores that this cpr-regulator
+ device must monitor when adjusting the voltage and/or target quotient based
+ upon the number of online cores or make sure that one of them must be online
+ when performing de-aging measurements. This property must be specified in order to
+ utilize the qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment or
+ qcom,cpr-online-cpu-virtual-corner-quotient-adjustment or qcom,cpr-aging-sensor-id properties.
+- qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment: Array of tuples where each tuple specifies
+ the voltage adjustment for each corner. These adjustments apply to the
+ initial voltage of each corner. The size of each tuple must be equal
+ to qcom,cpr-fuse-corners if consumers request fuse corners or the length of
+ qcom,cpr-corner-map if consumers request virtual corners. In each tuple, the
+ value corresponds to the voltage adjustment when running at that corner at
+ init, from lowest to highest. The tuples must be organized into 1 group if
+ qcom,cpr-fuse-version-map is not specified or the same number of groups as
+ the number of tuples in qcom,cpr-fuse-version-map. The i-th group of tuples
+ corresponds to the voltage adjustments for i-th fuse version map tuple. In
+ each group, there are 1 plus length of qcom,cpr-cpus tuples, each tuple
+ corresponds to the number of cores online, from 0 to the number of elements
+ in qcom,cpr-cpus.
+- qcom,cpr-online-cpu-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a
+ given virtual corner may be reduced to the per number of cores online,
+ per-virtual corner ceiling voltage value. This property takes precedence
+ over qcom,cpr-scaled-init-voltage-as-ceiling if both are specified.
+- qcom,cpr-online-cpu-virtual-corner-quotient-adjustment: Array of tuples where each tuple specifies
+ the quotient adjustment for each corner. These adjustments will be applied
+ to each corner at run time. The size of each tuple must be equal to
+ qcom,cpr-fuse-corners if consumers request fuse corners or the length of
+ qcom,cpr-corner-map if consumers request virtual corners. In each tuple,
+ the value corresponds to the quotient adjustment when running at that corner,
+ from lowest to highest. The tuples must be organized into 1 group if
+ qcom,cpr-fuse-version-map is not specified or the same number of groups
+ as the number of tuples in qcom,cpr-fuse-version-map. The i-th group of
+ tuples corresponds to the quotient adjustments for i-th fuse version map
+ tuple. In each group, there are 1 plus length of qcom,cpr-cpus tuples,
+ each tuple corresponds to the number of cores online, from 0 to the
+ number of elements in qcom,cpr-cpus.
+- qcom,cpr-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a given virtual
+ corner may be reduced to the per-fuse-corner initial voltage fuse value.
+- qcom,cpr-scaled-init-voltage-as-ceiling: Boolean which indicates that the ceiling voltage used for a given
+ virtual corner may be reduced to the interpolated, per-virtual-corner initial
+ voltage value. Note that if both qcom,cpr-init-voltage-as-ceiling and
+ qcom,cpr-scaled-init-voltage-as-ceiling are specified, then
+ qcom,cpr-scaled-init-voltage-as-ceiling will take precedence since the interpolated
+ voltages are necessarily less than or equal to the fused initial voltage values.
+- qcom,cpr-voltage-scaling-factor-max: Array of values which define the maximum allowed scaling factor to apply
+ when calculating per-corner initial voltage values for each fuse corner. The
+ array must be of length equal to the value of the qcom,cpr-fuse-corners property.
+ Each element in the array maps to the fuse corners in increasing order.
+ The elements have units of uV/MHz. Each element corresponds to 'max_factor' in
+ the following equation:
+ init_voltage_min(f) = fuse_init_voltage(f) - (fuse_f_max - f) * max_factor
+ If this property is not specified, then the initial voltage for each virtual
+ corner will be set to the initial voltage of the associated fuse corner.
+- qcom,cpr-quot-adjust-scaling-factor-max: Array of values which define the maximum allowed scaling factor to
+ apply when calculating per-virtual-corner target quotients for each fuse
+ corner. Two data formats are allowed for this property. The primary one
+ requires that the array be of length equal to the value of the
+ qcom,cpr-fuse-corners property. When using this format, each element in the
+ array maps to the fuse corners in increasing order. The second depreciated
+ format allows for only a single element to be specified which defines the
+ maximum scaling factor for the highest fuse corner. In this case, a value of
+ 0 is assumed for the lower fuse corners. The elements of this property have
+ units of QUOT/GHz. Each element corresponds to 'max_factor' in the following
+ equation:
+ quot_min(f) = fuse_quot(f) - (fuse_f_max - f) * max_factor / 1000
+ where f and fuse_f_max have units of MHz.
+ This property is required if qcom,cpr-speed-bin-max-corners is present.
+- qcom,cpr-fuse-init-voltage: Array of quadruples in which each quadruple specifies a fuse location to
+ read in order to get an initial voltage for a fuse corner. The fuse values
+ are encoded as voltage steps higher or lower than the voltages defined in
+ qcom,cpr-voltage-ceiling. Each step corresponds to the voltage defined by
+ the qcom,cpr-init-voltage-step property.
+ The 4 elements in one quadruple are:
+ [0]: => the fuse row number of the bits
+ [1]: => LSB bit position of the bits
+ [2]: => number of the bits
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
+ The quadruples are ordered from the lowest voltage fuse corner to the
+ highest voltage fuse corner.
+ A given cpr-regulator device must have either qcom,cpr-fuse-init-voltage
+ specified or qcom,pvs-voltage-table (and its associated properties).
+- qcom,cpr-fuse-redun-init-voltage: Array of quadruples in which each quadruple specifies a fuse location
+ to read in order to get the redundant initial voltage for a fuse corner.
+ This property is the same as qcom,cpr-fuse-init-voltage except that it is
+ only utilized if a chip is configured to use the redundant set of fuse
+ values. This property is required if qcom,cpr-fuse-redun-sel and
+ qcom,cpr-fuse-init-voltage are specified.
+- qcom,cpr-init-voltage-ref: Array of reference voltages in microvolts used when decoding the initial
+ voltage fuse values. The elements in the array are ordered from lowest
+ voltage corner to highest voltage corner. This property must be of length
+ defined by qcom,cpr-fuse-corners.
+ This property is required if qcom,cpr-fuse-init-voltage is present.
+- qcom,cpr-init-voltage-step: The voltage step size in microvolts of the CPR initial voltage fuses described by the
+ qcom,cpr-fuse-init-voltage property.
+ This property is required if qcom,cpr-fuse-init-voltage is present.
+- mem-acc-supply: Regulator to vote for the memory accelerator configuration.
+ Not Present: memory accelerator configuration not supported.
+- qcom,mem-acc-corner-map: Array of integer which defines the mapping from mem-acc corner value for each
+ virtual corner. Each element is a mem-acc state for the corresponding virtual corner.
+ The elements in the array are ordered from lowest voltage corner to highest voltage corner.
+- qcom,fuse-remap-source: Array of quadruples in which each quadruple specifies a fuse location to
+ remap. The 4 elements in one quadruple are:
+ [0]: => the fuse row number of the bits
+ [1]: => LSB bit position of the bits
+ [2]: => the number of bits
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
+ The fuse bits for all quadruples are packed together in the order specified
+ into 64-bit virtual fuse rows beginning at the row number defined in the
+ qcom,fuse-remap-base-row property. The remapped rows may be used by any
+ other properties.
+ Example:
+ qcom,fuse-remap-base-row = <1000>;
+ qcom,fuse-remap-source =
+ <13 57 2 0>,
+ <14 30 3 0>,
+ <20 1 7 0>,
+ <40 47 120 0>;
+
+ This results in the following bit remapping:
+
+ Row Bits Remap Row Remap Bits
+ 13 57..58 --> 1000 0..1
+ 14 30..32 --> 1000 2..4
+ 20 1..7 --> 1000 5..11
+ 40 47..63 --> 1000 12..28
+ 41 0..34 --> 1000 29..63
+ 41 35..63 --> 1001 0..28
+ 42 0..34 --> 1001 29..63
+ 42 35..38 --> 1002 0..3
+
+ A tuple like this could then be used to reference some of the
+ concatenated bits from rows 13, 14, and 20:
+
+ qcom,cpr-fuse-init-voltage = <1000 0 6 0>;
+- qcom,fuse-remap-base-row: Integer which defines the virtual row number to use as a base when remapping
+ fuse bits. The remap base row number can be any value as long as it is
+ greater than all of the real row numbers addressed in other properties of
+ the cpr-regulator device node. This property is required if
+ qcom,fuse-remap-source is specified.
+- qcom,cpr-quot-min-diff: Integer which defines the minimum target-quotient difference between
+ the highest and (highest - 1) fuse corner to keep CPR enabled. If this
+ property is not specified a default value of 50 is used.
+- qcom,cpr-fuse-quot-offset: Array of quadruples in which each quadruple specifies a fuse location to
+ read in order to get the quotient offset for a fuse corner. The fuse values
+ are encoded as the difference between quotients of that fuse corner and its
+ adjacent lower fuse corner divided by an unpacking multiplier value defined
+ under qcom,cpr-fuse-quot-offset-scale property.
+ The 4 elements in one quadruple are:
+ [0]: => the fuse row number of the bits
+ [1]: => LSB bit position of the bits
+ [2]: => number of the bits
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
+ The quadruples are ordered from the lowest fuse corner to the highest
+ fuse corner.
+ Quotient offset read from the fuse locations above can be overridden with
+ the property qcom,cpr-quot-adjust-scaling-factor-max.
+- qcom,cpr-fuse-quot-offset-scale: Array of integer values which defines the multipliers to decode the quotient offsets
+ of each fuse corner. The elements in the array are ordered from the lowest voltage fuse corner
+ to the highest voltage fuse corner. If this property is not present, then all target quotient
+ parameters are assumed to have a multiplier of 1 (i.e. no decoding needed).
+- qcom,cpr-redun-fuse-quot-offset: Array of quadruples in which each quadruple specifies a fuse location to
+ read in order to get the redundant quotient offset for a fuse corner. This
+ property is the same as qcom,cpr-fuse-quot-offset except that it is only
+ utilized if a chip is configured to use the redundant set of fuse values.
+- qcom,cpr-fuse-min-quot-diff: Array of values which define the minimum difference allowed between the adjusted
+ quotients of the fuse corners. The length of the array should be equal to the value
+ of the qcom,cpr-fuse-corners property. Where each element in the array maps to the
+ fuse corners in increasing order.
+- qcom,cpr-min-quot-diff-adjustment: Array of integer tuples of target quotient offsets to be added to
+ the adjusted target quotients of each fuse corner. When the quotient difference
+ between two adjacent fuse corners is insufficient, the quotient for the higher fuse corner is
+ replaced with that of the lower fuse corner plus the adjustment value.
+ The elements in a tuple are ordered from lowest voltage corner to highest voltage corner.
+ Each tuple must be of the length defined by qcom,cpr-fuse-corners.
+ If the qcom,cpr-fuse-version-map property is specified, then qcom,cpr-min-quot-diff-adjustment
+ must contain the same number of tuples as qcom,cpr-fuse-version-map. These tuples are then mapped
+ one-to-one in the order specified. E.g. if the second qcom,cpr-fuse-version-map tuple matches
+ for a given device, then the quotient adjustments defined in the
+ second qcom,cpr-min-quot-diff-adjustment tuple will be applied. If the
+ qcom,cpr-fuse-version-map property is not specified, then
+ qcom,cpr-min-quot-diff-adjustment must contain a single tuple which is then
+ applied unconditionally. The qcom,cpr-min-quot-diff-adjustment property must be specified
+ if the qcom,cpr-fuse-min-quot-diff property is specified.
+- qcom,cpr-skip-voltage-change-during-suspend: Boolean property which indicates that the CPR voltage
+ should not be adjusted based upon the number of online cores while
+ entering or exiting system suspend.
+- rpm-apc-supply: Regulator to notify RPM of the APC operating
+ corner
+- qcom,rpm-apc-corner-map: Array of integers which define the mapping of
+ the RPM corner to the corresponding APC virtual
+ corner. This property must be defined if
+ 'rpm-apc-supply' is present.
+- qcom,vsens-corner-map: Array of integers which define the mapping of the VSENS corner to the
+ corresponding APC fuse corner. The qcom,vsens-corner-map and
+ vdd-vsense-corner-supply properties must both be specified for a given
+ cpr-regulator device or neither must be specified.
+- vdd-vsens-corner-supply: Regulator to specify the current operating fuse corner to the Voltage Sensor.
+- vdd-vsens-voltage-supply: Regulator to specify the corner floor/ceiling voltages to the Voltage Sensor.
+- qcom,cpr-aging-sensor-id: Array of CPR sensor IDs to be used in the CPR de-aging algorithm. The number
+ of values should be equal to number of sensors selected for age calibration.
+ If this property is not specified, then the de-aging procedure is not enabled.
+- qcom,cpr-de-aging-allowed: Integer values that specify whether the CPR de-aging procedure is allowed or
+ not for a particular fuse revision. If the qcom,cpr-fuse-version-map
+ property is specified, then qcom,cpr-de-aging-allowed must contain the same number
+ of elements as there are tuples in qcom,cpr-fuse-version-map. If qcom,cpr-fuse-version-map
+ is not specified, then qcom,cpr-de-aging-allowed must contain a single value that
+ is used unconditionally. An element value of 1 means that the CPR de-aging procedure
+ can be performed for parts with the corresponding fuse revision. An element value of 0
+ means that CPR de-aging cannot be performed.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-aging-ref-corner: The vdd-apc-supply reference virtual voltage corner to be set during the CPR de-aging
+ measurements. This corner value is needed to set appropriate voltage on
+ the dependent voltage rails such as vdd-mx and mem-acc.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-aging-ref-voltage: The vdd-apc-supply reference voltage in microvolts to be set during the
+ CPR de-aging measurements.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-max-aging-margin: The maximum allowed aging voltage margin in microvolts. This is used to limit
+ the calculated aging voltage margin.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-non-collapsible-sensors: Array of CPR sensor IDs which are in non-collapsible domain. The sensor IDs not
+ specified in the array should be bypassed for the de-aging procedure. The number of
+ elements should be less than or equal to 32. The values of the array elements should
+ be greater than or equal to 0 and less than or equal to 31.
+ This property is required for power-domains with bypass mux present in HW.
+ This property can be required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-aging-ro-scaling-factor: The aging ring oscillator (RO) scaling factor with units of QUOT/V.
+ This value is used for calculating a voltage margin from RO measurements.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-ro-scaling-factor: Array of scaling factors with units of QUOT/V for each ring oscillator ordered
+ from the lowest to the highest RO. These values are used to calculate
+ the aging voltage margin adjustment for all of the ROs. Since CPR2 supports
+ exactly 8 ROs, the array must contain 8 elements corresponding to RO0 through RO7 in order.
+ If a given RO is unused for a fuse corner, then its scaling factor may be specified as 0.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-aging-derate: Array of scaling factors which define the amount of derating to apply to the reference
+ aging voltage margin adjustment for each of the fuse corners. Each element has units
+ of uV/mV. This property must be of length defined by qcom,cpr-fuse-corners.
+ The elements are ordered from the lowest to the highest fuse corner.
+ This property is required if the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-fuse-aging-init-quot-diff: Array of quadruples in which each quadruple specifies a fuse location to read in
+ order to get an initial quotient difference. The difference between quot min and quot max
+ is fused as the initial quotient difference.
+ The 4 elements in one quadruple are:
+ [0]: => the fuse row number of the bits
+ [1]: => LSB bit position of the bits
+ [2]: => number of the bits
+ [3]: => fuse reading method, 0 for direct reading or 1 for SCM reading
+ The number of quadruples should be equal to the number of values specified in
+ the qcom,cpr-aging-sensor-id property. This property is required if
+ the qcom,cpr-aging-sensor-id property has been specified.
+- qcom,cpr-thermal-sensor-id: TSENS hardware sensor-id of the sensor which
+ needs to be monitored.
+- qcom,cpr-disable-temp-threshold: The TSENS temperature threshold in degrees Celsius at which CPR
+ closed-loop is disabled. CPR closed-loop will stay disabled as long as the
+ temperature is below this threshold. This property is required
+ only if 'qcom,cpr-thermal-sensor-id' is present.
+- qcom,cpr-enable-temp-threshold: The TSENS temperature threshold in degrees Celsius at which CPR
+ closed-loop is enabled. CPR closed-loop will stay enabled above this
+ temperature threshold. This property is required only if
+ 'qcom,cpr-thermal-sensor-id' is present.
+- qcom,disable-closed-loop-in-pc: Bool property to disable closed-loop CPR during
+ power-collapse. This can be enabled only for single core
+ designs. The property 'qcom,cpr-cpus' is required to enable this logic.
+Example:
+ apc_vreg_corner: regulator@f9018000 {
+ status = "okay";
+ compatible = "qcom,cpr-regulator";
+ reg = <0xf9018000 0x1000>, <0xfc4b8000 0x1000>;
+ reg-names = "rbcpr", "efuse_addr";
+ interrupts = <0 15 0>;
+ regulator-name = "apc_corner";
+ qcom,cpr-fuse-corners = <3>;
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <12>;
+
+ qcom,pvs-fuse = <22 6 5 1>;
+ qcom,pvs-fuse-redun-sel = <22 24 3 2 1>;
+ qcom,pvs-fuse-redun = <22 27 5 1>;
+
+ qcom,pvs-voltage-table =
+ <1050000 1150000 1350000>,
+ <1050000 1150000 1340000>,
+ <1050000 1150000 1330000>,
+ <1050000 1150000 1320000>,
+ <1050000 1150000 1310000>,
+ <1050000 1150000 1300000>,
+ <1050000 1150000 1290000>,
+ <1050000 1150000 1280000>,
+ <1050000 1150000 1270000>,
+ <1050000 1140000 1260000>,
+ <1050000 1130000 1250000>,
+ <1050000 1120000 1240000>,
+ <1050000 1110000 1230000>,
+ <1050000 1100000 1220000>,
+ <1050000 1090000 1210000>,
+ <1050000 1080000 1200000>,
+ <1050000 1070000 1190000>,
+ <1050000 1060000 1180000>,
+ <1050000 1050000 1170000>,
+ <1050000 1050000 1160000>,
+ <1050000 1050000 1150000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>,
+ <1050000 1050000 1140000>;
+ qcom,cpr-voltage-ceiling = <1050000 1150000 1280000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1100000>;
+ vdd-apc-supply = <&pm8226_s2>;
+ vdd-apc-optional-prim-supply = <&ncp6335d>;
+ vdd-apc-optional-sec-supply = <&fan53555>;
+ vdd-mx-supply = <&pm8226_l3_ao>;
+ qcom,vdd-mx-vmax = <1350000>;
+ qcom,vdd-mx-vmin-method = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <1>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <15>;
+ qcom,cpr-up-threshold = <1>;
+ qcom,cpr-down-threshold = <2>;
+ qcom,cpr-idle-clocks = <5>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,cpr-clamp-timer-interval = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
+
+ qcom,vsens-corner-map = <1 2 2>;
+ vdd-vsens-corner-supply = <&vsens_apc0_corner>;
+ vdd-vsens-voltage-supply = <&vsens_apc0_voltage>;
+
+ rpm-apc-supply = <&rpm_apc_vreg>;
+ qcom,rpm-apc-corner-map = <4 4 5 5 7 7 7 7 7 7 7 7>;
+
+ qcom,cpr-fuse-row = <138 1>;
+ qcom,cpr-fuse-bp-cpr-disable = <36>;
+ qcom,cpr-fuse-bp-scheme = <37>;
+ qcom,cpr-fuse-target-quot = <24 12 0>;
+ qcom,cpr-fuse-target-quot-size = <12 12 12>;
+ qcom,cpr-fuse-ro-sel = <54 38 41>;
+ qcom,cpr-fuse-revision = <140 26 2 0>;
+ qcom,cpr-fuse-redun-sel = <138 57 1 1 1>;
+ qcom,cpr-fuse-redun-row = <139 1>;
+ qcom,cpr-fuse-redun-target-quot = <24 12 0>;
+ qcom,cpr-fuse-redun-ro-sel = <46 36 39>;
+ qcom,cpr-fuse-cond-min-volt-sel = <54 42 6 7 1>;
+ qcom,cpr-cond-min-voltage = <1140000>;
+ qcom,cpr-fuse-uplift-sel = <22 53 1 0 0>;
+ qcom,cpr-uplift-voltage = <50000>;
+ qcom,cpr-uplift-quotient = <0 0 120>;
+ qcom,cpr-uplift-max-volt = <1350000>;
+ qcom,cpr-uplift-speed-bin = <1>;
+ qcom,speed-bin-fuse-sel = <22 0 3 0>;
+ qcom,cpr-corner-map = <1 1 2 2 3 3 3 3 3 3 3 3>;
+ qcom,cpr-corner-frequency-map =
+ <1 300000000>,
+ <2 384000000>,
+ <3 600000000>,
+ <4 787200000>,
+ <5 998400000>,
+ <6 1094400000>,
+ <7 1190400000>,
+ <8 1305600000>,
+ <9 1344000000>,
+ <10 1401600000>,
+ <11 1497600000>,
+ <12 1593600000>;
+ qcom,pvs-version-fuse-sel = <22 4 2 0>;
+ qcom,cpr-speed-bin-max-corners =
+ <0 1 2 4 7>,
+ <1 1 2 4 12>,
+ <2 1 2 4 10>,
+ <5 1 2 4 14>;
+ qcom,cpr-fuse-target-quot-scale =
+ <0 1>,
+ <0 1>,
+ <0 1>;
+ qcom,cpr-quot-adjust-scaling-factor-max = <0 650 650>;
+ qcom,cpr-fuse-quot-offset =
+ <138 53 5 0>,
+ <138 53 5 0>,
+ <138 48 5 0>,
+ <138 58 5 0>;
+ qcom,cpr-fuse-redun-quot-offset =
+ <200 53 5 0>,
+ <200 53 5 0>,
+ <200 48 5 0>,
+ <200 58 5 0>;
+ qcom,cpr-fuse-init-voltage =
+ <27 36 6 0>,
+ <27 18 6 0>,
+ <27 0 6 0>;
+ qcom,cpr-fuse-redun-init-voltage =
+ <140 36 6 0>,
+ <140 18 6 0>,
+ <140 0 6 0>;
+ qcom,cpr-init-voltage-ref = <1050000 1150000 1280000>;
+ qcom,cpr-init-voltage-step = <10000>;
+ qcom,cpr-voltage-ceiling-override =
+ <1 1 1050000 1050000 1150000 1150000 1280000
+ 1280000 1280000 1280000 1280000 1280000
+ 1280000 1280000>;
+ qcom,cpr-voltage-floor-override =
+ <1 1 1050000 1050000 1050000 1050000 1060000
+ 1070000 1080000 1090000 1100000 1100000
+ 1100000 1100000>;
+ qcom,cpr-scaled-init-voltage-as-ceiling;
+
+ qcom,cpr-fuse-version-map =
+ <0xffffffff 0xffffffff 2 4 4 4>,
+ <0xffffffff 0xffffffff 2 6 6 6>,
+ <0xffffffff 0xffffffff 3 4 4 4>;
+ qcom,cpr-quotient-adjustment =
+ <0 0 (-210)>,
+ <0 0 (-60)>,
+ <0 0 (-94)>;
+ qcom,cpr-quot-offset-adjustment =
+ <0 0 (-5)>;
+ qcom,cpr-init-voltage-adjustment =
+ <0 0 (-100000)>,
+ <0 0 (-100000)>,
+ <0 0 (-45000)>;
+ qcom,cpr-fuse-min-quot-diff = <0 0 40>;
+ qcom,cpr-min-quot-diff-adjustment =
+ <0 0 0>,
+ <0 0 72>,
+ <0 0 104>;
+ qcom,cpr-floor-to-ceiling-max-range =
+ <(-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1)>,
+ <(-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1) (-1)>,
+ <(-1) (-1) (-1) (-1) (-1) (-1) (-1) 50000 50000 50000 50000 50000>;
+ qcom,cpr-virtual-corner-init-voltage-adjustment =
+ <0 0 0 (-10000) 0 0 0 0 0 0 0 0>,
+ <0 0 0 0 0 0 0 0 0 0 0 (-20000)>,
+ <0 0 0 0 0 0 0 0 0 0 0 (-30000)>;
+ qcom,cpr-virtual-corner-quotient-adjustment =
+ <0 0 0 100 0 0 0 0 0 0 0 0>,
+ <0 0 0 0 0 0 0 0 0 0 0 (-300)>,
+ <0 0 0 (-60) 0 0 0 0 0 0 0 0>;
+ qcom,cpr-cpus = <&CPU0 &CPU1 &CPU2 &CPU3>;
+ qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment =
+ /* 1st fuse version tuple matched */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
+ <0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
+ /* 2nd fuse version tuple matched */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
+ <0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
+ /* 3rd fuse version tuple matched */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
+ <0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
+ <0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
+ qcom,cpr-online-cpu-virtual-corner-quotient-adjustment =
+ /* 1st fuse version tuple matched */
+ <0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
+ <0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
+ <0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
+ /* 2nd fuse version tuple matched */
+ <0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
+ <0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
+ <0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
+ /* 3rd fuse version tuple matched */
+ <0 0 0 (-21) (-21) (-21) (-32) (-32) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
+ <0 0 0 (-21) (-21) (-21) (-32) (-32) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
+ <0 0 0 (-11) (-11) (-11) (-11) (-11) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
+ <0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
+ qcom,cpr-allowed =
+ <0>,
+ <1>,
+ <1>;
+
+ qcom,fuse-remap-base-row = <1000>;
+ qcom,fuse-remap-source =
+ <140 7 3 0>,
+ <138 45 5 0>;
+ qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
+
+ qcom,cpr-aging-sensor-id = <17, 18>;
+ qcom,cpr-aging-ref-corner = <4>;
+ qcom,cpr-aging-ref-voltage = <1050000>;
+ qcom,cpr-max-aging-margin = <15000>;
+ qcom,cpr-de-aging-allowed =
+ <0>,
+ <0>,
+ <1>;
+ qcom,cpr-non-collapsible-sensors= <7 12 17 22>;
+ qcom,cpr-aging-ro-scaling-factor = <3500>;
+ qcom,cpr-ro-scaling-factor = <0 2500 2500 2500 0 0 0 0>;
+ qcom,cpr-aging-derate = <1000 1000 1250>;
+ qcom,cpr-fuse-aging-init-quot-diff =
+ <101 0 8 0>,
+ <101 8 8 0>;
+
+ qcom,cpr-thermal-sensor-id = <9>;
+ qcom,cpr-disable-temp-threshold = <5>;
+ qcom,cpr-enable-temp-threshold = <10>;
+ };
diff --git a/Documentation/devicetree/bindings/regulator/rpmh-regulator.txt b/Documentation/devicetree/bindings/regulator/rpmh-regulator.txt
index 7de891e..b760758 100644
--- a/Documentation/devicetree/bindings/regulator/rpmh-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/rpmh-regulator.txt
@@ -44,6 +44,16 @@
a particular PMIC found in the system. This name must match
to one that is defined by the bootloader.
+- qcom,regulator-type
+ Usage: required if qcom,supported-modes is specified or if
+ qcom,init-mode is specified in any subnodes
+ Value type: <string>
+ Definition: The physical type of the regulator including the PMIC
+ family. This is used for mode control. Supported values:
+ "pmic4-ldo", "pmic4-hfsmps", "pmic4-ftsmps", "pmic4-bob",
+ "pmic5-ldo", "pmic5-hfsmps", "pmic5-ftsmps", and
+ "pmic5-bob".
+
- qcom,use-awake-state
Usage: optional
Value type: <empty>
@@ -72,7 +82,7 @@
Value type: <prop-encoded-array>
Definition: A list of integers specifying the PMIC regulator modes
supported by this regulator. Supported values are
- RPMH_REGULATOR_MODE_* (i.e. 0 to 7). Elements must be
+ RPMH_REGULATOR_MODE_* (i.e. 0 to 4). Elements must be
specified in order from lowest to highest.
- qcom,mode-threshold-currents
@@ -148,7 +158,7 @@
Usage: optional; VRM regulators only
Value type: <u32>
Definition: Specifies the initial mode to request for a VRM regulator.
- Supported values are RPMH_REGULATOR_MODE_* (i.e. 0 to 7).
+ Supported values are RPMH_REGULATOR_MODE_* (i.e. 0 to 4).
- qcom,init-headroom-voltage
Usage: optional; VRM regulators only
@@ -212,9 +222,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "smpa2";
+ qcom,regulator-type = "pmic4-smps";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_SMPS_AUTO
- RPMH_REGULATOR_MODE_SMPS_PWM>;
+ <RPMH_REGULATOR_MODE_AUTO
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 2000000>;
pm8998_s2: regulator-s2 {
regulator-name = "pm8998_s2";
@@ -222,7 +233,7 @@
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1200000>;
regulator-enable-ramp-delay = <200>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_SMPS_AUTO>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_AUTO>;
qcom,init-voltage = <1150000>;
};
};
@@ -232,9 +243,10 @@
mboxes = <&disp_rsc 0>;
qcom,use-awake-state;
qcom,resource-name = "ldoa3";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
qcom,always-wait-for-ack;
pm8998_l3_disp_ao: regulator-l3-ao {
@@ -250,7 +262,7 @@
qcom,set = <RPMH_REGULATOR_SET_SLEEP>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
qcom,init-voltage = <1000000>;
qcom,init-enable = <0>;
};
@@ -260,6 +272,7 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa4";
+ qcom,regulator-type = "pmic4-ldo";
pm8998_l4-parent-supply = <&pm8998_s2>;
pm8998_l4: regulator-l4 {
regulator-name = "pm8998_l4";
diff --git a/Documentation/devicetree/bindings/usb/msm-hsusb.txt b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
index 89c817e..8654a3e 100644
--- a/Documentation/devicetree/bindings/usb/msm-hsusb.txt
+++ b/Documentation/devicetree/bindings/usb/msm-hsusb.txt
@@ -1,315 +1,110 @@
MSM SoC HSUSB controllers
-OTG:
+EHCI
-Required properties :
-- compatible : should be "qcom,hsusb-otg"
-- regs : Array of offset and length of the register sets in the memory map
-- reg-names : indicates various iomem resources passed by name. The possible
- strings in this field are:
- "core": USB controller register space. (Required)
- "tcsr": TCSR register for routing USB Controller signals to
- either picoPHY0 or picoPHY1. (Optional)
- "phy_csr": PHY Wrapper CSR register space. Provides register level
- interface through AHB2PHY for performing PHY related operations
- like retention and HV interrupts management.
-- interrupts: IRQ line
-- interrupt-names: OTG interrupt name(s) referenced in interrupts above
- HSUSB OTG expects "core_irq" which is IRQ line from CORE and
- "async_irq" from HSPHY for asynchronous wakeup events in LPM.
- optional ones are described in next section.
-- qcom,hsusb-otg-phy-type: PHY type can be one of
- 1 - Chipidea PHY (obsolete)
- 2 - Synopsis Pico PHY
- 3 - Synopsis Femto PHY
- 4 - QUSB ULPI PHY
-- qcom,hsusb-otg-mode: Operational mode. Can be one of
- 1 - Peripheral only mode
- 2 - Host only mode
- 3 - OTG mode
- Based on the mode, OTG driver registers platform devices for
- gadget and host.
-- qcom,hsusb-otg-otg-control: OTG control (VBUS and ID notifications)
- can be one of
- 1 - PHY control
- 2 - PMIC control
- 3 - User control (via debugfs)
-- <supply-name>-supply: handle to the regulator device tree node
- Required "supply-name" is "HSUSB_VDDCX" (when voting for VDDCX) or
- "hsusb_vdd_dig" (when voting for VDDCX Corner voltage),
- "HSUSB_1p8-supply" and "HSUSB_3p3-supply".
-- qcom,vdd-voltage-level: This property must be a list of three integer
- values (none, min, max) where each value represents either a voltage
- in microvolts or a value corresponding to voltage corner. If usb core
- supports svs, min value will have absolute SVS or SVS corner otherwise
- min value will have absolute nominal or nominal corner.
-- clocks: a list of phandles to the USB clocks. Usage is as per
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-- clock-names: Names of the clocks in 1-1 correspondence with the "clocks"
- property.
+Required properties:
+- compatible: Should contain "qcom,ehci-host"
+- regs: offset and length of the register set in the memory map
+- usb-phy: phandle for the PHY device
- Required clocks:
- "core_clk": USB core clock that is required for data transfers.
- "iface_clk": USB core clock that is required for register access.
+Example EHCI controller device node:
- Optional clocks:
- "sleep_clk": PHY sleep clock. Required for interrupts.
- "phy_reset_clk": PHY blocks asynchronous reset clock. Required
- for the USB block reset. It is a reset only clock.
- "phy_por_clk": Reset only clock for asserting/de-asserting
- PHY POR signal. Required for overriding PHY parameters.
- "phy_csr_clk": Required for accessing PHY CSR registers through
- AHB2PHY interface.
- "phy_ref_clk": Required when PHY have referance clock,
- "xo": XO clock. The source clock that is used as a reference clock
- to the PHY.
- "bimc_clk", "snoc_clk", "pcnoc_clk": bus voting clocks. Used to
- keep buses at a nominal frequency during USB peripheral
- mode for achieving max throughput.
-- qcom,max-nominal-sysclk-rate: Indicates maximum nominal frequency for which
- system clock should be voted whenever streaming mode is enabled.
-- resets: reset specifier pair consists of phandle for the reset provider
- and reset lines used by this controller.
-- reset-names: reset signal name strings sorted in the same order as the resets
- property.
-
-Optional properties :
-- interrupt-names : Optional interrupt resource entries are:
- "pmic_id_irq" : Interrupt from PMIC for external ID pin notification.
- "phy_irq" : Interrupt from PHY. Used for ID detection.
-- qcom,hsusb-otg-disable-reset: If present then core is RESET only during
- init, otherwise core is RESET for every cable disconnect as well
-- qcom,hsusb-otg-pnoc-errata-fix: If present then workaround for PNOC
- performance issue is applied which requires changing the mem-type
- attribute via VMIDMT.
-- qcom,hsusb-otg-default-mode: The default USB mode after boot-up.
- Applicable only when OTG is controlled by user. Can be one of
- 0 - None. Low power mode
- 1 - Peripheral
- 2 - Host
-- qcom,hsusb-otg-phy-init-seq: PHY configuration sequence. val, reg pairs
- terminate with -1
-- qcom,hsusb-otg-power-budget: VBUS power budget in mA
- 0 will be treated as 500mA
-- qcom,hsusb-otg-pclk-src-name: The source of pclk
-- Refer to "Documentation/devicetree/bindings/arm/msm/msm-bus.txt" for
- below optional properties:
- - qcom,msm-bus,name
- - qcom,msm-bus,num_cases - There are three valid cases for this: NONE, MAX
- and MIN bandwidth votes. Minimum two cases must be defined for
- both NONE and MAX votes. If MIN vote is different from NONE VOTE
- then specify third case for MIN VOTE. If explicit NOC clock rates
- are not specified then MAX value should be large enough to get
- desired BUS frequencies. In case explicit NOC clock rates are
- specified, peripheral mode bus bandwidth vote should be defined
- to vote for arbitrated bandwidth so that 60MHz frequency is met.
-
- - qcom,msm-bus,num_paths
- - qcom,msm-bus,vectors
-- qcom,hsusb-otg-lpm-on-dev-suspend: If present then USB enter to
- low power mode upon receiving bus suspend.
-- qcom,hsusb-otg-clk-always-on-workaround: If present then USB core clocks
- remain active upon receiving bus suspend and USB cable is connected.
- Used for allowing USB to respond for remote wakup.
-- qcom,hsusb-otg-delay-lpm: If present then USB core will wait one second
- after disconnect before entering low power mode.
-- <supply-name>-supply: handle to the regulator device tree node.
- Optional "supply-name" is "vbus_otg" to supply vbus in host mode.
-- qcom,dp-manual-pullup: If present, vbus is not routed to USB controller/phy
- and controller driver therefore enables pull-up explicitly before
- starting controller using usbcmd run/stop bit.
-- qcom,usb2-enable-hsphy2: If present then USB2 controller is connected to 2nd
- HSPHY.
-- qcom,hsusb-log2-itc: value of 2^(log2_itc-1) will be used as the
- interrupt threshold (ITC), when log2_itc is between 1 to 7.
-- qcom,hsusb-l1-supported: If present, the device supports l1 (Link power
- management).
-- qcom,no-selective-suspend: If present selective suspend is disabled on hub ports.
-- qcom,hsusb-otg-mpm-dpsehv-int: If present, indicates mpm interrupt to be
- configured for detection of dp line transition during VDD minimization.
-- qcom,hsusb-otg-mpm-dmsehv-int: If present, indicates mpm interrupt to be
- configured for detection of dm line transition during VDD minimization.
-- pinctrl-names : This should be defined if a target uses gpio and pinctrl framework.
- See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.
- It should specify the names of the configs that pinctrl can install in driver
- Following are the pinctrl config that can be installed
- "hsusb_active" : Active configuration of pins, this should specify active
- config of vddmin gpio (if used) defined in their pin groups.
- "hsusb_sleep" : Disabled configuration of pins, this should specify sleep
- config of vddmin gpio (if used) defined in their pin groups.
-- qcom,hsusb-otg-vddmin-gpio = If present, indicates a gpio that will be used
- to supply voltage to the D+ line during VDD minimization and peripheral
- bus suspend. If not exists, then VDD minimization will not be allowed
- during peripheral bus suspend.
-- qcom,ahb-async-bridge-bypass: If present, indicates that enable AHB2AHB By Pass
- mode with device controller for better throughput. With this mode, USB Core
- runs using PNOC clock and synchronous to it. Hence it is must to have proper
- "qcom,msm-bus,vectors" to have high bus frequency. User shouldn't try to
- enable this feature without proper bus voting. When this feature is enabled,
- it is required to do HW reset during cable disconnect for host mode functionality
- working and hence need to disable qcom,hsusb-otg-disable-reset. With this feature
- enabled, USB HW has to vote for maximum PNOC frequency as USB HW cannot tolerate
- changes in PNOC frequency which results in USB functionality failure.
-- qcom,disable-retention-with-vdd-min: If present don't allow phy retention but allow
- vdd min.
-- qcom,usbin-vadc: Corresponding vadc device's phandle to read usbin voltage using VADC.
- This will be used to get value of usb power supply's VOLTAGE_NOW property.
-- qcom,usbid-gpio: This corresponds to gpio which is used for USB ID detection.
-- qcom,hub-reset-gpio: This corresponds to gpio which is used for HUB reset.
-- qcom,sw-sel-gpio: This corresponds to gpio which is used for switch select routing
- of D+/D- between the USB HUB and type B USB jack for peripheral mode.
-- qcom,bus-clk-rate: If present, indicates nominal bus frequency to be voted for
- bimc/snoc/pcnoc clock with usb cable connected. If AHB2AHB bypass is enabled,
- pcnoc value should be defined to very large number so that PNOC runs at max
- frequency. If 'qcom,default-mode-svs' is also set then two set of frequencies
- must be specified for SVS and NOM modes which user can change using sysfs node.
-- qcom,phy-dvdd-always-on: If present PHY DVDD is supplied by a always-on
- regulator unlike vddcx/vddmx. PHY can keep D+ pull-up and D+/D-
- pull-down resistors during peripheral and host bus suspend without
- any re-work.
-- qcom,emulation: Indicates that we are running on emulation platform.
-- qcom,boost-sysclk-with-streaming: If present, enable controller specific
- streaming feature. Also this flag can bump up usb system clock to max in streaming
- mode. This flag enables streaming mode for all compositions and is different from
- streaming-func property defined in android device node. Please refer Doumentation/
- devicetree/bindings/usb/android-dev.txt for details about "streaming-func" property.
-- qcom,axi-prefetch-enable: If present, AXI64 interface will be used for transferring data
- to/from DDR by controller.
-- qcom,enable-sdp-typec-current-limit: Indicates whether type-c current for SDP CHARGER to
- be limited.
-- qcom,enable-phy-id-pullup: If present, PHY can keep D+ pull-up resistor on USB ID line
- during cable disconnect.
-- qcom,max-svs-sysclk-rate: Indicates system clock frequency voted by driver in
- non-perf mode. In perf mode driver uses qcom,max-nominal-sysclk-rate.
-- qcom,pm-qos-latency: This represents max tolerable CPU latency in microsecs,
- which is used as a vote by driver to get max performance in perf mode.
-- qcom,default-mode-svs: Indicates USB system clock should run at SVS frequency.
- User can bump it up using 'perf_mode' sysfs attribute for gadget.
-- qcom,vbus-low-as-hostmode: If present, specifies USB_VBUS to switch to host mode
- if USB_VBUS is low or device mode if USB_VBUS is high.
-- qcom,usbeth-reset-gpio: If present then an external usb-to-eth is connected to
- the USB host controller and its RESET_N signal is connected to this
- usbeth-reset-gpio GPIO. It should be driven LOW to RESET the usb-to-eth.
-- extcon: phandles to external connector devices. First phandle should point to
- external connector, which provide "USB" cable events, the second should
- point to external connector device, which provide "USB-HOST" cable events.
- A single phandle may be specified if a single connector device provides
- both "USB" and "USB-HOST" events.
-
-Example HSUSB OTG controller device node :
- usb@f9690000 {
- compatible = "qcom,hsusb-otg";
- reg = <0xf9690000 0x400>;
- reg-names = "core";
- interrupts = <134>;
- interrupt-names = "core_irq";
-
- qcom,hsusb-otg-phy-type = <2>;
- qcom,hsusb-otg-mode = <1>;
- qcom,hsusb-otg-otg-control = <1>;
- qcom,hsusb-otg-disable-reset;
- qcom,hsusb-otg-pnoc-errata-fix;
- qcom,hsusb-otg-default-mode = <2>;
- qcom,hsusb-otg-phy-init-seq = <0x01 0x90 0xffffffff>;
- qcom,hsusb-otg-power-budget = <500>;
- qcom,hsusb-otg-pclk-src-name = "dfab_usb_clk";
- qcom,hsusb-otg-lpm-on-dev-suspend;
- qcom,hsusb-otg-clk-always-on-workaround;
- hsusb_vdd_dig-supply = <&pm8226_s1_corner>;
- HSUSB_1p8-supply = <&pm8226_l10>;
- HSUSB_3p3-supply = <&pm8226_l20>;
- qcom,vdd-voltage-level = <1 5 7>;
- qcom,dp-manual-pullup;
- qcom,hsusb-otg-mpm-dpsehv-int = <49>;
- qcom,hsusb-otg-mpm-dmsehv-int = <58>;
- qcom,max-nominal-sysclk-rate = <133330000>;
- qcom,max-svs-sysclk-rate = <100000000>;
- qcom,pm-qos-latency = <59>;
-
- qcom,msm-bus,name = "usb2";
- qcom,msm-bus,num_cases = <2>;
- qcom,msm-bus,num_paths = <1>;
- qcom,msm-bus,vectors =
- <87 512 0 0>,
- <87 512 60000000 960000000>;
- pinctrl-names = "hsusb_active","hsusb_sleep";
- pinctrl-0 = <&vddmin_act>;
- pinctrl-0 = <&vddmin_sus>;
- qcom,hsusb-otg-vddmin-gpio = <&pm8019_mpps 6 0>;
- qcom,disable-retention-with-vdd-min;
- qcom,usbin-vadc = <&pm8226_vadc>;
- qcom,usbid-gpio = <&msm_gpio 110 0>;
- };
-
-MSM HSUSB EHCI controller
-
-Required properties :
-- compatible : should be "qcom,ehci-host"
-- reg : offset and length of the register set in the memory map
-- interrupts: IRQ lines used by this controller
-- interrupt-names : Required interrupt resource entries are:
- HSUSB EHCI expects "core_irq" and optionally "async_irq".
-- <supply-name>-supply: handle to the regulator device tree node
- Required "supply-name" is either "hsusb_vdd_dig" or "HSUSB_VDDCX"
- "HSUSB_1p8-supply" "HSUSB_3p3-supply".
-- qcom,usb2-power-budget: maximum vbus power (in mA) that can be provided.
-- qcom,vdd-voltage-level: This property must be a list of five integer
- values (no, 0.5vsuspend, 0.75suspend, min, max) where each value respresents
- either a voltage in microvolts or a value corresponding to voltage corner.
- First value represents value to vote when USB is not at all active, second
- value represents value to vote when target is not connected to dock during low
- power mode, third value represents vlaue to vote when target is connected to dock
- and no peripheral connected over dock during low power mode, fourth value represents
- minimum value to vote when USB is operational, fifth item represents maximum value
- to vote for USB is operational.
-
-Optional properties :
-- qcom,usb2-enable-hsphy2: If present, select second PHY for USB operation.
-- pinctrl-names : This should be defined if a target uses pinctrl framework.
- See "pinctrl" in Documentation/devicetree/bindings/pinctrl/msm-pinctrl.txt.
- It should specify the names of the configs that pinctrl can install in driver
- Following are the pinctrl configs that can be installed
- "ehci_active" : Active configuration of pins, this should specify active
- config defined in pin groups of used gpio's from resume and
- ext-hub-reset.
- "ehci_sleep" : Disabled configuration of pins, this should specify sleep
- config defined in pin groups of used gpio's from resume and
- ext-hub-reset.
-- qcom,resume-gpio: if present then peripheral connected to usb controller
- cannot wakeup from XO shutdown using in-band usb bus resume. Use resume
- gpio to wakeup peripheral.
-- qcom,ext-hub-reset-gpio: If present then an external HUB is connected to
- the USB host controller and its RESET_N signal is connected to this
- ext-hub-reset-gpio GPIO. It should be driven LOW to RESET the HUB.
-- qcom,usb2-enable-uicc: If present, usb2 port will be used for uicc card connection.
-- usb-phy: phandle for the PHY device, if described as a separate device tree node
-- qcom,pm-qos-latency: This property represents the maximum tolerable CPU latency in
- microsecs, which is used as a vote to keep the CPUs in a high enough power state when
- USB bus is in use (not suspended).
-- Refer to "Documentation/devicetree/bindings/arm/msm/msm-bus.txt" for
- below optional properties:
- - qcom,msm-bus,name
- - qcom,msm-bus,num_cases - Two cases (NONE and MAX) for voting are supported.
- - qcom,msm-bus,num_paths
- - qcom,msm-bus,vectors
-
-Example MSM HSUSB EHCI controller device node :
- ehci: qcom,ehci-host@f9a55000 {
+ ehci: ehci@f9a55000 {
compatible = "qcom,ehci-host";
reg = <0xf9a55000 0x400>;
- interrupts = <0 134 0>, <0 140 0>;
- interrupt-names = "core_irq", "async_irq";
- /* If pinctrl is used and ext-hub-reset and resume gpio's are present*/
- pinctrl-names = "ehci_active","ehci_sleep";
- pinctrl-0 = <&ehci_reset_act &resume_act>;
- pinctrl-1 = <&ehci_reset_sus &resume_sus>;
- qcom,resume-gpio = <&msm_gpio 80 0>;
- qcom,ext-hub-reset-gpio = <&msm_gpio 0 0>;
- hsusb_vdd_dig-supply = <&pm8841_s2_corner>;
- HSUSB_1p8-supply = <&pm8941_l6>;
- HSUSB_3p3-supply = <&pm8941_l24>;
- qcom,usb2-enable-hsphy2;
- qcom,usb2-power-budget = <500>;
- qcom,vdd-voltage-level = <1 2 3 5 7>;
- qcom,usb2-enable-uicc;
+ usb-phy = <&usb_otg>;
+ };
+
+USB PHY with optional OTG:
+
+Required properties:
+- compatible: Should contain:
+ "qcom,usb-otg-ci" for chipsets with ChipIdea 45nm PHY
+ "qcom,usb-otg-snps" for chipsets with Synopsys 28nm PHY
+
+- regs: Offset and length of the register set in the memory map
+- interrupts: interrupt-specifier for the OTG interrupt.
+
+- clocks: A list of phandle + clock-specifier pairs for the
+ clocks listed in clock-names
+- clock-names: Should contain the following:
+ "phy" USB PHY reference clock
+ "core" Protocol engine clock
+ "iface" Interface bus clock
+ "alt_core" Protocol engine clock for targets with asynchronous
+ reset methodology. (optional)
+
+- vdccx-supply: phandle to the regulator for the vdd supply for
+ digital circuit operation.
+- v1p8-supply: phandle to the regulator for the 1.8V supply
+- v3p3-supply: phandle to the regulator for the 3.3V supply
+
+- resets: A list of phandle + reset-specifier pairs for the
+ resets listed in reset-names
+- reset-names: Should contain the following:
+ "phy" USB PHY controller reset
+ "link" USB LINK controller reset
+
+- qcom,otg-control: OTG control (VBUS and ID notifications) can be one of
+ 1 - PHY control
+ 2 - PMIC control
+
+Optional properties:
+- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
+
+- switch-gpio: A phandle + gpio-specifier pair. Some boards are using Dual
+ SPDT USB Switch, witch is cotrolled by GPIO to de/multiplex
+ D+/D- USB lines between connectors.
+
+- qcom,phy-init-sequence: PHY configuration sequence values. This is related to Device
+ Mode Eye Diagram test. Start address at which these values will be
+ written is ULPI_EXT_VENDOR_SPECIFIC. Value of -1 is reserved as
+ "do not overwrite default value at this address".
+ For example: qcom,phy-init-sequence = < -1 0x63 >;
+ Will update only value at address ULPI_EXT_VENDOR_SPECIFIC + 1.
+
+- qcom,phy-num: Select number of pyco-phy to use, can be one of
+ 0 - PHY one, default
+ 1 - Second PHY
+ Some platforms may have configuration to allow USB
+ controller work with any of the two HSPHYs present.
+
+- qcom,vdd-levels: This property must be a list of three integer values
+ (no, min, max) where each value represents either a voltage
+ in microvolts or a value corresponding to voltage corner.
+
+- qcom,manual-pullup: If present, vbus is not routed to USB controller/phy
+ and controller driver therefore enables pull-up explicitly
+ before starting controller using usbcmd run/stop bit.
+
+- extcon: phandles to external connector devices. First phandle
+ should point to external connector, which provide "USB"
+ cable events, the second should point to external connector
+ device, which provide "USB-HOST" cable events. If one of
+ the external connector devices is not required empty <0>
+ phandle should be specified.
+
+Example HSUSB OTG controller device node:
+
+ usb@f9a55000 {
+ compatible = "qcom,usb-otg-snps";
+ reg = <0xf9a55000 0x400>;
+ interrupts = <0 134 0>;
+ dr_mode = "peripheral";
+
+ clocks = <&gcc GCC_XO_CLK>, <&gcc GCC_USB_HS_SYSTEM_CLK>,
+ <&gcc GCC_USB_HS_AHB_CLK>;
+
+ clock-names = "phy", "core", "iface";
+
+ vddcx-supply = <&pm8841_s2_corner>;
+ v1p8-supply = <&pm8941_l6>;
+ v3p3-supply = <&pm8941_l24>;
+
+ resets = <&gcc GCC_USB2A_PHY_BCR>, <&gcc GCC_USB_HS_BCR>;
+ reset-names = "phy", "link";
+
+ qcom,otg-control = <1>;
+ qcom,phy-init-sequence = < -1 0x63 >;
+ qcom,vdd-levels = <1 5 7>;
};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts b/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
index 94ccf9c..261829f 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-cdp.dts
@@ -34,6 +34,26 @@
status = "ok";
};
+&sdhc_1 {
+ vdd-supply = <&vreg_sd_mmc>;
+
+ vdd-io-supply = <&pmxpoorwills_l7>;
+ qcom,vdd-io-voltage-level = <1800000 2950000>;
+ qcom,vdd-io-current-level = <200 10000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_cd_on>;
+ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_cd_off>;
+
+ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
+ 200000000>;
+ qcom,devfreq,freq-table = <50000000 200000000>;
+
+ cd-gpios = <&tlmm 93 0x1>;
+
+ status = "ok";
+};
+
&pmxpoorwills_vadc {
chan@83 {
label = "vph_pwr";
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts b/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts
index f580901..575febe 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-mtp.dts
@@ -33,6 +33,26 @@
status = "ok";
};
+&sdhc_1 {
+ vdd-supply = <&vreg_sd_mmc>;
+
+ vdd-io-supply = <&pmxpoorwills_l7>;
+ qcom,vdd-io-voltage-level = <1800000 2950000>;
+ qcom,vdd-io-current-level = <200 10000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_cd_on>;
+ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_cd_off>;
+
+ qcom,clk-rates = <400000 20000000 25000000 50000000 100000000
+ 200000000>;
+ qcom,devfreq,freq-table = <50000000 200000000>;
+
+ cd-gpios = <&tlmm 93 0x1>;
+
+ status = "ok";
+};
+
&pmxpoorwills_vadc {
chan@83 {
label = "vph_pwr";
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
index 82b65e2..fa9c4f8 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-pinctrl.dtsi
@@ -1299,6 +1299,82 @@
};
};
+ /* SDC pin type */
+ sdc1_clk_on: sdc1_clk_on {
+ config {
+ pins = "sdc1_clk";
+ bias-disable; /* NO pull */
+ drive-strength = <16>; /* 16 MA */
+ };
+ };
+
+ sdc1_clk_off: sdc1_clk_off {
+ config {
+ pins = "sdc1_clk";
+ bias-disable; /* NO pull */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ sdc1_cmd_on: sdc1_cmd_on {
+ config {
+ pins = "sdc1_cmd";
+ bias-pull-up; /* pull up */
+ drive-strength = <10>; /* 10 MA */
+ };
+ };
+
+ sdc1_cmd_off: sdc1_cmd_off {
+ config {
+ pins = "sdc1_cmd";
+ num-grp-pins = <1>;
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ sdc1_data_on: sdc1_data_on {
+ config {
+ pins = "sdc1_data";
+ bias-pull-up; /* pull up */
+ drive-strength = <10>; /* 10 MA */
+ };
+ };
+
+ sdc1_data_off: sdc1_data_off {
+ config {
+ pins = "sdc1_data";
+ bias-pull-up; /* pull up */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ sdc1_cd_on: cd_on {
+ mux {
+ pins = "gpio93";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio93";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
+ sdc1_cd_off: cd_off {
+ mux {
+ pins = "gpio93";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio93";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
smb_int_default: smb_int_default {
mux {
pins = "gpio42";
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
index e62c4a3..053348c 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills-regulator.dtsi
@@ -11,6 +11,7 @@
*/
#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/gpio/gpio.h>
&soc {
/* RPMh regulators */
@@ -77,9 +78,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa1";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l1: regualtor-pmxpoorwills-11 {
regulator-name = "pmxpoorwills_l1";
@@ -87,7 +89,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -95,9 +97,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa2";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l2: regualtor-pmxpoorwills-12 {
regulator-name = "pmxpoorwills_l2";
@@ -105,7 +108,7 @@
regulator-min-microvolt = <1128000>;
regulator-max-microvolt = <1128000>;
qcom,init-voltage = <1128000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -113,9 +116,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa3";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l3: regualtor-pmxpoorwills-l3 {
regulator-name = "pmxpoorwills_l3";
@@ -123,7 +127,7 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
qcom,init-voltage = <800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -131,9 +135,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa4";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l4: regualtor-pmxpoorwills-l4 {
regulator-name = "pmxpoorwills_l4";
@@ -141,7 +146,7 @@
regulator-min-microvolt = <872000>;
regulator-max-microvolt = <872000>;
qcom,init-voltage = <872000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -149,9 +154,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa5";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l5: regualtor-pmxpoorwills-l5 {
regulator-name = "pmxpoorwills_l5";
@@ -159,7 +165,7 @@
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <1704000>;
qcom,init-voltage = <1704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -167,9 +173,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa7";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l7: regualtor-pmxpoorwills-l7 {
regulator-name = "pmxpoorwills_l7";
@@ -177,7 +184,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2952000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -185,9 +192,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa8";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l8: regualtor-pmxpoorwills-l8 {
regulator-name = "pmxpoorwills_l8";
@@ -195,7 +203,7 @@
regulator-min-microvolt = <480000>;
regulator-max-microvolt = <900000>;
qcom,init-voltage = <480000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -231,9 +239,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa10";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l10: regualtor-pmxpoorwills-l10 {
regulator-name = "pmxpoorwills_l10";
@@ -241,7 +250,7 @@
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
qcom,init-voltage = <3088000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -249,9 +258,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa11";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l11: regualtor-pmxpoorwills-l11 {
regulator-name = "pmxpoorwills_l11";
@@ -259,7 +269,7 @@
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <3000000>;
qcom,init-voltage = <1704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -267,9 +277,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa12";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l12: regualtor-pmxpoorwills-l12 {
regulator-name = "pmxpoorwills_l12";
@@ -277,7 +288,7 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
qcom,init-voltage = <2704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -285,9 +296,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa13";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l13: regualtor-pmxpoorwills-l13 {
regulator-name = "pmxpoorwills_l13";
@@ -295,7 +307,7 @@
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <3000000>;
qcom,init-voltage = <1704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -303,9 +315,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa14";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l14: regualtor-pmxpoorwills-l14 {
regulator-name = "pmxpoorwills_l14";
@@ -313,7 +326,7 @@
regulator-min-microvolt = <600000>;
regulator-max-microvolt = <800000>;
qcom,init-voltage = <600000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -321,9 +334,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa16";
+ qcom,regulator-type = "pmic5-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pmxpoorwills_l16: regualtor-pmxpoorwills-l16 {
regulator-name = "pmxpoorwills_l16";
@@ -331,7 +345,7 @@
regulator-min-microvolt = <304000>;
regulator-max-microvolt = <880000>;
qcom,init-voltage = <304000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -359,4 +373,12 @@
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
+
+ vreg_sd_mmc: vreg_sd_mmc {
+ compatible = "regulator-fixed";
+ regulator-name = "vreg_sd_mmc";
+ startup-delay-us = <4000>;
+ enable-active-high;
+ gpio = <&tlmm 92 GPIO_ACTIVE_HIGH>;
+ };
};
diff --git a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
index f5351de..322e2cc 100644
--- a/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
+++ b/arch/arm/boot/dts/qcom/sdxpoorwills.dtsi
@@ -76,6 +76,7 @@
aliases {
qpic_nand1 = &qnand_1;
+ sdhc1 = &sdhc_1; /* SDC1 eMMC/SD/SDIO slot */
};
soc: soc { };
@@ -288,6 +289,45 @@
status = "disabled";
};
+ sdhc_1: sdhci@8804000 {
+ compatible = "qcom,sdhci-msm-v5";
+ reg = <0x8804000 0x1000>;
+ reg-names = "hc_mem";
+
+ interrupts = <0 210 0>, <0 227 0>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ qcom,bus-width = <4>;
+
+ qcom,msm-bus,name = "sdhc1";
+ qcom,msm-bus,num-cases = <8>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
+ <78 512 1600 3200>, /* 400 KB/s*/
+ <78 512 80000 160000>, /* 20 MB/s */
+ <78 512 100000 200000>, /* 25 MB/s */
+ <78 512 200000 400000>, /* 50 MB/s */
+ <78 512 400000 800000>, /* 100 MB/s */
+ <78 512 400000 800000>, /* 200 MB/s */
+ <78 512 2048000 4096000>; /* Max. bandwidth */
+ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
+ 100000000 200000000 4294967295>;
+
+ /* PM QoS */
+ qcom,pm-qos-cpu-groups = <0x0>;
+ qcom,pm-qos-cmdq-latency-us = <70>;
+ qcom,pm-qos-legacy-latency-us = <70>;
+ qcom,pm-qos-irq-type = "affine_cores";
+ qcom,pm-qos-irq-cpu = <0>;
+ qcom,pm-qos-irq-latency = <70>;
+
+ clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>,
+ <&clock_gcc GCC_SDCC1_APPS_CLK>;
+ clock-names = "iface_clk", "core_clk";
+
+ status = "disabled";
+ };
+
qcom,msm-imem@1468B000 {
compatible = "qcom,msm-imem";
reg = <0x1468B000 0x1000>; /* Address and size of IMEM */
@@ -345,6 +385,7 @@
compatible = "qcom,pil-tz-generic";
qcom,pas-id = <0xf>;
qcom,firmware-name = "ipa_fws";
+ qcom,pil-force-shutdown;
};
spmi_bus: qcom,spmi@c440000 {
@@ -698,6 +739,20 @@
"tx-ch3-intr", "tx-ch4-intr",
"rx-ch0-intr", "rx-ch1-intr",
"rx-ch2-intr", "rx-ch3-intr";
+ qcom,msm-bus,name = "emac";
+ qcom,msm-bus,num-cases = <3>;
+ qcom,msm-bus,num-paths = <2>;
+ qcom,msm-bus,vectors-KBps =
+ <98 512 1250 0>, <1 781 0 40000>, /* 10Mbps vote */
+ <98 512 12500 0>, <1 781 0 40000>, /* 100Mbps vote */
+ <98 512 125000 0>, <1 781 0 40000>; /* 1000Mbps vote */
+ qcom,bus-vector-names = "10", "100", "1000";
+ clocks = <&clock_gcc GCC_ETH_AXI_CLK>,
+ <&clock_gcc GCC_ETH_PTP_CLK>,
+ <&clock_gcc GCC_ETH_RGMII_CLK>,
+ <&clock_gcc GCC_ETH_SLAVE_AHB_CLK>;
+ clock-names = "eth_axi_clk", "eth_ptp_clk",
+ "eth_rgmii_clk", "eth_slave_ahb_clk";
io-macro-info {
io-macro-bypass-mode = <0>;
io-interface = "rgmii";
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index 0848993..ddeb098 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -781,6 +781,18 @@
However for 4K, we choose a higher default value, 11 as opposed to 10, giving us
4M allocations matching the default size used by generic code.
+config UNMAP_KERNEL_AT_EL0
+ bool "Unmap kernel when running in userspace (aka \"KAISER\")" if EXPERT
+ default y
+ help
+ Speculation attacks against some high-performance processors can
+ be used to bypass MMU permission checks and leak kernel data to
+ userspace. This can be defended against by unmapping the kernel
+ when running in userspace, mapping it back in on exception entry
+ via a trampoline page in the vector table.
+
+ If unsure, say Y.
+
menuconfig ARMV8_DEPRECATED
bool "Emulate deprecated/obsolete ARMv8 instructions"
depends on COMPAT
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index d5a7418..d35cecb 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -121,6 +121,7 @@
select PM_OPP
select MFD_CORE
select SND_SOC_COMPRESS
+ select SND_HWDEP
help
This enables support for the ARMv8 based Qualcomm chipsets.
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index eaa15ce..b2adfb4 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -221,7 +221,10 @@
sdm450-qrd.dtb \
sdm450-pmi8940-mtp.dtb \
sdm450-pmi8937-mtp.dtb \
- sdm450-iot-mtp.dtb
+ sdm450-iot-mtp.dtb \
+ sdm450-qrd-sku4.dtb \
+ sdm450-pmi632-cdp-s2.dtb \
+ sdm450-pmi632-mtp-s3.dtb
endif
always := $(dtb-y)
diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi
new file mode 100644
index 0000000..3af01c1f
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi
@@ -0,0 +1,114 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_hx8399_truly_cmd: qcom,mdss_dsi_hx8399_truly_cmd {
+ qcom,mdss-dsi-panel-name =
+ "hx8399 video mode dsi truly panel";
+ qcom,mdss-dsi-panel-type = "dsi_video_mode";
+
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-h-left-border = <0>;
+ qcom,mdss-dsi-h-right-border = <0>;
+ qcom,mdss-dsi-v-top-border = <0>;
+ qcom,mdss-dsi-v-bottom-border = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+ qcom,mdss-dsi-color-order = "rgb_swap_rgb";
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-lane-map = "lane_map_0123";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-tx-eot-append;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-t-clk-pre = <0x30>;
+ qcom,mdss-dsi-t-clk-post = <0x0e>;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-lp11-init;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
+
+ qcom,mdss-dsi-display-timings {
+ timing@0 {
+ qcom,mdss-dsi-panel-width = <1080>;
+ qcom,mdss-dsi-panel-height = <2160>;
+ qcom,mdss-dsi-h-front-porch = <24>;
+ qcom,mdss-dsi-h-back-porch = <24>;
+ qcom,mdss-dsi-h-pulse-width = <16>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <40>;
+ qcom,mdss-dsi-v-front-porch = <36>;
+ qcom,mdss-dsi-v-pulse-width = <2>;
+ qcom,mdss-dsi-panel-framerate = <60>;
+ qcom,mdss-dsi-on-command = [
+ 39 01 00 00 00 00 04 B9 FF 83 99
+ 39 01 00 00 00 00 02 D2 88
+ 39 01 00 00 00 00 10 B1 02 04 74 94 01
+ 32 33 11 11 E6 5D 56 73 02 02
+ 39 01 00 00 00 00 10 B2 00 80 80 CC 05
+ 07 5A 11 10 10 00 1E 70 03 D4
+ 39 01 00 00 00 00 2D B4 00 FF 59 59 0C
+ AC 00 00 0C 00 07 0A 00 28 07 08 0C
+ 21 03 00 00 00 AE 87 59 59 0C AC 00
+ 00 0C 00 07 0A 00 28 07 08 0C 01 00
+ 00 AE 01
+ 39 01 00 00 05 00 22 D3 00 00 01 01 00
+ 00 10 10 00 00 03 00 03 00 08 78 08
+ 78 00 00 00 00 00 24 02 05 05 03 00
+ 00 00 05 40
+ 39 01 00 00 05 00 21 D5 20 20 19 19 18
+ 18 02 03 00 01 24 24 18 18 18 18 24
+ 24 00 00 00 00 00 00 00 00 2F 2F 30
+ 30 31 31
+ 39 01 00 00 05 00 21 D6 24 24 18 18 19
+ 19 01 00 03 02 24 24 18 18 18 18 20
+ 20 40 40 40 40 40 40 40 40 2F 2F 30
+ 30 31 31
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 00 00 11 D8 AA AA AA AA AA
+ AA AA AA AA BA AA AA AA BA AA AA
+ 39 01 00 00 00 00 02 BD 01
+ 39 01 00 00 00 00 11 D8 82 EA AA AA 82
+ EA AA AA 82 EA AA AA 82 EA AA AA
+ 39 01 00 00 00 00 02 BD 02
+ 39 01 00 00 00 00 09 D8 FF FF C0 3F FF
+ FF C0 3F
+ 39 01 00 00 00 00 02 BD 00
+ 39 01 00 00 05 00 37 E0 08 2A 39 35 74
+ 7C 87 7F 84 8A 8E 91 93 96 9B 9C 9E
+ A5 A6 AE A1 AF B2 5C 58 63 74 08 2A
+ 39 35 74 7C 87 7F 84 8A 8E 91 93 96
+ 9B 9C 9E A5 A6 AE A1 AF B2 5C 58 63
+ 74
+ 39 01 00 00 00 00 03 B6 7E 7E
+ 39 01 00 00 00 00 02 CC 08
+ 39 01 00 00 00 00 06 C7 00 08 00 01 08
+ 39 01 00 00 00 00 03 C0 25 5A
+ 05 01 00 00 78 00 02 11 00
+ 05 01 00 00 14 00 02 29 00];
+ qcom,mdss-dsi-off-command = [05 01 00 00 14 00
+ 02 28 00 05 01 00 00 78 00 02 10 00];
+ qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
+ qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-nt35695b-truly-fhd-cmd.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-nt35695b-truly-fhd-cmd.dtsi
index 5529ed1..32892a7 100644
--- a/arch/arm64/boot/dts/qcom/dsi-panel-nt35695b-truly-fhd-cmd.dtsi
+++ b/arch/arm64/boot/dts/qcom/dsi-panel-nt35695b-truly-fhd-cmd.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -181,7 +181,7 @@
15 01 00 00 00 00 02 ec 00
15 01 00 00 00 00 02 ff 10
15 01 00 00 00 00 02 bb 10
- 15 01 00 00 00 00 02 35 02
+ 15 01 00 00 00 00 02 35 00
05 01 00 00 78 00 02 11 00
05 01 00 00 78 00 02 29 00];
qcom,mdss-dsi-off-command = [05 01 00 00 14
diff --git a/arch/arm64/boot/dts/qcom/msm-arm-smmu-8953.dtsi b/arch/arm64/boot/dts/qcom/msm-arm-smmu-8953.dtsi
index e794472..49e840be 100644
--- a/arch/arm64/boot/dts/qcom/msm-arm-smmu-8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm-arm-smmu-8953.dtsi
@@ -1,5 +1,5 @@
/*
- *Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,6 +39,7 @@
/* A test device to test the SMMU operation */
kgsl_iommu_test_device0 {
+ status = "disabled";
compatible = "iommu-debug-test";
/* The SID should be valid one to get the proper
*SMR,S2CR indices.
@@ -47,7 +48,7 @@
};
apps_iommu: qcom,iommu@1e00000 {
- status = "disabled";
+ status = "okay";
compatible = "qcom,qsmmu-v500";
reg = <0x1e00000 0x40000>,
<0x1ee2000 0x20>;
diff --git a/arch/arm64/boot/dts/qcom/msm8937-regulator.dtsi b/arch/arm64/boot/dts/qcom/msm8937-regulator.dtsi
new file mode 100644
index 0000000..57272a4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8937-regulator.dtsi
@@ -0,0 +1,449 @@
+/*
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&rpm_bus {
+ rpm-regulator-smpa1 {
+ status = "okay";
+ pm8937_s1: regulator-s1 {
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1225000>;
+ qcom,init-voltage = <1000000>;
+ status = "okay";
+ };
+ };
+
+ /* VDD_CX supply */
+ rpm-regulator-smpa2 {
+ status = "okay";
+ pm8937_s2_level: regulator-s2-level {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s2_level";
+ qcom,set = <3>;
+ regulator-min-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ regulator-max-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_BINNING>;
+ qcom,use-voltage-level;
+ };
+
+ pm8937_s2_floor_level: regulator-s2-floor-level {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s2_floor_level";
+ qcom,set = <3>;
+ regulator-min-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ regulator-max-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_BINNING>;
+ qcom,use-voltage-floor-level;
+ qcom,always-send-voltage;
+ };
+
+ pm8937_s2_level_ao: regulator-s2-level-ao {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s2_level_ao";
+ qcom,set = <1>;
+ regulator-min-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ regulator-max-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_BINNING>;
+ qcom,use-voltage-level;
+ };
+ };
+
+ rpm-regulator-smpa3 {
+ status = "okay";
+ pm8937_s3: regulator-s3 {
+ regulator-min-microvolt = <1300000>;
+ regulator-max-microvolt = <1300000>;
+ qcom,init-voltage = <1300000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-smpa4 {
+ status = "okay";
+ pm8937_s4: regulator-s4 {
+ regulator-min-microvolt = <2050000>;
+ regulator-max-microvolt = <2050000>;
+ qcom,init-voltage = <2050000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa2 {
+ status = "okay";
+ pm8937_l2: regulator-l2 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ qcom,init-voltage = <1200000>;
+ status = "okay";
+ };
+ };
+
+ /* VDD_MX supply */
+ rpm-regulator-ldoa3 {
+ status = "okay";
+ pm8937_l3_level_ao: regulator-l3-level-ao {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l3_level_ao";
+ qcom,set = <1>;
+ regulator-min-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ regulator-max-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ qcom,use-voltage-level;
+ qcom,always-send-voltage;
+ };
+
+ pm8937_l3_level_so: regulator-l3-level-so {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l3_level_so";
+ qcom,set = <2>;
+ regulator-min-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ regulator-max-microvolt =
+ <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ qcom,init-voltage-level =
+ <RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ qcom,use-voltage-level;
+ };
+ };
+
+ rpm-regulator-ldoa5 {
+ status = "okay";
+ pm8937_l5: regulator-l5 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa6 {
+ status = "okay";
+ pm8937_l6: regulator-l6 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa7 {
+ status = "okay";
+ pm8937_l7: regulator-l7 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+
+ pm8937_l7_ao: regulator-l7-ao {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l7_ao";
+ qcom,set = <1>;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ };
+ };
+
+ rpm-regulator-ldoa8 {
+ status = "okay";
+ pm8937_l8: regulator-l8 {
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2900000>;
+ qcom,init-voltage = <2900000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa9 {
+ status = "okay";
+ pm8937_l9: regulator-l9 {
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3300000>;
+ qcom,init-voltage = <3000000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa10 {
+ status = "okay";
+ pm8937_l10: regulator-l10 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <3000000>;
+ qcom,init-voltage = <2800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa11 {
+ status = "okay";
+ pm8937_l11: regulator-l11 {
+ regulator-min-microvolt = <2950000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,init-voltage = <2950000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa12 {
+ status = "okay";
+ pm8937_l12: regulator-l12 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2950000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa13 {
+ status = "okay";
+ pm8937_l13: regulator-l13 {
+ regulator-min-microvolt = <3075000>;
+ regulator-max-microvolt = <3075000>;
+ qcom,init-voltage = <3075000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa14 {
+ status = "okay";
+ pm8937_l14: regulator-l14 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa15 {
+ status = "okay";
+ pm8937_l15: regulator-l15 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa16 {
+ status = "okay";
+ pm8937_l16: regulator-l16 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ qcom,init-voltage = <1800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa17 {
+ status = "okay";
+ pm8937_l17: regulator-l17 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2900000>;
+ qcom,init-voltage = <2800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa19 {
+ status = "okay";
+ pm8937_l19: regulator-l19 {
+ regulator-min-microvolt = <1225000>;
+ regulator-max-microvolt = <1350000>;
+ qcom,init-voltage = <1225000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa22 {
+ status = "okay";
+ pm8937_l22: regulator-l22 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ qcom,init-voltage = <2800000>;
+ status = "okay";
+ };
+ };
+
+ rpm-regulator-ldoa23 {
+ status = "okay";
+ pm8937_l23: regulator-l23 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ qcom,init-voltage = <1200000>;
+ status = "okay";
+ };
+ };
+};
+
+/* SPM controlled regulators */
+&spmi_bus {
+ qcom,pm8937@1 {
+ /* PM8937 S5 + S6 = VDD_APC supply */
+ pm8937_s5: spm-regulator@2000 {
+ compatible = "qcom,spm-regulator";
+ reg = <0x2000 0x100>;
+ regulator-name = "pm8937_s5";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1350000>;
+ };
+ };
+};
+
+&soc {
+ mem_acc_vreg_corner: regulator@01946004 {
+ compatible = "qcom,mem-acc-regulator";
+ regulator-name = "mem_acc_corner";
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <3>;
+
+ qcom,acc-reg-addr-list =
+ <0x01942138 0x01942130 0x01942120
+ 0x01942124 0x01946000 0x01946004>;
+
+ qcom,acc-init-reg-config = <1 0xff>, <2 0x5555>, <6 0x55>;
+
+ qcom,num-acc-corners = <3>;
+ qcom,boot-acc-corner = <2>;
+ qcom,corner1-reg-config =
+ /* SVS+ => SVS+ */
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ /* SVS+ => NOM */
+ < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ /* SVS+ => TURBO/NOM+ */
+ < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
+ < 3 0x0>, < 4 0x0>, < 5 0x0>;
+
+ qcom,corner2-reg-config =
+ /* NOM => SVS+ */
+ < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
+ /* NOM => NOM */
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ /* NOM => TURBO/NOM+ */
+ < 3 0x0>, < 4 0x0>, < 5 0x0>;
+
+ qcom,corner3-reg-config =
+ /* TURBO/NOM+ => SVS+ */
+ < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
+ < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>,
+ /* TURBO/NOM+ => NOM */
+ < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>,
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ /* TURBO/NOM+ => TURBO/NOM+ */
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>,
+ <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>;
+ };
+
+ apc_vreg_corner: regulator@b018000 {
+ compatible = "qcom,cpr-regulator";
+ reg = <0xb018000 0x1000>, <0xb011064 4>, <0xa4000 0x1000>;
+ reg-names = "rbcpr", "rbcpr_clk", "efuse_addr";
+ interrupts = <0 15 0>;
+ regulator-name = "apc_corner";
+ regulator-min-microvolt = <1>;
+ regulator-max-microvolt = <7>;
+
+ qcom,cpr-fuse-corners = <3>;
+ qcom,cpr-voltage-ceiling = <1155000 1225000 1350000>;
+ qcom,cpr-voltage-floor = <1050000 1050000 1090000>;
+ vdd-apc-supply = <&pm8937_s5>;
+
+ mem-acc-supply = <&mem_acc_vreg_corner>;
+
+ qcom,cpr-ref-clk = <19200>;
+ qcom,cpr-timer-delay = <5000>;
+ qcom,cpr-timer-cons-up = <0>;
+ qcom,cpr-timer-cons-down = <2>;
+ qcom,cpr-irq-line = <0>;
+ qcom,cpr-step-quotient = <10>;
+ qcom,cpr-up-threshold = <2>;
+ qcom,cpr-down-threshold = <4>;
+ qcom,cpr-idle-clocks = <15>;
+ qcom,cpr-gcnt-time = <1>;
+ qcom,vdd-apc-step-up-limit = <1>;
+ qcom,vdd-apc-step-down-limit = <1>;
+ qcom,cpr-apc-volt-step = <5000>;
+
+ qcom,cpr-fuse-row = <67 0>;
+ qcom,cpr-fuse-target-quot = <42 24 6>;
+ qcom,cpr-fuse-ro-sel = <60 57 54>;
+ qcom,cpr-init-voltage-ref = <1155000 1225000 1350000>;
+ qcom,cpr-fuse-init-voltage =
+ <67 36 6 0>,
+ <67 18 6 0>,
+ <67 0 6 0>;
+ qcom,cpr-fuse-quot-offset =
+ <71 26 6 0>,
+ <71 20 6 0>,
+ <70 54 7 0>;
+ qcom,cpr-fuse-quot-offset-scale = <5 5 5>;
+ qcom,cpr-init-voltage-step = <10000>;
+ qcom,cpr-corner-map = <1 2 3 3 3 3 3>;
+ qcom,cpr-corner-frequency-map =
+ <1 960000000>,
+ <2 1094400000>,
+ <3 1209600000>,
+ <4 1248000000>,
+ <5 1344000000>,
+ <6 1401000000>,
+ <7 1497600000>;
+ qcom,speed-bin-fuse-sel = <37 34 3 0>;
+ qcom,cpr-speed-bin-max-corners =
+ <0 0 1 2 6>,
+ <1 0 1 2 7>,
+ <2 0 1 2 3>;
+ qcom,cpr-fuse-revision = <69 39 3 0>;
+ qcom,cpr-quot-adjust-scaling-factor-max = <0 1400 1400>;
+ qcom,cpr-voltage-scaling-factor-max = <0 2000 2000>;
+ qcom,cpr-scaled-init-voltage-as-ceiling;
+ qcom,cpr-fuse-version-map =
+ <0 (-1) 1 (-1) (-1) (-1)>,
+ <(-1) (-1) 2 (-1) (-1) (-1)>,
+ <(-1) (-1) 3 (-1) (-1) (-1)>,
+ <(-1) (-1) (-1) (-1) (-1) (-1)>;
+ qcom,cpr-quotient-adjustment =
+ <(-20) (-40) (-20)>,
+ <0 (-40) (20)>,
+ <0 0 (20)>,
+ <0 0 0>;
+ qcom,cpr-init-voltage-adjustment =
+ <0 0 0>,
+ <(10000) (15000) (20000)>,
+ <0 0 0>,
+ <0 0 0>;
+ qcom,cpr-enable;
+ };
+
+ eldo2_pm8937: eldo2 {
+ compatible = "regulator-fixed";
+ regulator-name = "eldo2_pm8937";
+ startup-delay-us = <0>;
+ enable-active-high;
+ gpio = <&pm8937_gpios 7 0>;
+ regulator-always-on;
+ };
+
+ adv_vreg: adv_vreg {
+ compatible = "regulator-fixed";
+ regulator-name = "adv_vreg";
+ startup-delay-us = <400>;
+ enable-active-high;
+ gpio = <&pm8937_gpios 8 0>;
+ };
+
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-cpu.dtsi b/arch/arm64/boot/dts/qcom/msm8953-cpu.dtsi
index 8d80a40..d202d99 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-cpu.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-cpu.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -60,6 +60,7 @@
efficiency = <1024>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -84,6 +85,7 @@
efficiency = <1024>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
L1_I_1: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
@@ -102,6 +104,7 @@
efficiency = <1024>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
L1_I_2: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
@@ -120,6 +123,7 @@
efficiency = <1024>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;
next-level-cache = <&L2_0>;
+ #cooling-cells = <2>;
L1_I_3: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
@@ -138,6 +142,7 @@
efficiency = <1126>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@@ -162,6 +167,7 @@
efficiency = <1126>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L1_I_101: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
@@ -180,6 +186,7 @@
efficiency = <1126>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L1_I_102: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
@@ -198,6 +205,7 @@
efficiency = <1126>;
sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_1>;
next-level-cache = <&L2_1>;
+ #cooling-cells = <2>;
L1_I_103: l1-icache {
compatible = "arm,arch-cache";
qcom,dump-size = <0x8800>;
diff --git a/arch/arm64/boot/dts/qcom/msm8953-gpu.dtsi b/arch/arm64/boot/dts/qcom/msm8953-gpu.dtsi
new file mode 100644
index 0000000..96e8591
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8953-gpu.dtsi
@@ -0,0 +1,269 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ pil_gpu: qcom,kgsl-hyp {
+ compatible = "qcom,pil-tz-generic";
+ qcom,pas-id = <13>;
+ qcom,firmware-name = "a506_zap";
+ memory-region = <&gpu_mem>;
+ clocks = <&clock_gcc clk_gcc_crypto_clk>,
+ <&clock_gcc clk_gcc_crypto_ahb_clk>,
+ <&clock_gcc clk_gcc_crypto_axi_clk>,
+ <&clock_gcc clk_crypto_clk_src>;
+ clock-names = "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,proxy-clock-names = "scm_core_clk", "scm_iface_clk",
+ "scm_bus_clk", "scm_core_clk_src";
+ qcom,scm_core_clk_src-freq = <80000000>;
+ };
+
+ msm_bus: qcom,kgsl-busmon {
+ label = "kgsl-busmon";
+ compatible = "qcom,kgsl-busmon";
+ };
+
+ gpubw: qcom,gpubw {
+ compatible = "qcom,devbw";
+ governor = "bw_vbif";
+ qcom,src-dst-ports = <26 512>;
+ /*
+ * active-only flag is used while registering the bus
+ * governor.It helps release the bus vote when the CPU
+ * subsystem is inactiv3
+ */
+ qcom,active-only;
+ qcom,bw-tbl =
+ < 0 >, /* off */
+ < 1611 >, /* 1. DDR:211.20 MHz BIMC: 105.60 MHz */
+ < 2124 >, /* 2. DDR:278.40 MHz BIMC: 139.20 MHz */
+ < 2929 >, /* 3. DDR:384.00 MHz BIMC: 192.00 MHz */
+ < 3222 >, /* 4. DDR:422.40 MHz BIMC: 211.20 MHz */
+ < 4248 >, /* 5. DDR:556.80 MHz BIMC: 278.40 MHz */
+ < 5126 >, /* 6. DDR:672.00 MHz BIMC: 336.00 MHz */
+ < 5859 >, /* 7. DDR:768.00 MHz BIMC: 384.00 MHz */
+ < 6152 >, /* 8. DDR:806.40 MHz BIMC: 403.20 MHz */
+ < 6445 >, /* 9. DDR:844.80 MHz BIMC: 422.40 MHz */
+ < 7104 >; /*10. DDR:931.20 MHz BIMC: 465.60 MHz */
+ };
+
+ msm_gpu: qcom,kgsl-3d0@1c00000 {
+ label = "kgsl-3d0";
+ compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
+ status = "ok";
+ reg = <0x1c00000 0x40000>;
+ reg-names = "kgsl_3d0_reg_memory";
+ interrupts = <0 33 0>;
+ interrupt-names = "kgsl_3d0_irq";
+ qcom,id = <0>;
+ qcom,chipid = <0x05000600>;
+
+ qcom,initial-pwrlevel = <4>;
+
+ qcom,idle-timeout = <80>; //msecs
+ qcom,deep-nap-timeout = <100>; //msecs
+ qcom,strtstp-sleepwake;
+
+ qcom,highest-bank-bit = <14>;
+
+ qcom,snapshot-size = <1048576>; //bytes
+
+ clocks = <&clock_gcc_gfx clk_gcc_oxili_gfx3d_clk>,
+ <&clock_gcc_gfx clk_gcc_oxili_ahb_clk>,
+ <&clock_gcc_gfx clk_gcc_bimc_gfx_clk>,
+ <&clock_gcc_gfx clk_gcc_bimc_gpu_clk>,
+ <&clock_gcc_gfx clk_gcc_oxili_timer_clk>,
+ <&clock_gcc_gfx clk_gcc_oxili_aon_clk>;
+
+ clock-names = "core_clk", "iface_clk",
+ "mem_iface_clk", "alt_mem_iface_clk",
+ "rbbmtimer_clk", "alwayson_clk";
+
+ /* Bus Scale Settings */
+ qcom,gpubw-dev = <&gpubw>;
+ qcom,bus-control;
+ qcom,bus-width = <16>;
+ qcom,msm-bus,name = "grp3d";
+ qcom,msm-bus,num-cases = <11>;
+ qcom,msm-bus,num-paths = <1>;
+ qcom,msm-bus,vectors-KBps =
+ <26 512 0 0>, /* off */
+ <26 512 0 1689600>, /* 1. 211.20 MHz */
+ <26 512 0 2227200>, /* 2. 278.40 MHz */
+ <26 512 0 3072000>, /* 3. 384.00 MHz */
+ <26 512 0 3379200>, /* 4. 422.40 MHz */
+ <26 512 0 4454400>, /* 5. 556.80 MHz */
+ <26 512 0 5376000>, /* 6. 672.00 MHz */
+ <26 512 0 6144000>, /* 7. 768.00 MHz */
+ <26 512 0 6451200>, /* 8. 806.40 MHz */
+ <26 512 0 6758400>, /* 9. 844.80 MHz */
+ <26 512 0 7449600>; /*10. 931.20 MHz */
+
+ /* GDSC regulator names */
+ regulator-names = "vddcx", "vdd";
+ /* GDSC oxili regulators */
+ vddcx-supply = <&gdsc_oxili_cx>;
+ vdd-supply = <&gdsc_oxili_gx>;
+
+ /* CPU latency parameter */
+ qcom,pm-qos-active-latency = <213>;
+ qcom,pm-qos-wakeup-latency = <213>;
+
+ /* Quirks */
+ qcom,gpu-quirk-two-pass-use-wfi;
+ qcom,gpu-quirk-dp2clockgating-disable;
+ qcom,gpu-quirk-lmloadkill-disable;
+
+ /* Trace bus */
+ coresight-id = <67>;
+ coresight-name = "coresight-gfx";
+ coresight-nr-inports = <0>;
+ coresight-outports = <0>;
+ coresight-child-list = <&funnel_mm>;
+ coresight-child-ports = <6>;
+
+ /* Enable context aware freq. scaling */
+ qcom,enable-ca-jump;
+
+ /* Context aware jump busy penalty in us */
+ qcom,ca-busy-penalty = <12000>;
+
+ /* Context aware jump target power level */
+ qcom,ca-target-pwrlevel = <3>;
+
+ /* GPU Mempools */
+ qcom,gpu-mempools {
+ #address-cells= <1>;
+ #size-cells = <0>;
+ compatible = "qcom,gpu-mempools";
+
+ qcom,mempool-max-pages = <32768>;
+
+ /* 4K Page Pool configuration */
+ qcom,gpu-mempool@0 {
+ reg = <0>;
+ qcom,mempool-page-size = <4096>;
+ };
+ /* 64K Page Pool configuration */
+ qcom,gpu-mempool@1 {
+ reg = <1>;
+ qcom,mempool-page-size = <65536>;
+ };
+ };
+
+ /* Power levels */
+ qcom,gpu-pwrlevels {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,gpu-pwrlevels";
+
+ /* TURBO */
+ qcom,gpu-pwrlevel@0 {
+ reg = <0>;
+ qcom,gpu-freq = <650000000>;
+ qcom,bus-freq = <10>;
+ qcom,bus-min = <10>;
+ qcom,bus-max = <10>;
+ };
+
+ /* NOM+ */
+ qcom,gpu-pwrlevel@1 {
+ reg = <1>;
+ qcom,gpu-freq = <560000000>;
+ qcom,bus-freq = <10>;
+ qcom,bus-min = <8>;
+ qcom,bus-max = <10>;
+ };
+
+ /* NOM */
+ qcom,gpu-pwrlevel@2 {
+ reg = <2>;
+ qcom,gpu-freq = <510000000>;
+ qcom,bus-freq = <9>;
+ qcom,bus-min = <6>;
+ qcom,bus-max = <10>;
+ };
+
+ /* SVS+ */
+ qcom,gpu-pwrlevel@3 {
+ reg = <3>;
+ qcom,gpu-freq = <400000000>;
+ qcom,bus-freq = <7>;
+ qcom,bus-min = <5>;
+ qcom,bus-max = <8>;
+ };
+
+ /* SVS */
+ qcom,gpu-pwrlevel@4 {
+ reg = <4>;
+ qcom,gpu-freq = <320000000>;
+ qcom,bus-freq = <4>;
+ qcom,bus-min = <2>;
+ qcom,bus-max = <6>;
+ };
+
+ /* Low SVS */
+ qcom,gpu-pwrlevel@5 {
+ reg = <5>;
+ qcom,gpu-freq = <216000000>;
+ qcom,bus-freq = <1>;
+ qcom,bus-min = <1>;
+ qcom,bus-max = <4>;
+ };
+
+ /* Min SVS */
+ qcom,gpu-pwrlevel@6 {
+ reg = <6>;
+ qcom,gpu-freq = <133300000>;
+ qcom,bus-freq = <1>;
+ qcom,bus-min = <1>;
+ qcom,bus-max = <4>;
+ };
+ /* XO */
+ qcom,gpu-pwrlevel@7 {
+ reg = <7>;
+ qcom,gpu-freq = <19200000>;
+ qcom,bus-freq = <0>;
+ qcom,bus-min = <0>;
+ qcom,bus-max = <0>;
+ };
+ };
+ };
+
+ kgsl_msm_iommu: qcom,kgsl-iommu@1c40000 {
+ compatible = "qcom,kgsl-smmu-v2";
+
+ reg = <0x1c40000 0x10000>;
+ qcom,protect = <0x40000 0x10000>;
+ qcom,micro-mmu-control = <0x6000>;
+
+ clocks = <&clock_gcc_gfx clk_gcc_oxili_ahb_clk>,
+ <&clock_gcc_gfx clk_gcc_bimc_gfx_clk>;
+
+ clock-names = "gpu_ahb_clk", "gcc_bimc_gfx_clk";
+
+ qcom,secure_align_mask = <0xfff>;
+ qcom,retention;
+ gfx3d_user: gfx3d_user {
+ compatible = "qcom,smmu-kgsl-cb";
+ label = "gfx3d_user";
+ iommus = <&kgsl_smmu 0>;
+ qcom,gpu-offset = <0x48000>;
+ };
+ gfx3d_secure: gfx3d_secure {
+ compatible = "qcom,smmu-kgsl-cb";
+ iommus = <&kgsl_smmu 2>;
+ memory-region = <&secure_mem>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-pm.dtsi b/arch/arm64/boot/dts/qcom/msm8953-pm.dtsi
index 0cbb0f2..da4f4df 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-pm.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-pm.dtsi
@@ -264,4 +264,19 @@
};
};
};
+
+ qcom,rpm-stats@200000 {
+ compatible = "qcom,rpm-stats";
+ reg = <0x200000 0x1000>, <0x290014 0x4>, <0x29001c 0x4>;
+ reg-names = "phys_addr_base", "offset_addr";
+ };
+
+ qcom,rpm-master-stats@60150 {
+ compatible = "qcom,rpm-master-stats";
+ reg = <0x60150 0x5000>;
+ qcom,masters = "APSS", "MPSS", "PRONTO", "TZ", "LPASS";
+ qcom,master-stats-version = <2>;
+ qcom,master-offset = <4096>;
+ };
+
};
diff --git a/arch/arm64/boot/dts/qcom/msm8953-regulator.dtsi b/arch/arm64/boot/dts/qcom/msm8953-regulator.dtsi
index e4634c4..9468181 100644
--- a/arch/arm64/boot/dts/qcom/msm8953-regulator.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953-regulator.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -60,6 +60,14 @@
<RPM_SMD_REGULATOR_LEVEL_TURBO>;
qcom,use-voltage-level;
};
+
+ cx_cdev: regulator-cx-cdev {
+ compatible = "qcom,regulator-cooling-device";
+ regulator-cdev-supply = <&pm8953_s2_floor_level>;
+ regulator-levels = <RPM_SMD_REGULATOR_LEVEL_NOM
+ RPM_SMD_REGULATOR_LEVEL_RETENTION>;
+ #cooling-cells = <2>;
+ };
};
rpm-regulator-smpa3 {
diff --git a/arch/arm64/boot/dts/qcom/msm8953-thermal.dtsi b/arch/arm64/boot/dts/qcom/msm8953-thermal.dtsi
new file mode 100644
index 0000000..208ef41
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/msm8953-thermal.dtsi
@@ -0,0 +1,1022 @@
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/thermal/thermal.h>
+
+&soc {
+ qmi-tmd-devices {
+ compatible = "qcom,qmi_cooling_devices";
+
+ modem {
+ qcom,instance-id = <0x0>;
+
+ modem_pa: modem_pa {
+ qcom,qmi-dev-name = "pa";
+ #cooling-cells = <2>;
+ };
+
+ modem_proc: modem_proc {
+ qcom,qmi-dev-name = "modem";
+ #cooling-cells = <2>;
+ };
+
+ modem_current: modem_current {
+ qcom,qmi-dev-name = "modem_current";
+ #cooling-cells = <2>;
+ };
+
+ modem_vdd: modem_vdd {
+ qcom,qmi-dev-name = "cpuv_restriction_cold";
+ #cooling-cells = <2>;
+ };
+ };
+ };
+};
+
+&thermal_zones {
+ mdm-core-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "user_space";
+ thermal-sensors = <&tsens0 1>;
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ qdsp-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "user_space";
+ thermal-sensors = <&tsens0 2>;
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ camera-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "user_space";
+ thermal-sensors = <&tsens0 3>;
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc1-cpu0-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 4>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc1-cpu1-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 5>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc1-cpu2-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 6>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc1-cpu3-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 7>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc1-l2-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 8>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc0-cpu0-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 9>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc0-cpu1-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 10>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc0-cpu2-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 11>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc0-cpu3-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 12>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ apc0-l2-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 13>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpu0-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 14>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpu1-usr {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 15>;
+ thermal-governor = "user_space";
+ trips {
+ active-config0 {
+ temperature = <125000>;
+ hysteresis = <1000>;
+ type = "passive";
+ };
+ };
+ };
+
+ gpu1-step {
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 15>;
+ thermal-governor = "step_wise";
+ trips {
+ gpu_trip0: gpu-trip0 {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+ };
+
+ deca-cpu-max-step {
+ polling-delay-passive = <50>;
+ polling-delay = <100>;
+ thermal-governor = "step_wise";
+ trips {
+ cpu_trip:cpu-trip {
+ temperature = <95000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU0 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu1_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU1 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu2_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU2 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu3_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU3 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu4_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU4 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu5_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU5 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu6_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU6 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ cpu7_cdev {
+ trip = <&cpu_trip>;
+ cooling-device =
+ <&CPU7 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ };
+ };
+
+ pop-mem-step {
+ polling-delay-passive = <250>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 2>;
+ thermal-governor = "step_wise";
+ trips {
+ pop_trip: pop-trip {
+ temperature = <70000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ pop_cdev0 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU0 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev1 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU1 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev2 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU2 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev3 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU3 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev4 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU4 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev5 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU5 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev6 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU6 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ pop_cdev7 {
+ trip = <&pop_trip>;
+ cooling-device =
+ <&CPU7 THERMAL_NO_LIMIT
+ (THERMAL_MAX_LIMIT-1)>;
+ };
+ };
+ };
+
+ apc1-cpu0-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 4>;
+ thermal-governor = "step_wise";
+ trips {
+ apc1_cpu0_trip: apc1-cpu0-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu4_cdev {
+ trip = <&apc1_cpu0_trip>;
+ cooling-device =
+ <&CPU4 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc1-cpu1-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 5>;
+ thermal-governor = "step_wise";
+ trips {
+ apc1_cpu1_trip: apc1-cpu1-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu5_cdev {
+ trip = <&apc1_cpu1_trip>;
+ cooling-device =
+ <&CPU5 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc1-cpu2-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 6>;
+ thermal-governor = "step_wise";
+ trips {
+ apc1_cpu2_trip: apc1-cpu2-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu6_cdev {
+ trip = <&apc1_cpu2_trip>;
+ cooling-device =
+ <&CPU6 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc1-cpu3-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 7>;
+ thermal-governor = "step_wise";
+ trips {
+ apc1_cpu3_trip: apc1-cpu3-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu7_cdev {
+ trip = <&apc1_cpu3_trip>;
+ cooling-device =
+ <&CPU7 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc0-cpu0-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 9>;
+ thermal-governor = "step_wise";
+ trips {
+ apc0_cpu0_trip: apc0-cpu0-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_cdev {
+ trip = <&apc0_cpu0_trip>;
+ cooling-device =
+ <&CPU0 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc0-cpu1-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 10>;
+ thermal-governor = "step_wise";
+ trips {
+ apc0_cpu1_trip: apc0-cpu1-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu1_cdev {
+ trip = <&apc0_cpu1_trip>;
+ cooling-device =
+ <&CPU1 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc0-cpu2-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 11>;
+ thermal-governor = "step_wise";
+ trips {
+ apc0_cpu2_trip: apc0-cpu2-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu2_cdev {
+ trip = <&apc0_cpu2_trip>;
+ cooling-device =
+ <&CPU2 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ apc0-cpu3-step {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens0 12>;
+ thermal-governor = "step_wise";
+ trips {
+ apc0_cpu3_trip: apc0-cpu3-trip {
+ temperature = <105000>;
+ hysteresis = <15000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu3_cdev {
+ trip = <&apc0_cpu3_trip>;
+ cooling-device =
+ <&CPU3 THERMAL_MAX_LIMIT
+ THERMAL_MAX_LIMIT>;
+ };
+ };
+ };
+
+ mdm-core-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 1>;
+ tracks-low;
+ trips {
+ mdm_core_trip: mdm-core-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&mdm_core_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&mdm_core_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&mdm_core_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ qdsp-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 2>;
+ tracks-low;
+ trips {
+ qdsp_trip: qdsp-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&qdsp_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&qdsp_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&qdsp_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ camera-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 3>;
+ tracks-low;
+ trips {
+ camera_trip: camera-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&camera_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&camera_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&camera_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc1-cpu0-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 4>;
+ tracks-low;
+ trips {
+ cpu4_trip: apc1-cpu0-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu4_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu4_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu4_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc1-cpu1-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 5>;
+ tracks-low;
+ trips {
+ cpu5_trip: apc1-cpu0-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu5_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu5_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu5_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc1-cpu2-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 6>;
+ tracks-low;
+ trips {
+ cpu6_trip: apc1-cpu2-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu6_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu6_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu6_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc1-cpu3-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 7>;
+ tracks-low;
+ trips {
+ cpu7_trip: apc1-cpu3-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu7_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu7_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu7_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc1-l2-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 8>;
+ tracks-low;
+ trips {
+ apc1_l2_trip: apc1-l2-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&apc1_l2_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&apc1_l2_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&apc1_l2_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc0-cpu0-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 9>;
+ tracks-low;
+ trips {
+ cpu0_trip: apc0-cpu0-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu0_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu0_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu0_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc0-cpu1-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 10>;
+ tracks-low;
+ trips {
+ cpu1_trip: apc0-cpu1-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu1_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu1_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu1_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc0-cpu2-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 11>;
+ tracks-low;
+ trips {
+ cpu2_trip: apc0-cpu2-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu2_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu2_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu2_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc0-cpu3-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 12>;
+ tracks-low;
+ trips {
+ cpu3_trip: apc0-cpu3-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&cpu3_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&cpu3_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&cpu3_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ apc0-l2-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 13>;
+ tracks-low;
+ trips {
+ apc0_l2_trip: apc0-l2-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&apc0_l2_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&apc0_l2_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&apc0_l2_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ gpu0-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 14>;
+ tracks-low;
+ trips {
+ gpu0_trip: gpu0-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&gpu0_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&gpu0_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&gpu0_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+
+ gpu1-lowf {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-governor = "low_limits_floor";
+ thermal-sensors = <&tsens0 15>;
+ tracks-low;
+ trips {
+ gpu1_trip: gpu1-trip {
+ temperature = <5000>;
+ hysteresis = <5000>;
+ type = "passive";
+ };
+ };
+ cooling-maps {
+ cpu0_vdd_cdev {
+ trip = <&gpu1_trip>;
+ cooling-device = <&CPU0 (THERMAL_MAX_LIMIT - 4)
+ (THERMAL_MAX_LIMIT - 4)>;
+ };
+ cx_vdd_cdev {
+ trip = <&gpu1_trip>;
+ cooling-device = <&cx_cdev 0 0>;
+ };
+ modem_vdd_cdev {
+ trip = <&gpu1_trip>;
+ cooling-device = <&modem_vdd 0 0>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qcom/msm8953.dtsi
index b4631e9..0d7932b 100644
--- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -28,6 +28,32 @@
bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
};
+ firmware: firmware {
+ android {
+ compatible = "android,firmware";
+ fstab {
+ compatible = "android,fstab";
+ vendor {
+ compatible = "android,vendor";
+ dev = "/dev/block/platform/soc/7824900.sdhci/by-name/vendor";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,discard";
+ fsmgr_flags = "wait";
+ status = "ok";
+ };
+ system {
+ compatible = "android,system";
+ dev = "/dev/block/platform/soc/7824900.sdhci/by-name/system";
+ type = "ext4";
+ mnt_flags = "ro,barrier=1,discard";
+ fsmgr_flags = "wait";
+ status = "ok";
+ };
+
+ };
+ };
+ };
+
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
@@ -136,6 +162,7 @@
#include "msm8953-coresight.dtsi"
#include "msm8953-ion.dtsi"
#include "msm-arm-smmu-8953.dtsi"
+#include "msm8953-gpu.dtsi"
&soc {
#address-cells = <1>;
@@ -276,217 +303,7 @@
qcom,pipe-attr-ee;
};
- thermal_zones: thermal-zones {
- mdm-core-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-governor = "user_space";
- thermal-sensors = <&tsens0 1>;
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- qdsp-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-governor = "user_space";
- thermal-sensors = <&tsens0 2>;
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- camera-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-governor = "user_space";
- thermal-sensors = <&tsens0 3>;
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc1_cpu0-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 4>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc1_cpu1-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 5>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc1_cpu2-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 6>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc1_cpu3-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 7>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc1_l2-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 8>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc0_cpu0-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 9>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc0_cpu1-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 10>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc0_cpu2-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 11>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc0_cpu3-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 12>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- apc0_l2-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 13>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- gpu0-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 14>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
-
- gpu1-usr {
- polling-delay-passive = <0>;
- polling-delay = <0>;
- thermal-sensors = <&tsens0 15>;
- thermal-governor = "user_space";
- trips {
- active-config0 {
- temperature = <125000>;
- hysteresis = <1000>;
- type = "passive";
- };
- };
- };
- };
+ thermal_zones: thermal-zones {};
tsens0: tsens@4a8000 {
compatible = "qcom,msm8953-tsens";
@@ -1788,6 +1605,47 @@
qcom,reset-ep-after-lpm-resume;
};
+ qcom,mss@4080000 {
+ compatible = "qcom,pil-q6v55-mss";
+ reg = <0x04080000 0x100>,
+ <0x0194f000 0x010>,
+ <0x01950000 0x008>,
+ <0x01951000 0x008>,
+ <0x04020000 0x040>,
+ <0x01871000 0x004>;
+ reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc",
+ "rmb_base", "restart_reg";
+
+ interrupts = <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>;
+ vdd_mss-supply = <&pm8953_s1>;
+ vdd_cx-supply = <&pm8953_s2_level>;
+ vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ vdd_mx-supply = <&pm8953_s7_level_ao>;
+ vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+ vdd_pll-supply = <&pm8953_l7>;
+ qcom,vdd_pll = <1800000>;
+ vdd_mss-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>;
+
+ clocks = <&clock_gcc clk_xo_pil_mss_clk>,
+ <&clock_gcc clk_gcc_mss_cfg_ahb_clk>,
+ <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>,
+ <&clock_gcc clk_gcc_boot_rom_ahb_clk>;
+ clock-names = "xo", "iface_clk", "bus_clk", "mem_clk";
+ qcom,proxy-clock-names = "xo";
+ qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk";
+
+ qcom,pas-id = <5>;
+ qcom,pil-mss-memsetup;
+ qcom,firmware-name = "modem";
+ qcom,pil-self-auth;
+ qcom,sysmon-id = <0>;
+ qcom,ssctl-instance-id = <0x12>;
+ qcom,qdsp6v56-1-10;
+ qcom,reset-clk;
+
+ memory-region = <&modem_mem>;
+ };
+
qcom,lpass@c200000 {
compatible = "qcom,pil-tz-generic";
reg = <0xc200000 0x00100>;
@@ -1894,6 +1752,7 @@
#include "pm8953.dtsi"
#include "msm8953-regulator.dtsi"
#include "msm-gdsc-8916.dtsi"
+#include "msm8953-thermal.dtsi"
&gdsc_venus {
clock-names = "bus_clk", "core_clk";
diff --git a/arch/arm64/boot/dts/qcom/pm8937-rpm-regulator.dtsi b/arch/arm64/boot/dts/qcom/pm8937-rpm-regulator.dtsi
new file mode 100644
index 0000000..33a5e16
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8937-rpm-regulator.dtsi
@@ -0,0 +1,366 @@
+/*
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&rpm_bus {
+ rpm-regulator-smpa1 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <1>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ status = "disabled";
+
+ regulator-s1 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s1";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-smpa2 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <2>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ status = "disabled";
+
+ regulator-s2 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s2";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-smpa3 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <3>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ status = "disabled";
+
+ regulator-s3 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s3";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-smpa4 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "smpa";
+ qcom,resource-id = <4>;
+ qcom,regulator-type = <1>;
+ qcom,hpm-min-load = <100000>;
+ status = "disabled";
+
+ regulator-s4 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_s4";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa2 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <2>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l2 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l2";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa3 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <3>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l3 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l3";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa5 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <5>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l5 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l5";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa6 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <6>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l6 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l6";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa7 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <7>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l7 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l7";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa8 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <8>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l8 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l8";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa9 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <9>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l9 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l9";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa10 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <10>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l10 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l10";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa11 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <11>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l11 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l11";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa12 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <12>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l12 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l12";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa13 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <13>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ status = "disabled";
+
+ regulator-l13 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l13";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa14 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <14>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ status = "disabled";
+
+ regulator-l14 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l14";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa15 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <15>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ status = "disabled";
+
+ regulator-l15 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l15";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa16 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <16>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <5000>;
+ status = "disabled";
+
+ regulator-l16 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l16";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa17 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <17>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l17 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l17";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa19 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <19>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l19 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l19";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa22 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <22>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l22 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l22";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+
+ rpm-regulator-ldoa23 {
+ compatible = "qcom,rpm-smd-regulator-resource";
+ qcom,resource-name = "ldoa";
+ qcom,resource-id = <23>;
+ qcom,regulator-type = <0>;
+ qcom,hpm-min-load = <10000>;
+ status = "disabled";
+
+ regulator-l23 {
+ compatible = "qcom,rpm-smd-regulator";
+ regulator-name = "pm8937_l23";
+ qcom,set = <3>;
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/pm8937.dtsi b/arch/arm64/boot/dts/qcom/pm8937.dtsi
new file mode 100644
index 0000000..086a929
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pm8937.dtsi
@@ -0,0 +1,383 @@
+/*
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&spmi_bus {
+
+ qcom,pm8937@0 {
+ spmi-slave-container;
+ reg = <0x0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm8937_revid: qcom,revid@100 {
+ compatible = "qcom,qpnp-revid";
+ reg = <0x100 0x100>;
+ };
+
+ qcom,power-on@800 {
+ compatible = "qcom,qpnp-power-on";
+ reg = <0x800 0x100>;
+ interrupts = <0x0 0x8 0x0>,
+ <0x0 0x8 0x1>,
+ <0x0 0x8 0x4>,
+ <0x0 0x8 0x5>;
+ interrupt-names = "kpdpwr", "resin",
+ "resin-bark", "kpdpwr-resin-bark";
+ qcom,pon-dbc-delay = <15625>;
+ qcom,system-reset;
+
+ qcom,pon_1 {
+ qcom,pon-type = <0>;
+ qcom,pull-up = <1>;
+ linux,code = <116>;
+ };
+
+ qcom,pon_2 {
+ qcom,pon-type = <1>;
+ qcom,pull-up = <1>;
+ linux,code = <114>;
+ };
+ };
+
+ pm8937_temp_alarm: qcom,temp-alarm@2400 {
+ compatible = "qcom,qpnp-temp-alarm";
+ reg = <0x2400 0x100>;
+ interrupts = <0x0 0x24 0x0>;
+ label = "pm8937_tz";
+ qcom,channel-num = <8>;
+ qcom,threshold-set = <0>;
+ qcom,temp_alarm-vadc = <&pm8937_vadc>;
+ };
+
+ pm8937_coincell: qcom,coincell@2800 {
+ compatible = "qcom,qpnp-coincell";
+ reg = <0x2800 0x100>;
+ };
+
+ pm8937_rtc: qcom,pm8937_rtc {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-rtc";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qcom,qpnp-rtc-write = <0>;
+ qcom,qpnp-rtc-alarm-pwrup = <0>;
+
+ qcom,pm8937_rtc_rw@6000 {
+ reg = <0x6000 0x100>;
+ };
+
+ qcom,pm8937_rtc_alarm@6100 {
+ reg = <0x6100 0x100>;
+ interrupts = <0x0 0x61 0x1>;
+ };
+ };
+
+ pm8937_mpps: mpps {
+ compatible = "qcom,qpnp-pin";
+ spmi-dev-container;
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8937-mpp";
+
+ mpp@a000 {
+ reg = <0xa000 0x100>;
+ qcom,pin-num = <1>;
+ status = "disabled";
+ };
+
+ mpp@a100 {
+ /* MPP2 - PA_THERM config */
+ reg = <0xa100 0x100>;
+ qcom,pin-num = <2>;
+ qcom,mode = <4>; /* AIN input */
+ qcom,invert = <1>; /* Enable MPP */
+ qcom,ain-route = <1>; /* AMUX 6 */
+ qcom,master-en = <1>;
+ qcom,src-sel = <0>; /* Function constant */
+ };
+
+ mpp@a200 {
+ reg = <0xa200 0x100>;
+ qcom,pin-num = <3>;
+ status = "disabled";
+ };
+
+ mpp@a300 {
+ /* MPP4 - CASE_THERM config */
+ reg = <0xa300 0x100>;
+ qcom,pin-num = <4>;
+ qcom,mode = <4>; /* AIN input */
+ qcom,invert = <1>; /* Enable MPP */
+ qcom,ain-route = <3>; /* AMUX 8 */
+ qcom,master-en = <1>;
+ qcom,src-sel = <0>; /* Function constant */
+ };
+ };
+
+ pm8937_gpios: gpios {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pm8937-gpio";
+
+ gpio@c000 {
+ reg = <0xc000 0x100>;
+ qcom,pin-num = <1>;
+ status = "disabled";
+ };
+
+ gpio@c100 {
+ reg = <0xc100 0x100>;
+ qcom,pin-num = <2>;
+ status = "disabled";
+ };
+
+ gpio@c200 {
+ reg = <0xc200 0x100>;
+ qcom,pin-num = <3>;
+ status = "disabled";
+ };
+
+ gpio@c300 {
+ reg = <0xc300 0x100>;
+ qcom,pin-num = <4>;
+ status = "disabled";
+ };
+
+ gpio@c400 {
+ reg = <0xc400 0x100>;
+ qcom,pin-num = <5>;
+ status = "disabled";
+ };
+
+ gpio@c500 {
+ reg = <0xc500 0x100>;
+ qcom,pin-num = <6>;
+ status = "disabled";
+ };
+
+ gpio@c600 {
+ reg = <0xc600 0x100>;
+ qcom,pin-num = <7>;
+ status = "disabled";
+ };
+
+ gpio@c700 {
+ reg = <0xc700 0x100>;
+ qcom,pin-num = <8>;
+ status = "disabled";
+ };
+ };
+
+ pm8937_vadc: vadc@3100 {
+ compatible = "qcom,qpnp-vadc";
+ reg = <0x3100 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x31 0x0>;
+ interrupt-names = "eoc-int-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+ qcom,vadc-poll-eoc;
+
+ chan@5 {
+ label = "vcoin";
+ reg = <5>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@7 {
+ label = "vph_pwr";
+ reg = <7>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@8 {
+ label = "die_temp";
+ reg = <8>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <3>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@9 {
+ label = "ref_625mv";
+ reg = <9>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@a {
+ label = "ref_1250v";
+ reg = <0xa>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@c {
+ label = "ref_buf_625mv";
+ reg = <0xc>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@36 {
+ label = "pa_therm0";
+ reg = <0x36>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@11 {
+ label = "pa_therm1";
+ reg = <0x11>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
+
+ chan@32 {
+ label = "xo_therm";
+ reg = <0x32>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <4>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
+
+ chan@3c {
+ label = "xo_therm_buf";
+ reg = <0x3c>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <4>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
+
+ chan@13 {
+ label = "case_therm";
+ reg = <0x13>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ qcom,vadc-thermal-node;
+ };
+ };
+
+ pm8937_adc_tm: vadc@3400 {
+ compatible = "qcom,qpnp-adc-tm";
+ reg = <0x3400 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x0 0x34 0x0>,
+ <0x0 0x34 0x3>,
+ <0x0 0x34 0x4>;
+ interrupt-names = "eoc-int-en-set",
+ "high-thr-en-set",
+ "low-thr-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+ qcom,adc_tm-vadc = <&pm8937_vadc>;
+
+ chan@36 {
+ label = "pa_therm0";
+ reg = <0x36>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "ratiometric";
+ qcom,scale-function = <2>;
+ qcom,hw-settle-time = <2>;
+ qcom,fast-avg-setup = <0>;
+ qcom,btm-channel-number = <0x48>;
+ qcom,thermal-node;
+ };
+
+ chan@7 {
+ label = "vph_pwr";
+ reg = <0x7>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ qcom,btm-channel-number = <0x68>;
+ };
+ };
+
+ };
+
+ pm8937_1: qcom,pm8937@1 {
+ spmi-slave-container;
+ reg = <0x1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pm8937_pwm: pwm@bc00 {
+ status = "disabled";
+ compatible = "qcom,qpnp-pwm";
+ reg = <0xbc00 0x100>;
+ reg-names = "qpnp-lpg-channel-base";
+ qcom,channel-id = <0>;
+ qcom,supported-sizes = <6>, <9>;
+ #pwm-cells = <2>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/pm8953.dtsi b/arch/arm64/boot/dts/qcom/pm8953.dtsi
index 0ddb9f5..d77de72 100644
--- a/arch/arm64/boot/dts/qcom/pm8953.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8953.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -49,7 +49,7 @@
};
};
- pm8953_temp_alarm: qcom,temp-alarm@2400 {
+ pm8953_tz: qcom,temp-alarm@2400 {
compatible = "qcom,qpnp-temp-alarm";
reg = <0x2400 0x100>;
interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
@@ -57,6 +57,7 @@
qcom,channel-num = <8>;
qcom,threshold-set = <0>;
qcom,temp_alarm-vadc = <&pm8953_vadc>;
+ #thermal-sensor-cells = <0>;
};
pm8953_coincell: qcom,coincell@2800 {
@@ -65,105 +66,34 @@
};
pm8953_mpps: mpps {
- compatible = "qcom,qpnp-pin";
- spmi-dev-container;
+ compatible = "qcom,spmi-mpp";
+ reg = <0xa000 0x400>;
+
+ interrupts = <0x0 0xa0 0 IRQ_TYPE_NONE>,
+ <0x0 0xa1 0 IRQ_TYPE_NONE>,
+ <0x0 0xa2 0 IRQ_TYPE_NONE>,
+ <0x0 0xa3 0 IRQ_TYPE_NONE>;
+ interrupt-names = "pm8953_mpp1", "pm8953_mpp2",
+ "pm8953_mpp3", "pm8953_mpp4";
+
gpio-controller;
#gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pm8953-mpp";
-
- mpp@a000 {
- reg = <0xa000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- mpp@a100 {
- reg = <0xa100 0x100>;
- qcom,pin-num = <2>;
- /* MPP2 - PA_THERM config */
- qcom,mode = <4>; /* AIN input */
- qcom,invert = <1>; /* Enable MPP */
- qcom,ain-route = <1>; /* AMUX 6 */
- qcom,master-en = <1>;
- qcom,src-sel = <0>; /* Function constant */
- };
-
- mpp@a200 {
- reg = <0xa200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- mpp@a300 {
- reg = <0xa300 0x100>;
- qcom,pin-num = <4>;
- /* MPP4 - CASE_THERM config */
- qcom,mode = <4>; /* AIN input */
- qcom,invert = <1>; /* Enable MPP */
- qcom,ain-route = <3>; /* AMUX 8 */
- qcom,master-en = <1>;
- qcom,src-sel = <0>; /* Function constant */
- };
};
pm8953_gpios: gpios {
- spmi-dev-container;
- compatible = "qcom,qpnp-pin";
+ compatible = "qcom,spmi-gpio";
+ reg = <0xc000 0x800>;
+
+ interrupts = <0x0 0xc0 0 IRQ_TYPE_NONE>,
+ <0x0 0xc3 0 IRQ_TYPE_NONE>,
+ <0x0 0xc6 0 IRQ_TYPE_NONE>,
+ <0x0 0xc7 0 IRQ_TYPE_NONE>;
+ interrupt-names = "pm8953_gpio1", "pm8953_gpio4",
+ "pm8953_gpio7", "pm8953_gpio8";
+
gpio-controller;
#gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pm8953-gpio";
-
- gpio@c000 {
- reg = <0xc000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- gpio@c100 {
- reg = <0xc100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
-
- gpio@c200 {
- reg = <0xc200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- gpio@c300 {
- reg = <0xc300 0x100>;
- qcom,pin-num = <4>;
- status = "disabled";
- };
-
- gpio@c400 {
- reg = <0xc400 0x100>;
- qcom,pin-num = <5>;
- status = "disabled";
- };
-
- gpio@c500 {
- reg = <0xc500 0x100>;
- qcom,pin-num = <6>;
- status = "disabled";
- };
-
- gpio@c600 {
- reg = <0xc600 0x100>;
- qcom,pin-num = <7>;
- status = "disabled";
- };
-
- gpio@c700 {
- reg = <0xc700 0x100>;
- qcom,pin-num = <8>;
- status = "disabled";
- };
+ qcom,gpios-disallowed = <2 3 5 6>;
};
pm8953_vadc: vadc@3100 {
@@ -373,3 +303,29 @@
};
};
};
+
+&thermal_zones {
+ pm8953_tz {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&pm8953_tz>;
+
+ trips {
+ pm8953_trip0: pm8953-trip0 {
+ temperature = <105000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ pm8953_trip1: pm8953-trip1 {
+ temperature = <125000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ pm8953_trip2: pm8953-trip2 {
+ temperature = <145000>;
+ hysteresis = <0>;
+ type = "passive";
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/pmi632.dtsi b/arch/arm64/boot/dts/qcom/pmi632.dtsi
index b0fb23c..fe844bf 100644
--- a/arch/arm64/boot/dts/qcom/pmi632.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi632.dtsi
@@ -66,6 +66,13 @@
#address-cells = <2>;
#size-cells = <0>;
+ pmi632_vib: qcom,vibrator@5700 {
+ compatible = "qcom,qpnp-vibrator-ldo";
+ reg = <0x5700 0x100>;
+ qcom,vib-ldo-volt-uv = <1504000>;
+ qcom,vib-overdrive-volt-uv = <3544000>;
+ };
+
pmi632_pwm_1: pwm@b300 {
compatible = "qcom,qpnp-pwm";
reg = <0xb300 0x100>;
diff --git a/arch/arm64/boot/dts/qcom/pmi8937.dtsi b/arch/arm64/boot/dts/qcom/pmi8937.dtsi
new file mode 100644
index 0000000..d5b9945
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmi8937.dtsi
@@ -0,0 +1,540 @@
+/*
+ * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/msm/power-on.h>
+
+&spmi_bus {
+
+ qcom,pmi8937@2 {
+ spmi-slave-container;
+ reg = <0x2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pmi8937_revid: qcom,revid@100 {
+ compatible = "qcom,qpnp-revid";
+ reg = <0x100 0x100>;
+ };
+
+ qcom,power-on@800 {
+ compatible = "qcom,qpnp-power-on";
+ reg = <0x800 0x100>;
+ qcom,secondary-pon-reset;
+ qcom,hard-reset-poweroff-type =
+ <PON_POWER_OFF_SHUTDOWN>;
+
+ pon_perph_reg: qcom,pon_perph_reg {
+ regulator-name = "pon_spare_reg";
+ qcom,pon-spare-reg-addr = <0x8c>;
+ qcom,pon-spare-reg-bit = <1>;
+ };
+ };
+
+ pmi8937_vadc: vadc@3100 {
+ compatible = "qcom,qpnp-vadc";
+ reg = <0x3100 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x2 0x31 0x0>;
+ interrupt-names = "eoc-int-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+ qcom,vadc-poll-eoc;
+
+ chan@0 {
+ label = "usbin";
+ reg = <0>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <4>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@1 {
+ label = "dcin";
+ reg = <1>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <4>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@3 {
+ label = "vchg_sns";
+ reg = <3>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@9 {
+ label = "ref_625mv";
+ reg = <9>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@a {
+ label = "ref_1250v";
+ reg = <0xa>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@d {
+ label = "chg_temp";
+ reg = <0xd>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <16>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@43 {
+ label = "usb_dp";
+ reg = <0x43>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@44 {
+ label = "usb_dm";
+ reg = <0x44>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+ };
+
+ pmi8937_mpps: mpps {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pmi8937-mpp";
+
+ mpp@a000 {
+ reg = <0xa000 0x100>;
+ qcom,pin-num = <1>;
+ status = "disabled";
+ };
+
+ mpp@a100 {
+ reg = <0xa100 0x100>;
+ qcom,pin-num = <2>;
+ status = "disabled";
+ };
+
+ mpp@a300 {
+ reg = <0xa300 0x100>;
+ qcom,pin-num = <4>;
+ status = "disabled";
+ };
+ };
+
+ pmi8937_charger: qcom,qpnp-smbcharger {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-smbcharger";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qcom,iterm-ma = <100>;
+ qcom,float-voltage-mv = <4200>;
+ qcom,resume-delta-mv = <200>;
+ qcom,chg-inhibit-fg;
+ qcom,rparasitic-uohm = <100000>;
+ qcom,bms-psy-name = "bms";
+ qcom,thermal-mitigation = <1500 700 600 0>;
+ qcom,parallel-usb-min-current-ma = <1400>;
+ qcom,parallel-usb-9v-min-current-ma = <900>;
+ qcom,parallel-allowed-lowering-ma = <500>;
+ qcom,pmic-revid = <&pmi8937_revid>;
+ qcom,force-aicl-rerun;
+ qcom,aicl-rerun-period-s = <180>;
+ qcom,autoadjust-vfloat;
+
+ qcom,chgr@1000 {
+ reg = <0x1000 0x100>;
+ interrupts = <0x2 0x10 0x0>,
+ <0x2 0x10 0x1>,
+ <0x2 0x10 0x2>,
+ <0x2 0x10 0x3>,
+ <0x2 0x10 0x4>,
+ <0x2 0x10 0x5>,
+ <0x2 0x10 0x6>,
+ <0x2 0x10 0x7>;
+
+ interrupt-names = "chg-error",
+ "chg-inhibit",
+ "chg-prechg-sft",
+ "chg-complete-chg-sft",
+ "chg-p2f-thr",
+ "chg-rechg-thr",
+ "chg-taper-thr",
+ "chg-tcc-thr";
+ };
+
+ qcom,otg@1100 {
+ reg = <0x1100 0x100>;
+ interrupts = <0x2 0x11 0x0>,
+ <0x2 0x11 0x1>,
+ <0x2 0x11 0x3>;
+ interrupt-names = "otg-fail",
+ "otg-oc",
+ "usbid-change";
+ };
+
+ qcom,bat-if@1200 {
+ reg = <0x1200 0x100>;
+ interrupts = <0x2 0x12 0x0>,
+ <0x2 0x12 0x1>,
+ <0x2 0x12 0x2>,
+ <0x2 0x12 0x3>,
+ <0x2 0x12 0x4>,
+ <0x2 0x12 0x5>,
+ <0x2 0x12 0x6>,
+ <0x2 0x12 0x7>;
+
+ interrupt-names = "batt-hot",
+ "batt-warm",
+ "batt-cold",
+ "batt-cool",
+ "batt-ov",
+ "batt-low",
+ "batt-missing",
+ "batt-term-missing";
+ };
+
+ qcom,usb-chgpth@1300 {
+ reg = <0x1300 0x100>;
+ interrupts = <0x2 0x13 0x0>,
+ <0x2 0x13 0x1>,
+ <0x2 0x13 0x2>,
+ <0x2 0x13 0x5>;
+
+ interrupt-names = "usbin-uv",
+ "usbin-ov",
+ "usbin-src-det",
+ "aicl-done";
+ };
+
+ qcom,dc-chgpth@1400 {
+ reg = <0x1400 0x100>;
+ interrupts = <0x2 0x14 0x0>,
+ <0x2 0x14 0x1>;
+ interrupt-names = "dcin-uv",
+ "dcin-ov";
+ };
+
+ qcom,chgr-misc@1600 {
+ reg = <0x1600 0x100>;
+ interrupts = <0x2 0x16 0x0>,
+ <0x2 0x16 0x1>,
+ <0x2 0x16 0x2>,
+ <0x2 0x16 0x3>,
+ <0x2 0x16 0x4>,
+ <0x2 0x16 0x5>;
+
+ interrupt-names = "power-ok",
+ "temp-shutdown",
+ "wdog-timeout",
+ "flash-fail",
+ "otst2",
+ "otst3";
+ };
+
+ smbcharger_charger_otg: qcom,smbcharger-boost-otg {
+ regulator-name = "smbcharger_charger_otg";
+ };
+ };
+
+ pmi8937_fg: qcom,fg {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-fg";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qcom,resume-soc = <95>;
+ status = "okay";
+ qcom,bcl-lm-threshold-ma = <127>;
+ qcom,bcl-mh-threshold-ma = <405>;
+ qcom,fg-iterm-ma = <150>;
+ qcom,fg-chg-iterm-ma = <100>;
+ qcom,pmic-revid = <&pmi8937_revid>;
+ qcom,fg-cutoff-voltage-mv = <3500>;
+ qcom,cycle-counter-en;
+ qcom,capacity-learning-on;
+
+ qcom,fg-soc@4000 {
+ status = "okay";
+ reg = <0x4000 0x100>;
+ interrupts = <0x2 0x40 0x0>,
+ <0x2 0x40 0x1>,
+ <0x2 0x40 0x2>,
+ <0x2 0x40 0x3>,
+ <0x2 0x40 0x4>,
+ <0x2 0x40 0x5>,
+ <0x2 0x40 0x6>;
+
+ interrupt-names = "high-soc",
+ "low-soc",
+ "full-soc",
+ "empty-soc",
+ "delta-soc",
+ "first-est-done",
+ "update-soc";
+ };
+
+ qcom,fg-batt@4100 {
+ reg = <0x4100 0x100>;
+ interrupts = <0x2 0x41 0x0>,
+ <0x2 0x41 0x1>,
+ <0x2 0x41 0x2>,
+ <0x2 0x41 0x3>,
+ <0x2 0x41 0x4>,
+ <0x2 0x41 0x5>,
+ <0x2 0x41 0x6>,
+ <0x2 0x41 0x7>;
+
+ interrupt-names = "soft-cold",
+ "soft-hot",
+ "vbatt-low",
+ "batt-ided",
+ "batt-id-req",
+ "batt-unknown",
+ "batt-missing",
+ "batt-match";
+ };
+
+ qcom,revid-tp-rev@1f1 {
+ reg = <0x1f1 0x1>;
+ };
+
+ qcom,fg-memif@4400 {
+ status = "okay";
+ reg = <0x4400 0x100>;
+ interrupts = <0x2 0x44 0x0>,
+ <0x2 0x44 0x2>;
+
+ interrupt-names = "mem-avail",
+ "data-rcvry-sug";
+ };
+ };
+
+ bcl@4200 {
+ compatible = "qcom,msm-bcl";
+ reg = <0x4200 0xff>;
+ reg-names = "fg_user_adc";
+ interrupts = <0x2 0x42 0x0>,
+ <0x2 0x42 0x1>;
+ interrupt-names = "bcl-high-ibat-int",
+ "bcl-low-vbat-int";
+ qcom,vbat-scaling-factor = <39000>;
+ qcom,vbat-gain-numerator = <1>;
+ qcom,vbat-gain-denominator = <128>;
+ qcom,vbat-polling-delay-ms = <100>;
+ qcom,ibat-scaling-factor = <39000>;
+ qcom,ibat-gain-numerator = <1>;
+ qcom,ibat-gain-denominator = <128>;
+ qcom,ibat-offset-numerator = <1200>;
+ qcom,ibat-offset-denominator = <1>;
+ qcom,ibat-polling-delay-ms = <100>;
+ };
+
+ qcom,leds@a100 {
+ compatible = "qcom,leds-qpnp";
+ reg = <0xa100 0x100>;
+ label = "mpp";
+ };
+ };
+
+ qcom,pmi8937@3 {
+ spmi-slave-container;
+ reg = <0x3>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pmi8937_pwm: pwm@b000 {
+ status = "disabled";
+ compatible = "qcom,qpnp-pwm";
+ reg = <0xb000 0x100>;
+ reg-names = "qpnp-lpg-channel-base";
+ qcom,channel-id = <0>;
+ qcom,supported-sizes = <6>, <9>;
+ #pwm-cells = <2>;
+ };
+
+ wled: qcom,leds@d800 {
+ compatible = "qcom,qpnp-wled";
+ reg = <0xd800 0x100>,
+ <0xd900 0x100>;
+ reg-names = "qpnp-wled-ctrl-base",
+ "qpnp-wled-sink-base";
+ interrupts = <0x3 0xd8 0x2>;
+ interrupt-names = "sc-irq";
+ status = "okay";
+ linux,name = "wled";
+ linux,default-trigger = "bkl-trigger";
+ qcom,fdbk-output = "auto";
+ qcom,vref-mv = <350>;
+ qcom,switch-freq-khz = <800>;
+ qcom,ovp-mv = <29500>;
+ qcom,ilim-ma = <980>;
+ qcom,boost-duty-ns = <26>;
+ qcom,mod-freq-khz = <9600>;
+ qcom,dim-mode = "hybrid";
+ qcom,dim-method = "linear";
+ qcom,hyb-thres = <625>;
+ qcom,sync-dly-us = <800>;
+ qcom,fs-curr-ua = <20000>;
+ qcom,led-strings-list = [00 01];
+ qcom,en-ext-pfet-sc-pro;
+ qcom,cons-sync-write-delay-us = <1000>;
+ };
+
+ flash_led: qcom,leds@d300 {
+ compatible = "qcom,qpnp-flash-led";
+ status = "okay";
+ reg = <0xd300 0x100>;
+ label = "flash";
+ qcom,headroom = <500>;
+ qcom,startup-dly = <128>;
+ qcom,clamp-curr = <200>;
+ qcom,pmic-charger-support;
+ qcom,self-check-enabled;
+ qcom,thermal-derate-enabled;
+ qcom,thermal-derate-threshold = <100>;
+ qcom,thermal-derate-rate = "5_PERCENT";
+ qcom,current-ramp-enabled;
+ qcom,ramp_up_step = "6P7_US";
+ qcom,ramp_dn_step = "6P7_US";
+ qcom,vph-pwr-droop-enabled;
+ qcom,vph-pwr-droop-threshold = <3000>;
+ qcom,vph-pwr-droop-debounce-time = <10>;
+ qcom,headroom-sense-ch0-enabled;
+ qcom,headroom-sense-ch1-enabled;
+ qcom,pmic-revid = <&pmi8937_revid>;
+
+ pmi8937_flash0: qcom,flash_0 {
+ label = "flash";
+ qcom,led-name = "led:flash_0";
+ qcom,default-led-trigger =
+ "flash0_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <0>;
+ qcom,current = <625>;
+ };
+
+ pmi8937_flash1: qcom,flash_1 {
+ label = "flash";
+ qcom,led-name = "led:flash_1";
+ qcom,default-led-trigger =
+ "flash1_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <1>;
+ qcom,current = <625>;
+ };
+
+ pmi8937_torch0: qcom,torch_0 {
+ label = "torch";
+ qcom,led-name = "led:torch_0";
+ qcom,default-led-trigger =
+ "torch0_trigger";
+ qcom,max-current = <200>;
+ qcom,id = <0>;
+ qcom,current = <120>;
+ };
+
+ pmi8937_torch1: qcom,torch_1 {
+ label = "torch";
+ qcom,led-name = "led:torch_1";
+ qcom,default-led-trigger =
+ "torch1_trigger";
+ qcom,max-current = <200>;
+ qcom,id = <1>;
+ qcom,current = <120>;
+ };
+
+ pmi8937_switch: qcom,switch {
+ label = "switch";
+ qcom,led-name = "led:switch";
+ qcom,default-led-trigger =
+ "switch_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <2>;
+ qcom,current = <625>;
+ reg0 {
+ regulator-name = "pon_spare_reg";
+ };
+ };
+ };
+
+ pmi_haptic: qcom,haptic@c000 {
+ compatible = "qcom,qpnp-haptic";
+ reg = <0xc000 0x100>;
+ interrupts = <0x3 0xc0 0x0>,
+ <0x3 0xc0 0x1>;
+ interrupt-names = "sc-irq", "play-irq";
+ qcom,pmic-revid = <&pmi8937_revid>;
+ vcc_pon-supply = <&pon_perph_reg>;
+ qcom,play-mode = "direct";
+ qcom,wave-play-rate-us = <5263>;
+ qcom,actuator-type = "lra";
+ qcom,wave-shape = "square";
+ qcom,vmax-mv = <2000>;
+ qcom,ilim-ma = <800>;
+ qcom,sc-deb-cycles = <8>;
+ qcom,int-pwm-freq-khz = <505>;
+ qcom,en-brake;
+ qcom,brake-pattern = [03 03 00 00];
+ qcom,use-play-irq;
+ qcom,use-sc-irq;
+ qcom,wave-samples = [3e 3e 3e 3e 3e 3e 3e 3e];
+ qcom,wave-rep-cnt = <1>;
+ qcom,wave-samp-rep-cnt = <1>;
+ qcom,lra-auto-res-mode="qwd";
+ qcom,lra-high-z="opt1";
+ qcom,lra-res-cal-period = <4>;
+ qcom,correct-lra-drive-freq;
+ qcom,misc-trim-error-rc19p2-clk-reg-present;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/pmi8940.dtsi b/arch/arm64/boot/dts/qcom/pmi8940.dtsi
new file mode 100644
index 0000000..59001ba
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/pmi8940.dtsi
@@ -0,0 +1,611 @@
+/*
+ * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/msm/power-on.h>
+
+&spmi_bus {
+
+ qcom,pmi8940@2 {
+ spmi-slave-container;
+ reg = <0x2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pmi8940_revid: qcom,revid@100 {
+ compatible = "qcom,qpnp-revid";
+ reg = <0x100 0x100>;
+ };
+
+ qcom,power-on@800 {
+ compatible = "qcom,qpnp-power-on";
+ reg = <0x800 0x100>;
+ qcom,secondary-pon-reset;
+ qcom,hard-reset-poweroff-type =
+ <PON_POWER_OFF_SHUTDOWN>;
+
+ pon_perph_reg: qcom,pon_perph_reg {
+ regulator-name = "pon_spare_reg";
+ qcom,pon-spare-reg-addr = <0x8c>;
+ qcom,pon-spare-reg-bit = <1>;
+ };
+ };
+
+ pmi8940_vadc: vadc@3100 {
+ compatible = "qcom,qpnp-vadc";
+ reg = <0x3100 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <0x2 0x31 0x0>;
+ interrupt-names = "eoc-int-en-set";
+ qcom,adc-bit-resolution = <15>;
+ qcom,adc-vdd-reference = <1800>;
+ qcom,vadc-poll-eoc;
+
+ chan@0 {
+ label = "usbin";
+ reg = <0>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <4>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@1 {
+ label = "dcin";
+ reg = <1>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <4>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@3 {
+ label = "vchg_sns";
+ reg = <3>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@9 {
+ label = "ref_625mv";
+ reg = <9>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@a {
+ label = "ref_1250v";
+ reg = <0xa>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@d {
+ label = "chg_temp";
+ reg = <0xd>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <0>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <16>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@43 {
+ label = "usb_dp";
+ reg = <0x43>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+
+ chan@44 {
+ label = "usb_dm";
+ reg = <0x44>;
+ qcom,decimation = <0>;
+ qcom,pre-div-channel-scaling = <1>;
+ qcom,calibration-type = "absolute";
+ qcom,scale-function = <0>;
+ qcom,hw-settle-time = <0>;
+ qcom,fast-avg-setup = <0>;
+ };
+ };
+
+ pmi8940_mpps: mpps {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-pin";
+ gpio-controller;
+ #gpio-cells = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ label = "pmi8940-mpp";
+
+ mpp@a000 {
+ reg = <0xa000 0x100>;
+ qcom,pin-num = <1>;
+ status = "disabled";
+ };
+
+ mpp@a100 {
+ reg = <0xa100 0x100>;
+ qcom,pin-num = <2>;
+ status = "disabled";
+ };
+
+ mpp@a300 {
+ reg = <0xa300 0x100>;
+ qcom,pin-num = <4>;
+ status = "disabled";
+ };
+ };
+
+ pmi8940_charger: qcom,qpnp-smbcharger {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-smbcharger";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ qcom,iterm-ma = <100>;
+ qcom,float-voltage-mv = <4200>;
+ qcom,resume-delta-mv = <200>;
+ qcom,chg-inhibit-fg;
+ qcom,rparasitic-uohm = <100000>;
+ qcom,bms-psy-name = "bms";
+ qcom,thermal-mitigation = <1500 700 600 0>;
+ qcom,pmic-revid = <&pmi8940_revid>;
+ qcom,force-aicl-rerun;
+ qcom,aicl-rerun-period-s = <180>;
+ qcom,autoadjust-vfloat;
+
+ qcom,chgr@1000 {
+ reg = <0x1000 0x100>;
+ interrupts = <0x2 0x10 0x0>,
+ <0x2 0x10 0x1>,
+ <0x2 0x10 0x2>,
+ <0x2 0x10 0x3>,
+ <0x2 0x10 0x4>,
+ <0x2 0x10 0x5>,
+ <0x2 0x10 0x6>,
+ <0x2 0x10 0x7>;
+
+ interrupt-names = "chg-error",
+ "chg-inhibit",
+ "chg-prechg-sft",
+ "chg-complete-chg-sft",
+ "chg-p2f-thr",
+ "chg-rechg-thr",
+ "chg-taper-thr",
+ "chg-tcc-thr";
+ };
+
+ qcom,otg@1100 {
+ reg = <0x1100 0x100>;
+ interrupts = <0x2 0x11 0x0>,
+ <0x2 0x11 0x1>,
+ <0x2 0x11 0x3>;
+ interrupt-names = "otg-fail",
+ "otg-oc",
+ "usbid-change";
+ };
+
+ qcom,bat-if@1200 {
+ reg = <0x1200 0x100>;
+ interrupts = <0x2 0x12 0x0>,
+ <0x2 0x12 0x1>,
+ <0x2 0x12 0x2>,
+ <0x2 0x12 0x3>,
+ <0x2 0x12 0x4>,
+ <0x2 0x12 0x5>,
+ <0x2 0x12 0x6>,
+ <0x2 0x12 0x7>;
+
+ interrupt-names = "batt-hot",
+ "batt-warm",
+ "batt-cold",
+ "batt-cool",
+ "batt-ov",
+ "batt-low",
+ "batt-missing",
+ "batt-term-missing";
+ };
+
+ qcom,usb-chgpth@1300 {
+ reg = <0x1300 0x100>;
+ interrupts = <0x2 0x13 0x0>,
+ <0x2 0x13 0x1>,
+ <0x2 0x13 0x2>,
+ <0x2 0x13 0x5>;
+
+ interrupt-names = "usbin-uv",
+ "usbin-ov",
+ "usbin-src-det",
+ "aicl-done";
+ };
+
+ qcom,dc-chgpth@1400 {
+ reg = <0x1400 0x100>;
+ interrupts = <0x2 0x14 0x0>,
+ <0x2 0x14 0x1>;
+ interrupt-names = "dcin-uv",
+ "dcin-ov";
+ };
+
+ qcom,chgr-misc@1600 {
+ reg = <0x1600 0x100>;
+ interrupts = <0x2 0x16 0x0>,
+ <0x2 0x16 0x1>,
+ <0x2 0x16 0x2>,
+ <0x2 0x16 0x3>,
+ <0x2 0x16 0x4>,
+ <0x2 0x16 0x5>;
+
+ interrupt-names = "power-ok",
+ "temp-shutdown",
+ "wdog-timeout",
+ "flash-fail",
+ "otst2",
+ "otst3";
+ };
+
+ smbcharger_charger_otg: qcom,smbcharger-boost-otg {
+ regulator-name = "smbcharger_charger_otg";
+ };
+ };
+
+ pmi8940_fg: qcom,fg {
+ spmi-dev-container;
+ compatible = "qcom,qpnp-fg";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qcom,resume-soc = <95>;
+ status = "okay";
+ qcom,bcl-lm-threshold-ma = <127>;
+ qcom,bcl-mh-threshold-ma = <405>;
+ qcom,fg-iterm-ma = <150>;
+ qcom,fg-chg-iterm-ma = <100>;
+ qcom,pmic-revid = <&pmi8940_revid>;
+ qcom,fg-cutoff-voltage-mv = <3500>;
+ qcom,cycle-counter-en;
+ qcom,capacity-learning-on;
+
+ qcom,fg-soc@4000 {
+ status = "okay";
+ reg = <0x4000 0x100>;
+ interrupts = <0x2 0x40 0x0>,
+ <0x2 0x40 0x1>,
+ <0x2 0x40 0x2>,
+ <0x2 0x40 0x3>,
+ <0x2 0x40 0x4>,
+ <0x2 0x40 0x5>,
+ <0x2 0x40 0x6>;
+
+ interrupt-names = "high-soc",
+ "low-soc",
+ "full-soc",
+ "empty-soc",
+ "delta-soc",
+ "first-est-done",
+ "update-soc";
+ };
+
+ qcom,fg-batt@4100 {
+ reg = <0x4100 0x100>;
+ interrupts = <0x2 0x41 0x0>,
+ <0x2 0x41 0x1>,
+ <0x2 0x41 0x2>,
+ <0x2 0x41 0x3>,
+ <0x2 0x41 0x4>,
+ <0x2 0x41 0x5>,
+ <0x2 0x41 0x6>,
+ <0x2 0x41 0x7>;
+
+ interrupt-names = "soft-cold",
+ "soft-hot",
+ "vbatt-low",
+ "batt-ided",
+ "batt-id-req",
+ "batt-unknown",
+ "batt-missing",
+ "batt-match";
+ };
+
+ qcom,revid-tp-rev@1f1 {
+ reg = <0x1f1 0x1>;
+ };
+
+ qcom,fg-memif@4400 {
+ status = "okay";
+ reg = <0x4400 0x100>;
+ interrupts = <0x2 0x44 0x0>,
+ <0x2 0x44 0x2>;
+
+ interrupt-names = "mem-avail",
+ "data-rcvry-sug";
+ };
+ };
+
+ bcl@4200 {
+ compatible = "qcom,msm-bcl";
+ reg = <0x4200 0xff>;
+ reg-names = "fg_user_adc";
+ interrupts = <0x2 0x42 0x0>,
+ <0x2 0x42 0x1>;
+ interrupt-names = "bcl-high-ibat-int",
+ "bcl-low-vbat-int";
+ qcom,vbat-scaling-factor = <39000>;
+ qcom,vbat-gain-numerator = <1>;
+ qcom,vbat-gain-denominator = <128>;
+ qcom,vbat-polling-delay-ms = <100>;
+ qcom,ibat-scaling-factor = <39000>;
+ qcom,ibat-gain-numerator = <1>;
+ qcom,ibat-gain-denominator = <128>;
+ qcom,ibat-offset-numerator = <1200>;
+ qcom,ibat-offset-denominator = <1>;
+ qcom,ibat-polling-delay-ms = <100>;
+ };
+
+ qcom,leds@a100 {
+ compatible = "qcom,leds-qpnp";
+ reg = <0xa100 0x100>;
+ label = "mpp";
+ };
+ };
+
+ qcom,pmi8940@3 {
+ spmi-slave-container;
+ reg = <0x3>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pmi8940_pwm: pwm@b000 {
+ status = "disabled";
+ compatible = "qcom,qpnp-pwm";
+ reg = <0xb000 0x100>;
+ reg-names = "qpnp-lpg-channel-base";
+ qcom,channel-id = <0>;
+ qcom,supported-sizes = <6>, <9>;
+ #pwm-cells = <2>;
+ };
+
+ labibb: qpnp-labibb-regulator {
+ status = "disabled";
+ spmi-dev-container;
+ compatible = "qcom,qpnp-labibb-regulator";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ qcom,pmic-revid = <&pmi8940_revid>;
+
+ ibb_regulator: qcom,ibb@dc00 {
+ reg = <0xdc00 0x100>;
+ reg-names = "ibb_reg";
+ regulator-name = "ibb_reg";
+
+ regulator-min-microvolt = <4600000>;
+ regulator-max-microvolt = <6000000>;
+
+ qcom,qpnp-ibb-min-voltage = <1400000>;
+ qcom,qpnp-ibb-step-size = <100000>;
+ qcom,qpnp-ibb-slew-rate = <2000000>;
+ qcom,qpnp-ibb-use-default-voltage;
+ qcom,qpnp-ibb-init-voltage = <5500000>;
+ qcom,qpnp-ibb-init-amoled-voltage = <4000000>;
+ qcom,qpnp-ibb-init-lcd-voltage = <5500000>;
+
+ qcom,qpnp-ibb-soft-start = <1000>;
+
+ qcom,qpnp-ibb-discharge-resistor = <32>;
+ qcom,qpnp-ibb-lab-pwrup-delay = <8000>;
+ qcom,qpnp-ibb-lab-pwrdn-delay = <8000>;
+ qcom,qpnp-ibb-en-discharge;
+
+ qcom,qpnp-ibb-full-pull-down;
+ qcom,qpnp-ibb-pull-down-enable;
+ qcom,qpnp-ibb-switching-clock-frequency =
+ <1480>;
+ qcom,qpnp-ibb-limit-maximum-current = <1550>;
+ qcom,qpnp-ibb-debounce-cycle = <16>;
+ qcom,qpnp-ibb-limit-max-current-enable;
+ qcom,qpnp-ibb-ps-enable;
+ };
+
+ lab_regulator: qcom,lab@de00 {
+ reg = <0xde00 0x100>;
+ reg-names = "lab";
+ regulator-name = "lab_reg";
+
+ regulator-min-microvolt = <4600000>;
+ regulator-max-microvolt = <6000000>;
+
+ qcom,qpnp-lab-min-voltage = <4600000>;
+ qcom,qpnp-lab-step-size = <100000>;
+ qcom,qpnp-lab-slew-rate = <5000>;
+ qcom,qpnp-lab-use-default-voltage;
+ qcom,qpnp-lab-init-voltage = <5500000>;
+ qcom,qpnp-lab-init-amoled-voltage = <4600000>;
+ qcom,qpnp-lab-init-lcd-voltage = <5500000>;
+
+ qcom,qpnp-lab-soft-start = <800>;
+
+ qcom,qpnp-lab-full-pull-down;
+ qcom,qpnp-lab-pull-down-enable;
+ qcom,qpnp-lab-switching-clock-frequency =
+ <1600>;
+ qcom,qpnp-lab-limit-maximum-current = <800>;
+ qcom,qpnp-lab-limit-max-current-enable;
+ qcom,qpnp-lab-ps-threshold = <40>;
+ qcom,qpnp-lab-ps-enable;
+ qcom,qpnp-lab-nfet-size = <100>;
+ qcom,qpnp-lab-pfet-size = <100>;
+ qcom,qpnp-lab-max-precharge-time = <500>;
+ };
+ };
+
+ wled: qcom,leds@d800 {
+ compatible = "qcom,qpnp-wled";
+ reg = <0xd800 0x100>,
+ <0xd900 0x100>;
+ reg-names = "qpnp-wled-ctrl-base",
+ "qpnp-wled-sink-base";
+ interrupts = <0x3 0xd8 0x2>;
+ interrupt-names = "sc-irq";
+ status = "okay";
+ linux,name = "wled";
+ linux,default-trigger = "bkl-trigger";
+ qcom,fdbk-output = "auto";
+ qcom,vref-mv = <350>;
+ qcom,switch-freq-khz = <800>;
+ qcom,ovp-mv = <29500>;
+ qcom,ilim-ma = <980>;
+ qcom,boost-duty-ns = <26>;
+ qcom,mod-freq-khz = <9600>;
+ qcom,dim-mode = "hybrid";
+ qcom,dim-method = "linear";
+ qcom,hyb-thres = <625>;
+ qcom,sync-dly-us = <800>;
+ qcom,fs-curr-ua = <20000>;
+ qcom,en-phase-stag;
+ qcom,led-strings-list = [00 01];
+ qcom,en-ext-pfet-sc-pro;
+ qcom,cons-sync-write-delay-us = <1000>;
+ };
+
+ flash_led: qcom,leds@d300 {
+ compatible = "qcom,qpnp-flash-led";
+ status = "okay";
+ reg = <0xd300 0x100>;
+ label = "flash";
+ qcom,headroom = <500>;
+ qcom,startup-dly = <128>;
+ qcom,clamp-curr = <200>;
+ qcom,pmic-charger-support;
+ qcom,self-check-enabled;
+ qcom,thermal-derate-enabled;
+ qcom,thermal-derate-threshold = <100>;
+ qcom,thermal-derate-rate = "5_PERCENT";
+ qcom,current-ramp-enabled;
+ qcom,ramp_up_step = "6P7_US";
+ qcom,ramp_dn_step = "6P7_US";
+ qcom,vph-pwr-droop-enabled;
+ qcom,vph-pwr-droop-threshold = <3000>;
+ qcom,vph-pwr-droop-debounce-time = <10>;
+ qcom,headroom-sense-ch0-enabled;
+ qcom,headroom-sense-ch1-enabled;
+ qcom,pmic-revid = <&pmi8940_revid>;
+
+ pmi8940_flash0: qcom,flash_0 {
+ label = "flash";
+ qcom,led-name = "led:flash_0";
+ qcom,default-led-trigger =
+ "flash0_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <0>;
+ qcom,current = <625>;
+ };
+
+ pmi8940_flash1: qcom,flash_1 {
+ label = "flash";
+ qcom,led-name = "led:flash_1";
+ qcom,default-led-trigger =
+ "flash1_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <1>;
+ qcom,current = <625>;
+ };
+
+ pmi8940_torch0: qcom,torch_0 {
+ label = "torch";
+ qcom,led-name = "led:torch_0";
+ qcom,default-led-trigger =
+ "torch0_trigger";
+ qcom,max-current = <200>;
+ qcom,id = <0>;
+ qcom,current = <120>;
+ };
+
+ pmi8940_torch1: qcom,torch_1 {
+ label = "torch";
+ qcom,led-name = "led:torch_1";
+ qcom,default-led-trigger =
+ "torch1_trigger";
+ qcom,max-current = <200>;
+ qcom,id = <1>;
+ qcom,current = <120>;
+ };
+
+ pmi8940_switch: qcom,switch {
+ label = "switch";
+ qcom,led-name = "led:switch";
+ qcom,default-led-trigger =
+ "switch_trigger";
+ qcom,max-current = <1000>;
+ qcom,duration = <1280>;
+ qcom,id = <2>;
+ qcom,current = <625>;
+ reg0 {
+ regulator-name = "pon_spare_reg";
+ };
+ };
+ };
+
+ pmi_haptic: qcom,haptic@c000 {
+ compatible = "qcom,qpnp-haptic";
+ reg = <0xc000 0x100>;
+ interrupts = <0x3 0xc0 0x0>,
+ <0x3 0xc0 0x1>;
+ interrupt-names = "sc-irq", "play-irq";
+ qcom,pmic-revid = <&pmi8940_revid>;
+ vcc_pon-supply = <&pon_perph_reg>;
+ qcom,play-mode = "direct";
+ qcom,wave-play-rate-us = <5263>;
+ qcom,actuator-type = "lra";
+ qcom,wave-shape = "square";
+ qcom,vmax-mv = <2000>;
+ qcom,ilim-ma = <800>;
+ qcom,sc-deb-cycles = <8>;
+ qcom,int-pwm-freq-khz = <505>;
+ qcom,en-brake;
+ qcom,brake-pattern = [03 03 00 00];
+ qcom,use-play-irq;
+ qcom,use-sc-irq;
+ qcom,wave-samples = [3e 3e 3e 3e 3e 3e 3e 3e];
+ qcom,wave-rep-cnt = <1>;
+ qcom,wave-samp-rep-cnt = <1>;
+ qcom,lra-auto-res-mode="qwd";
+ qcom,lra-high-z="opt1";
+ qcom,lra-res-cal-period = <4>;
+ qcom,correct-lra-drive-freq;
+ qcom,misc-trim-error-rc19p2-clk-reg-present;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/pmi8950.dtsi b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
index e731f5b..97be32de 100644
--- a/arch/arm64/boot/dts/qcom/pmi8950.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmi8950.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -140,57 +140,30 @@
};
pmi8950_gpios: gpios {
- compatible = "qcom,qpnp-pin";
+ compatible = "qcom,spmi-gpio";
+ reg = <0xc000 0x200>;
+
+ interrupts = <0x2 0xc0 0 IRQ_TYPE_NONE>,
+ <0x2 0xc1 0 IRQ_TYPE_NONE>;
+ interrupt-names = "pmi8950_gpio1", "pmi8950_gpio2";
+
gpio-controller;
#gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pmi8950-gpio";
-
- gpio@c000 {
- reg = <0xc000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- gpio@c100 {
- reg = <0xc100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
};
pmi8950_mpps: mpps {
- compatible = "qcom,qpnp-pin";
+ compatible = "qcom,spmi-mpp";
+ reg = <0xa000 0x400>;
+
+ interrupts = <0x2 0xa0 0 IRQ_TYPE_NONE>,
+ <0x2 0xa1 0 IRQ_TYPE_NONE>,
+ <0x2 0xa2 0 IRQ_TYPE_NONE>,
+ <0x2 0xa3 0 IRQ_TYPE_NONE>;
+ interrupt-names = "pmi8950_mpp1", "pmi8950_mpp2",
+ "pmi8950_mpp3", "pmi8950_mpp4";
+
gpio-controller;
#gpio-cells = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- label = "pmi8950-mpp";
-
- mpp@a000 {
- reg = <0xa000 0x100>;
- qcom,pin-num = <1>;
- status = "disabled";
- };
-
- mpp@a100 {
- reg = <0xa100 0x100>;
- qcom,pin-num = <2>;
- status = "disabled";
- };
-
- mpp@a200 {
- reg = <0xa200 0x100>;
- qcom,pin-num = <3>;
- status = "disabled";
- };
-
- mpp@a300 {
- reg = <0xa300 0x100>;
- qcom,pin-num = <4>;
- status = "disabled";
- };
};
pmi8950_charger: qcom,qpnp-smbcharger {
diff --git a/arch/arm64/boot/dts/qcom/qcs605-360camera-overlay.dts b/arch/arm64/boot/dts/qcom/qcs605-360camera-overlay.dts
index e7a2197..820f877 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-360camera-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/qcs605-360camera-overlay.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -23,10 +23,10 @@
#include "qcs605-360camera.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. QCS605 PM660+PM660L 360camera";
+ model = "Qualcomm Technologies, Inc. QCS605 PM660+PM660L VRcamera";
compatible = "qcom,qcs605-mtp", "qcom,qcs605", "qcom,mtp";
qcom,msm-id = <347 0x0>;
- qcom,board-id = <0x0000000b 1>;
+ qcom,board-id = <8 5>;
qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
<0x0001001b 0x0102001a 0x0 0x0>,
<0x0001001b 0x0201011a 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/qcs605-360camera.dts b/arch/arm64/boot/dts/qcom/qcs605-360camera.dts
index 8caad4b..c62f39d 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-360camera.dts
+++ b/arch/arm64/boot/dts/qcom/qcs605-360camera.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -20,7 +20,7 @@
/ {
model = "Qualcomm Technologies, Inc. QCS605 PM660 + PM660L 360camera";
compatible = "qcom,qcs605-mtp", "qcom,qcs605", "qcom,mtp";
- qcom,board-id = <0x0000000b 1>;
+ qcom,board-id = <8 5>;
qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
<0x0001001b 0x0102001a 0x0 0x0>,
<0x0001001b 0x0201011a 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/qcs605-360camera.dtsi b/arch/arm64/boot/dts/qcom/qcs605-360camera.dtsi
index 6670edd..0983acf 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-360camera.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs605-360camera.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -39,6 +39,14 @@
status = "disabled";
};
+&dsi_dual_nt36850_truly_cmd_display {
+ status = "disabled";
+};
+
+&dsi_dual_nt35597_truly_video {
+ status = "disabled";
+};
+
&int_codec {
qcom,model = "sdm670-360cam-snd-card";
qcom,audio-routing =
diff --git a/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi b/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
index a881ec4..382ba65 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs605-pm660-pm8005-regulator.dtsi
@@ -157,9 +157,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa1";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l1: regulator-pm660-l1 {
regulator-name = "pm660_l1";
@@ -167,7 +168,7 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
qcom,init-voltage = <800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -175,9 +176,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa2";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l2: regulator-pm660-l2 {
regulator-name = "pm660_l2";
@@ -185,7 +187,7 @@
regulator-min-microvolt = <1144000>;
regulator-max-microvolt = <1256000>;
qcom,init-voltage = <1144000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -193,9 +195,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa3";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l3: regulator-pm660-l3 {
regulator-name = "pm660_l3";
@@ -203,7 +206,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1352000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -211,9 +214,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa5";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l5: regulator-pm660-l5 {
regulator-name = "pm660_l5";
@@ -221,7 +225,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -229,9 +233,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa6";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l6: regulator-pm660-l6 {
regulator-name = "pm660_l6";
@@ -239,7 +244,7 @@
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
qcom,init-voltage = <880000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -260,9 +265,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa8";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l8: regulator-pm660-l8 {
regulator-name = "pm660_l8";
@@ -270,7 +276,7 @@
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1696000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -278,9 +284,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa9";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l9: regulator-pm660-l9 {
regulator-name = "pm660_l9";
@@ -288,7 +295,7 @@
regulator-min-microvolt = <1616000>;
regulator-max-microvolt = <1984000>;
qcom,init-voltage = <1616000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -296,9 +303,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa10";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l10: regulator-pm660-l10 {
regulator-name = "pm660_l10";
@@ -306,7 +314,7 @@
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1952000>;
qcom,init-voltage = <1696000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -314,9 +322,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa11";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l11: regulator-pm660-l11 {
regulator-name = "pm660_l11";
@@ -324,7 +333,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -332,9 +341,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa12";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l12: regulator-pm660-l12 {
regulator-name = "pm660_l12";
@@ -342,7 +352,7 @@
regulator-min-microvolt = <1616000>;
regulator-max-microvolt = <1984000>;
qcom,init-voltage = <1616000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -350,9 +360,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa13";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l13: regulator-pm660-l13 {
regulator-name = "pm660_l13";
@@ -360,7 +371,7 @@
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1696000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -368,9 +379,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa14";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l14: regulator-pm660-l14 {
regulator-name = "pm660_l14";
@@ -378,7 +390,7 @@
regulator-min-microvolt = <1696000>;
regulator-max-microvolt = <1904000>;
qcom,init-voltage = <1696000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -386,9 +398,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa15";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l15: regulator-pm660-l15 {
regulator-name = "pm660_l15";
@@ -396,7 +409,7 @@
regulator-min-microvolt = <2896000>;
regulator-max-microvolt = <3000000>;
qcom,init-voltage = <2896000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -404,9 +417,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa16";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l16: regulator-pm660-l16 {
regulator-name = "pm660_l16";
@@ -414,7 +428,7 @@
regulator-min-microvolt = <2896000>;
regulator-max-microvolt = <3104000>;
qcom,init-voltage = <2896000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -422,9 +436,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa17";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l17: regulator-pm660-l17 {
regulator-name = "pm660_l17";
@@ -432,7 +447,7 @@
regulator-min-microvolt = <2920000>;
regulator-max-microvolt = <3232000>;
qcom,init-voltage = <2920000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -440,9 +455,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa18";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l18: regulator-pm660-l18 {
regulator-name = "pm660_l18";
@@ -450,7 +466,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -458,9 +474,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa19";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l19: regulator-pm660-l19 {
regulator-name = "pm660_l19";
@@ -468,7 +485,7 @@
regulator-min-microvolt = <2944000>;
regulator-max-microvolt = <3304000>;
qcom,init-voltage = <2944000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
};
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dts b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dts
new file mode 100644
index 0000000..616b8e5
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "sdm450.dtsi"
+#include "sdm450-pmi632-cdp-s2.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SDM450 + PMI632 CDP S2";
+ compatible = "qcom,sdm450-cdp", "qcom,sdm450", "qcom,cdp";
+ qcom,board-id = <1 2>;
+ qcom,pmic-id = <0x010016 0x25 0x0 0x0>;
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi
new file mode 100644
index 0000000..220ec20
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-cdp-s2.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm8953-cdp.dtsi"
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dts b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dts
new file mode 100644
index 0000000..b52bccf
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "sdm450.dtsi"
+#include "sdm450-pmi632-mtp-s3.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SDM450 + PMI632 MTP S3";
+ compatible = "qcom,sdm450-mtp", "qcom,sdm450", "qcom,mtp";
+ qcom,board-id = <8 3>;
+ qcom,pmic-id = <0x010016 0x25 0x0 0x0>;
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
new file mode 100644
index 0000000..adb7f47
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-pmi632-mtp-s3.dtsi
@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm8953-mtp.dtsi"
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dts b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dts
new file mode 100644
index 0000000..3770ebe
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+
+#include "sdm450.dtsi"
+#include "sdm450-qrd-sku4.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SDM450 + PMI632 QRD SKU4";
+ compatible = "qcom,sdm450-qrd", "qcom,sdm450", "qcom,qrd";
+ qcom,board-id = <0xb 1>;
+ qcom,pmic-id = <0x010016 0x25 0x0 0x0>;
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi
new file mode 100644
index 0000000..0a98528
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "msm8953-qrd.dtsi"
+
+&i2c_3 {
+ status = "disabled";
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sdm450.dtsi b/arch/arm64/boot/dts/qcom/sdm450.dtsi
index b080ff7..2f3e8c4 100644
--- a/arch/arm64/boot/dts/qcom/sdm450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -34,3 +34,16 @@
&CPU7 {
efficiency = <1024>;
};
+
+&clock_gcc_gfx {
+ compatible = "qcom,gcc-gfx-sdm450";
+ qcom,gfxfreq-corner =
+ < 0 0 >,
+ < 133330000 1 >, /* Min SVS */
+ < 216000000 2 >, /* Low SVS */
+ < 320000000 3 >, /* SVS */
+ < 400000000 4 >, /* SVS Plus */
+ < 510000000 5 >, /* NOM */
+ < 560000000 6 >, /* Nom Plus */
+ < 600000000 7 >; /* Turbo */
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/sdm670-audio-overlay.dtsi
index 6510fa2..5dd5c0d 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-audio-overlay.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-audio-overlay.dtsi
@@ -121,13 +121,6 @@
pinctrl-1 = <&wcd_usbc_analog_en1_idle>;
};
- wcd_gnd_mic_swap_gpio: msm_cdc_pinctrl_gnd_mic_swap {
- compatible = "qcom,msm-cdc-pinctrl";
- pinctrl-names = "aud_active", "aud_sleep";
- pinctrl-0 = <&wcd_gnd_mic_swap_active>;
- pinctrl-1 = <&wcd_gnd_mic_swap_idle>;
- };
-
cdc_pdm_gpios: cdc_pdm_pinctrl {
compatible = "qcom,msm-cdc-pinctrl";
pinctrl-names = "aud_active", "aud_sleep";
diff --git a/arch/arm64/boot/dts/qcom/sdm670-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdm670-coresight.dtsi
index 7928ab5..108eda5 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-coresight.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-coresight.dtsi
@@ -562,6 +562,8 @@
clocks = <&clock_aop QDSS_CLK>;
clock-names = "apb_pclk";
+ status = "disabled";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
index 9e75ee0..f287b21 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-gpu.dtsi
@@ -58,6 +58,7 @@
qcom,initial-pwrlevel = <3>;
qcom,gpu-quirk-hfi-use-reg;
+ qcom,gpu-quirk-limit-uche-gbif-rw;
/* <HZ/12> */
qcom,idle-timeout = <80>;
@@ -117,7 +118,7 @@
cache-slices = <&llcc 12>, <&llcc 11>;
/* CPU latency parameter */
- qcom,pm-qos-active-latency = <914>;
+ qcom,pm-qos-active-latency = <899>;
qcom,pm-qos-wakeup-latency = <899>;
/* Enable context aware freq. scaling */
@@ -134,6 +135,8 @@
#size-cells = <0>;
compatible = "qcom,gpu-coresight";
+ status = "disabled";
+
qcom,gpu-coresight@0 {
reg = <0>;
coresight-name = "coresight-gfx";
diff --git a/arch/arm64/boot/dts/qcom/sdm670-int-cdc-usbc-audio-overlay.dtsi b/arch/arm64/boot/dts/qcom/sdm670-int-cdc-usbc-audio-overlay.dtsi
index cb0a386..22e9a7a 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-int-cdc-usbc-audio-overlay.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-int-cdc-usbc-audio-overlay.dtsi
@@ -14,5 +14,8 @@
&int_codec {
qcom,msm-mbhc-usbc-audio-supported = <1>;
qcom,usbc-analog-en1-gpio = <&wcd_usbc_analog_en1_gpio>;
- qcom,us-euro-gpios = <&wcd_gnd_mic_swap_gpio>;
+ qcom,usbc-analog-en2-gpio = <&tlmm 40 0>;
+ pinctrl-names = "aud_active", "aud_sleep";
+ pinctrl-0 = <&wcd_usbc_analog_en2_active>;
+ pinctrl-1 = <&wcd_usbc_analog_en2_idle>;
};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-ion.dtsi b/arch/arm64/boot/dts/qcom/sdm670-ion.dtsi
index 46de412..3fd1229 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-ion.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-ion.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,12 @@
qcom,ion-heap-type = "DMA";
};
+ qcom,ion-heap@19 { /* QSEECOM TA HEAP */
+ reg = <19>;
+ memory-region = <&qseecom_ta_mem>;
+ qcom,ion-heap-type = "DMA";
+ };
+
qcom,ion-heap@13 { /* SPSS HEAP */
reg = <13>;
memory-region = <&sp_mem>;
diff --git a/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
index 9025d6b..a85060e 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
@@ -1521,8 +1521,8 @@
};
};
- wcd_gnd_mic_swap {
- wcd_gnd_mic_swap_idle: wcd_gnd_mic_swap_idle {
+ wcd_usbc_analog_en2 {
+ wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle {
mux {
pins = "gpio40";
function = "gpio";
@@ -1536,7 +1536,7 @@
};
};
- wcd_gnd_mic_swap_active: wcd_gnd_mic_swap_active {
+ wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active {
mux {
pins = "gpio40";
function = "gpio";
diff --git a/arch/arm64/boot/dts/qcom/sdm670-pm.dtsi b/arch/arm64/boot/dts/qcom/sdm670-pm.dtsi
index b330cf5..5bf8df7 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-pm.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-pm.dtsi
@@ -185,4 +185,8 @@
reg = <0xc300000 0x1000>, <0xc3f0004 0x4>;
reg-names = "phys_addr_base", "offset_addr";
};
+
+ qcom,rpmh-master-stats {
+ compatible = "qcom,rpmh-master-stats";
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2-overlay.dts b/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2-overlay.dts
index 37eb4cd..73d1909 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2-overlay.dts
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -30,3 +30,22 @@
<0x0001001b 0x0102001a 0x0 0x0>,
<0x0001001b 0x0201011a 0x0 0x0>;
};
+
+&dsi_dual_nt36850_truly_cmd_display {
+ /delete-property/ qcom,dsi-display-active;
+};
+
+&dsi_hx8399_truly_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_hx8399_truly_cmd_display {
+ qcom,dsi-display-active;
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2.dts b/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2.dts
index dada4c6..680bc17 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2.dts
+++ b/arch/arm64/boot/dts/qcom/sdm670-qrd-sku2.dts
@@ -24,3 +24,22 @@
<0x0001001b 0x0102001a 0x0 0x0>,
<0x0001001b 0x0201011a 0x0 0x0>;
};
+
+&dsi_dual_nt36850_truly_cmd_display {
+ /delete-property/ qcom,dsi-display-active;
+};
+
+&dsi_hx8399_truly_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_hx8399_truly_cmd_display {
+ qcom,dsi-display-active;
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-qrd.dtsi b/arch/arm64/boot/dts/qcom/sdm670-qrd.dtsi
index cc4645f..d2a6640 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-qrd.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-qrd.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -160,9 +160,9 @@
0x40 0x194 /* PLL_BIAS_CONTROL_1 */
0x20 0x198 /* PLL_BIAS_CONTROL_2 */
0x21 0x214 /* PWR_CTRL2 */
- 0x07 0x220 /* IMP_CTRL1 */
- 0x58 0x224 /* IMP_CTRL2 */
- 0x77 0x240 /* TUNE1 */
+ 0x00 0x220 /* IMP_CTRL1 */
+ 0x1a 0x224 /* IMP_CTRL2 */
+ 0x47 0x240 /* TUNE1 */
0x29 0x244 /* TUNE2 */
0xca 0x248 /* TUNE3 */
0x04 0x24c /* TUNE4 */
diff --git a/arch/arm64/boot/dts/qcom/sdm670-regulator.dtsi b/arch/arm64/boot/dts/qcom/sdm670-regulator.dtsi
index 9898ada..62db873 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-regulator.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-regulator.dtsi
@@ -158,9 +158,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa1";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
proxy-supply = <&pm660_l1>;
pm660_l1: regulator-pm660-l1 {
@@ -171,7 +172,7 @@
qcom,proxy-consumer-enable;
qcom,proxy-consumer-current = <43600>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -179,9 +180,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa2";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l2: regulator-pm660-l2 {
regulator-name = "pm660_l2";
@@ -189,7 +191,7 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,init-voltage = <1000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -197,9 +199,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa3";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l3: regulator-pm660-l3 {
regulator-name = "pm660_l3";
@@ -207,7 +210,7 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,init-voltage = <1000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -215,9 +218,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa5";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l5: regulator-pm660-l5 {
regulator-name = "pm660_l5";
@@ -225,7 +229,7 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
qcom,init-voltage = <800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -233,9 +237,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa6";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l6: regulator-pm660-l6 {
regulator-name = "pm660_l6";
@@ -243,7 +248,7 @@
regulator-min-microvolt = <1248000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1248000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -251,9 +256,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa7";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l7: regulator-pm660-l7 {
regulator-name = "pm660_l7";
@@ -261,7 +267,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -269,9 +275,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa8";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l8: regulator-pm660-l8 {
regulator-name = "pm660_l8";
@@ -279,7 +286,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -287,9 +294,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa9";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l9: regulator-pm660-l9 {
regulator-name = "pm660_l9";
@@ -297,7 +305,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -305,9 +313,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa10";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l10: regulator-pm660-l10 {
regulator-name = "pm660_l10";
@@ -315,7 +324,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -323,9 +332,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa11";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
proxy-supply = <&pm660_l11>;
pm660_l11: regulator-pm660-l11 {
@@ -336,7 +346,7 @@
qcom,proxy-consumer-enable;
qcom,proxy-consumer-current = <115000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -344,9 +354,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa12";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l12: regulator-pm660-l12 {
regulator-name = "pm660_l12";
@@ -354,7 +365,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -362,9 +373,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa13";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l13: regulator-pm660-l13 {
regulator-name = "pm660_l13";
@@ -372,7 +384,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -380,9 +392,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa14";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l14: regulator-pm660-l14 {
regulator-name = "pm660_l14";
@@ -390,7 +403,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -398,9 +411,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa15";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l15: regulator-pm660-l15 {
regulator-name = "pm660_l15";
@@ -408,7 +422,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -416,9 +430,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa16";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l16: regulator-pm660-l16 {
regulator-name = "pm660_l16";
@@ -426,7 +441,7 @@
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <2700000>;
qcom,init-voltage = <2700000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -434,9 +449,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa17";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l17: regulator-pm660-l17 {
regulator-name = "pm660_l17";
@@ -444,7 +460,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2950000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -452,9 +468,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa19";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660_l19: regulator-pm660-l19 {
regulator-name = "pm660_l19";
@@ -462,7 +479,7 @@
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
qcom,init-voltage = <3000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -470,9 +487,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob1";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
proxy-supply = <&pm660l_l1>;
pm660l_l1: regulator-pm660l-l1 {
@@ -483,7 +501,7 @@
qcom,proxy-consumer-enable;
qcom,proxy-consumer-current = <72000>;
qcom,init-voltage = <880000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -491,9 +509,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob2";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l2: regulator-pm660l-l2 {
regulator-name = "pm660l_l2";
@@ -501,7 +520,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -509,9 +528,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob3";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l3: regulator-pm660l-l3 {
regulator-name = "pm660l_l3";
@@ -519,7 +539,7 @@
regulator-min-microvolt = <2850000>;
regulator-max-microvolt = <3008000>;
qcom,init-voltage = <2850000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -527,9 +547,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob4";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l4: regulator-pm660l-l4 {
regulator-name = "pm660l_l4";
@@ -537,7 +558,7 @@
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <2960000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -545,9 +566,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob5";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l5: regulator-pm660l-l5 {
regulator-name = "pm660l_l5";
@@ -555,7 +577,7 @@
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <2960000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -563,9 +585,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob6";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l6: regulator-pm660l-l6 {
regulator-name = "pm660l_l6";
@@ -573,7 +596,7 @@
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3300000>;
qcom,init-voltage = <3008000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -581,9 +604,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob7";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l7: regulator-pm660l-l7 {
regulator-name = "pm660l_l7";
@@ -591,7 +615,7 @@
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3100000>;
qcom,init-voltage = <3088000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -599,9 +623,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldob8";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm660l_l8: regulator-pm660l-l8 {
regulator-name = "pm660l_l8";
@@ -609,7 +634,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3312000>;
qcom,init-voltage = <3300000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
index 7e426cf..4e3683c 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,6 +26,7 @@
#include "dsi-panel-nt35695b-truly-fhd-cmd.dtsi"
#include "dsi-panel-rm67195-amoled-fhd-cmd.dtsi"
#include "dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi"
+#include "dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi"
#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
&soc {
@@ -465,6 +466,29 @@
ibb-supply = <&lcdb_ncp_vreg>;
};
+ dsi_hx8399_truly_cmd_display: qcom,dsi-display@16 {
+ compatible = "qcom,dsi-display";
+ label = "dsi_hx8399_truly_cmd_display";
+ qcom,display-type = "primary";
+
+ qcom,dsi-ctrl = <&mdss_dsi0>;
+ qcom,dsi-phy = <&mdss_dsi_phy0>;
+ clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
+ <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
+ clock-names = "src_byte_clk", "src_pixel_clk";
+
+ pinctrl-names = "panel_active", "panel_suspend";
+ pinctrl-0 = <&sde_dsi_active &sde_te_active>;
+ pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+
+ qcom,dsi-panel = <&dsi_hx8399_truly_cmd>;
+ vddio-supply = <&pm660_l11>;
+ lab-supply = <&lcdb_ldo_vreg>;
+ ibb-supply = <&lcdb_ncp_vreg>;
+ };
+
sde_wb: qcom,wb-display@0 {
compatible = "qcom,wb-display";
cell-index = <0>;
@@ -787,13 +811,13 @@
};
&dsi_nt35695b_truly_fhd_cmd {
- qcom,mdss-dsi-t-clk-post = <0x07>;
- qcom,mdss-dsi-t-clk-pre = <0x1c>;
+ qcom,mdss-dsi-t-clk-post = <0x0d>;
+ qcom,mdss-dsi-t-clk-pre = <0x2d>;
qcom,ulps-enabled;
qcom,mdss-dsi-display-timings {
timing@0 {
- qcom,mdss-dsi-panel-phy-timings = [00 1c 05 06 0b 0c
- 05 07 05 03 04 00];
+ qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 23 22
+ 07 07 05 03 04 00];
qcom,display-topology = <1 0 1>;
qcom,default-topology-index = <0>;
};
@@ -813,3 +837,16 @@
};
};
};
+
+&dsi_hx8399_truly_cmd {
+ qcom,mdss-dsi-t-clk-post = <0x0E>;
+ qcom,mdss-dsi-t-clk-pre = <0x30>;
+ qcom,mdss-dsi-display-timings {
+ timing@0 {
+ qcom,mdss-dsi-panel-phy-timings = [00 1f 08 08 24 22 08
+ 08 05 03 04 00];
+ qcom,display-topology = <1 0 1>;
+ qcom,default-topology-index = <0>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-usb.dtsi b/arch/arm64/boot/dts/qcom/sdm670-usb.dtsi
index 84c7459..2ce829d 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-usb.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-usb.dtsi
@@ -29,6 +29,7 @@
&usb0 {
/delete-property/ iommus;
/delete-property/ qcom,smmu-s1-bypass;
+ qcom,pm-qos-latency = <601>; /* CPU-CLUSTER-WFI-LVL latency +1 */
extcon = <0>, <0>, <&eud>, <0>, <0>;
};
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 4d38f954..5273b14 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -545,6 +545,14 @@
size = <0 0x1400000>;
};
+ qseecom_ta_mem: qseecom_ta_region {
+ compatible = "shared-dma-pool";
+ alloc-ranges = <0 0x00000000 0 0xffffffff>;
+ reusable;
+ alignment = <0 0x400000>;
+ size = <0 0x1000000>;
+ };
+
sp_mem: sp_region { /* SPSS-HLOS ION shared mem */
compatible = "shared-dma-pool";
alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */
@@ -745,6 +753,7 @@
compatible = "qcom,memshare-peripheral";
qcom,peripheral-size = <0x500000>;
qcom,client-id = <1>;
+ qcom,allocate-boot-time;
label = "modem";
};
};
@@ -2386,7 +2395,7 @@
qcom,msm_fastrpc {
compatible = "qcom,msm-fastrpc-compute";
- qcom,adsp-remoteheap-vmid = <37>;
+ qcom,adsp-remoteheap-vmid = <22 37>;
qcom,msm_fastrpc_compute_cb1 {
compatible = "qcom,msm-fastrpc-compute-cb";
@@ -2537,8 +2546,6 @@
qcom,count-unit = <0x10000>;
qcom,hw-timer-hz = <19200000>;
qcom,target-dev = <&cpubw>;
- qcom,byte-mid-mask = <0xe000>;
- qcom,byte-mid-match = <0xe000>;
};
memlat_cpu0: qcom,memlat-cpu0 {
diff --git a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
index fcfab09..a7cf880 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-coresight.dtsi
@@ -548,6 +548,8 @@
clocks = <&clock_aop QDSS_CLK>;
clock-names = "apb_pclk";
+ status = "disabled";
+
ports {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
index ee0ad1f..33bcaa6 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-gpu.dtsi
@@ -127,6 +127,8 @@
#size-cells = <0>;
compatible = "qcom,gpu-coresight";
+ status = "disabled";
+
qcom,gpu-coresight@0 {
reg = <0>;
coresight-name = "coresight-gfx";
diff --git a/arch/arm64/boot/dts/qcom/sdm845-pm.dtsi b/arch/arm64/boot/dts/qcom/sdm845-pm.dtsi
index b24ef1d..ee10cfc 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-pm.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-pm.dtsi
@@ -139,4 +139,8 @@
reg = <0xC300000 0x1000>, <0xC3F0004 0x4>;
reg-names = "phys_addr_base", "offset_addr";
};
+
+ qcom,rpmh-master-stats {
+ compatible = "qcom,rpmh-master-stats";
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi b/arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi
index 0c1f097..1825cd0 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-qvr.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -60,6 +60,30 @@
qcom,sw-jeita-enable;
};
+&qupv3_se3_i2c {
+ status = "ok";
+ nq@28 {
+ compatible = "qcom,nq-nci";
+ reg = <0x28>;
+ qcom,nq-irq = <&tlmm 63 0x00>;
+ qcom,nq-ven = <&tlmm 12 0x00>;
+ qcom,nq-firm = <&tlmm 62 0x00>;
+ qcom,nq-clkreq = <&pm8998_gpios 21 0x00>;
+ qcom,nq-esepwr = <&tlmm 116 0x00>;
+ interrupt-parent = <&tlmm>;
+ qcom,clk-src = "BBCLK3";
+ interrupts = <63 0>;
+ interrupt-names = "nfc_irq";
+ pinctrl-names = "nfc_active", "nfc_suspend";
+ pinctrl-0 = <&nfc_int_active
+ &nfc_enable_active
+ &nfc_clk_default>;
+ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+ clocks = <&clock_rpmh RPMH_LN_BB_CLK3>;
+ clock-names = "ref_clk";
+ };
+};
+
&qupv3_se10_i2c {
status = "ok";
};
@@ -106,6 +130,29 @@
};
};
+&qusb_phy0 {
+ qcom,qusb-phy-init-seq =
+ /* <value reg_offset> */
+ <0x23 0x210 /* PWR_CTRL1 */
+ 0x03 0x04 /* PLL_ANALOG_CONTROLS_TWO */
+ 0x7c 0x18c /* PLL_CLOCK_INVERTERS */
+ 0x80 0x2c /* PLL_CMODE */
+ 0x0a 0x184 /* PLL_LOCK_DELAY */
+ 0x19 0xb4 /* PLL_DIGITAL_TIMERS_TWO */
+ 0x40 0x194 /* PLL_BIAS_CONTROL_1 */
+ 0x20 0x198 /* PLL_BIAS_CONTROL_2 */
+ 0x21 0x214 /* PWR_CTRL2 */
+ 0x00 0x220 /* IMP_CTRL1 */
+ 0x58 0x224 /* IMP_CTRL2 */
+ 0x27 0x240 /* TUNE1 */
+ 0x29 0x244 /* TUNE2 */
+ 0xca 0x248 /* TUNE3 */
+ 0x04 0x24c /* TUNE4 */
+ 0x03 0x250 /* TUNE5 */
+ 0x00 0x23c /* CHG_CTRL2 */
+ 0x22 0x210>; /* PWR_CTRL1 */
+};
+
&pmi8998_haptics {
qcom,vmax-mv = <1800>;
qcom,wave-play-rate-us = <4255>;
diff --git a/arch/arm64/boot/dts/qcom/sdm845-regulator.dtsi b/arch/arm64/boot/dts/qcom/sdm845-regulator.dtsi
index 9672b94..9d7c519 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-regulator.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-regulator.dtsi
@@ -167,9 +167,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa1";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
proxy-supply = <&pm8998_l1>;
pm8998_l1: regulator-l1 {
@@ -180,7 +181,7 @@
qcom,proxy-consumer-enable;
qcom,proxy-consumer-current = <72000>;
qcom,init-voltage = <880000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
pm8998_l1_ao: regulator-l1-ao {
@@ -189,7 +190,7 @@
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
qcom,init-voltage = <880000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
regulator-l1-so {
@@ -198,7 +199,7 @@
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <880000>;
qcom,init-voltage = <880000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
qcom,init-enable = <0>;
};
};
@@ -207,9 +208,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa2";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 30000>;
pm8998_l2: regulator-l2 {
regulator-name = "pm8998_l2";
@@ -217,7 +219,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
regulator-always-on;
};
};
@@ -226,9 +228,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa3";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l3: regulator-l3 {
regulator-name = "pm8998_l3";
@@ -236,7 +239,7 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
qcom,init-voltage = <1000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -257,9 +260,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa5";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l5: regulator-l5 {
regulator-name = "pm8998_l5";
@@ -267,7 +271,7 @@
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <800000>;
qcom,init-voltage = <800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -275,9 +279,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa6";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l6: regulator-l6 {
regulator-name = "pm8998_l6";
@@ -285,7 +290,7 @@
regulator-min-microvolt = <1856000>;
regulator-max-microvolt = <1856000>;
qcom,init-voltage = <1856000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -293,9 +298,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa7";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l7: regulator-l7 {
regulator-name = "pm8998_l7";
@@ -303,7 +309,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -311,9 +317,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa8";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l8: regulator-l8 {
regulator-name = "pm8998_l8";
@@ -321,7 +328,7 @@
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1248000>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -329,9 +336,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa9";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l9: regulator-l9 {
regulator-name = "pm8998_l9";
@@ -339,7 +347,7 @@
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
qcom,init-voltage = <1704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -347,9 +355,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa10";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l10: regulator-l10 {
regulator-name = "pm8998_l10";
@@ -357,7 +366,7 @@
regulator-min-microvolt = <1704000>;
regulator-max-microvolt = <2928000>;
qcom,init-voltage = <1704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -365,9 +374,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa11";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l11: regulator-l11 {
regulator-name = "pm8998_l11";
@@ -375,7 +385,7 @@
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1048000>;
qcom,init-voltage = <1000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -383,9 +393,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa12";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l12: regulator-l12 {
regulator-name = "pm8998_l12";
@@ -393,7 +404,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -401,9 +412,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa13";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l13: regulator-l13 {
regulator-name = "pm8998_l13";
@@ -411,7 +423,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -419,9 +431,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa14";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
proxy-supply = <&pm8998_l14>;
pm8998_l14: regulator-l14 {
@@ -432,7 +445,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1880000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -440,9 +453,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa15";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l15: regulator-l15 {
regulator-name = "pm8998_l15";
@@ -450,7 +464,7 @@
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
qcom,init-voltage = <1800000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -458,9 +472,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa16";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l16: regulator-l16 {
regulator-name = "pm8998_l16";
@@ -468,7 +483,7 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2704000>;
qcom,init-voltage = <2704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -476,9 +491,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa17";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l17: regulator-l17 {
regulator-name = "pm8998_l17";
@@ -486,7 +502,7 @@
regulator-min-microvolt = <1304000>;
regulator-max-microvolt = <1304000>;
qcom,init-voltage = <1304000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -494,9 +510,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa18";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l18: regulator-l18 {
regulator-name = "pm8998_l18";
@@ -504,7 +521,7 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <2704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -512,9 +529,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa19";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l19: regulator-l19 {
regulator-name = "pm8998_l19";
@@ -522,7 +540,7 @@
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3104000>;
qcom,init-voltage = <2856000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -530,9 +548,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa20";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l20: regulator-l20 {
regulator-name = "pm8998_l20";
@@ -540,7 +559,7 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <2704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -548,9 +567,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa21";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l21: regulator-l21 {
regulator-name = "pm8998_l21";
@@ -558,7 +578,7 @@
regulator-min-microvolt = <2704000>;
regulator-max-microvolt = <2960000>;
qcom,init-voltage = <2704000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -566,9 +586,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa22";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l22: regulator-l22 {
regulator-name = "pm8998_l22";
@@ -576,7 +597,7 @@
regulator-min-microvolt = <2864000>;
regulator-max-microvolt = <3312000>;
qcom,init-voltage = <2864000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -584,9 +605,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa23";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l23: regulator-l23 {
regulator-name = "pm8998_l23";
@@ -594,7 +616,7 @@
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
qcom,init-voltage = <3000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -602,9 +624,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa24";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l24-parent-supply = <&pm8998_l12>;
pm8998_l24: regulator-l24 {
@@ -613,7 +636,7 @@
regulator-min-microvolt = <3088000>;
regulator-max-microvolt = <3088000>;
qcom,init-voltage = <3088000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -621,9 +644,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa25";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 10000>;
pm8998_l25: regulator-l25 {
regulator-name = "pm8998_l25";
@@ -631,7 +655,7 @@
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3312000>;
qcom,init-voltage = <3000000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -639,9 +663,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa26";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
proxy-supply = <&pm8998_l26>;
pm8998_l26: regulator-l26 {
@@ -652,7 +677,7 @@
qcom,proxy-consumer-enable;
qcom,proxy-consumer-current = <43600>;
qcom,init-voltage = <1200000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -673,9 +698,10 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "ldoa28";
+ qcom,regulator-type = "pmic4-ldo";
qcom,supported-modes =
- <RPMH_REGULATOR_MODE_LDO_LPM
- RPMH_REGULATOR_MODE_LDO_HPM>;
+ <RPMH_REGULATOR_MODE_LPM
+ RPMH_REGULATOR_MODE_HPM>;
qcom,mode-threshold-currents = <0 1>;
pm8998_l28: regulator-l28 {
regulator-name = "pm8998_l28";
@@ -683,7 +709,7 @@
regulator-min-microvolt = <2856000>;
regulator-max-microvolt = <3008000>;
qcom,init-voltage = <2856000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_LDO_LPM>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_LPM>;
};
};
@@ -715,6 +741,7 @@
compatible = "qcom,rpmh-vrm-regulator";
mboxes = <&apps_rsc 0>;
qcom,resource-name = "bobb1";
+ qcom,regulator-type = "pmic4-bob";
qcom,send-defaults;
pmi8998_bob: regulator-bob {
@@ -723,7 +750,7 @@
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <3312000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_BOB_PASS>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_PASS>;
};
pmi8998_bob_ao: regulator-bob-ao {
@@ -732,7 +759,7 @@
regulator-min-microvolt = <3312000>;
regulator-max-microvolt = <3600000>;
qcom,init-voltage = <3312000>;
- qcom,init-mode = <RPMH_REGULATOR_MODE_BOB_AUTO>;
+ qcom,init-mode = <RPMH_REGULATOR_MODE_AUTO>;
};
};
diff --git a/arch/arm64/configs/msm8953-perf_defconfig b/arch/arm64/configs/msm8953-perf_defconfig
index de90d43..41355df 100644
--- a/arch/arm64/configs/msm8953-perf_defconfig
+++ b/arch/arm64/configs/msm8953-perf_defconfig
@@ -320,11 +320,17 @@
CONFIG_MSM_APM=y
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_THERMAL=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_THERMAL_GOV_LOW_LIMITS=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
CONFIG_THERMAL_QPNP=y
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_THERMAL_TSENS=y
-CONFIG_MSM_BCL_PERIPHERAL_CTL=y
-CONFIG_QTI_THERMAL_LIMITS_DCVS=y
+CONFIG_QTI_VIRTUAL_SENSOR=y
+CONFIG_QTI_QMI_COOLING_DEVICE=y
+CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_CPR4_APSS=y
@@ -457,6 +463,7 @@
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MAILBOX=y
CONFIG_ARM_SMMU=y
+CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_MSM_SPM=y
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
diff --git a/arch/arm64/configs/msm8953_defconfig b/arch/arm64/configs/msm8953_defconfig
index 8145f47..7ac20ad 100644
--- a/arch/arm64/configs/msm8953_defconfig
+++ b/arch/arm64/configs/msm8953_defconfig
@@ -330,11 +330,17 @@
CONFIG_MSM_APM=y
CONFIG_SENSORS_QPNP_ADC_VOLTAGE=y
CONFIG_THERMAL=y
+CONFIG_THERMAL_WRITABLE_TRIPS=y
+CONFIG_THERMAL_GOV_USER_SPACE=y
+CONFIG_THERMAL_GOV_LOW_LIMITS=y
+CONFIG_CPU_THERMAL=y
+CONFIG_DEVFREQ_THERMAL=y
CONFIG_THERMAL_QPNP=y
CONFIG_THERMAL_QPNP_ADC_TM=y
CONFIG_THERMAL_TSENS=y
-CONFIG_MSM_BCL_PERIPHERAL_CTL=y
-CONFIG_QTI_THERMAL_LIMITS_DCVS=y
+CONFIG_QTI_VIRTUAL_SENSOR=y
+CONFIG_QTI_QMI_COOLING_DEVICE=y
+CONFIG_REGULATOR_COOLING_DEVICE=y
CONFIG_MFD_SPMI_PMIC=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_CPR4_APSS=y
@@ -469,6 +475,7 @@
CONFIG_REMOTE_SPINLOCK_MSM=y
CONFIG_MAILBOX=y
CONFIG_ARM_SMMU=y
+CONFIG_QCOM_LAZY_MAPPING=y
CONFIG_IOMMU_DEBUG=y
CONFIG_IOMMU_DEBUG_TRACKING=y
CONFIG_IOMMU_TESTS=y
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index ef5970e..e6886df 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -453,9 +453,9 @@
.endm
/*
- * Errata workaround post TTBR0_EL1 update.
+ * Errata workaround post TTBRx_EL1 update.
*/
- .macro post_ttbr0_update_workaround
+ .macro post_ttbr_update_workaround
#ifdef CONFIG_CAVIUM_ERRATUM_27456
alternative_if ARM64_WORKAROUND_CAVIUM_27456
ic iallu
diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 87b4465..b063137 100644
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -35,6 +35,8 @@
#define ARM64_HYP_OFFSET_LOW 14
#define ARM64_MISMATCHED_CACHE_LINE_SIZE 15
-#define ARM64_NCAPS 16
+#define ARM64_UNMAP_KERNEL_AT_EL0 16
+
+#define ARM64_NCAPS 17
#endif /* __ASM_CPUCAPS_H */
diff --git a/arch/arm64/include/asm/fixmap.h b/arch/arm64/include/asm/fixmap.h
index caf86be..d8e5805 100644
--- a/arch/arm64/include/asm/fixmap.h
+++ b/arch/arm64/include/asm/fixmap.h
@@ -51,6 +51,12 @@
FIX_EARLYCON_MEM_BASE,
FIX_TEXT_POKE0,
+
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ FIX_ENTRY_TRAMP_DATA,
+ FIX_ENTRY_TRAMP_TEXT,
+#define TRAMP_VALIAS (__fix_to_virt(FIX_ENTRY_TRAMP_TEXT))
+#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
__end_of_permanent_fixed_addresses,
/*
diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h
index 7803343..77a27af 100644
--- a/arch/arm64/include/asm/kernel-pgtable.h
+++ b/arch/arm64/include/asm/kernel-pgtable.h
@@ -78,8 +78,16 @@
/*
* Initial memory map attributes.
*/
-#define SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
-#define SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
+#define _SWAPPER_PTE_FLAGS (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
+#define _SWAPPER_PMD_FLAGS (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
+
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+#define SWAPPER_PTE_FLAGS (_SWAPPER_PTE_FLAGS | PTE_NG)
+#define SWAPPER_PMD_FLAGS (_SWAPPER_PMD_FLAGS | PMD_SECT_NG)
+#else
+#define SWAPPER_PTE_FLAGS _SWAPPER_PTE_FLAGS
+#define SWAPPER_PMD_FLAGS _SWAPPER_PMD_FLAGS
+#endif
#if ARM64_SWAPPER_USES_SECTION_MAPS
#define SWAPPER_MM_MMUFLAGS (PMD_ATTRINDX(MT_NORMAL) | SWAPPER_PMD_FLAGS)
diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h
index 8d9fce0..d7750fc 100644
--- a/arch/arm64/include/asm/mmu.h
+++ b/arch/arm64/include/asm/mmu.h
@@ -16,6 +16,12 @@
#ifndef __ASM_MMU_H
#define __ASM_MMU_H
+
+#define USER_ASID_FLAG (UL(1) << 48)
+#define TTBR_ASID_MASK (UL(0xffff) << 48)
+
+#ifndef __ASSEMBLY__
+
typedef struct {
atomic64_t id;
void *vdso;
@@ -28,6 +34,12 @@
*/
#define ASID(mm) ((mm)->context.id.counter & 0xffff)
+static inline bool arm64_kernel_unmapped_at_el0(void)
+{
+ return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0) &&
+ cpus_have_cap(ARM64_UNMAP_KERNEL_AT_EL0);
+}
+
extern void paging_init(void);
extern void bootmem_init(void);
extern void __iomem *early_io_map(phys_addr_t phys, unsigned long virt);
@@ -37,4 +49,5 @@
pgprot_t prot, bool allow_block_mappings);
extern void *fixmap_remap_fdt(phys_addr_t dt_phys);
+#endif /* !__ASSEMBLY__ */
#endif
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h
index 8f8dde1..af0215a 100644
--- a/arch/arm64/include/asm/mmu_context.h
+++ b/arch/arm64/include/asm/mmu_context.h
@@ -57,6 +57,13 @@
isb();
}
+static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm)
+{
+ BUG_ON(pgd == swapper_pg_dir);
+ cpu_set_reserved_ttbr0();
+ cpu_do_switch_mm(virt_to_phys(pgd),mm);
+}
+
/*
* TCR.T0SZ value to use when the ID map is active. Usually equals
* TCR_T0SZ(VA_BITS), unless system RAM is positioned very high in
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h
index eb0c2bd..8df4cb6 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -272,6 +272,7 @@
#define TCR_TG1_4K (UL(2) << TCR_TG1_SHIFT)
#define TCR_TG1_64K (UL(3) << TCR_TG1_SHIFT)
+#define TCR_A1 (UL(1) << 22)
#define TCR_ASID16 (UL(1) << 36)
#define TCR_TBI0 (UL(1) << 37)
#define TCR_HA (UL(1) << 39)
diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h
index 2142c77..84b5283 100644
--- a/arch/arm64/include/asm/pgtable-prot.h
+++ b/arch/arm64/include/asm/pgtable-prot.h
@@ -34,8 +34,16 @@
#include <asm/pgtable-types.h>
-#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
-#define PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
+#define _PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_SHARED)
+#define _PROT_SECT_DEFAULT (PMD_TYPE_SECT | PMD_SECT_AF | PMD_SECT_S)
+
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+#define PROT_DEFAULT (_PROT_DEFAULT | PTE_NG)
+#define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_SECT_NG)
+#else
+#define PROT_DEFAULT _PROT_DEFAULT
+#define PROT_SECT_DEFAULT _PROT_SECT_DEFAULT
+#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
@@ -48,6 +56,7 @@
#define PROT_SECT_NORMAL_EXEC (PROT_SECT_DEFAULT | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
#define _PAGE_DEFAULT (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
+#define _HYP_PAGE_DEFAULT (_PAGE_DEFAULT & ~PTE_NG)
#define PAGE_KERNEL __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE)
#define PAGE_KERNEL_RO __pgprot(_PAGE_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_RDONLY)
@@ -55,15 +64,15 @@
#define PAGE_KERNEL_EXEC __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE)
#define PAGE_KERNEL_EXEC_CONT __pgprot(_PAGE_DEFAULT | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_CONT)
-#define PAGE_HYP __pgprot(_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)
-#define PAGE_HYP_EXEC __pgprot(_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)
-#define PAGE_HYP_RO __pgprot(_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)
+#define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)
+#define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)
+#define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)
#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)
#define PAGE_S2 __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_NORMAL) | PTE_S2_RDONLY)
#define PAGE_S2_DEVICE __pgprot(PROT_DEFAULT | PTE_S2_MEMATTR(MT_S2_DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_UXN)
-#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_PXN | PTE_UXN)
+#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_NG | PTE_PXN | PTE_UXN)
#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
#define PAGE_COPY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index c05ee84..0adb30a 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -707,6 +707,7 @@
extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
+extern pgd_t tramp_pg_dir[PTRS_PER_PGD];
/*
* Encode and decode a swap entry:
diff --git a/arch/arm64/include/asm/proc-fns.h b/arch/arm64/include/asm/proc-fns.h
index 220633b7..9da52c2 100644
--- a/arch/arm64/include/asm/proc-fns.h
+++ b/arch/arm64/include/asm/proc-fns.h
@@ -39,12 +39,6 @@
#include <asm/memory.h>
-#define cpu_switch_mm(pgd,mm) \
-do { \
- BUG_ON(pgd == swapper_pg_dir); \
- cpu_do_switch_mm(virt_to_phys(pgd),mm); \
-} while (0)
-
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* __ASM_PROCFNS_H */
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index deab523..ad6bd8b 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -23,6 +23,7 @@
#include <linux/sched.h>
#include <asm/cputype.h>
+#include <asm/mmu.h>
/*
* Raw TLBI operations.
@@ -42,6 +43,11 @@
#define __tlbi(op, ...) __TLBI_N(op, ##__VA_ARGS__, 1, 0)
+#define __tlbi_user(op, arg) do { \
+ if (arm64_kernel_unmapped_at_el0()) \
+ __tlbi(op, (arg) | USER_ASID_FLAG); \
+} while (0)
+
/*
* TLB Management
* ==============
@@ -103,6 +109,7 @@
dsb(ishst);
__tlbi(aside1is, asid);
+ __tlbi_user(aside1is, asid);
dsb(ish);
}
@@ -113,6 +120,7 @@
dsb(ishst);
__tlbi(vale1is, addr);
+ __tlbi_user(vale1is, addr);
dsb(ish);
}
@@ -139,10 +147,13 @@
dsb(ishst);
for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) {
- if (last_level)
+ if (last_level) {
__tlbi(vale1is, addr);
- else
+ __tlbi_user(vale1is, addr);
+ } else {
__tlbi(vae1is, addr);
+ __tlbi_user(vae1is, addr);
+ }
}
dsb(ish);
}
@@ -182,6 +193,7 @@
unsigned long addr = uaddr >> 12 | (ASID(mm) << 48);
__tlbi(vae1is, addr);
+ __tlbi_user(vae1is, addr);
dsb(ish);
}
diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index 4d9222a..8b38b0d 100644
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -20,6 +20,7 @@
#include <asm/alternative.h>
#include <asm/kernel-pgtable.h>
+#include <asm/mmu.h>
#include <asm/sysreg.h>
#ifndef __ASSEMBLY__
@@ -133,15 +134,19 @@
{
unsigned long ttbr;
+ ttbr = read_sysreg(ttbr1_el1);
/* reserved_ttbr0 placed at the end of swapper_pg_dir */
- ttbr = read_sysreg(ttbr1_el1) + SWAPPER_DIR_SIZE;
- write_sysreg(ttbr, ttbr0_el1);
+ write_sysreg(ttbr + SWAPPER_DIR_SIZE, ttbr0_el1);
+ isb();
+ /* Set reserved ASID */
+ ttbr &= ~TTBR_ASID_MASK;
+ write_sysreg(ttbr, ttbr1_el1);
isb();
}
static inline void __uaccess_ttbr0_enable(void)
{
- unsigned long flags;
+ unsigned long flags, ttbr0, ttbr1;
/*
* Disable interrupts to avoid preemption between reading the 'ttbr0'
@@ -149,7 +154,16 @@
* roll-over and an update of 'ttbr0'.
*/
local_irq_save(flags);
- write_sysreg(current_thread_info()->ttbr0, ttbr0_el1);
+ ttbr0 = current_thread_info()->ttbr0;
+
+ /* Restore active ASID */
+ ttbr1 = read_sysreg(ttbr1_el1);
+ ttbr1 |= ttbr0 & TTBR_ASID_MASK;
+ write_sysreg(ttbr1, ttbr1_el1);
+ isb();
+
+ /* Restore user page table */
+ write_sysreg(ttbr0, ttbr0_el1);
isb();
local_irq_restore(flags);
}
@@ -439,11 +453,20 @@
add \tmp1, \tmp1, #SWAPPER_DIR_SIZE // reserved_ttbr0 at the end of swapper_pg_dir
msr ttbr0_el1, \tmp1 // set reserved TTBR0_EL1
isb
+ sub \tmp1, \tmp1, #SWAPPER_DIR_SIZE
+ bic \tmp1, \tmp1, #TTBR_ASID_MASK
+ msr ttbr1_el1, \tmp1 // set reserved ASID
+ isb
.endm
- .macro __uaccess_ttbr0_enable, tmp1
+ .macro __uaccess_ttbr0_enable, tmp1, tmp2
get_thread_info \tmp1
ldr \tmp1, [\tmp1, #TSK_TI_TTBR0] // load saved TTBR0_EL1
+ mrs \tmp2, ttbr1_el1
+ extr \tmp2, \tmp2, \tmp1, #48
+ ror \tmp2, \tmp2, #16
+ msr ttbr1_el1, \tmp2 // set the active ASID
+ isb
msr ttbr0_el1, \tmp1 // set the non-PAN TTBR0_EL1
isb
.endm
@@ -454,18 +477,18 @@
alternative_else_nop_endif
.endm
- .macro uaccess_ttbr0_enable, tmp1, tmp2
+ .macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
alternative_if_not ARM64_HAS_PAN
- save_and_disable_irq \tmp2 // avoid preemption
- __uaccess_ttbr0_enable \tmp1
- restore_irq \tmp2
+ save_and_disable_irq \tmp3 // avoid preemption
+ __uaccess_ttbr0_enable \tmp1, \tmp2
+ restore_irq \tmp3
alternative_else_nop_endif
.endm
#else
.macro uaccess_ttbr0_disable, tmp1
.endm
- .macro uaccess_ttbr0_enable, tmp1, tmp2
+ .macro uaccess_ttbr0_enable, tmp1, tmp2, tmp3
.endm
#endif
@@ -479,8 +502,8 @@
alternative_else_nop_endif
.endm
- .macro uaccess_enable_not_uao, tmp1, tmp2
- uaccess_ttbr0_enable \tmp1, \tmp2
+ .macro uaccess_enable_not_uao, tmp1, tmp2, tmp3
+ uaccess_ttbr0_enable \tmp1, \tmp2, \tmp3
alternative_if ARM64_ALT_PAN_NOT_UAO
SET_PSTATE_PAN(0)
alternative_else_nop_endif
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index b3bb7ef..5d2d356 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -24,6 +24,7 @@
#include <linux/kvm_host.h>
#include <linux/suspend.h>
#include <asm/cpufeature.h>
+#include <asm/fixmap.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/smp_plat.h>
@@ -147,11 +148,14 @@
DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
-
BLANK();
DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
DEFINE(HIBERN_PBE_NEXT, offsetof(struct pbe, next));
DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val));
+ BLANK();
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ DEFINE(TRAMP_VALIAS, TRAMP_VALIAS);
+#endif
return 0;
}
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 0127e1b..bfbd9e9 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -748,6 +748,40 @@
return idmap_addr > GENMASK(VA_BITS - 2, 0) && !is_kernel_in_hyp_mode();
}
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */
+
+static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
+ int __unused)
+{
+ /* Forced on command line? */
+ if (__kpti_forced) {
+ pr_info_once("kernel page table isolation forced %s by command line option\n",
+ __kpti_forced > 0 ? "ON" : "OFF");
+ return __kpti_forced > 0;
+ }
+
+ /* Useful for KASLR robustness */
+ if (IS_ENABLED(CONFIG_RANDOMIZE_BASE))
+ return true;
+
+ return false;
+}
+
+static int __init parse_kpti(char *str)
+{
+ bool enabled;
+ int ret = strtobool(str, &enabled);
+
+ if (ret)
+ return ret;
+
+ __kpti_forced = enabled ? 1 : -1;
+ return 0;
+}
+__setup("kpti=", parse_kpti);
+#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
+
static const struct arm64_cpu_capabilities arm64_features[] = {
{
.desc = "GIC system register CPU interface",
@@ -831,6 +865,13 @@
.def_scope = SCOPE_SYSTEM,
.matches = hyp_offset_low,
},
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ {
+ .capability = ARM64_UNMAP_KERNEL_AT_EL0,
+ .def_scope = SCOPE_SYSTEM,
+ .matches = unmap_kernel_at_el0,
+ },
+#endif
{},
};
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 718c4c8..d04b9cb 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -29,6 +29,7 @@
#include <asm/esr.h>
#include <asm/irq.h>
#include <asm/memory.h>
+#include <asm/mmu.h>
#include <asm/ptrace.h>
#include <asm/thread_info.h>
#include <asm/uaccess.h>
@@ -70,8 +71,31 @@
#define BAD_FIQ 2
#define BAD_ERROR 3
- .macro kernel_entry, el, regsize = 64
+ .macro kernel_ventry, el, label, regsize = 64
+ .align 7
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+alternative_if ARM64_UNMAP_KERNEL_AT_EL0
+ .if \el == 0
+ .if \regsize == 64
+ mrs x30, tpidrro_el0
+ msr tpidrro_el0, xzr
+ .else
+ mov x30, xzr
+ .endif
+ .endif
+alternative_else_nop_endif
+#endif
+
sub sp, sp, #S_FRAME_SIZE
+ b el\()\el\()_\label
+ .endm
+
+ .macro tramp_alias, dst, sym
+ mov_q \dst, TRAMP_VALIAS
+ add \dst, \dst, #(\sym - .entry.tramp.text)
+ .endm
+
+ .macro kernel_entry, el, regsize = 64
.if \regsize == 32
mov w0, w0 // zero upper 32 bits of x0
.endif
@@ -126,8 +150,8 @@
alternative_else_nop_endif
.if \el != 0
- mrs x21, ttbr0_el1
- tst x21, #0xffff << 48 // Check for the reserved ASID
+ mrs x21, ttbr1_el1
+ tst x21, #TTBR_ASID_MASK // Check for the reserved ASID
orr x23, x23, #PSR_PAN_BIT // Set the emulated PAN in the saved SPSR
b.eq 1f // TTBR0 access already disabled
and x23, x23, #~PSR_PAN_BIT // Clear the emulated PAN in the saved SPSR
@@ -190,7 +214,7 @@
tbnz x22, #22, 1f // Skip re-enabling TTBR0 access if the PSR_PAN_BIT is set
.endif
- __uaccess_ttbr0_enable x0
+ __uaccess_ttbr0_enable x0, x1
.if \el == 0
/*
@@ -199,7 +223,7 @@
* Cavium erratum 27456 (broadcast TLBI instructions may cause I-cache
* corruption).
*/
- post_ttbr0_update_workaround
+ post_ttbr_update_workaround
.endif
1:
.if \el != 0
@@ -211,18 +235,20 @@
.if \el == 0
ldr x23, [sp, #S_SP] // load return stack pointer
msr sp_el0, x23
+ tst x22, #PSR_MODE32_BIT // native task?
+ b.eq 3f
+
#ifdef CONFIG_ARM64_ERRATUM_845719
alternative_if ARM64_WORKAROUND_845719
- tbz x22, #4, 1f
#ifdef CONFIG_PID_IN_CONTEXTIDR
mrs x29, contextidr_el1
msr contextidr_el1, x29
#else
msr contextidr_el1, xzr
#endif
-1:
alternative_else_nop_endif
#endif
+3:
.endif
msr elr_el1, x21 // set up the return data
@@ -244,7 +270,21 @@
ldp x28, x29, [sp, #16 * 14]
ldr lr, [sp, #S_LR]
add sp, sp, #S_FRAME_SIZE // restore sp
- eret // return to kernel
+
+ .if \el == 0
+alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ bne 4f
+ msr far_el1, x30
+ tramp_alias x30, tramp_exit_native
+ br x30
+4:
+ tramp_alias x30, tramp_exit_compat
+ br x30
+#endif
+ .else
+ eret
+ .endif
.endm
.macro irq_stack_entry
@@ -316,31 +356,31 @@
.align 11
ENTRY(vectors)
- ventry el1_sync_invalid // Synchronous EL1t
- ventry el1_irq_invalid // IRQ EL1t
- ventry el1_fiq_invalid // FIQ EL1t
- ventry el1_error_invalid // Error EL1t
+ kernel_ventry 1, sync_invalid // Synchronous EL1t
+ kernel_ventry 1, irq_invalid // IRQ EL1t
+ kernel_ventry 1, fiq_invalid // FIQ EL1t
+ kernel_ventry 1, error_invalid // Error EL1t
- ventry el1_sync // Synchronous EL1h
- ventry el1_irq // IRQ EL1h
- ventry el1_fiq_invalid // FIQ EL1h
- ventry el1_error_invalid // Error EL1h
+ kernel_ventry 1, sync // Synchronous EL1h
+ kernel_ventry 1, irq // IRQ EL1h
+ kernel_ventry 1, fiq_invalid // FIQ EL1h
+ kernel_ventry 1, error_invalid // Error EL1h
- ventry el0_sync // Synchronous 64-bit EL0
- ventry el0_irq // IRQ 64-bit EL0
- ventry el0_fiq_invalid // FIQ 64-bit EL0
- ventry el0_error_invalid // Error 64-bit EL0
+ kernel_ventry 0, sync // Synchronous 64-bit EL0
+ kernel_ventry 0, irq // IRQ 64-bit EL0
+ kernel_ventry 0, fiq_invalid // FIQ 64-bit EL0
+ kernel_ventry 0, error_invalid // Error 64-bit EL0
#ifdef CONFIG_COMPAT
- ventry el0_sync_compat // Synchronous 32-bit EL0
- ventry el0_irq_compat // IRQ 32-bit EL0
- ventry el0_fiq_invalid_compat // FIQ 32-bit EL0
- ventry el0_error_invalid_compat // Error 32-bit EL0
+ kernel_ventry 0, sync_compat, 32 // Synchronous 32-bit EL0
+ kernel_ventry 0, irq_compat, 32 // IRQ 32-bit EL0
+ kernel_ventry 0, fiq_invalid_compat, 32 // FIQ 32-bit EL0
+ kernel_ventry 0, error_invalid_compat, 32 // Error 32-bit EL0
#else
- ventry el0_sync_invalid // Synchronous 32-bit EL0
- ventry el0_irq_invalid // IRQ 32-bit EL0
- ventry el0_fiq_invalid // FIQ 32-bit EL0
- ventry el0_error_invalid // Error 32-bit EL0
+ kernel_ventry 0, sync_invalid, 32 // Synchronous 32-bit EL0
+ kernel_ventry 0, irq_invalid, 32 // IRQ 32-bit EL0
+ kernel_ventry 0, fiq_invalid, 32 // FIQ 32-bit EL0
+ kernel_ventry 0, error_invalid, 32 // Error 32-bit EL0
#endif
END(vectors)
@@ -859,6 +899,119 @@
.popsection // .entry.text
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+/*
+ * Exception vectors trampoline.
+ */
+ .pushsection ".entry.tramp.text", "ax"
+
+ .macro tramp_map_kernel, tmp
+ mrs \tmp, ttbr1_el1
+ sub \tmp, \tmp, #(SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ bic \tmp, \tmp, #USER_ASID_FLAG
+ msr ttbr1_el1, \tmp
+#ifdef CONFIG_ARCH_MSM8996
+ /* ASID already in \tmp[63:48] */
+ movk \tmp, #:abs_g2_nc:(TRAMP_VALIAS >> 12)
+ movk \tmp, #:abs_g1_nc:(TRAMP_VALIAS >> 12)
+ /* 2MB boundary containing the vectors, so we nobble the walk cache */
+ movk \tmp, #:abs_g0_nc:((TRAMP_VALIAS & ~(SZ_2M - 1)) >> 12)
+ isb
+ tlbi vae1, \tmp
+ dsb nsh
+#endif /* CONFIG_ARCH_MSM8996 */
+ .endm
+
+ .macro tramp_unmap_kernel, tmp
+ mrs \tmp, ttbr1_el1
+ add \tmp, \tmp, #(SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE)
+ orr \tmp, \tmp, #USER_ASID_FLAG
+ msr ttbr1_el1, \tmp
+ /*
+ * We avoid running the post_ttbr_update_workaround here because the
+ * user and kernel ASIDs don't have conflicting mappings, so any
+ * "blessing" as described in:
+ *
+ * http://lkml.kernel.org/r/56BB848A.6060603@caviumnetworks.com
+ *
+ * will not hurt correctness. Whilst this may partially defeat the
+ * point of using split ASIDs in the first place, it avoids
+ * the hit of invalidating the entire I-cache on every return to
+ * userspace.
+ */
+ .endm
+
+ .macro tramp_ventry, regsize = 64
+ .align 7
+1:
+ .if \regsize == 64
+ msr tpidrro_el0, x30 // Restored in kernel_ventry
+ .endif
+ bl 2f
+ b .
+2:
+ tramp_map_kernel x30
+#ifdef CONFIG_RANDOMIZE_BASE
+ adr x30, tramp_vectors + PAGE_SIZE
+#ifndef CONFIG_ARCH_MSM8996
+ isb
+#endif
+ ldr x30, [x30]
+#else
+ ldr x30, =vectors
+#endif
+ prfm plil1strm, [x30, #(1b - tramp_vectors)]
+ msr vbar_el1, x30
+ add x30, x30, #(1b - tramp_vectors)
+ isb
+ ret
+ .endm
+
+ .macro tramp_exit, regsize = 64
+ adr x30, tramp_vectors
+ msr vbar_el1, x30
+ tramp_unmap_kernel x30
+ .if \regsize == 64
+ mrs x30, far_el1
+ .endif
+ eret
+ .endm
+
+ .align 11
+ENTRY(tramp_vectors)
+ .space 0x400
+
+ tramp_ventry
+ tramp_ventry
+ tramp_ventry
+ tramp_ventry
+
+ tramp_ventry 32
+ tramp_ventry 32
+ tramp_ventry 32
+ tramp_ventry 32
+END(tramp_vectors)
+
+ENTRY(tramp_exit_native)
+ tramp_exit
+END(tramp_exit_native)
+
+ENTRY(tramp_exit_compat)
+ tramp_exit 32
+END(tramp_exit_compat)
+
+ .ltorg
+ .popsection // .entry.tramp.text
+#ifdef CONFIG_RANDOMIZE_BASE
+ .pushsection ".rodata", "a"
+ .align PAGE_SHIFT
+ .globl __entry_tramp_data_start
+__entry_tramp_data_start:
+ .quad vectors
+ .popsection // .rodata
+#endif /* CONFIG_RANDOMIZE_BASE */
+#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
+
/*
* Special system call wrappers.
*/
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 5fe594e..e74ec9c 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -366,17 +366,17 @@
static void tls_thread_switch(struct task_struct *next)
{
- unsigned long tpidr, tpidrro;
+ unsigned long tpidr;
tpidr = read_sysreg(tpidr_el0);
*task_user_tls(current) = tpidr;
- tpidr = *task_user_tls(next);
- tpidrro = is_compat_thread(task_thread_info(next)) ?
- next->thread.tp_value : 0;
+ if (is_compat_thread(task_thread_info(next)))
+ write_sysreg(next->thread.tp_value, tpidrro_el0);
+ else if (!arm64_kernel_unmapped_at_el0())
+ write_sysreg(0, tpidrro_el0);
- write_sysreg(tpidr, tpidr_el0);
- write_sysreg(tpidrro, tpidrro_el0);
+ write_sysreg(*task_user_tls(next), tpidr_el0);
}
/* Restore the UAO state depending on next's addr_limit */
diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index b8deffa..34d3ed6 100644
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -56,6 +56,17 @@
#define HIBERNATE_TEXT
#endif
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+#define TRAMP_TEXT \
+ . = ALIGN(PAGE_SIZE); \
+ VMLINUX_SYMBOL(__entry_tramp_text_start) = .; \
+ *(.entry.tramp.text) \
+ . = ALIGN(PAGE_SIZE); \
+ VMLINUX_SYMBOL(__entry_tramp_text_end) = .;
+#else
+#define TRAMP_TEXT
+#endif
+
/*
* The size of the PE/COFF section that covers the kernel image, which
* runs from stext to _edata, must be a round multiple of the PE/COFF
@@ -128,6 +139,7 @@
HYPERVISOR_TEXT
IDMAP_TEXT
HIBERNATE_TEXT
+ TRAMP_TEXT
*(.fixup)
*(.gnu.warning)
. = ALIGN(16);
@@ -221,6 +233,11 @@
. += RESERVED_TTBR0_SIZE;
#endif
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ tramp_pg_dir = .;
+ . += PAGE_SIZE;
+#endif
+
_end = .;
STABS_DEBUG
@@ -240,7 +257,10 @@
ASSERT(__hibernate_exit_text_end - (__hibernate_exit_text_start & ~(SZ_4K - 1))
<= SZ_4K, "Hibernate exit text too big or misaligned")
#endif
-
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+ASSERT((__entry_tramp_text_end - __entry_tramp_text_start) == PAGE_SIZE,
+ "Entry trampoline text too big")
+#endif
/*
* If padding is applied before .head.text, virt<->phys conversions will fail.
*/
diff --git a/arch/arm64/lib/clear_user.S b/arch/arm64/lib/clear_user.S
index d7150e3..dd65ca2 100644
--- a/arch/arm64/lib/clear_user.S
+++ b/arch/arm64/lib/clear_user.S
@@ -30,7 +30,7 @@
* Alignment fixed up by hardware.
*/
ENTRY(__clear_user)
- uaccess_enable_not_uao x2, x3
+ uaccess_enable_not_uao x2, x3, x4
mov x2, x1 // save the size for fixup return
subs x1, x1, #8
b.mi 2f
diff --git a/arch/arm64/lib/copy_from_user.S b/arch/arm64/lib/copy_from_user.S
index cfe1339..7e7e687 100644
--- a/arch/arm64/lib/copy_from_user.S
+++ b/arch/arm64/lib/copy_from_user.S
@@ -64,7 +64,7 @@
end .req x5
ENTRY(__arch_copy_from_user)
- uaccess_enable_not_uao x3, x4
+ uaccess_enable_not_uao x3, x4, x5
add end, x0, x2
#include "copy_template.S"
uaccess_disable_not_uao x3
diff --git a/arch/arm64/lib/copy_in_user.S b/arch/arm64/lib/copy_in_user.S
index 718b1c4..074d52f 100644
--- a/arch/arm64/lib/copy_in_user.S
+++ b/arch/arm64/lib/copy_in_user.S
@@ -65,7 +65,7 @@
end .req x5
ENTRY(__copy_in_user)
- uaccess_enable_not_uao x3, x4
+ uaccess_enable_not_uao x3, x4, x5
add end, x0, x2
#include "copy_template.S"
uaccess_disable_not_uao x3
diff --git a/arch/arm64/lib/copy_to_user.S b/arch/arm64/lib/copy_to_user.S
index e99e31c..6711844 100644
--- a/arch/arm64/lib/copy_to_user.S
+++ b/arch/arm64/lib/copy_to_user.S
@@ -63,7 +63,7 @@
end .req x5
ENTRY(__arch_copy_to_user)
- uaccess_enable_not_uao x3, x4
+ uaccess_enable_not_uao x3, x4, x5
add end, x0, x2
#include "copy_template.S"
uaccess_disable_not_uao x3
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 97de0eb..9dd6d32 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -122,7 +122,7 @@
* - end - virtual end address of region
*/
ENTRY(__flush_cache_user_range)
- uaccess_ttbr0_enable x2, x3
+ uaccess_ttbr0_enable x2, x3, x4
dcache_line_size x2, x3
sub x3, x2, #1
bic x4, x0, x3
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 4c63cb1..05a885c 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -39,7 +39,16 @@
#define ASID_MASK (~GENMASK(asid_bits - 1, 0))
#define ASID_FIRST_VERSION (1UL << asid_bits)
-#define NUM_USER_ASIDS ASID_FIRST_VERSION
+
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+#define NUM_USER_ASIDS (ASID_FIRST_VERSION >> 1)
+#define asid2idx(asid) (((asid) & ~ASID_MASK) >> 1)
+#define idx2asid(idx) (((idx) << 1) & ~ASID_MASK)
+#else
+#define NUM_USER_ASIDS (ASID_FIRST_VERSION)
+#define asid2idx(asid) ((asid) & ~ASID_MASK)
+#define idx2asid(idx) asid2idx(idx)
+#endif
/* Get the ASIDBits supported by the current CPU */
static u32 get_cpu_asid_bits(void)
@@ -104,7 +113,7 @@
*/
if (asid == 0)
asid = per_cpu(reserved_asids, i);
- __set_bit(asid & ~ASID_MASK, asid_map);
+ __set_bit(asid2idx(asid), asid_map);
per_cpu(reserved_asids, i) = asid;
}
@@ -159,16 +168,16 @@
* We had a valid ASID in a previous life, so try to re-use
* it if possible.
*/
- asid &= ~ASID_MASK;
- if (!__test_and_set_bit(asid, asid_map))
+ if (!__test_and_set_bit(asid2idx(asid), asid_map))
return newasid;
}
/*
* Allocate a free ASID. If we can't find one, take a note of the
- * currently active ASIDs and mark the TLBs as requiring flushes.
- * We always count from ASID #1, as we use ASID #0 when setting a
- * reserved TTBR0 for the init_mm.
+ * currently active ASIDs and mark the TLBs as requiring flushes. We
+ * always count from ASID #2 (index 1), as we use ASID #0 when setting
+ * a reserved TTBR0 for the init_mm and we allocate ASIDs in even/odd
+ * pairs.
*/
asid = find_next_zero_bit(asid_map, NUM_USER_ASIDS, cur_idx);
if (asid != NUM_USER_ASIDS)
@@ -185,7 +194,7 @@
set_asid:
__set_bit(asid, asid_map);
cur_idx = asid;
- return asid | generation;
+ return idx2asid(asid) | generation;
}
void check_and_switch_context(struct mm_struct *mm, unsigned int cpu)
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index 41efd5e..c66fa93 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -458,6 +458,37 @@
vm_area_add_early(vma);
}
+#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
+static int __init map_entry_trampoline(void)
+{
+ extern char __entry_tramp_text_start[];
+
+ pgprot_t prot = PAGE_KERNEL_EXEC;
+ phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start);
+
+ /* The trampoline is always mapped and can therefore be global */
+ pgprot_val(prot) &= ~PTE_NG;
+
+ /* Map only the text into the trampoline page table */
+ memset(tramp_pg_dir, 0, PGD_SIZE);
+ __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
+ prot, pgd_pgtable_alloc, 0);
+
+ /* Map both the text and data into the kernel page table */
+ __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
+ if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
+ extern char __entry_tramp_data_start[];
+
+ __set_fixmap(FIX_ENTRY_TRAMP_DATA,
+ __pa_symbol(__entry_tramp_data_start),
+ PAGE_KERNEL_RO);
+ }
+
+ return 0;
+}
+core_initcall(map_entry_trampoline);
+#endif
+
/*
* Create fine-grained mappings for the kernel.
*/
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S
index 8d21250..c19ba2c 100644
--- a/arch/arm64/mm/proc.S
+++ b/arch/arm64/mm/proc.S
@@ -184,11 +184,14 @@
* - pgd_phys - physical address of new TTB
*/
ENTRY(cpu_do_switch_mm)
+ mrs x2, ttbr1_el1
mmid x1, x1 // get mm->context.id
- bfi x0, x1, #48, #16 // set the ASID
- msr ttbr0_el1, x0 // set TTBR0
+ bfi x2, x1, #48, #16 // set the ASID
+ msr ttbr1_el1, x2 // in TTBR1 (since TCR.A1 is set)
isb
- post_ttbr0_update_workaround
+ msr ttbr0_el1, x0 // now update TTBR0
+ isb
+ post_ttbr_update_workaround
ret
ENDPROC(cpu_do_switch_mm)
@@ -270,7 +273,7 @@
* both user and kernel.
*/
ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \
- TCR_TG_FLAGS | TCR_ASID16 | TCR_TBI0
+ TCR_TG_FLAGS | TCR_ASID16 | TCR_TBI0 | TCR_A1
tcr_set_idmap_t0sz x10, x9
/*
diff --git a/arch/arm64/xen/hypercall.S b/arch/arm64/xen/hypercall.S
index b41aff2..f542252 100644
--- a/arch/arm64/xen/hypercall.S
+++ b/arch/arm64/xen/hypercall.S
@@ -100,7 +100,7 @@
* need the explicit uaccess_enable/disable if the TTBR0 PAN emulation
* is enabled (it implies that hardware UAO and PAN disabled).
*/
- uaccess_ttbr0_enable x6, x7
+ uaccess_ttbr0_enable x6, x7, x8
hvc XEN_IMM
/*
diff --git a/drivers/char/adsprpc.c b/drivers/char/adsprpc.c
index 4187165..177fb3d 100644
--- a/drivers/char/adsprpc.c
+++ b/drivers/char/adsprpc.c
@@ -78,7 +78,8 @@
#define FASTRPC_LINK_REMOTE_DISCONNECTING (0x8)
#define FASTRPC_GLINK_INTENT_LEN (64)
-#define PERF_KEYS "count:flush:map:copy:glink:getargs:putargs:invalidate:invoke"
+#define PERF_KEYS \
+ "count:flush:map:copy:glink:getargs:putargs:invalidate:invoke:tid:ptr"
#define FASTRPC_STATIC_HANDLE_LISTENER (3)
#define FASTRPC_STATIC_HANDLE_MAX (20)
#define FASTRPC_LATENCY_CTRL_ENB (1)
@@ -91,15 +92,22 @@
#define PERF(enb, cnt, ff) \
{\
struct timespec startT = {0};\
- if (enb) {\
+ int64_t *counter = cnt;\
+ if (enb && counter) {\
getnstimeofday(&startT);\
} \
ff ;\
- if (enb) {\
- cnt += getnstimediff(&startT);\
+ if (enb && counter) {\
+ *counter += getnstimediff(&startT);\
} \
}
+#define GET_COUNTER(perf_ptr, offset) \
+ (perf_ptr != NULL ?\
+ (((offset >= 0) && (offset < PERF_KEY_MAX)) ?\
+ (int64_t *)(perf_ptr + offset)\
+ : (int64_t *)NULL) : (int64_t *)NULL)
+
static int fastrpc_glink_open(int cid);
static void fastrpc_glink_close(void *chan, int cid);
static struct dentry *debugfs_root;
@@ -146,6 +154,12 @@
return addr;
}
+struct secure_vm {
+ int *vmid;
+ int *vmperm;
+ int vmcount;
+};
+
struct fastrpc_file;
struct fastrpc_buf {
@@ -234,7 +248,7 @@
int prevssrcount;
int issubsystemup;
int vmid;
- int rhvmid;
+ struct secure_vm rhvm;
int ramdumpenabled;
void *remoteheap_ramdump_dev;
struct fastrpc_glink_info link;
@@ -278,6 +292,19 @@
uintptr_t attr;
};
+enum fastrpc_perfkeys {
+ PERF_COUNT = 0,
+ PERF_FLUSH = 1,
+ PERF_MAP = 2,
+ PERF_COPY = 3,
+ PERF_LINK = 4,
+ PERF_GETARGS = 5,
+ PERF_PUTARGS = 6,
+ PERF_INVARGS = 7,
+ PERF_INVOKE = 8,
+ PERF_KEY_MAX = 9,
+};
+
struct fastrpc_perf {
int64_t count;
int64_t flush;
@@ -288,6 +315,8 @@
int64_t putargs;
int64_t invargs;
int64_t invoke;
+ int64_t tid;
+ struct hlist_node hn;
};
struct fastrpc_file {
@@ -307,8 +336,9 @@
int pd;
int file_close;
struct fastrpc_apps *apps;
- struct fastrpc_perf perf;
+ struct hlist_head perf;
struct dentry *debugfs_file;
+ struct mutex perf_mutex;
struct pm_qos_request pm_qos_req;
int qos_request;
struct mutex map_mutex;
@@ -343,6 +373,9 @@
},
};
+static int hlosvm[1] = {VMID_HLOS};
+static int hlosvmperm[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
+
static inline int64_t getnstimediff(struct timespec *start)
{
int64_t ns;
@@ -354,6 +387,46 @@
return ns;
}
+static inline int64_t *getperfcounter(struct fastrpc_file *fl, int key)
+{
+ int err = 0;
+ int64_t *val = NULL;
+ struct fastrpc_perf *perf = NULL, *fperf = NULL;
+ struct hlist_node *n = NULL;
+
+ VERIFY(err, !IS_ERR_OR_NULL(fl));
+ if (err)
+ goto bail;
+
+ mutex_lock(&fl->perf_mutex);
+ hlist_for_each_entry_safe(perf, n, &fl->perf, hn) {
+ if (perf->tid == current->pid) {
+ fperf = perf;
+ break;
+ }
+ }
+
+ if (IS_ERR_OR_NULL(fperf)) {
+ fperf = kzalloc(sizeof(*fperf), GFP_KERNEL);
+
+ VERIFY(err, !IS_ERR_OR_NULL(fperf));
+ if (err) {
+ mutex_unlock(&fl->perf_mutex);
+ kfree(fperf);
+ goto bail;
+ }
+
+ fperf->tid = current->pid;
+ hlist_add_head(&fperf->hn, &fl->perf);
+ }
+
+ val = ((int64_t *)fperf) + key;
+ mutex_unlock(&fl->perf_mutex);
+bail:
+ return val;
+}
+
+
static void fastrpc_buf_free(struct fastrpc_buf *buf, int cache)
{
struct fastrpc_file *fl = buf == NULL ? NULL : buf->fl;
@@ -911,7 +984,7 @@
#define K_COPY_TO_USER(err, kernel, dst, src, size) \
do {\
if (!(kernel))\
- VERIFY(err, 0 == copy_to_user((void __user *)(dst), \
+ VERIFY(err, 0 == copy_to_user((void __user *)(dst),\
(src), (size)));\
else\
memmove((dst), (src), (size));\
@@ -1129,6 +1202,7 @@
int mflags = 0;
uint64_t *fdlist;
uint32_t *crclist;
+ int64_t *perf_counter = getperfcounter(ctx->fl, PERF_COUNT);
/* calculate size of the metadata */
rpra = NULL;
@@ -1136,6 +1210,7 @@
pages = smq_phy_page_start(sc, list);
ipage = pages;
+ PERF(ctx->fl->profile, GET_COUNTER(perf_counter, PERF_MAP),
for (i = 0; i < bufs; ++i) {
uintptr_t buf = (uintptr_t)lpra[i].buf.pv;
size_t len = lpra[i].buf.len;
@@ -1146,6 +1221,7 @@
mflags, &ctx->maps[i]);
ipage += 1;
}
+ PERF_END);
handles = REMOTE_SCALARS_INHANDLES(sc) + REMOTE_SCALARS_OUTHANDLES(sc);
for (i = bufs; i < bufs + handles; i++) {
VERIFY(err, !fastrpc_mmap_create(ctx->fl, ctx->fds[i],
@@ -1207,7 +1283,7 @@
}
/* map ion buffers */
- PERF(ctx->fl->profile, ctx->fl->perf.map,
+ PERF(ctx->fl->profile, GET_COUNTER(perf_counter, PERF_MAP),
for (i = 0; rpra && i < inbufs + outbufs; ++i) {
struct fastrpc_mmap *map = ctx->maps[i];
uint64_t buf = ptr_to_uint64(lpra[i].buf.pv);
@@ -1258,7 +1334,7 @@
memset(crclist, 0, sizeof(uint32_t)*M_CRCLIST);
/* copy non ion buffers */
- PERF(ctx->fl->profile, ctx->fl->perf.copy,
+ PERF(ctx->fl->profile, GET_COUNTER(perf_counter, PERF_COPY),
rlen = copylen - metalen;
for (oix = 0; oix < inbufs + outbufs; ++oix) {
int i = ctx->overps[oix]->raix;
@@ -1298,7 +1374,7 @@
}
PERF_END);
- PERF(ctx->fl->profile, ctx->fl->perf.flush,
+ PERF(ctx->fl->profile, GET_COUNTER(perf_counter, PERF_FLUSH),
for (oix = 0; oix < inbufs + outbufs; ++oix) {
int i = ctx->overps[oix]->raix;
struct fastrpc_mmap *map = ctx->maps[i];
@@ -1323,7 +1399,7 @@
}
if (!ctx->fl->sctx->smmu.coherent) {
- PERF(ctx->fl->profile, ctx->fl->perf.flush,
+ PERF(ctx->fl->profile, GET_COUNTER(perf_counter, PERF_FLUSH),
dmac_flush_range((char *)rpra, (char *)rpra + ctx->used);
PERF_END);
}
@@ -1525,6 +1601,7 @@
int interrupted = 0;
int err = 0;
struct timespec invoket = {0};
+ int64_t *perf_counter = getperfcounter(fl, PERF_COUNT);
if (fl->profile)
getnstimeofday(&invoket);
@@ -1555,16 +1632,20 @@
goto bail;
if (REMOTE_SCALARS_LENGTH(ctx->sc)) {
- PERF(fl->profile, fl->perf.getargs,
+ PERF(fl->profile, GET_COUNTER(perf_counter, PERF_GETARGS),
VERIFY(err, 0 == get_args(kernel, ctx));
PERF_END);
if (err)
goto bail;
}
- if (!fl->sctx->smmu.coherent)
+ if (!fl->sctx->smmu.coherent) {
+ PERF(fl->profile, GET_COUNTER(perf_counter, PERF_INVARGS),
inv_args_pre(ctx);
- PERF(fl->profile, fl->perf.link,
+ PERF_END);
+ }
+
+ PERF(fl->profile, GET_COUNTER(perf_counter, PERF_LINK),
VERIFY(err, 0 == fastrpc_invoke_send(ctx, kernel, invoke->handle));
PERF_END);
@@ -1580,7 +1661,7 @@
goto bail;
}
- PERF(fl->profile, fl->perf.invargs,
+ PERF(fl->profile, GET_COUNTER(perf_counter, PERF_INVARGS),
if (!fl->sctx->smmu.coherent)
inv_args(ctx);
PERF_END);
@@ -1589,7 +1670,7 @@
if (err)
goto bail;
- PERF(fl->profile, fl->perf.putargs,
+ PERF(fl->profile, GET_COUNTER(perf_counter, PERF_PUTARGS),
VERIFY(err, 0 == put_args(kernel, ctx, invoke->pra));
PERF_END);
if (err)
@@ -1603,10 +1684,18 @@
err = ECONNRESET;
if (fl->profile && !interrupted) {
- if (invoke->handle != FASTRPC_STATIC_HANDLE_LISTENER)
- fl->perf.invoke += getnstimediff(&invoket);
- if (invoke->handle > FASTRPC_STATIC_HANDLE_MAX)
- fl->perf.count++;
+ if (invoke->handle != FASTRPC_STATIC_HANDLE_LISTENER) {
+ int64_t *count = GET_COUNTER(perf_counter, PERF_INVOKE);
+
+ if (count)
+ *count += getnstimediff(&invoket);
+ }
+ if (invoke->handle > FASTRPC_STATIC_HANDLE_MAX) {
+ int64_t *count = GET_COUNTER(perf_counter, PERF_COUNT);
+
+ if (count)
+ *count = *count+1;
+ }
}
return err;
}
@@ -1622,10 +1711,6 @@
struct smq_phy_page pages[1];
struct fastrpc_mmap *file = NULL, *mem = NULL;
char *proc_name = NULL;
- int srcVM[1] = {VMID_HLOS};
- int destVM[1] = {me->channel[fl->cid].rhvmid};
- int destVMperm[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
- int hlosVMperm[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
VERIFY(err, 0 == (err = fastrpc_channel_open(fl)));
if (err)
@@ -1761,7 +1846,9 @@
phys = mem->phys;
size = mem->size;
VERIFY(err, !hyp_assign_phys(phys, (uint64_t)size,
- srcVM, 1, destVM, destVMperm, 1));
+ hlosvm, 1, me->channel[fl->cid].rhvm.vmid,
+ me->channel[fl->cid].rhvm.vmperm,
+ me->channel[fl->cid].rhvm.vmcount));
if (err) {
pr_err("ADSPRPC: hyp_assign_phys fail err %d",
err);
@@ -1807,7 +1894,9 @@
if (mem && err) {
if (mem->flags == ADSP_MMAP_REMOTE_HEAP_ADDR)
hyp_assign_phys(mem->phys, (uint64_t)mem->size,
- destVM, 1, srcVM, hlosVMperm, 1);
+ me->channel[fl->cid].rhvm.vmid,
+ me->channel[fl->cid].rhvm.vmcount,
+ hlosvm, hlosvmperm, 1);
fastrpc_mmap_free(mem, 0);
}
if (file)
@@ -1900,13 +1989,10 @@
err = scm_call2(SCM_SIP_FNID(SCM_SVC_PIL,
TZ_PIL_PROTECT_MEM_SUBSYS_ID), &desc);
} else if (flags == ADSP_MMAP_REMOTE_HEAP_ADDR) {
-
- int srcVM[1] = {VMID_HLOS};
- int destVM[1] = {me->channel[fl->cid].rhvmid};
- int destVMperm[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
-
VERIFY(err, !hyp_assign_phys(map->phys, (uint64_t)map->size,
- srcVM, 1, destVM, destVMperm, 1));
+ hlosvm, 1, me->channel[fl->cid].rhvm.vmid,
+ me->channel[fl->cid].rhvm.vmperm,
+ me->channel[fl->cid].rhvm.vmcount));
if (err)
goto bail;
}
@@ -1919,7 +2005,6 @@
{
int err = 0;
struct fastrpc_apps *me = &gfa;
- int srcVM[1] = {me->channel[fl->cid].rhvmid};
int destVM[1] = {VMID_HLOS};
int destVMperm[1] = {PERM_READ | PERM_WRITE | PERM_EXEC};
@@ -1957,7 +2042,9 @@
TZ_PIL_CLEAR_PROTECT_MEM_SUBSYS_ID), &desc);
} else if (map->flags == ADSP_MMAP_REMOTE_HEAP_ADDR) {
VERIFY(err, !hyp_assign_phys(map->phys, (uint64_t)map->size,
- srcVM, 1, destVM, destVMperm, 1));
+ me->channel[fl->cid].rhvm.vmid,
+ me->channel[fl->cid].rhvm.vmcount,
+ destVM, destVMperm, 1));
if (err)
goto bail;
}
@@ -2267,8 +2354,9 @@
static int fastrpc_file_free(struct fastrpc_file *fl)
{
- struct hlist_node *n;
+ struct hlist_node *n = NULL;
struct fastrpc_mmap *map = NULL;
+ struct fastrpc_perf *perf = NULL, *fperf = NULL;
int cid;
if (!fl)
@@ -2300,6 +2388,21 @@
fastrpc_session_free(&fl->apps->channel[cid], fl->sctx);
if (fl->secsctx)
fastrpc_session_free(&fl->apps->channel[cid], fl->secsctx);
+
+ mutex_lock(&fl->perf_mutex);
+ do {
+ struct hlist_node *pn = NULL;
+
+ fperf = NULL;
+ hlist_for_each_entry_safe(perf, pn, &fl->perf, hn) {
+ hlist_del_init(&perf->hn);
+ fperf = perf;
+ break;
+ }
+ kfree(fperf);
+ } while (fperf);
+ mutex_unlock(&fl->perf_mutex);
+ mutex_destroy(&fl->perf_mutex);
kfree(fl);
return 0;
}
@@ -2596,7 +2699,7 @@
if (err)
pr_warn("adsprpc: initial intent fail for %d err %d\n",
cid, err);
- if (me->channel[cid].ssrcount !=
+ if (cid == 0 && me->channel[cid].ssrcount !=
me->channel[cid].prevssrcount) {
if (fastrpc_mmap_remove_ssr(fl))
pr_err("ADSPRPC: SSR: Failed to unmap remote heap\n");
@@ -2625,6 +2728,7 @@
context_list_ctor(&fl->clst);
spin_lock_init(&fl->hlock);
INIT_HLIST_HEAD(&fl->maps);
+ INIT_HLIST_HEAD(&fl->perf);
INIT_HLIST_HEAD(&fl->bufs);
INIT_HLIST_NODE(&fl->hn);
fl->sessionid = 0;
@@ -2641,6 +2745,7 @@
spin_lock(&me->hlock);
hlist_add_head(&fl->hn, &me->drivers);
spin_unlock(&me->hlock);
+ mutex_init(&fl->perf_mutex);
return 0;
}
@@ -2824,8 +2929,23 @@
goto bail;
}
if (p.perf.data) {
- K_COPY_TO_USER(err, 0, (void *)p.perf.data,
- &fl->perf, sizeof(fl->perf));
+ struct fastrpc_perf *perf = NULL, *fperf = NULL;
+ struct hlist_node *n = NULL;
+
+ mutex_lock(&fl->perf_mutex);
+ hlist_for_each_entry_safe(perf, n, &fl->perf, hn) {
+ if (perf->tid == current->pid) {
+ fperf = perf;
+ break;
+ }
+ }
+
+ mutex_unlock(&fl->perf_mutex);
+
+ if (fperf) {
+ K_COPY_TO_USER(err, 0, (void *)p.perf.data,
+ fperf, sizeof(*fperf));
+ }
}
K_COPY_TO_USER(err, 0, param, &p.perf, sizeof(p.perf));
if (err)
@@ -3000,6 +3120,46 @@
return err;
}
+static void init_secure_vmid_list(struct device *dev, char *prop_name,
+ struct secure_vm *destvm)
+{
+ int err = 0;
+ u32 len = 0, i = 0;
+ u32 *rhvmlist = NULL;
+ u32 *rhvmpermlist = NULL;
+
+ if (!of_find_property(dev->of_node, prop_name, &len))
+ goto bail;
+ if (len == 0)
+ goto bail;
+ len /= sizeof(u32);
+ VERIFY(err, NULL != (rhvmlist = kcalloc(len, sizeof(u32), GFP_KERNEL)));
+ if (err)
+ goto bail;
+ VERIFY(err, NULL != (rhvmpermlist = kcalloc(len, sizeof(u32),
+ GFP_KERNEL)));
+ if (err)
+ goto bail;
+ for (i = 0; i < len; i++) {
+ err = of_property_read_u32_index(dev->of_node, prop_name, i,
+ &rhvmlist[i]);
+ rhvmpermlist[i] = PERM_READ | PERM_WRITE | PERM_EXEC;
+ pr_info("ADSPRPC: Secure VMID = %d", rhvmlist[i]);
+ if (err) {
+ pr_err("ADSPRPC: Failed to read VMID\n");
+ goto bail;
+ }
+ }
+ destvm->vmid = rhvmlist;
+ destvm->vmperm = rhvmpermlist;
+ destvm->vmcount = len;
+bail:
+ if (err) {
+ kfree(rhvmlist);
+ kfree(rhvmpermlist);
+ }
+}
+
static int fastrpc_probe(struct platform_device *pdev)
{
int err = 0;
@@ -3014,10 +3174,9 @@
if (of_device_is_compatible(dev->of_node,
"qcom,msm-fastrpc-compute")) {
- of_property_read_u32(dev->of_node, "qcom,adsp-remoteheap-vmid",
- &gcinfo[0].rhvmid);
+ init_secure_vmid_list(dev, "qcom,adsp-remoteheap-vmid",
+ &gcinfo[0].rhvm);
- pr_info("ADSPRPC : vmids adsp=%d\n", gcinfo[0].rhvmid);
of_property_read_u32(dev->of_node, "qcom,rpc-latency-us",
&me->latency);
@@ -3098,6 +3257,8 @@
sess->smmu.mapping = NULL;
}
}
+ kfree(chan->rhvm.vmid);
+ kfree(chan->rhvm.vmperm);
}
}
diff --git a/drivers/clk/msm/clock-gcc-8953.c b/drivers/clk/msm/clock-gcc-8953.c
index 797f851..e25da83 100644
--- a/drivers/clk/msm/clock-gcc-8953.c
+++ b/drivers/clk/msm/clock-gcc-8953.c
@@ -2786,6 +2786,7 @@
.base = &virt_bases[GFX_BASE],
.c = {
.dbg_name = "gcc_oxili_timer_clk",
+ .parent = &xo_clk_src.c,
.ops = &clk_ops_branch,
CLK_INIT(gcc_oxili_timer_clk.c),
},
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 5db1897..e851c87 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -48,6 +48,8 @@
#define CNTFRQ 0x10
#define CNTP_TVAL 0x28
#define CNTP_CTL 0x2c
+#define CNTCVAL_LO 0x30
+#define CNTCVAL_HI 0x34
#define CNTV_TVAL 0x38
#define CNTV_CTL 0x3c
@@ -541,6 +543,23 @@
return arch_timer_rate;
}
+void arch_timer_mem_get_cval(u32 *lo, u32 *hi)
+{
+ u32 ctrl;
+
+ *lo = *hi = ~0U;
+
+ if (!arch_counter_base)
+ return;
+
+ ctrl = readl_relaxed_no_log(arch_counter_base + CNTV_CTL);
+
+ if (ctrl & ARCH_TIMER_CTRL_ENABLE) {
+ *lo = readl_relaxed_no_log(arch_counter_base + CNTCVAL_LO);
+ *hi = readl_relaxed_no_log(arch_counter_base + CNTCVAL_HI);
+ }
+}
+
static u64 arch_counter_get_cntvct_mem(void)
{
u32 vct_lo, vct_hi, tmp_hi;
@@ -873,7 +892,7 @@
return ret;
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
-
+
return 0;
}
diff --git a/drivers/cpuidle/lpm-levels.c b/drivers/cpuidle/lpm-levels.c
index 5452ad8..0ea769c 100644
--- a/drivers/cpuidle/lpm-levels.c
+++ b/drivers/cpuidle/lpm-levels.c
@@ -1043,18 +1043,9 @@
}
if (level->notify_rpm) {
- uint64_t us;
- uint32_t pred_us;
-
- us = get_cluster_sleep_time(cluster, NULL, from_idle,
- &pred_us);
-
- us = us + 1;
-
clear_predict_history();
clear_cl_predict_history();
-
- if (system_sleep_enter(us))
+ if (system_sleep_enter())
return -EBUSY;
}
/* Notify cluster enter event after successfully config completion */
@@ -1261,6 +1252,13 @@
state_id |= (level->psci_id & cluster->psci_mode_mask)
<< cluster->psci_mode_shift;
(*aff_lvl)++;
+
+ /*
+ * We may have updated the broadcast timers, update
+ * the wakeup value by reading the bc timer directly.
+ */
+ if (level->notify_rpm)
+ system_sleep_update_wakeup();
}
unlock_and_return:
spin_unlock(&cluster->sync_lock);
diff --git a/drivers/devfreq/bimc-bwmon.c b/drivers/devfreq/bimc-bwmon.c
index f9b758f..33e16261 100644
--- a/drivers/devfreq/bimc-bwmon.c
+++ b/drivers/devfreq/bimc-bwmon.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -35,7 +35,8 @@
#define GLB_INT_EN(m) ((m)->global_base + 0x10C)
#define MON_INT_STATUS(m) ((m)->base + 0x100)
#define MON_INT_STATUS_MASK 0x03
-#define MON2_INT_STATUS_MASK 0xF0
+#define MON2_INT_STATUS_MASK 0xA0
+#define MON2_INT_DISABLE_MASK 0xF0
#define MON2_INT_STATUS_SHIFT 4
#define MON_INT_CLR(m) ((m)->base + 0x108)
#define MON_INT_EN(m) ((m)->base + 0x10C)
@@ -63,7 +64,8 @@
#define MON3_INT_STATUS(m) ((m)->base + 0x00)
#define MON3_INT_CLR(m) ((m)->base + 0x08)
#define MON3_INT_EN(m) ((m)->base + 0x0C)
-#define MON3_INT_STATUS_MASK 0x0F
+#define MON3_INT_STATUS_MASK 0x0A
+#define MON3_INT_DISABLE_MASK 0x0F
#define MON3_EN(m) ((m)->base + 0x10)
#define MON3_CLEAR(m) ((m)->base + 0x14)
#define MON3_MASK(m) ((m)->base + 0x18)
@@ -283,12 +285,12 @@
case MON2:
mon_glb_irq_disable(m);
val = readl_relaxed(MON_INT_EN(m));
- val &= ~MON2_INT_STATUS_MASK;
+ val &= ~MON2_INT_DISABLE_MASK;
writel_relaxed(val, MON_INT_EN(m));
break;
case MON3:
val = readl_relaxed(MON3_INT_EN(m));
- val &= ~MON3_INT_STATUS_MASK;
+ val &= ~MON3_INT_DISABLE_MASK;
writel_relaxed(val, MON3_INT_EN(m));
break;
}
diff --git a/drivers/devfreq/governor_spdm_bw_hyp.c b/drivers/devfreq/governor_spdm_bw_hyp.c
index 5751ab6..7e7e0ee 100644
--- a/drivers/devfreq/governor_spdm_bw_hyp.c
+++ b/drivers/devfreq/governor_spdm_bw_hyp.c
@@ -1,5 +1,5 @@
/*
- *Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+ *Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
*This program is free software; you can redistribute it and/or modify
*it under the terms of the GNU General Public License version 2 and
@@ -42,7 +42,7 @@
rpm_req = msm_rpm_create_request(MSM_RPM_CTX_ACTIVE_SET, SPDM_RES_TYPE,
SPDM_RES_ID, 1);
- if (!rpm_req)
+ if (IS_ERR_OR_NULL(rpm_req))
return -ENODEV;
msm_rpm_add_kvp_data(rpm_req, SPDM_KEY, (const uint8_t *)&one,
sizeof(int));
@@ -61,7 +61,7 @@
rpm_req = msm_rpm_create_request(MSM_RPM_CTX_ACTIVE_SET, SPDM_RES_TYPE,
SPDM_RES_ID, 1);
- if (!rpm_req)
+ if (IS_ERR_OR_NULL(rpm_req))
return -ENODEV;
msm_rpm_add_kvp_data(rpm_req, SPDM_KEY, (const uint8_t *)&zero,
sizeof(int));
diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
index 52e291d..7e11fea 100644
--- a/drivers/gpu/drm/msm/sde/sde_crtc.c
+++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
@@ -4654,7 +4654,7 @@
/* identify attached planes that are not in the delta state */
if (!drm_atomic_get_existing_plane_state(state->state, plane)) {
- rc = sde_plane_confirm_hw_rsvps(plane, pstate);
+ rc = sde_plane_confirm_hw_rsvps(plane, pstate, state);
if (rc) {
SDE_ERROR("crtc%d confirmation hw failed %d\n",
crtc->base.id, rc);
diff --git a/drivers/gpu/drm/msm/sde/sde_plane.c b/drivers/gpu/drm/msm/sde/sde_plane.c
index f2f870f..baad60a 100644
--- a/drivers/gpu/drm/msm/sde/sde_plane.c
+++ b/drivers/gpu/drm/msm/sde/sde_plane.c
@@ -182,7 +182,7 @@
return cstate;
}
-static bool sde_plane_enabled(struct drm_plane_state *state)
+static bool sde_plane_enabled(const struct drm_plane_state *state)
{
return state && state->fb && state->crtc;
}
@@ -2966,30 +2966,22 @@
}
int sde_plane_confirm_hw_rsvps(struct drm_plane *plane,
- const struct drm_plane_state *state)
+ const struct drm_plane_state *state,
+ struct drm_crtc_state *cstate)
{
- struct drm_crtc_state *cstate;
struct sde_plane_state *pstate;
struct sde_plane_rot_state *rstate;
struct sde_hw_blk *hw_blk;
- if (!plane || !state) {
- SDE_ERROR("invalid plane/state\n");
+ if (!plane || !state || !cstate) {
+ SDE_ERROR("invalid parameters\n");
return -EINVAL;
}
pstate = to_sde_plane_state(state);
rstate = &pstate->rot;
- /* cstate will be null if crtc is disconnected from plane */
- cstate = _sde_plane_get_crtc_state((struct drm_plane_state *)state);
- if (IS_ERR_OR_NULL(cstate)) {
- SDE_ERROR("invalid crtc state\n");
- return -EINVAL;
- }
-
- if (sde_plane_enabled((struct drm_plane_state *)state) &&
- rstate->out_sbuf) {
+ if (sde_plane_enabled(state) && rstate->out_sbuf) {
SDE_DEBUG("plane%d.%d acquire rotator, fb %d\n",
plane->base.id, rstate->sequence_id,
state->fb ? state->fb->base.id : -1);
@@ -3005,7 +2997,15 @@
SDE_EVTLOG_ERROR);
return -EINVAL;
}
+
+ _sde_plane_rot_get_fb(plane, cstate, rstate);
+
+ SDE_EVT32(DRMID(plane), rstate->sequence_id,
+ state->fb ? state->fb->base.id : -1,
+ rstate->out_fb ? rstate->out_fb->base.id : -1,
+ hw_blk->id);
}
+
return 0;
}
diff --git a/drivers/gpu/drm/msm/sde/sde_plane.h b/drivers/gpu/drm/msm/sde/sde_plane.h
index e8b621c..6666399 100644
--- a/drivers/gpu/drm/msm/sde/sde_plane.h
+++ b/drivers/gpu/drm/msm/sde/sde_plane.h
@@ -204,10 +204,12 @@
* sde_plane_confirm_hw_rsvps - reserve an sbuf resource, if needed
* @plane: Pointer to DRM plane object
* @state: Pointer to plane state
+ * @cstate: Pointer to crtc state containing the resource pool
* Returns: Zero on success
*/
int sde_plane_confirm_hw_rsvps(struct drm_plane *plane,
- const struct drm_plane_state *state);
+ const struct drm_plane_state *state,
+ struct drm_crtc_state *cstate);
/**
* sde_plane_get_ctl_flush - get control flush mask
diff --git a/drivers/gpu/msm/adreno.c b/drivers/gpu/msm/adreno.c
index 8d18fc2..7d11007 100644
--- a/drivers/gpu/msm/adreno.c
+++ b/drivers/gpu/msm/adreno.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2002,2007-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2002,2007-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -946,6 +946,8 @@
"qcom,gpu-quirk-lmloadkill-disable" },
{ ADRENO_QUIRK_HFI_USE_REG, "qcom,gpu-quirk-hfi-use-reg" },
{ ADRENO_QUIRK_SECVID_SET_ONCE, "qcom,gpu-quirk-secvid-set-once" },
+ { ADRENO_QUIRK_LIMIT_UCHE_GBIF_RW,
+ "qcom,gpu-quirk-limit-uche-gbif-rw" },
};
static int adreno_of_get_power(struct adreno_device *adreno_dev,
@@ -1084,6 +1086,33 @@
KGSL_DRV_WARN(device, "cx_dbgc ioremap failed\n");
}
+static bool adreno_is_gpu_disabled(struct adreno_device *adreno_dev)
+{
+ unsigned int row0;
+ unsigned int pte_row0_msb[3];
+ int ret;
+ struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
+
+ if (of_property_read_u32_array(device->pdev->dev.of_node,
+ "qcom,gpu-disable-fuse", pte_row0_msb, 3))
+ return false;
+ /*
+ * Read the fuse value to disable GPU driver if fuse
+ * is blown. By default(fuse value is 0) GPU is enabled.
+ */
+ if (adreno_efuse_map(adreno_dev))
+ return false;
+
+ ret = adreno_efuse_read_u32(adreno_dev, pte_row0_msb[0], &row0);
+ adreno_efuse_unmap(adreno_dev);
+
+ if (ret)
+ return false;
+
+ return (row0 >> pte_row0_msb[2]) &
+ pte_row0_msb[1] ? true : false;
+}
+
static int adreno_probe(struct platform_device *pdev)
{
struct kgsl_device *device;
@@ -1100,6 +1129,11 @@
device = KGSL_DEVICE(adreno_dev);
device->pdev = pdev;
+ if (adreno_is_gpu_disabled(adreno_dev)) {
+ pr_err("adreno: GPU is disabled on this device");
+ return -ENODEV;
+ }
+
/* Get the chip ID from the DT and set up target specific parameters */
adreno_identify_gpu(adreno_dev);
diff --git a/drivers/gpu/msm/adreno.h b/drivers/gpu/msm/adreno.h
index 458a0fa..269c3a9 100644
--- a/drivers/gpu/msm/adreno.h
+++ b/drivers/gpu/msm/adreno.h
@@ -144,6 +144,12 @@
#define ADRENO_QUIRK_HFI_USE_REG BIT(6)
/* Only set protected SECVID registers once */
#define ADRENO_QUIRK_SECVID_SET_ONCE BIT(7)
+/*
+ * Limit number of read and write transactions from
+ * UCHE block to GBIF to avoid possible deadlock
+ * between GBIF, SMMU and MEMNOC.
+ */
+#define ADRENO_QUIRK_LIMIT_UCHE_GBIF_RW BIT(8)
/* Flags to control command packet settings */
#define KGSL_CMD_FLAGS_NONE 0
diff --git a/drivers/gpu/msm/adreno_a6xx.c b/drivers/gpu/msm/adreno_a6xx.c
index b682abe..381bc3e 100644
--- a/drivers/gpu/msm/adreno_a6xx.c
+++ b/drivers/gpu/msm/adreno_a6xx.c
@@ -55,7 +55,6 @@
static const struct adreno_vbif_data a615_gbif[] = {
{A6XX_RBBM_VBIF_CLIENT_QOS_CNTL, 0x3},
- {A6XX_UCHE_GBIF_GX_CONFIG, 0x10200F9},
{0, 0},
};
@@ -670,6 +669,9 @@
adreno_vbif_start(adreno_dev, a6xx_vbif_platforms,
ARRAY_SIZE(a6xx_vbif_platforms));
+ if (ADRENO_QUIRK(adreno_dev, ADRENO_QUIRK_LIMIT_UCHE_GBIF_RW))
+ kgsl_regwrite(device, A6XX_UCHE_GBIF_GX_CONFIG, 0x10200F9);
+
/* Make all blocks contribute to the GPU BUSY perf counter */
kgsl_regwrite(device, A6XX_RBBM_PERFCTR_GPU_BUSY_MASKED, 0xFFFFFFFF);
diff --git a/drivers/gpu/msm/kgsl_pwrctrl.c b/drivers/gpu/msm/kgsl_pwrctrl.c
index cda7a5b..e839654 100644
--- a/drivers/gpu/msm/kgsl_pwrctrl.c
+++ b/drivers/gpu/msm/kgsl_pwrctrl.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2010-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2010-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2732,9 +2732,11 @@
* GPU will not be powered on
*/
WARN_ONCE(1, "Failed to recover GMU\n");
- device->snapshot->recovered = false;
+ if (device->snapshot)
+ device->snapshot->recovered = false;
} else {
- device->snapshot->recovered = true;
+ if (device->snapshot)
+ device->snapshot->recovered = true;
}
clear_bit(GMU_FAULT, &gmu->flags);
diff --git a/drivers/hwmon/qpnp-adc-voltage.c b/drivers/hwmon/qpnp-adc-voltage.c
index 4b5e206..6fde46e 100644
--- a/drivers/hwmon/qpnp-adc-voltage.c
+++ b/drivers/hwmon/qpnp-adc-voltage.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2618,6 +2618,7 @@
&qpnp_vadc_thermal_ops);
if (IS_ERR(vadc->vadc_therm_chan[i].tz_dev)) {
pr_err("thermal device register failed.\n");
+ rc = PTR_ERR(vadc->vadc_therm_chan[i].tz_dev);
goto thermal_err_sens;
}
}
diff --git a/drivers/hwtracing/coresight/coresight-tpdm.c b/drivers/hwtracing/coresight/coresight-tpdm.c
index 36e3db2..145af90 100644
--- a/drivers/hwtracing/coresight/coresight-tpdm.c
+++ b/drivers/hwtracing/coresight/coresight-tpdm.c
@@ -20,6 +20,7 @@
#include <linux/bitmap.h>
#include <linux/of.h>
#include <linux/coresight.h>
+#include <soc/qcom/memory_dump.h>
#include "coresight-priv.h"
@@ -225,6 +226,7 @@
struct mcmb_dataset {
uint8_t mcmb_trig_lane;
uint8_t mcmb_lane_select;
+ uint32_t *mcmb_msr_dump_ptr;
};
struct cmb_dataset {
@@ -609,6 +611,11 @@
val = val & ~BM(10, 17);
val = val | (BMVAL(mcmb->mcmb_lane_select, 0, 7) << 10);
+ if (mcmb->mcmb_msr_dump_ptr) {
+ for (i = 0; i < TPDM_CMB_MAX_MSR; i++)
+ mcmb->mcmb_msr_dump_ptr[i] = drvdata->cmb->msr[i];
+ }
+
tpdm_writel(drvdata, val, TPDM_CMB_CR);
/* Set the enable bit */
val = val | BIT(0);
@@ -3910,6 +3917,12 @@
GFP_KERNEL);
if (!drvdata->cmb->mcmb)
return -ENOMEM;
+
+ if (of_property_read_bool(drvdata->dev->of_node,
+ "qcom,dump-enable"))
+ drvdata->cmb->mcmb->mcmb_msr_dump_ptr =
+ (uint32_t *)get_msm_dump_ptr(
+ MSM_DUMP_DATA_TPDM_SWAO_MCMB);
}
return 0;
}
diff --git a/drivers/input/misc/hbtp_input.c b/drivers/input/misc/hbtp_input.c
index 108ed032..90493b1 100644
--- a/drivers/input/misc/hbtp_input.c
+++ b/drivers/input/misc/hbtp_input.c
@@ -1181,12 +1181,6 @@
pr_err("%s: failed to disable GPIO pins\n", __func__);
goto err_pin_disable;
}
-
- rc = hbtp_pdev_power_on(ts, false);
- if (rc) {
- pr_err("%s: failed to disable power\n", __func__);
- goto err_power_disable;
- }
ts->power_suspended = true;
if (ts->input_dev) {
kobject_uevent_env(&ts->input_dev->dev.kobj,
@@ -1214,8 +1208,7 @@
}
mutex_unlock(&hbtp->mutex);
return 0;
-err_power_disable:
- hbtp_pinctrl_enable(ts, true);
+
err_pin_disable:
mutex_unlock(&hbtp->mutex);
return rc;
@@ -1234,12 +1227,6 @@
mutex_unlock(&hbtp->mutex);
return 0;
}
- rc = hbtp_pdev_power_on(ts, true);
- if (rc) {
- pr_err("%s: failed to enable panel power\n", __func__);
- goto err_power_on;
- }
-
rc = hbtp_pinctrl_enable(ts, true);
if (rc) {
@@ -1287,8 +1274,6 @@
err_pin_enable:
hbtp_pdev_power_on(ts, false);
-err_power_on:
- mutex_unlock(&hbtp->mutex);
return rc;
}
@@ -1359,6 +1344,12 @@
hbtp->vcc_dig = vcc_dig;
}
+ error = hbtp_pdev_power_on(hbtp, true);
+ if (error) {
+ pr_err("%s: failed to power on\n", __func__);
+ return error;
+ }
+
return 0;
}
diff --git a/drivers/input/misc/qpnp-power-on.c b/drivers/input/misc/qpnp-power-on.c
index 339f94c..febcd9c 100644
--- a/drivers/input/misc/qpnp-power-on.c
+++ b/drivers/input/misc/qpnp-power-on.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2029,7 +2029,7 @@
dev_err(&pdev->dev,
"Couldn't find reg in node = %s rc = %d\n",
pdev->dev.of_node->full_name, rc);
- return rc;
+ goto err_out;
}
pon->base = base;
@@ -2041,7 +2041,8 @@
pon->num_pon_config++;
} else {
pr_err("Unknown sub-node\n");
- return -EINVAL;
+ rc = -EINVAL;
+ goto err_out;
}
}
@@ -2053,7 +2054,7 @@
if (rc) {
dev_err(&pdev->dev, "Error in pon_regulator_init rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
if (!pon->num_pon_config)
@@ -2072,7 +2073,7 @@
dev_err(&pon->pdev->dev,
"Unable to read PON_PERPH_SUBTYPE register rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
pon->subtype = temp;
@@ -2083,7 +2084,7 @@
dev_err(&pon->pdev->dev,
"Unable to read addr=%x, rc(%d)\n",
QPNP_PON_REVISION2(pon), rc);
- return rc;
+ goto err_out;
}
pon->pon_ver = temp;
@@ -2100,7 +2101,7 @@
dev_err(&pon->pdev->dev,
"Invalid PON_PERPH_SUBTYPE value %x\n",
pon->subtype);
- return -EINVAL;
+ goto err_out;
}
pr_debug("%s: pon_subtype=%x, pon_version=%x\n", __func__,
@@ -2111,7 +2112,7 @@
dev_err(&pon->pdev->dev,
"Unable to store/clear WARM_RESET_REASONx registers rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
/* PON reason */
@@ -2120,7 +2121,7 @@
dev_err(&pon->pdev->dev,
"Unable to read PON_RESASON1 reg rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
if (sys_reset)
@@ -2147,14 +2148,14 @@
rc = read_gen2_pon_off_reason(pon, &poff_sts,
&reason_index_offset);
if (rc)
- return rc;
+ goto err_out;
} else {
rc = regmap_bulk_read(pon->regmap, QPNP_POFF_REASON1(pon),
buf, 2);
if (rc) {
dev_err(&pon->pdev->dev, "Unable to read POFF_REASON regs rc:%d\n",
rc);
- return rc;
+ goto err_out;
}
poff_sts = buf[0] | (buf[1] << 8);
}
@@ -2186,7 +2187,7 @@
dev_err(&pon->pdev->dev,
"Unable to read s3 timer rc:%d\n",
rc);
- return rc;
+ goto err_out;
}
} else {
if (s3_debounce > QPNP_PON_S3_TIMER_SECS_MAX) {
@@ -2205,7 +2206,7 @@
if (rc) {
dev_err(&pdev->dev, "Unable to do SEC_ACCESS rc:%d\n",
rc);
- return rc;
+ goto err_out;
}
rc = qpnp_pon_masked_write(pon, QPNP_PON_S3_DBC_CTL(pon),
@@ -2214,7 +2215,7 @@
dev_err(&pdev->dev,
"Unable to set S3 debounce rc:%d\n",
rc);
- return rc;
+ goto err_out;
}
}
@@ -2225,7 +2226,7 @@
if (rc && rc != -EINVAL) {
dev_err(&pon->pdev->dev, "Unable to read s3 timer rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
if (!strcmp(s3_src, "kpdpwr"))
@@ -2247,7 +2248,7 @@
if (rc) {
dev_err(&pdev->dev, "Unable to program s3 source rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
dev_set_drvdata(&pdev->dev, pon);
@@ -2259,7 +2260,7 @@
if (rc) {
dev_err(&pdev->dev,
"Unable to initialize PON configurations rc: %d\n", rc);
- return rc;
+ goto err_out;
}
rc = of_property_read_u32(pon->pdev->dev.of_node,
@@ -2268,21 +2269,21 @@
if (rc != -EINVAL) {
dev_err(&pdev->dev,
"Unable to read debounce delay rc: %d\n", rc);
- return rc;
+ goto err_out;
}
} else {
rc = qpnp_pon_set_dbc(pon, delay);
if (rc) {
dev_err(&pdev->dev,
"Unable to set PON debounce delay rc=%d\n", rc);
- return rc;
+ goto err_out;
}
}
rc = qpnp_pon_get_dbc(pon, &pon->dbc_time_us);
if (rc) {
dev_err(&pdev->dev,
"Unable to get PON debounce delay rc=%d\n", rc);
- return rc;
+ goto err_out;
}
pon->kpdpwr_dbc_enable = of_property_read_bool(pon->pdev->dev.of_node,
@@ -2295,7 +2296,7 @@
if (rc != -EINVAL) {
dev_err(&pdev->dev, "Unable to read warm reset poweroff type rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
pon->warm_reset_poff_type = -EINVAL;
} else if (pon->warm_reset_poff_type <= PON_POWER_OFF_RESERVED ||
@@ -2311,7 +2312,7 @@
if (rc != -EINVAL) {
dev_err(&pdev->dev, "Unable to read hard reset poweroff type rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
pon->hard_reset_poff_type = -EINVAL;
} else if (pon->hard_reset_poff_type <= PON_POWER_OFF_RESERVED ||
@@ -2327,7 +2328,7 @@
if (rc != -EINVAL) {
dev_err(&pdev->dev, "Unable to read shutdown poweroff type rc: %d\n",
rc);
- return rc;
+ goto err_out;
}
pon->shutdown_poff_type = -EINVAL;
} else if (pon->shutdown_poff_type <= PON_POWER_OFF_RESERVED ||
@@ -2339,7 +2340,7 @@
rc = device_create_file(&pdev->dev, &dev_attr_debounce_us);
if (rc) {
dev_err(&pdev->dev, "sys file creation failed rc: %d\n", rc);
- return rc;
+ goto err_out;
}
if (of_property_read_bool(pdev->dev.of_node,
@@ -2347,7 +2348,8 @@
if (sys_reset) {
dev_err(&pdev->dev,
"qcom,system-reset property shouldn't be used along with qcom,secondary-pon-reset property\n");
- return -EINVAL;
+ rc = -EINVAL;
+ goto err_out;
}
spin_lock_irqsave(&spon_list_slock, flags);
list_add(&pon->list, &spon_dev_list);
@@ -2361,6 +2363,10 @@
qpnp_pon_debugfs_init(pdev);
return 0;
+
+err_out:
+ sys_reset_dev = NULL;
+ return rc;
}
static int qpnp_pon_remove(struct platform_device *pdev)
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index efca013..36777b3 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -1214,4 +1214,14 @@
To compile this driver as a module, choose M here: the
module will be called bu21023_ts.
+config TOUCHSCREEN_SYNAPTICS_DSX
+ bool "Synaptics Touchscreen Driver"
+ depends on I2C
+ help
+ Say Y here if you have a Synaptics Touchscreen.
+
+ If unsure, say N.
+
+source "drivers/input/touchscreen/synaptics_dsx/Kconfig"
+
endif
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 81b8645..0caab59 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -71,6 +71,7 @@
obj-$(CONFIG_TOUCHSCREEN_SUN4I) += sun4i-ts.o
obj-$(CONFIG_TOUCHSCREEN_SUR40) += sur40.o
obj-$(CONFIG_TOUCHSCREEN_SURFACE3_SPI) += surface3_spi.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX) += synaptics_dsx/
obj-$(CONFIG_TOUCHSCREEN_TI_AM335X_TSC) += ti_am335x_tsc.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHIT213) += touchit213.o
obj-$(CONFIG_TOUCHSCREEN_TOUCHRIGHT) += touchright.o
diff --git a/drivers/input/touchscreen/synaptics_dsx/Kconfig b/drivers/input/touchscreen/synaptics_dsx/Kconfig
new file mode 100644
index 0000000..b2fa115
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/Kconfig
@@ -0,0 +1,128 @@
+#
+# Synaptics DSX touchscreen driver configuration
+#
+menuconfig TOUCHSCREEN_SYNAPTICS_DSX
+ bool "Synaptics DSX touchscreen"
+ default y
+ help
+ Say Y here if you have a Synaptics DSX touchscreen connected
+ to your system.
+
+ If unsure, say N.
+
+if TOUCHSCREEN_SYNAPTICS_DSX
+
+choice
+ default TOUCHSCREEN_SYNAPTICS_DSX_I2C
+ prompt "Synaptics DSX bus interface"
+config TOUCHSCREEN_SYNAPTICS_DSX_I2C
+ bool "RMI over I2C"
+ depends on I2C
+config TOUCHSCREEN_SYNAPTICS_DSX_SPI
+ bool "RMI over SPI"
+ depends on SPI_MASTER
+config TOUCHSCREEN_SYNAPTICS_DSX_RMI_HID_I2C
+ bool "HID over I2C"
+ depends on I2C
+endchoice
+
+config TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ tristate "Synaptics DSX core driver module"
+ depends on I2C || SPI_MASTER
+ help
+ Say Y here to enable basic touch reporting functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_core.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV
+ tristate "Synaptics DSX RMI device module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for direct RMI register access.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_rmi_dev.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE
+ tristate "Synaptics DSX firmware update module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for doing firmware update.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_fw_update.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_TEST_REPORTING
+ tristate "Synaptics DSX test reporting module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for retrieving production test reports.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_test_reporting.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_PROXIMITY
+ tristate "Synaptics DSX proximity module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for proximity functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_proximity.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_ACTIVE_PEN
+ tristate "Synaptics DSX active pen module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for active pen functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_active_pen.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_GESTURE
+ tristate "Synaptics DSX user defined gesture module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for user defined gesture functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_gesture.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_VIDEO
+ tristate "Synaptics DSX video module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for video communication functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_video.
+
+config TOUCHSCREEN_SYNAPTICS_DSX_DEBUG
+ tristate "Synaptics DSX debug module"
+ depends on TOUCHSCREEN_SYNAPTICS_DSX_CORE
+ help
+ Say Y here to enable support for firmware debug functionality.
+
+ If unsure, say N.
+
+ To compile this driver as a module, choose M here: the
+ module will be called synaptics_dsx_debug.
+
+endif
diff --git a/drivers/input/touchscreen/synaptics_dsx/Makefile b/drivers/input/touchscreen/synaptics_dsx/Makefile
new file mode 100644
index 0000000..191dcdc
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for the Synaptics DSX touchscreen driver.
+#
+
+# Each configuration option enables a list of files.
+
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_I2C) += synaptics_dsx_i2c.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_SPI) += synaptics_dsx_spi.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_HID_I2C) += synaptics_dsx_rmi_hid_i2c.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE) += synaptics_dsx_core.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV) += synaptics_dsx_rmi_dev.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_FW_UPDATE) += synaptics_dsx_fw_update.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_TEST_REPORTING) += synaptics_dsx_test_reporting.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_PROXIMITY) += synaptics_dsx_proximity.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_ACTIVE_PEN) += synaptics_dsx_active_pen.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_GESTURE) += synaptics_dsx_gesture.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_VIDEO) += synaptics_dsx_video.o
+obj-$(CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_DEBUG) += synaptics_dsx_debug.o
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_active_pen.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_active_pen.c
new file mode 100644
index 0000000..3666e87
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_active_pen.c
@@ -0,0 +1,607 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define APEN_PHYS_NAME "synaptics_dsx/active_pen"
+
+#define ACTIVE_PEN_MAX_PRESSURE_16BIT 65535
+#define ACTIVE_PEN_MAX_PRESSURE_8BIT 255
+
+struct synaptics_rmi4_f12_query_8 {
+ union {
+ struct {
+ unsigned char size_of_query9;
+ struct {
+ unsigned char data0_is_present:1;
+ unsigned char data1_is_present:1;
+ unsigned char data2_is_present:1;
+ unsigned char data3_is_present:1;
+ unsigned char data4_is_present:1;
+ unsigned char data5_is_present:1;
+ unsigned char data6_is_present:1;
+ unsigned char data7_is_present:1;
+ } __packed;
+ };
+ unsigned char data[2];
+ };
+};
+
+struct apen_data_8b_pressure {
+ union {
+ struct {
+ unsigned char status_pen:1;
+ unsigned char status_invert:1;
+ unsigned char status_barrel:1;
+ unsigned char status_reserved:5;
+ unsigned char x_lsb;
+ unsigned char x_msb;
+ unsigned char y_lsb;
+ unsigned char y_msb;
+ unsigned char pressure_msb;
+ unsigned char battery_state;
+ unsigned char pen_id_0_7;
+ unsigned char pen_id_8_15;
+ unsigned char pen_id_16_23;
+ unsigned char pen_id_24_31;
+ } __packed;
+ unsigned char data[11];
+ };
+};
+
+struct apen_data {
+ union {
+ struct {
+ unsigned char status_pen:1;
+ unsigned char status_invert:1;
+ unsigned char status_barrel:1;
+ unsigned char status_reserved:5;
+ unsigned char x_lsb;
+ unsigned char x_msb;
+ unsigned char y_lsb;
+ unsigned char y_msb;
+ unsigned char pressure_lsb;
+ unsigned char pressure_msb;
+ unsigned char battery_state;
+ unsigned char pen_id_0_7;
+ unsigned char pen_id_8_15;
+ unsigned char pen_id_16_23;
+ unsigned char pen_id_24_31;
+ } __packed;
+ unsigned char data[12];
+ };
+};
+
+struct synaptics_rmi4_apen_handle {
+ bool apen_present;
+ unsigned char intr_mask;
+ unsigned char battery_state;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ unsigned short apen_data_addr;
+ unsigned short max_pressure;
+ unsigned int pen_id;
+ struct input_dev *apen_dev;
+ struct apen_data *apen_data;
+ struct synaptics_rmi4_data *rmi4_data;
+};
+
+static struct synaptics_rmi4_apen_handle *apen;
+
+DECLARE_COMPLETION(apen_remove_complete);
+
+static void apen_lift(void)
+{
+ input_report_key(apen->apen_dev, BTN_TOUCH, 0);
+ input_report_key(apen->apen_dev, BTN_TOOL_PEN, 0);
+ input_report_key(apen->apen_dev, BTN_TOOL_RUBBER, 0);
+ input_sync(apen->apen_dev);
+ apen->apen_present = false;
+}
+
+static void apen_report(void)
+{
+ int retval;
+ int x;
+ int y;
+ int pressure;
+ static int invert = -1;
+ struct apen_data_8b_pressure *apen_data_8b;
+ struct synaptics_rmi4_data *rmi4_data = apen->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ apen->apen_data_addr,
+ apen->apen_data->data,
+ sizeof(apen->apen_data->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read active pen data\n",
+ __func__);
+ return;
+ }
+
+ if (apen->apen_data->status_pen == 0) {
+ if (apen->apen_present)
+ apen_lift();
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: No active pen data\n",
+ __func__);
+
+ return;
+ }
+
+ x = (apen->apen_data->x_msb << 8) | (apen->apen_data->x_lsb);
+ y = (apen->apen_data->y_msb << 8) | (apen->apen_data->y_lsb);
+
+ if ((x == -1) && (y == -1)) {
+ if (apen->apen_present)
+ apen_lift();
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Active pen in range but no valid x & y\n",
+ __func__);
+
+ return;
+ }
+
+ if (!apen->apen_present)
+ invert = -1;
+
+ if (invert != -1 && invert != apen->apen_data->status_invert)
+ apen_lift();
+
+ invert = apen->apen_data->status_invert;
+
+ if (apen->max_pressure == ACTIVE_PEN_MAX_PRESSURE_16BIT) {
+ pressure = (apen->apen_data->pressure_msb << 8) |
+ apen->apen_data->pressure_lsb;
+ apen->battery_state = apen->apen_data->battery_state;
+ apen->pen_id = (apen->apen_data->pen_id_24_31 << 24) |
+ (apen->apen_data->pen_id_16_23 << 16) |
+ (apen->apen_data->pen_id_8_15 << 8) |
+ apen->apen_data->pen_id_0_7;
+ } else {
+ apen_data_8b = (struct apen_data_8b_pressure *)apen->apen_data;
+ pressure = apen_data_8b->pressure_msb;
+ apen->battery_state = apen_data_8b->battery_state;
+ apen->pen_id = (apen_data_8b->pen_id_24_31 << 24) |
+ (apen_data_8b->pen_id_16_23 << 16) |
+ (apen_data_8b->pen_id_8_15 << 8) |
+ apen_data_8b->pen_id_0_7;
+ }
+
+ input_report_key(apen->apen_dev, BTN_TOUCH, pressure > 0 ? 1 : 0);
+ input_report_key(apen->apen_dev,
+ apen->apen_data->status_invert > 0 ?
+ BTN_TOOL_RUBBER : BTN_TOOL_PEN, 1);
+ input_report_key(apen->apen_dev,
+ BTN_STYLUS, apen->apen_data->status_barrel > 0 ?
+ 1 : 0);
+ input_report_abs(apen->apen_dev, ABS_X, x);
+ input_report_abs(apen->apen_dev, ABS_Y, y);
+ input_report_abs(apen->apen_dev, ABS_PRESSURE, pressure);
+
+ input_sync(apen->apen_dev);
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Active pen: status = %d, invert = %d, barrel = %d, x = %d, y = %d, pressure = %d\n",
+ __func__,
+ apen->apen_data->status_pen,
+ apen->apen_data->status_invert,
+ apen->apen_data->status_barrel,
+ x, y, pressure);
+
+ apen->apen_present = true;
+}
+
+static void apen_set_params(void)
+{
+ input_set_abs_params(apen->apen_dev, ABS_X, 0,
+ apen->rmi4_data->sensor_max_x, 0, 0);
+ input_set_abs_params(apen->apen_dev, ABS_Y, 0,
+ apen->rmi4_data->sensor_max_y, 0, 0);
+ input_set_abs_params(apen->apen_dev, ABS_PRESSURE, 0,
+ apen->max_pressure, 0, 0);
+
+ return;
+}
+
+static int apen_pressure(struct synaptics_rmi4_f12_query_8 *query_8)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char data_reg_presence;
+ unsigned char size_of_query_9;
+ unsigned char *query_9;
+ unsigned char *data_desc;
+ struct synaptics_rmi4_data *rmi4_data = apen->rmi4_data;
+
+ data_reg_presence = query_8->data[1];
+
+ size_of_query_9 = query_8->size_of_query9;
+ query_9 = kmalloc(size_of_query_9, GFP_KERNEL);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ apen->query_base_addr + 9,
+ query_9,
+ size_of_query_9);
+ if (retval < 0)
+ goto exit;
+
+ data_desc = query_9;
+
+ for (ii = 0; ii < 6; ii++) {
+ if (!(data_reg_presence & (1 << ii)))
+ continue; /* The data register is not present */
+ data_desc++; /* Jump over the size entry */
+ while (*data_desc & (1 << 7))
+ data_desc++;
+ data_desc++; /* Go to the next descriptor */
+ }
+
+ data_desc++; /* Jump over the size entry */
+ /* Check for the presence of subpackets 1 and 2 */
+ if ((*data_desc & (3 << 1)) == (3 << 1))
+ apen->max_pressure = ACTIVE_PEN_MAX_PRESSURE_16BIT;
+ else
+ apen->max_pressure = ACTIVE_PEN_MAX_PRESSURE_8BIT;
+
+exit:
+ kfree(query_9);
+
+ return retval;
+}
+
+static int apen_reg_init(void)
+{
+ int retval;
+ unsigned char data_offset;
+ unsigned char size_of_query8;
+ struct synaptics_rmi4_f12_query_8 query_8;
+ struct synaptics_rmi4_data *rmi4_data = apen->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ apen->query_base_addr + 7,
+ &size_of_query8,
+ sizeof(size_of_query8));
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ apen->query_base_addr + 8,
+ query_8.data,
+ sizeof(query_8.data));
+ if (retval < 0)
+ return retval;
+
+ if ((size_of_query8 >= 2) && (query_8.data6_is_present)) {
+ data_offset = query_8.data0_is_present +
+ query_8.data1_is_present +
+ query_8.data2_is_present +
+ query_8.data3_is_present +
+ query_8.data4_is_present +
+ query_8.data5_is_present;
+ apen->apen_data_addr = apen->data_base_addr + data_offset;
+ retval = apen_pressure(&query_8);
+ if (retval < 0)
+ return retval;
+ } else {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Active pen support unavailable\n",
+ __func__);
+ retval = -ENODEV;
+ }
+
+ return retval;
+}
+
+static int apen_scan_pdt(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char page;
+ unsigned char intr_count = 0;
+ unsigned char intr_off;
+ unsigned char intr_src;
+ unsigned short addr;
+ struct synaptics_rmi4_fn_desc fd;
+ struct synaptics_rmi4_data *rmi4_data = apen->rmi4_data;
+
+ for (page = 0; page < PAGES_TO_SERVICE; page++) {
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ addr |= (page << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&fd,
+ sizeof(fd));
+ if (retval < 0)
+ return retval;
+
+ addr &= ~(MASK_8BIT << 8);
+
+ if (fd.fn_number) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Found F%02x\n",
+ __func__, fd.fn_number);
+ switch (fd.fn_number) {
+ case SYNAPTICS_RMI4_F12:
+ goto f12_found;
+ }
+ } else {
+ break;
+ }
+
+ intr_count += fd.intr_src_count;
+ }
+ }
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F12\n",
+ __func__);
+ return -EINVAL;
+
+f12_found:
+ apen->query_base_addr = fd.query_base_addr | (page << 8);
+ apen->control_base_addr = fd.ctrl_base_addr | (page << 8);
+ apen->data_base_addr = fd.data_base_addr | (page << 8);
+ apen->command_base_addr = fd.cmd_base_addr | (page << 8);
+
+ retval = apen_reg_init();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to initialize active pen registers\n",
+ __func__);
+ return retval;
+ }
+
+ apen->intr_mask = 0;
+ intr_src = fd.intr_src_count;
+ intr_off = intr_count % 8;
+ for (ii = intr_off;
+ ii < (intr_src + intr_off);
+ ii++) {
+ apen->intr_mask |= 1 << ii;
+ }
+
+ rmi4_data->intr_mask[0] |= apen->intr_mask;
+
+ addr = rmi4_data->f01_ctrl_base_addr + 1;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ addr,
+ &(rmi4_data->intr_mask[0]),
+ sizeof(rmi4_data->intr_mask[0]));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set interrupt enable bit\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static void synaptics_rmi4_apen_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!apen)
+ return;
+
+ if (apen->intr_mask & intr_mask)
+ apen_report();
+
+ return;
+}
+
+static int synaptics_rmi4_apen_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+
+ if (apen) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ apen = kzalloc(sizeof(*apen), GFP_KERNEL);
+ if (!apen) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for apen\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ apen->apen_data = kzalloc(sizeof(*(apen->apen_data)), GFP_KERNEL);
+ if (!apen->apen_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for apen_data\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_apen;
+ }
+
+ apen->rmi4_data = rmi4_data;
+
+ retval = apen_scan_pdt();
+ if (retval < 0)
+ goto exit_free_apen_data;
+
+ apen->apen_dev = input_allocate_device();
+ if (apen->apen_dev == NULL) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate active pen device\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_apen_data;
+ }
+
+ apen->apen_dev->name = ACTIVE_PEN_DRIVER_NAME;
+ apen->apen_dev->phys = APEN_PHYS_NAME;
+ apen->apen_dev->id.product = SYNAPTICS_DSX_DRIVER_PRODUCT;
+ apen->apen_dev->id.version = SYNAPTICS_DSX_DRIVER_VERSION;
+ apen->apen_dev->dev.parent = rmi4_data->pdev->dev.parent;
+ input_set_drvdata(apen->apen_dev, rmi4_data);
+
+ set_bit(EV_KEY, apen->apen_dev->evbit);
+ set_bit(EV_ABS, apen->apen_dev->evbit);
+ set_bit(BTN_TOUCH, apen->apen_dev->keybit);
+ set_bit(BTN_TOOL_PEN, apen->apen_dev->keybit);
+ set_bit(BTN_TOOL_RUBBER, apen->apen_dev->keybit);
+ set_bit(BTN_STYLUS, apen->apen_dev->keybit);
+#ifdef INPUT_PROP_DIRECT
+ set_bit(INPUT_PROP_DIRECT, apen->apen_dev->propbit);
+#endif
+
+ apen_set_params();
+
+ retval = input_register_device(apen->apen_dev);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to register active pen device\n",
+ __func__);
+ goto exit_free_input_device;
+ }
+
+ return 0;
+
+exit_free_input_device:
+ input_free_device(apen->apen_dev);
+
+exit_free_apen_data:
+ kfree(apen->apen_data);
+
+exit_free_apen:
+ kfree(apen);
+ apen = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_apen_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!apen)
+ goto exit;
+
+ input_unregister_device(apen->apen_dev);
+ kfree(apen->apen_data);
+ kfree(apen);
+ apen = NULL;
+
+exit:
+ complete(&apen_remove_complete);
+}
+
+static void synaptics_rmi4_apen_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!apen) {
+ synaptics_rmi4_apen_init(rmi4_data);
+ return;
+ }
+
+ apen_lift();
+
+ apen_scan_pdt();
+}
+
+static void synaptics_rmi4_apen_reinit(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!apen)
+ return;
+
+ apen_lift();
+}
+
+static void synaptics_rmi4_apen_e_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!apen)
+ return;
+
+ apen_lift();
+}
+
+static void synaptics_rmi4_apen_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!apen)
+ return;
+
+ apen_lift();
+}
+
+static struct synaptics_rmi4_exp_fn active_pen_module = {
+ .fn_type = RMI_ACTIVE_PEN,
+ .init = synaptics_rmi4_apen_init,
+ .remove = synaptics_rmi4_apen_remove,
+ .reset = synaptics_rmi4_apen_reset,
+ .reinit = synaptics_rmi4_apen_reinit,
+ .early_suspend = synaptics_rmi4_apen_e_suspend,
+ .suspend = synaptics_rmi4_apen_suspend,
+ .resume = NULL,
+ .late_resume = NULL,
+ .attn = synaptics_rmi4_apen_attn,
+};
+
+static int __init rmi4_active_pen_module_init(void)
+{
+ synaptics_rmi4_new_function(&active_pen_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_active_pen_module_exit(void)
+{
+ synaptics_rmi4_new_function(&active_pen_module, false);
+
+ wait_for_completion(&apen_remove_complete);
+}
+
+module_init(rmi4_active_pen_module_init);
+module_exit(rmi4_active_pen_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX Active Pen Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.c
new file mode 100644
index 0000000..9ce3026
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.c
@@ -0,0 +1,4879 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+#ifdef KERNEL_ABOVE_2_6_38
+#include <linux/input/mt.h>
+#endif
+
+#include <linux/msm_drm_notify.h>
+
+#define INPUT_PHYS_NAME "synaptics_dsx/touch_input"
+#define STYLUS_PHYS_NAME "synaptics_dsx/stylus"
+
+#define VIRTUAL_KEY_MAP_FILE_NAME "virtualkeys." PLATFORM_DRIVER_NAME
+
+#ifdef KERNEL_ABOVE_2_6_38
+#define TYPE_B_PROTOCOL
+#endif
+
+/*
+#define USE_DATA_SERVER
+*/
+
+#define WAKEUP_GESTURE false
+
+#define NO_0D_WHILE_2D
+#define REPORT_2D_Z
+#define REPORT_2D_W
+/*
+#define REPORT_2D_PRESSURE
+*/
+
+#define F12_DATA_15_WORKAROUND
+
+#define IGNORE_FN_INIT_FAILURE
+#define FB_READY_RESET
+#define FB_READY_WAIT_MS 100
+#define FB_READY_TIMEOUT_S 30
+#ifdef SYNA_TDDI
+#define TDDI_LPWG_WAIT_US 10
+#endif
+#define RPT_TYPE (1 << 0)
+#define RPT_X_LSB (1 << 1)
+#define RPT_X_MSB (1 << 2)
+#define RPT_Y_LSB (1 << 3)
+#define RPT_Y_MSB (1 << 4)
+#define RPT_Z (1 << 5)
+#define RPT_WX (1 << 6)
+#define RPT_WY (1 << 7)
+#define RPT_DEFAULT (RPT_TYPE | RPT_X_LSB | RPT_X_MSB | RPT_Y_LSB | RPT_Y_MSB)
+
+#define REBUILD_WORK_DELAY_MS 500 /* ms */
+
+#define EXP_FN_WORK_DELAY_MS 500 /* ms */
+#define MAX_F11_TOUCH_WIDTH 15
+#define MAX_F12_TOUCH_WIDTH 255
+
+#define CHECK_STATUS_TIMEOUT_MS 100
+
+#define F01_STD_QUERY_LEN 21
+#define F01_BUID_ID_OFFSET 18
+
+#define STATUS_NO_ERROR 0x00
+#define STATUS_RESET_OCCURRED 0x01
+#define STATUS_INVALID_CONFIG 0x02
+#define STATUS_DEVICE_FAILURE 0x03
+#define STATUS_CONFIG_CRC_FAILURE 0x04
+#define STATUS_FIRMWARE_CRC_FAILURE 0x05
+#define STATUS_CRC_IN_PROGRESS 0x06
+
+#define NORMAL_OPERATION (0 << 0)
+#define SENSOR_SLEEP (1 << 0)
+#define NO_SLEEP_OFF (0 << 2)
+#define NO_SLEEP_ON (1 << 2)
+#define CONFIGURED (1 << 7)
+
+#define F11_CONTINUOUS_MODE 0x00
+#define F11_WAKEUP_GESTURE_MODE 0x04
+#define F12_CONTINUOUS_MODE 0x00
+#define F12_WAKEUP_GESTURE_MODE 0x02
+#define F12_UDG_DETECT 0x0f
+
+static int synaptics_rmi4_check_status(struct synaptics_rmi4_data *rmi4_data,
+ bool *was_in_bl_mode);
+static int synaptics_rmi4_free_fingers(struct synaptics_rmi4_data *rmi4_data);
+static int synaptics_rmi4_reinit_device(struct synaptics_rmi4_data *rmi4_data);
+static int synaptics_rmi4_reset_device(struct synaptics_rmi4_data *rmi4_data,
+ bool rebuild);
+#ifdef CONFIG_FB
+static int synaptics_rmi4_dsi_panel_notifier_cb(struct notifier_block *self,
+ unsigned long event, void *data);
+#endif
+
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#ifndef CONFIG_FB
+#define USE_EARLYSUSPEND
+#endif
+#endif
+
+#ifdef USE_EARLYSUSPEND
+static int synaptics_rmi4_early_suspend(struct early_suspend *h);
+
+static int synaptics_rmi4_late_resume(struct early_suspend *h);
+#endif
+
+static int synaptics_rmi4_suspend(struct device *dev);
+
+static int synaptics_rmi4_resume(struct device *dev);
+
+static ssize_t synaptics_rmi4_f01_reset_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t synaptics_rmi4_f01_productinfo_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_f01_buildid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_f01_flashprog_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_0dbutton_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_0dbutton_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t synaptics_rmi4_suspend_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t synaptics_rmi4_wake_gesture_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_wake_gesture_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+#ifdef USE_DATA_SERVER
+static ssize_t synaptics_rmi4_synad_pid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+#endif
+
+static ssize_t synaptics_rmi4_virtual_key_map_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf);
+
+struct synaptics_rmi4_f01_device_status {
+ union {
+ struct {
+ unsigned char status_code:4;
+ unsigned char reserved:2;
+ unsigned char flash_prog:1;
+ unsigned char unconfigured:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f11_query_0_5 {
+ union {
+ struct {
+ /* query 0 */
+ unsigned char f11_query0_b0__2:3;
+ unsigned char has_query_9:1;
+ unsigned char has_query_11:1;
+ unsigned char has_query_12:1;
+ unsigned char has_query_27:1;
+ unsigned char has_query_28:1;
+
+ /* query 1 */
+ unsigned char num_of_fingers:3;
+ unsigned char has_rel:1;
+ unsigned char has_abs:1;
+ unsigned char has_gestures:1;
+ unsigned char has_sensitibity_adjust:1;
+ unsigned char f11_query1_b7:1;
+
+ /* query 2 */
+ unsigned char num_of_x_electrodes;
+
+ /* query 3 */
+ unsigned char num_of_y_electrodes;
+
+ /* query 4 */
+ unsigned char max_electrodes:7;
+ unsigned char f11_query4_b7:1;
+
+ /* query 5 */
+ unsigned char abs_data_size:2;
+ unsigned char has_anchored_finger:1;
+ unsigned char has_adj_hyst:1;
+ unsigned char has_dribble:1;
+ unsigned char has_bending_correction:1;
+ unsigned char has_large_object_suppression:1;
+ unsigned char has_jitter_filter:1;
+ } __packed;
+ unsigned char data[6];
+ };
+};
+
+struct synaptics_rmi4_f11_query_7_8 {
+ union {
+ struct {
+ /* query 7 */
+ unsigned char has_single_tap:1;
+ unsigned char has_tap_and_hold:1;
+ unsigned char has_double_tap:1;
+ unsigned char has_early_tap:1;
+ unsigned char has_flick:1;
+ unsigned char has_press:1;
+ unsigned char has_pinch:1;
+ unsigned char has_chiral_scroll:1;
+
+ /* query 8 */
+ unsigned char has_palm_detect:1;
+ unsigned char has_rotate:1;
+ unsigned char has_touch_shapes:1;
+ unsigned char has_scroll_zones:1;
+ unsigned char individual_scroll_zones:1;
+ unsigned char has_multi_finger_scroll:1;
+ unsigned char has_multi_finger_scroll_edge_motion:1;
+ unsigned char has_multi_finger_scroll_inertia:1;
+ } __packed;
+ unsigned char data[2];
+ };
+};
+
+struct synaptics_rmi4_f11_query_9 {
+ union {
+ struct {
+ unsigned char has_pen:1;
+ unsigned char has_proximity:1;
+ unsigned char has_large_object_sensitivity:1;
+ unsigned char has_suppress_on_large_object_detect:1;
+ unsigned char has_two_pen_thresholds:1;
+ unsigned char has_contact_geometry:1;
+ unsigned char has_pen_hover_discrimination:1;
+ unsigned char has_pen_hover_and_edge_filters:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f11_query_12 {
+ union {
+ struct {
+ unsigned char has_small_object_detection:1;
+ unsigned char has_small_object_detection_tuning:1;
+ unsigned char has_8bit_w:1;
+ unsigned char has_2d_adjustable_mapping:1;
+ unsigned char has_general_information_2:1;
+ unsigned char has_physical_properties:1;
+ unsigned char has_finger_limit:1;
+ unsigned char has_linear_cofficient_2:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f11_query_27 {
+ union {
+ struct {
+ unsigned char f11_query27_b0:1;
+ unsigned char has_pen_position_correction:1;
+ unsigned char has_pen_jitter_filter_coefficient:1;
+ unsigned char has_group_decomposition:1;
+ unsigned char has_wakeup_gesture:1;
+ unsigned char has_small_finger_correction:1;
+ unsigned char has_data_37:1;
+ unsigned char f11_query27_b7:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f11_ctrl_6_9 {
+ union {
+ struct {
+ unsigned char sensor_max_x_pos_7_0;
+ unsigned char sensor_max_x_pos_11_8:4;
+ unsigned char f11_ctrl7_b4__7:4;
+ unsigned char sensor_max_y_pos_7_0;
+ unsigned char sensor_max_y_pos_11_8:4;
+ unsigned char f11_ctrl9_b4__7:4;
+ } __packed;
+ unsigned char data[4];
+ };
+};
+
+struct synaptics_rmi4_f11_data_1_5 {
+ union {
+ struct {
+ unsigned char x_position_11_4;
+ unsigned char y_position_11_4;
+ unsigned char x_position_3_0:4;
+ unsigned char y_position_3_0:4;
+ unsigned char wx:4;
+ unsigned char wy:4;
+ unsigned char z;
+ } __packed;
+ unsigned char data[5];
+ };
+};
+
+struct synaptics_rmi4_f12_query_5 {
+ union {
+ struct {
+ unsigned char size_of_query6;
+ struct {
+ unsigned char ctrl0_is_present:1;
+ unsigned char ctrl1_is_present:1;
+ unsigned char ctrl2_is_present:1;
+ unsigned char ctrl3_is_present:1;
+ unsigned char ctrl4_is_present:1;
+ unsigned char ctrl5_is_present:1;
+ unsigned char ctrl6_is_present:1;
+ unsigned char ctrl7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl8_is_present:1;
+ unsigned char ctrl9_is_present:1;
+ unsigned char ctrl10_is_present:1;
+ unsigned char ctrl11_is_present:1;
+ unsigned char ctrl12_is_present:1;
+ unsigned char ctrl13_is_present:1;
+ unsigned char ctrl14_is_present:1;
+ unsigned char ctrl15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl16_is_present:1;
+ unsigned char ctrl17_is_present:1;
+ unsigned char ctrl18_is_present:1;
+ unsigned char ctrl19_is_present:1;
+ unsigned char ctrl20_is_present:1;
+ unsigned char ctrl21_is_present:1;
+ unsigned char ctrl22_is_present:1;
+ unsigned char ctrl23_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl24_is_present:1;
+ unsigned char ctrl25_is_present:1;
+ unsigned char ctrl26_is_present:1;
+ unsigned char ctrl27_is_present:1;
+ unsigned char ctrl28_is_present:1;
+ unsigned char ctrl29_is_present:1;
+ unsigned char ctrl30_is_present:1;
+ unsigned char ctrl31_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl32_is_present:1;
+ unsigned char ctrl33_is_present:1;
+ unsigned char ctrl34_is_present:1;
+ unsigned char ctrl35_is_present:1;
+ unsigned char ctrl36_is_present:1;
+ unsigned char ctrl37_is_present:1;
+ unsigned char ctrl38_is_present:1;
+ unsigned char ctrl39_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl40_is_present:1;
+ unsigned char ctrl41_is_present:1;
+ unsigned char ctrl42_is_present:1;
+ unsigned char ctrl43_is_present:1;
+ unsigned char ctrl44_is_present:1;
+ unsigned char ctrl45_is_present:1;
+ unsigned char ctrl46_is_present:1;
+ unsigned char ctrl47_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl48_is_present:1;
+ unsigned char ctrl49_is_present:1;
+ unsigned char ctrl50_is_present:1;
+ unsigned char ctrl51_is_present:1;
+ unsigned char ctrl52_is_present:1;
+ unsigned char ctrl53_is_present:1;
+ unsigned char ctrl54_is_present:1;
+ unsigned char ctrl55_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl56_is_present:1;
+ unsigned char ctrl57_is_present:1;
+ unsigned char ctrl58_is_present:1;
+ unsigned char ctrl59_is_present:1;
+ unsigned char ctrl60_is_present:1;
+ unsigned char ctrl61_is_present:1;
+ unsigned char ctrl62_is_present:1;
+ unsigned char ctrl63_is_present:1;
+ } __packed;
+ };
+ unsigned char data[9];
+ };
+};
+
+struct synaptics_rmi4_f12_query_8 {
+ union {
+ struct {
+ unsigned char size_of_query9;
+ struct {
+ unsigned char data0_is_present:1;
+ unsigned char data1_is_present:1;
+ unsigned char data2_is_present:1;
+ unsigned char data3_is_present:1;
+ unsigned char data4_is_present:1;
+ unsigned char data5_is_present:1;
+ unsigned char data6_is_present:1;
+ unsigned char data7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char data8_is_present:1;
+ unsigned char data9_is_present:1;
+ unsigned char data10_is_present:1;
+ unsigned char data11_is_present:1;
+ unsigned char data12_is_present:1;
+ unsigned char data13_is_present:1;
+ unsigned char data14_is_present:1;
+ unsigned char data15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char data16_is_present:1;
+ unsigned char data17_is_present:1;
+ unsigned char data18_is_present:1;
+ unsigned char data19_is_present:1;
+ unsigned char data20_is_present:1;
+ unsigned char data21_is_present:1;
+ unsigned char data22_is_present:1;
+ unsigned char data23_is_present:1;
+ } __packed;
+ struct {
+ unsigned char data24_is_present:1;
+ unsigned char data25_is_present:1;
+ unsigned char data26_is_present:1;
+ unsigned char data27_is_present:1;
+ unsigned char data28_is_present:1;
+ unsigned char data29_is_present:1;
+ unsigned char data30_is_present:1;
+ unsigned char data31_is_present:1;
+ } __packed;
+ };
+ unsigned char data[5];
+ };
+};
+
+struct synaptics_rmi4_f12_ctrl_8 {
+ union {
+ struct {
+ unsigned char max_x_coord_lsb;
+ unsigned char max_x_coord_msb;
+ unsigned char max_y_coord_lsb;
+ unsigned char max_y_coord_msb;
+ unsigned char rx_pitch_lsb;
+ unsigned char rx_pitch_msb;
+ unsigned char tx_pitch_lsb;
+ unsigned char tx_pitch_msb;
+ unsigned char low_rx_clip;
+ unsigned char high_rx_clip;
+ unsigned char low_tx_clip;
+ unsigned char high_tx_clip;
+ unsigned char num_of_rx;
+ unsigned char num_of_tx;
+ };
+ unsigned char data[14];
+ };
+};
+
+struct synaptics_rmi4_f12_ctrl_23 {
+ union {
+ struct {
+ unsigned char finger_enable:1;
+ unsigned char active_stylus_enable:1;
+ unsigned char palm_enable:1;
+ unsigned char unclassified_object_enable:1;
+ unsigned char hovering_finger_enable:1;
+ unsigned char gloved_finger_enable:1;
+ unsigned char f12_ctr23_00_b6__7:2;
+ unsigned char max_reported_objects;
+ unsigned char f12_ctr23_02_b0:1;
+ unsigned char report_active_stylus_as_finger:1;
+ unsigned char report_palm_as_finger:1;
+ unsigned char report_unclassified_object_as_finger:1;
+ unsigned char report_hovering_finger_as_finger:1;
+ unsigned char report_gloved_finger_as_finger:1;
+ unsigned char report_narrow_object_swipe_as_finger:1;
+ unsigned char report_handedge_as_finger:1;
+ unsigned char cover_enable:1;
+ unsigned char stylus_enable:1;
+ unsigned char eraser_enable:1;
+ unsigned char small_object_enable:1;
+ unsigned char f12_ctr23_03_b4__7:4;
+ unsigned char report_cover_as_finger:1;
+ unsigned char report_stylus_as_finger:1;
+ unsigned char report_eraser_as_finger:1;
+ unsigned char report_small_object_as_finger:1;
+ unsigned char f12_ctr23_04_b4__7:4;
+ };
+ unsigned char data[5];
+ };
+};
+
+struct synaptics_rmi4_f12_ctrl_31 {
+ union {
+ struct {
+ unsigned char max_x_coord_lsb;
+ unsigned char max_x_coord_msb;
+ unsigned char max_y_coord_lsb;
+ unsigned char max_y_coord_msb;
+ unsigned char rx_pitch_lsb;
+ unsigned char rx_pitch_msb;
+ unsigned char rx_clip_low;
+ unsigned char rx_clip_high;
+ unsigned char wedge_clip_low;
+ unsigned char wedge_clip_high;
+ unsigned char num_of_p;
+ unsigned char num_of_q;
+ };
+ unsigned char data[12];
+ };
+};
+
+struct synaptics_rmi4_f12_ctrl_58 {
+ union {
+ struct {
+ unsigned char reporting_format;
+ unsigned char f12_ctr58_00_reserved;
+ unsigned char min_force_lsb;
+ unsigned char min_force_msb;
+ unsigned char max_force_lsb;
+ unsigned char max_force_msb;
+ unsigned char light_press_threshold_lsb;
+ unsigned char light_press_threshold_msb;
+ unsigned char light_press_hysteresis_lsb;
+ unsigned char light_press_hysteresis_msb;
+ unsigned char hard_press_threshold_lsb;
+ unsigned char hard_press_threshold_msb;
+ unsigned char hard_press_hysteresis_lsb;
+ unsigned char hard_press_hysteresis_msb;
+ };
+ unsigned char data[14];
+ };
+};
+
+struct synaptics_rmi4_f12_finger_data {
+ unsigned char object_type_and_status;
+ unsigned char x_lsb;
+ unsigned char x_msb;
+ unsigned char y_lsb;
+ unsigned char y_msb;
+#ifdef REPORT_2D_Z
+ unsigned char z;
+#endif
+#ifdef REPORT_2D_W
+ unsigned char wx;
+ unsigned char wy;
+#endif
+};
+
+struct synaptics_rmi4_f1a_query {
+ union {
+ struct {
+ unsigned char max_button_count:3;
+ unsigned char f1a_query0_b3__4:2;
+ unsigned char has_query4:1;
+ unsigned char has_query3:1;
+ unsigned char has_query2:1;
+ unsigned char has_general_control:1;
+ unsigned char has_interrupt_enable:1;
+ unsigned char has_multibutton_select:1;
+ unsigned char has_tx_rx_map:1;
+ unsigned char has_perbutton_threshold:1;
+ unsigned char has_release_threshold:1;
+ unsigned char has_strongestbtn_hysteresis:1;
+ unsigned char has_filter_strength:1;
+ } __packed;
+ unsigned char data[2];
+ };
+};
+
+struct synaptics_rmi4_f1a_query_4 {
+ union {
+ struct {
+ unsigned char has_ctrl19:1;
+ unsigned char f1a_query4_b1__4:4;
+ unsigned char has_ctrl24:1;
+ unsigned char f1a_query4_b6__7:2;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f1a_control_0 {
+ union {
+ struct {
+ unsigned char multibutton_report:2;
+ unsigned char filter_mode:2;
+ unsigned char reserved:4;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_f1a_control {
+ struct synaptics_rmi4_f1a_control_0 general_control;
+ unsigned char button_int_enable;
+ unsigned char multi_button;
+ unsigned char *txrx_map;
+ unsigned char *button_threshold;
+ unsigned char button_release_threshold;
+ unsigned char strongest_button_hysteresis;
+ unsigned char filter_strength;
+};
+
+struct synaptics_rmi4_f1a_handle {
+ int button_bitmask_size;
+ unsigned char max_count;
+ unsigned char valid_button_count;
+ unsigned char *button_data_buffer;
+ unsigned char *button_map;
+ struct synaptics_rmi4_f1a_query button_query;
+ struct synaptics_rmi4_f1a_control button_control;
+};
+
+struct synaptics_rmi4_exp_fhandler {
+ struct synaptics_rmi4_exp_fn *exp_fn;
+ bool insert;
+ bool remove;
+ struct list_head link;
+};
+
+struct synaptics_rmi4_exp_fn_data {
+ bool initialized;
+ bool queue_work;
+ struct mutex mutex;
+ struct list_head list;
+ struct delayed_work work;
+ struct workqueue_struct *workqueue;
+ struct synaptics_rmi4_data *rmi4_data;
+};
+
+static struct synaptics_rmi4_exp_fn_data exp_data;
+
+static struct synaptics_dsx_button_map *vir_button_map;
+
+#ifdef USE_DATA_SERVER
+static pid_t synad_pid;
+static struct task_struct *synad_task;
+static struct siginfo interrupt_signal;
+#endif
+
+static struct device_attribute attrs[] = {
+ __ATTR(reset, 0220,
+ synaptics_rmi4_show_error,
+ synaptics_rmi4_f01_reset_store),
+ __ATTR(productinfo, 0444,
+ synaptics_rmi4_f01_productinfo_show,
+ synaptics_rmi4_store_error),
+ __ATTR(buildid, 0444,
+ synaptics_rmi4_f01_buildid_show,
+ synaptics_rmi4_store_error),
+ __ATTR(flashprog, 0444,
+ synaptics_rmi4_f01_flashprog_show,
+ synaptics_rmi4_store_error),
+ __ATTR(0dbutton, 0664,
+ synaptics_rmi4_0dbutton_show,
+ synaptics_rmi4_0dbutton_store),
+ __ATTR(suspend, 0220,
+ synaptics_rmi4_show_error,
+ synaptics_rmi4_suspend_store),
+ __ATTR(wake_gesture, 0664,
+ synaptics_rmi4_wake_gesture_show,
+ synaptics_rmi4_wake_gesture_store),
+#ifdef USE_DATA_SERVER
+ __ATTR(synad_pid, 0220,
+ synaptics_rmi4_show_error,
+ synaptics_rmi4_synad_pid_store),
+#endif
+};
+
+static struct kobj_attribute virtual_key_map_attr = {
+ .attr = {
+ .name = VIRTUAL_KEY_MAP_FILE_NAME,
+ .mode = 0444,
+ },
+ .show = synaptics_rmi4_virtual_key_map_show,
+};
+
+static ssize_t synaptics_rmi4_f01_reset_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int reset;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ if (kstrtouint(buf, 10, &reset) != 1)
+ return -EINVAL;
+
+ if (reset != 1)
+ return -EINVAL;
+
+ retval = synaptics_rmi4_reset_device(rmi4_data, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command, error = %d\n",
+ __func__, retval);
+ return retval;
+ }
+
+ return count;
+}
+
+static ssize_t synaptics_rmi4_f01_productinfo_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ return snprintf(buf, PAGE_SIZE, "0x%02x 0x%02x\n",
+ (rmi4_data->rmi4_mod_info.product_info[0]),
+ (rmi4_data->rmi4_mod_info.product_info[1]));
+}
+
+static ssize_t synaptics_rmi4_f01_buildid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n",
+ rmi4_data->firmware_id);
+}
+
+static ssize_t synaptics_rmi4_f01_flashprog_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ struct synaptics_rmi4_f01_device_status device_status;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr,
+ device_status.data,
+ sizeof(device_status.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read device status, error = %d\n",
+ __func__, retval);
+ return retval;
+ }
+
+ return snprintf(buf, PAGE_SIZE, "%u\n",
+ device_status.flash_prog);
+}
+
+static ssize_t synaptics_rmi4_0dbutton_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n",
+ rmi4_data->button_0d_enabled);
+}
+
+static ssize_t synaptics_rmi4_0dbutton_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ unsigned char ii;
+ unsigned char intr_enable;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ input = input > 0 ? 1 : 0;
+
+ if (rmi4_data->button_0d_enabled == input)
+ return count;
+
+ if (list_empty(&rmi->support_fn_list))
+ return -ENODEV;
+
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F1A) {
+ ii = fhandler->intr_reg_num;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr + 1 + ii,
+ &intr_enable,
+ sizeof(intr_enable));
+ if (retval < 0)
+ return retval;
+
+ if (input == 1)
+ intr_enable |= fhandler->intr_mask;
+ else
+ intr_enable &= ~fhandler->intr_mask;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr + 1 + ii,
+ &intr_enable,
+ sizeof(intr_enable));
+ if (retval < 0)
+ return retval;
+ }
+ }
+
+ rmi4_data->button_0d_enabled = input;
+
+ return count;
+}
+
+static ssize_t synaptics_rmi4_suspend_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ synaptics_rmi4_suspend(dev);
+ else if (input == 0)
+ synaptics_rmi4_resume(dev);
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static ssize_t synaptics_rmi4_wake_gesture_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n",
+ rmi4_data->enable_wakeup_gesture);
+}
+
+static ssize_t synaptics_rmi4_wake_gesture_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ input = input > 0 ? 1 : 0;
+
+ if (rmi4_data->f11_wakeup_gesture || rmi4_data->f12_wakeup_gesture)
+ rmi4_data->enable_wakeup_gesture = input;
+
+ return count;
+}
+
+#ifdef USE_DATA_SERVER
+static ssize_t synaptics_rmi4_synad_pid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ synad_pid = input;
+
+ if (synad_pid) {
+ synad_task = pid_task(find_vpid(synad_pid), PIDTYPE_PID);
+ if (!synad_task)
+ return -EINVAL;
+ }
+
+ return count;
+}
+#endif
+
+static ssize_t synaptics_rmi4_virtual_key_map_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ int ii;
+ int cnt;
+ int count = 0;
+
+ for (ii = 0; ii < vir_button_map->nbuttons; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "0x01:%d:%d:%d:%d:%d\n",
+ vir_button_map->map[ii * 5 + 0],
+ vir_button_map->map[ii * 5 + 1],
+ vir_button_map->map[ii * 5 + 2],
+ vir_button_map->map[ii * 5 + 3],
+ vir_button_map->map[ii * 5 + 4]);
+ buf += cnt;
+ count += cnt;
+ }
+
+ return count;
+}
+
+static int synaptics_rmi4_f11_wg(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval;
+ unsigned char reporting_control;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F11)
+ break;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base,
+ &reporting_control,
+ sizeof(reporting_control));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to change reporting mode\n",
+ __func__);
+ return retval;
+ }
+
+ reporting_control = (reporting_control & ~MASK_3BIT);
+ if (enable)
+ reporting_control |= F11_WAKEUP_GESTURE_MODE;
+ else
+ reporting_control |= F11_CONTINUOUS_MODE;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ fhandler->full_addr.ctrl_base,
+ &reporting_control,
+ sizeof(reporting_control));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to change reporting mode\n",
+ __func__);
+ return retval;
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_f12_wg(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval;
+ unsigned char offset;
+ unsigned char reporting_control[3];
+ struct synaptics_rmi4_f12_extra_data *extra_data;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F12)
+ break;
+ }
+
+ extra_data = (struct synaptics_rmi4_f12_extra_data *)fhandler->extra;
+ offset = extra_data->ctrl20_offset;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + offset,
+ reporting_control,
+ sizeof(reporting_control));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to change reporting mode\n",
+ __func__);
+ return retval;
+ }
+
+ if (enable)
+ reporting_control[rmi4_data->set_wakeup_gesture] = F12_WAKEUP_GESTURE_MODE;
+ else
+ reporting_control[rmi4_data->set_wakeup_gesture] = F12_CONTINUOUS_MODE;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ fhandler->full_addr.ctrl_base + offset,
+ reporting_control,
+ sizeof(reporting_control));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to change reporting mode\n",
+ __func__);
+ return retval;
+ }
+
+ return retval;
+}
+
+static void synaptics_rmi4_wakeup_gesture(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ if (rmi4_data->f11_wakeup_gesture)
+ synaptics_rmi4_f11_wg(rmi4_data, enable);
+ else if (rmi4_data->f12_wakeup_gesture)
+ synaptics_rmi4_f12_wg(rmi4_data, enable);
+}
+
+static int synaptics_rmi4_f11_abs_report(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ int retval;
+ unsigned char touch_count = 0; /* number of touch points */
+ unsigned char reg_index;
+ unsigned char finger;
+ unsigned char fingers_supported;
+ unsigned char num_of_finger_status_regs;
+ unsigned char finger_shift;
+ unsigned char finger_status;
+ unsigned char finger_status_reg[3];
+ unsigned char detected_gestures;
+ unsigned short data_addr;
+ unsigned short data_offset;
+ int x;
+ int y;
+ int wx;
+ int wy;
+ int temp;
+ struct synaptics_rmi4_f11_data_1_5 data;
+ struct synaptics_rmi4_f11_extra_data *extra_data;
+
+ /*
+ * The number of finger status registers is determined by the
+ * maximum number of fingers supported - 2 bits per finger. So
+ * the number of finger status registers to read is:
+ * register_count = ceil(max_num_of_fingers / 4)
+ */
+ fingers_supported = fhandler->num_of_data_points;
+ num_of_finger_status_regs = (fingers_supported + 3) / 4;
+ data_addr = fhandler->full_addr.data_base;
+
+ extra_data = (struct synaptics_rmi4_f11_extra_data *)fhandler->extra;
+
+ if (rmi4_data->suspend && rmi4_data->enable_wakeup_gesture) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr + extra_data->data38_offset,
+ &detected_gestures,
+ sizeof(detected_gestures));
+ if (retval < 0)
+ return 0;
+
+ if (detected_gestures) {
+ input_report_key(rmi4_data->input_dev, KEY_WAKEUP, 1);
+ input_sync(rmi4_data->input_dev);
+ input_report_key(rmi4_data->input_dev, KEY_WAKEUP, 0);
+ input_sync(rmi4_data->input_dev);
+ rmi4_data->suspend = false;
+ }
+/* synaptics_rmi4_wakeup_gesture(rmi4_data, false); */
+ return 0;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr,
+ finger_status_reg,
+ num_of_finger_status_regs);
+ if (retval < 0)
+ return 0;
+
+ mutex_lock(&(rmi4_data->rmi4_report_mutex));
+
+ for (finger = 0; finger < fingers_supported; finger++) {
+ reg_index = finger / 4;
+ finger_shift = (finger % 4) * 2;
+ finger_status = (finger_status_reg[reg_index] >> finger_shift)
+ & MASK_2BIT;
+
+ /*
+ * Each 2-bit finger status field represents the following:
+ * 00 = finger not present
+ * 01 = finger present and data accurate
+ * 10 = finger present but data may be inaccurate
+ * 11 = reserved
+ */
+#ifdef TYPE_B_PROTOCOL
+ input_mt_slot(rmi4_data->input_dev, finger);
+ input_mt_report_slot_state(rmi4_data->input_dev,
+ MT_TOOL_FINGER, finger_status);
+#endif
+
+ if (finger_status) {
+ data_offset = data_addr +
+ num_of_finger_status_regs +
+ (finger * sizeof(data.data));
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_offset,
+ data.data,
+ sizeof(data.data));
+ if (retval < 0) {
+ touch_count = 0;
+ goto exit;
+ }
+
+ x = (data.x_position_11_4 << 4) | data.x_position_3_0;
+ y = (data.y_position_11_4 << 4) | data.y_position_3_0;
+ wx = data.wx;
+ wy = data.wy;
+
+ if (rmi4_data->hw_if->board_data->swap_axes) {
+ temp = x;
+ x = y;
+ y = temp;
+ temp = wx;
+ wx = wy;
+ wy = temp;
+ }
+
+ if (rmi4_data->hw_if->board_data->x_flip)
+ x = rmi4_data->sensor_max_x - x;
+ if (rmi4_data->hw_if->board_data->y_flip)
+ y = rmi4_data->sensor_max_y - y;
+
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOUCH, 1);
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOOL_FINGER, 1);
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_POSITION_X, x);
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_POSITION_Y, y);
+#ifdef REPORT_2D_W
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MAJOR, max(wx, wy));
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MINOR, min(wx, wy));
+#endif
+#ifndef TYPE_B_PROTOCOL
+ input_mt_sync(rmi4_data->input_dev);
+#endif
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Finger %d: status = 0x%02x, x = %d, y = %d, wx = %d, wy = %d\n",
+ __func__, finger,
+ finger_status,
+ x, y, wx, wy);
+
+ touch_count++;
+ }
+ }
+
+ if (touch_count == 0) {
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOUCH, 0);
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOOL_FINGER, 0);
+#ifndef TYPE_B_PROTOCOL
+ input_mt_sync(rmi4_data->input_dev);
+#endif
+ }
+
+ input_sync(rmi4_data->input_dev);
+
+exit:
+ mutex_unlock(&(rmi4_data->rmi4_report_mutex));
+
+ return touch_count;
+}
+
+static int synaptics_rmi4_f12_abs_report(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ int retval;
+ unsigned char touch_count = 0; /* number of touch points */
+ unsigned char index;
+ unsigned char finger;
+ unsigned char fingers_to_process;
+ unsigned char finger_status;
+ unsigned char size_of_2d_data;
+ unsigned char gesture_type;
+ unsigned short data_addr;
+ int x;
+ int y;
+ int wx;
+ int wy;
+ int temp;
+#if defined(REPORT_2D_PRESSURE) || defined(F51_DISCRETE_FORCE)
+ int pressure;
+#endif
+#ifdef REPORT_2D_PRESSURE
+ unsigned char f_fingers;
+ unsigned char f_lsb;
+ unsigned char f_msb;
+ unsigned char *f_data;
+#endif
+#ifdef F51_DISCRETE_FORCE
+ unsigned char force_level;
+#endif
+ struct synaptics_rmi4_f12_extra_data *extra_data;
+ struct synaptics_rmi4_f12_finger_data *data;
+ struct synaptics_rmi4_f12_finger_data *finger_data;
+ static unsigned char finger_presence;
+ static unsigned char stylus_presence;
+#ifdef F12_DATA_15_WORKAROUND
+ static unsigned char objects_already_present;
+#endif
+
+ fingers_to_process = fhandler->num_of_data_points;
+ data_addr = fhandler->full_addr.data_base;
+ extra_data = (struct synaptics_rmi4_f12_extra_data *)fhandler->extra;
+ size_of_2d_data = sizeof(struct synaptics_rmi4_f12_finger_data);
+
+ if (rmi4_data->suspend && rmi4_data->enable_wakeup_gesture) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr + extra_data->data4_offset,
+ rmi4_data->gesture_detection,
+ sizeof(rmi4_data->gesture_detection));
+ if (retval < 0)
+ return 0;
+
+ gesture_type = rmi4_data->gesture_detection[0];
+
+ if (gesture_type && gesture_type != F12_UDG_DETECT) {
+ input_report_key(rmi4_data->input_dev, KEY_WAKEUP, 1);
+ input_sync(rmi4_data->input_dev);
+ input_report_key(rmi4_data->input_dev, KEY_WAKEUP, 0);
+ input_sync(rmi4_data->input_dev);
+ /* synaptics_rmi4_wakeup_gesture(rmi4_data, false); */
+ /* rmi4_data->suspend = false; */
+ }
+
+ return 0;
+ }
+
+ /* Determine the total number of fingers to process */
+ if (extra_data->data15_size) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr + extra_data->data15_offset,
+ extra_data->data15_data,
+ extra_data->data15_size);
+ if (retval < 0)
+ return 0;
+
+ /* Start checking from the highest bit */
+ index = extra_data->data15_size - 1; /* Highest byte */
+ finger = (fingers_to_process - 1) % 8; /* Highest bit */
+ do {
+ if (extra_data->data15_data[index] & (1 << finger))
+ break;
+
+ if (finger) {
+ finger--;
+ } else if (index > 0) {
+ index--; /* Move to the next lower byte */
+ finger = 7;
+ }
+
+ fingers_to_process--;
+ } while (fingers_to_process);
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Number of fingers to process = %d\n",
+ __func__, fingers_to_process);
+ }
+
+#ifdef F12_DATA_15_WORKAROUND
+ fingers_to_process = max(fingers_to_process, objects_already_present);
+#endif
+
+ if (!fingers_to_process) {
+ synaptics_rmi4_free_fingers(rmi4_data);
+ finger_presence = 0;
+ stylus_presence = 0;
+ return 0;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr + extra_data->data1_offset,
+ (unsigned char *)fhandler->data,
+ fingers_to_process * size_of_2d_data);
+ if (retval < 0)
+ return 0;
+
+ data = (struct synaptics_rmi4_f12_finger_data *)fhandler->data;
+
+#ifdef REPORT_2D_PRESSURE
+ if (rmi4_data->report_pressure) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr + extra_data->data29_offset,
+ extra_data->data29_data,
+ extra_data->data29_size);
+ if (retval < 0)
+ return 0;
+ }
+#endif
+
+ mutex_lock(&(rmi4_data->rmi4_report_mutex));
+
+ for (finger = 0; finger < fingers_to_process; finger++) {
+ finger_data = data + finger;
+ finger_status = finger_data->object_type_and_status;
+
+#ifdef F12_DATA_15_WORKAROUND
+ objects_already_present = finger + 1;
+#endif
+
+ x = (finger_data->x_msb << 8) | (finger_data->x_lsb);
+ y = (finger_data->y_msb << 8) | (finger_data->y_lsb);
+#ifdef REPORT_2D_W
+ wx = finger_data->wx;
+ wy = finger_data->wy;
+#endif
+
+ if (rmi4_data->hw_if->board_data->swap_axes) {
+ temp = x;
+ x = y;
+ y = temp;
+ temp = wx;
+ wx = wy;
+ wy = temp;
+ }
+
+ if (rmi4_data->hw_if->board_data->x_flip)
+ x = rmi4_data->sensor_max_x - x;
+ if (rmi4_data->hw_if->board_data->y_flip)
+ y = rmi4_data->sensor_max_y - y;
+
+ switch (finger_status) {
+ case F12_FINGER_STATUS:
+ case F12_GLOVED_FINGER_STATUS:
+ /* Stylus has priority over fingers */
+ if (stylus_presence)
+ break;
+#ifdef TYPE_B_PROTOCOL
+ input_mt_slot(rmi4_data->input_dev, finger);
+ input_mt_report_slot_state(rmi4_data->input_dev,
+ MT_TOOL_FINGER, 1);
+#endif
+
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOUCH, 1);
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOOL_FINGER, 1);
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_POSITION_X, x);
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_POSITION_Y, y);
+#ifdef REPORT_2D_W
+ if (rmi4_data->wedge_sensor) {
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MAJOR, wx);
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MINOR, wx);
+ } else {
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MAJOR,
+ max(wx, wy));
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MINOR,
+ min(wx, wy));
+ }
+#endif
+#ifdef REPORT_2D_PRESSURE
+ if (rmi4_data->report_pressure) {
+ f_fingers = extra_data->data29_size / 2;
+ f_data = extra_data->data29_data;
+ if (finger + 1 > f_fingers) {
+ pressure = 1;
+ } else {
+ f_lsb = finger * 2;
+ f_msb = finger * 2 + 1;
+ pressure = (int)f_data[f_lsb] << 0 |
+ (int)f_data[f_msb] << 8;
+ }
+ pressure = pressure > 0 ? pressure : 1;
+ if (pressure > rmi4_data->force_max)
+ pressure = rmi4_data->force_max;
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_PRESSURE, pressure);
+ }
+#elif defined(F51_DISCRETE_FORCE)
+ if (finger == 0) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ FORCE_LEVEL_ADDR,
+ &force_level,
+ sizeof(force_level));
+ if (retval < 0)
+ return 0;
+ pressure = force_level > 0 ? force_level : 1;
+ } else {
+ pressure = 1;
+ }
+ input_report_abs(rmi4_data->input_dev,
+ ABS_MT_PRESSURE, pressure);
+#endif
+#ifndef TYPE_B_PROTOCOL
+ input_mt_sync(rmi4_data->input_dev);
+#endif
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Finger %d: status = 0x%02x, x = %d, y = %d, wx = %d, wy = %d\n",
+ __func__, finger,
+ finger_status,
+ x, y, wx, wy);
+
+ finger_presence = 1;
+ touch_count++;
+ break;
+ case F12_PALM_STATUS:
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Finger %d: x = %d, y = %d, wx = %d, wy = %d\n",
+ __func__, finger,
+ x, y, wx, wy);
+ break;
+ case F12_STYLUS_STATUS:
+ case F12_ERASER_STATUS:
+ if (!rmi4_data->stylus_enable)
+ break;
+ /* Stylus has priority over fingers */
+ if (finger_presence) {
+ mutex_unlock(&(rmi4_data->rmi4_report_mutex));
+ synaptics_rmi4_free_fingers(rmi4_data);
+ mutex_lock(&(rmi4_data->rmi4_report_mutex));
+ finger_presence = 0;
+ }
+ if (stylus_presence) {/* Allow one stylus at a timee */
+ if (finger + 1 != stylus_presence)
+ break;
+ }
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOUCH, 1);
+ if (finger_status == F12_STYLUS_STATUS) {
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_PEN, 1);
+ } else {
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_RUBBER, 1);
+ }
+ input_report_abs(rmi4_data->stylus_dev,
+ ABS_X, x);
+ input_report_abs(rmi4_data->stylus_dev,
+ ABS_Y, y);
+ input_sync(rmi4_data->stylus_dev);
+
+ stylus_presence = finger + 1;
+ touch_count++;
+ break;
+ default:
+#ifdef TYPE_B_PROTOCOL
+ input_mt_slot(rmi4_data->input_dev, finger);
+ input_mt_report_slot_state(rmi4_data->input_dev,
+ MT_TOOL_FINGER, 0);
+#endif
+ break;
+ }
+ }
+
+ if (touch_count == 0) {
+ finger_presence = 0;
+#ifdef F12_DATA_15_WORKAROUND
+ objects_already_present = 0;
+#endif
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOUCH, 0);
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOOL_FINGER, 0);
+#ifndef TYPE_B_PROTOCOL
+ input_mt_sync(rmi4_data->input_dev);
+#endif
+
+ if (rmi4_data->stylus_enable) {
+ stylus_presence = 0;
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOUCH, 0);
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_PEN, 0);
+ if (rmi4_data->eraser_enable) {
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_RUBBER, 0);
+ }
+ input_sync(rmi4_data->stylus_dev);
+ }
+ }
+
+ input_sync(rmi4_data->input_dev);
+
+ mutex_unlock(&(rmi4_data->rmi4_report_mutex));
+
+ return touch_count;
+}
+
+static int synaptics_rmi4_f1a_report(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ int retval;
+ unsigned char touch_count = 0;
+ unsigned char button;
+ unsigned char index;
+ unsigned char shift;
+ unsigned char status;
+ unsigned char *data;
+ unsigned short data_addr = fhandler->full_addr.data_base;
+ struct synaptics_rmi4_f1a_handle *f1a = fhandler->data;
+ static unsigned char do_once = 1;
+ static bool current_status[MAX_NUMBER_OF_BUTTONS];
+#ifdef NO_0D_WHILE_2D
+ static bool before_2d_status[MAX_NUMBER_OF_BUTTONS];
+ static bool while_2d_status[MAX_NUMBER_OF_BUTTONS];
+#endif
+
+ if (do_once) {
+ memset(current_status, 0, sizeof(current_status));
+#ifdef NO_0D_WHILE_2D
+ memset(before_2d_status, 0, sizeof(before_2d_status));
+ memset(while_2d_status, 0, sizeof(while_2d_status));
+#endif
+ do_once = 0;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_addr,
+ f1a->button_data_buffer,
+ f1a->button_bitmask_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read button data registers\n",
+ __func__);
+ return retval;
+ }
+
+ data = f1a->button_data_buffer;
+
+ mutex_lock(&(rmi4_data->rmi4_report_mutex));
+
+ for (button = 0; button < f1a->valid_button_count; button++) {
+ index = button / 8;
+ shift = button % 8;
+ status = ((data[index] >> shift) & MASK_1BIT);
+
+ if (current_status[button] == status)
+ continue;
+ else
+ current_status[button] = status;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Button %d (code %d) ->%d\n",
+ __func__, button,
+ f1a->button_map[button],
+ status);
+#ifdef NO_0D_WHILE_2D
+ if (rmi4_data->fingers_on_2d == false) {
+ if (status == 1) {
+ before_2d_status[button] = 1;
+ } else {
+ if (while_2d_status[button] == 1) {
+ while_2d_status[button] = 0;
+ continue;
+ } else {
+ before_2d_status[button] = 0;
+ }
+ }
+ touch_count++;
+ input_report_key(rmi4_data->input_dev,
+ f1a->button_map[button],
+ status);
+ } else {
+ if (before_2d_status[button] == 1) {
+ before_2d_status[button] = 0;
+ touch_count++;
+ input_report_key(rmi4_data->input_dev,
+ f1a->button_map[button],
+ status);
+ } else {
+ if (status == 1)
+ while_2d_status[button] = 1;
+ else
+ while_2d_status[button] = 0;
+ }
+ }
+#else
+ touch_count++;
+ input_report_key(rmi4_data->input_dev,
+ f1a->button_map[button],
+ status);
+#endif
+ }
+
+ if (touch_count)
+ input_sync(rmi4_data->input_dev);
+
+ mutex_unlock(&(rmi4_data->rmi4_report_mutex));
+
+ return retval;
+}
+
+static void synaptics_rmi4_report_touch(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ unsigned char touch_count_2d;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Function %02x reporting\n",
+ __func__, fhandler->fn_number);
+
+ switch (fhandler->fn_number) {
+ case SYNAPTICS_RMI4_F11:
+ touch_count_2d = synaptics_rmi4_f11_abs_report(rmi4_data,
+ fhandler);
+
+ if (touch_count_2d)
+ rmi4_data->fingers_on_2d = true;
+ else
+ rmi4_data->fingers_on_2d = false;
+ break;
+ case SYNAPTICS_RMI4_F12:
+ touch_count_2d = synaptics_rmi4_f12_abs_report(rmi4_data,
+ fhandler);
+
+ if (touch_count_2d)
+ rmi4_data->fingers_on_2d = true;
+ else
+ rmi4_data->fingers_on_2d = false;
+ break;
+ case SYNAPTICS_RMI4_F1A:
+ synaptics_rmi4_f1a_report(rmi4_data, fhandler);
+ break;
+#ifdef USE_DATA_SERVER
+ case SYNAPTICS_RMI4_F21:
+ if (synad_pid)
+ send_sig_info(SIGIO, &interrupt_signal, synad_task);
+ break;
+#endif
+ default:
+ break;
+ }
+}
+
+static int synaptics_rmi4_sensor_report(struct synaptics_rmi4_data *rmi4_data,
+ bool report)
+{
+ int retval;
+ unsigned char data[MAX_INTR_REGISTERS + 1];
+ unsigned char *intr = &data[1];
+ bool was_in_bl_mode;
+ struct synaptics_rmi4_f01_device_status status;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ /*
+ * Get interrupt status information from F01 Data1 register to
+ * determine the source(s) that are flagging the interrupt.
+ */
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr,
+ data,
+ rmi4_data->num_of_intr_regs + 1);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read interrupt status\n",
+ __func__);
+ return retval;
+ }
+
+ status.data[0] = data[0];
+ if (status.status_code == STATUS_CRC_IN_PROGRESS) {
+ retval = synaptics_rmi4_check_status(rmi4_data,
+ &was_in_bl_mode);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to check status\n",
+ __func__);
+ return retval;
+ }
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr,
+ status.data,
+ sizeof(status.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read device status\n",
+ __func__);
+ return retval;
+ }
+ }
+ if (status.unconfigured && !status.flash_prog) {
+ pr_notice("%s: spontaneous reset detected\n", __func__);
+ retval = synaptics_rmi4_reinit_device(rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to reinit device\n",
+ __func__);
+ }
+ }
+
+ if (!report)
+ return retval;
+
+ /*
+ * Traverse the function handler list and service the source(s)
+ * of the interrupt accordingly.
+ */
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->num_of_data_sources) {
+ if (fhandler->intr_mask &
+ intr[fhandler->intr_reg_num]) {
+ synaptics_rmi4_report_touch(rmi4_data,
+ fhandler);
+ }
+ }
+ }
+ }
+
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link) {
+ if (!exp_fhandler->insert &&
+ !exp_fhandler->remove &&
+ (exp_fhandler->exp_fn->attn != NULL))
+ exp_fhandler->exp_fn->attn(rmi4_data, intr[0]);
+ }
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ return retval;
+}
+
+static irqreturn_t synaptics_rmi4_irq(int irq, void *data)
+{
+ struct synaptics_rmi4_data *rmi4_data = data;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ if (gpio_get_value(bdata->irq_gpio) != bdata->irq_on_state)
+ goto exit;
+
+ synaptics_rmi4_sensor_report(rmi4_data, true);
+
+exit:
+ return IRQ_HANDLED;
+}
+
+static int synaptics_rmi4_int_enable(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval = 0;
+ unsigned char ii;
+ unsigned char zero = 0x00;
+ unsigned char *intr_mask;
+ unsigned short intr_addr;
+
+ intr_mask = rmi4_data->intr_mask;
+
+ for (ii = 0; ii < rmi4_data->num_of_intr_regs; ii++) {
+ if (intr_mask[ii] != 0x00) {
+ intr_addr = rmi4_data->f01_ctrl_base_addr + 1 + ii;
+ if (enable) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ intr_addr,
+ &(intr_mask[ii]),
+ sizeof(intr_mask[ii]));
+ if (retval < 0)
+ return retval;
+ } else {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ intr_addr,
+ &zero,
+ sizeof(zero));
+ if (retval < 0)
+ return retval;
+ }
+ }
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_irq_enable(struct synaptics_rmi4_data *rmi4_data,
+ bool enable, bool attn_only)
+{
+ int retval = 0;
+ unsigned char data[MAX_INTR_REGISTERS];
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ mutex_lock(&(rmi4_data->rmi4_irq_enable_mutex));
+
+ if (attn_only) {
+ retval = synaptics_rmi4_int_enable(rmi4_data, enable);
+ goto exit;
+ }
+
+ if (enable) {
+ if (rmi4_data->irq_enabled) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Interrupt already enabled\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = synaptics_rmi4_int_enable(rmi4_data, false);
+ if (retval < 0)
+ goto exit;
+
+ /* Clear interrupts */
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr + 1,
+ data,
+ rmi4_data->num_of_intr_regs);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read interrupt status\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = request_threaded_irq(rmi4_data->irq, NULL,
+ synaptics_rmi4_irq, bdata->irq_flags,
+ PLATFORM_DRIVER_NAME, rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create irq thread\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = synaptics_rmi4_int_enable(rmi4_data, true);
+ if (retval < 0)
+ goto exit;
+
+ rmi4_data->irq_enabled = true;
+ } else {
+ if (rmi4_data->irq_enabled) {
+ disable_irq(rmi4_data->irq);
+ free_irq(rmi4_data->irq, rmi4_data);
+ rmi4_data->irq_enabled = false;
+ }
+ }
+
+exit:
+ mutex_unlock(&(rmi4_data->rmi4_irq_enable_mutex));
+
+ return retval;
+}
+
+static void synaptics_rmi4_set_intr_mask(struct synaptics_rmi4_fn *fhandler,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count)
+{
+ unsigned char ii;
+ unsigned char intr_offset;
+
+ fhandler->intr_reg_num = (intr_count + 7) / 8;
+ if (fhandler->intr_reg_num != 0)
+ fhandler->intr_reg_num -= 1;
+
+ /* Set an enable bit for each data source */
+ intr_offset = intr_count % 8;
+ fhandler->intr_mask = 0;
+ for (ii = intr_offset;
+ ii < (fd->intr_src_count + intr_offset);
+ ii++)
+ fhandler->intr_mask |= 1 << ii;
+}
+
+static int synaptics_rmi4_f01_init(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count)
+{
+ fhandler->fn_number = fd->fn_number;
+ fhandler->num_of_data_sources = fd->intr_src_count;
+ fhandler->data = NULL;
+ fhandler->extra = NULL;
+
+ synaptics_rmi4_set_intr_mask(fhandler, fd, intr_count);
+
+ rmi4_data->f01_query_base_addr = fd->query_base_addr;
+ rmi4_data->f01_ctrl_base_addr = fd->ctrl_base_addr;
+ rmi4_data->f01_data_base_addr = fd->data_base_addr;
+ rmi4_data->f01_cmd_base_addr = fd->cmd_base_addr;
+
+ return 0;
+}
+
+static int synaptics_rmi4_f11_init(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count)
+{
+ int retval;
+ int temp;
+ unsigned char offset;
+ unsigned char fingers_supported;
+ struct synaptics_rmi4_f11_extra_data *extra_data;
+ struct synaptics_rmi4_f11_query_0_5 query_0_5;
+ struct synaptics_rmi4_f11_query_7_8 query_7_8;
+ struct synaptics_rmi4_f11_query_9 query_9;
+ struct synaptics_rmi4_f11_query_12 query_12;
+ struct synaptics_rmi4_f11_query_27 query_27;
+ struct synaptics_rmi4_f11_ctrl_6_9 control_6_9;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ fhandler->fn_number = fd->fn_number;
+ fhandler->num_of_data_sources = fd->intr_src_count;
+ fhandler->extra = kmalloc(sizeof(*extra_data), GFP_KERNEL);
+ if (!fhandler->extra) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fhandler->extra\n",
+ __func__);
+ return -ENOMEM;
+ }
+ extra_data = (struct synaptics_rmi4_f11_extra_data *)fhandler->extra;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base,
+ query_0_5.data,
+ sizeof(query_0_5.data));
+ if (retval < 0)
+ return retval;
+
+ /* Maximum number of fingers supported */
+ if (query_0_5.num_of_fingers <= 4)
+ fhandler->num_of_data_points = query_0_5.num_of_fingers + 1;
+ else if (query_0_5.num_of_fingers == 5)
+ fhandler->num_of_data_points = 10;
+
+ rmi4_data->num_of_fingers = fhandler->num_of_data_points;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + 6,
+ control_6_9.data,
+ sizeof(control_6_9.data));
+ if (retval < 0)
+ return retval;
+
+ /* Maximum x and y */
+ rmi4_data->sensor_max_x = control_6_9.sensor_max_x_pos_7_0 |
+ (control_6_9.sensor_max_x_pos_11_8 << 8);
+ rmi4_data->sensor_max_y = control_6_9.sensor_max_y_pos_7_0 |
+ (control_6_9.sensor_max_y_pos_11_8 << 8);
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Function %02x max x = %d max y = %d\n",
+ __func__, fhandler->fn_number,
+ rmi4_data->sensor_max_x,
+ rmi4_data->sensor_max_y);
+
+ rmi4_data->max_touch_width = MAX_F11_TOUCH_WIDTH;
+
+ if (bdata->swap_axes) {
+ temp = rmi4_data->sensor_max_x;
+ rmi4_data->sensor_max_x = rmi4_data->sensor_max_y;
+ rmi4_data->sensor_max_y = temp;
+ }
+
+ synaptics_rmi4_set_intr_mask(fhandler, fd, intr_count);
+
+ fhandler->data = NULL;
+
+ offset = sizeof(query_0_5.data);
+
+ /* query 6 */
+ if (query_0_5.has_rel)
+ offset += 1;
+
+ /* queries 7 8 */
+ if (query_0_5.has_gestures) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + offset,
+ query_7_8.data,
+ sizeof(query_7_8.data));
+ if (retval < 0)
+ return retval;
+
+ offset += sizeof(query_7_8.data);
+ }
+
+ /* query 9 */
+ if (query_0_5.has_query_9) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + offset,
+ query_9.data,
+ sizeof(query_9.data));
+ if (retval < 0)
+ return retval;
+
+ offset += sizeof(query_9.data);
+ }
+
+ /* query 10 */
+ if (query_0_5.has_gestures && query_7_8.has_touch_shapes)
+ offset += 1;
+
+ /* query 11 */
+ if (query_0_5.has_query_11)
+ offset += 1;
+
+ /* query 12 */
+ if (query_0_5.has_query_12) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + offset,
+ query_12.data,
+ sizeof(query_12.data));
+ if (retval < 0)
+ return retval;
+
+ offset += sizeof(query_12.data);
+ }
+
+ /* query 13 */
+ if (query_0_5.has_jitter_filter)
+ offset += 1;
+
+ /* query 14 */
+ if (query_0_5.has_query_12 && query_12.has_general_information_2)
+ offset += 1;
+
+ /* queries 15 16 17 18 19 20 21 22 23 24 25 26*/
+ if (query_0_5.has_query_12 && query_12.has_physical_properties)
+ offset += 12;
+
+ /* query 27 */
+ if (query_0_5.has_query_27) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + offset,
+ query_27.data,
+ sizeof(query_27.data));
+ if (retval < 0)
+ return retval;
+
+ rmi4_data->f11_wakeup_gesture = query_27.has_wakeup_gesture;
+ }
+
+ if (!rmi4_data->f11_wakeup_gesture)
+ return retval;
+
+ /* data 0 */
+ fingers_supported = fhandler->num_of_data_points;
+ offset = (fingers_supported + 3) / 4;
+
+ /* data 1 2 3 4 5 */
+ offset += 5 * fingers_supported;
+
+ /* data 6 7 */
+ if (query_0_5.has_rel)
+ offset += 2 * fingers_supported;
+
+ /* data 8 */
+ if (query_0_5.has_gestures && query_7_8.data[0])
+ offset += 1;
+
+ /* data 9 */
+ if (query_0_5.has_gestures && (query_7_8.data[0] || query_7_8.data[1]))
+ offset += 1;
+
+ /* data 10 */
+ if (query_0_5.has_gestures &&
+ (query_7_8.has_pinch || query_7_8.has_flick))
+ offset += 1;
+
+ /* data 11 12 */
+ if (query_0_5.has_gestures &&
+ (query_7_8.has_flick || query_7_8.has_rotate))
+ offset += 2;
+
+ /* data 13 */
+ if (query_0_5.has_gestures && query_7_8.has_touch_shapes)
+ offset += (fingers_supported + 3) / 4;
+
+ /* data 14 15 */
+ if (query_0_5.has_gestures &&
+ (query_7_8.has_scroll_zones ||
+ query_7_8.has_multi_finger_scroll ||
+ query_7_8.has_chiral_scroll))
+ offset += 2;
+
+ /* data 16 17 */
+ if (query_0_5.has_gestures &&
+ (query_7_8.has_scroll_zones &&
+ query_7_8.individual_scroll_zones))
+ offset += 2;
+
+ /* data 18 19 20 21 22 23 24 25 26 27 */
+ if (query_0_5.has_query_9 && query_9.has_contact_geometry)
+ offset += 10 * fingers_supported;
+
+ /* data 28 */
+ if (query_0_5.has_bending_correction ||
+ query_0_5.has_large_object_suppression)
+ offset += 1;
+
+ /* data 29 30 31 */
+ if (query_0_5.has_query_9 && query_9.has_pen_hover_discrimination)
+ offset += 3;
+
+ /* data 32 */
+ if (query_0_5.has_query_12 &&
+ query_12.has_small_object_detection_tuning)
+ offset += 1;
+
+ /* data 33 34 */
+ if (query_0_5.has_query_27 && query_27.f11_query27_b0)
+ offset += 2;
+
+ /* data 35 */
+ if (query_0_5.has_query_12 && query_12.has_8bit_w)
+ offset += fingers_supported;
+
+ /* data 36 */
+ if (query_0_5.has_bending_correction)
+ offset += 1;
+
+ /* data 37 */
+ if (query_0_5.has_query_27 && query_27.has_data_37)
+ offset += 1;
+
+ /* data 38 */
+ if (query_0_5.has_query_27 && query_27.has_wakeup_gesture)
+ extra_data->data38_offset = offset;
+
+ return retval;
+}
+
+static int synaptics_rmi4_f12_set_enables(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short ctrl28)
+{
+ int retval;
+ static unsigned short ctrl_28_address;
+
+ if (ctrl28)
+ ctrl_28_address = ctrl28;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ ctrl_28_address,
+ &rmi4_data->report_enable,
+ sizeof(rmi4_data->report_enable));
+ if (retval < 0)
+ return retval;
+
+ return retval;
+}
+
+static int synaptics_rmi4_f12_find_sub(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler,
+ unsigned char *presence, unsigned char presence_size,
+ unsigned char structure_offset, unsigned char reg,
+ unsigned char sub)
+{
+ int retval;
+ unsigned char cnt;
+ unsigned char regnum;
+ unsigned char bitnum;
+ unsigned char p_index;
+ unsigned char s_index;
+ unsigned char offset;
+ unsigned char max_reg;
+ unsigned char *structure;
+
+ max_reg = (presence_size - 1) * 8 - 1;
+
+ if (reg > max_reg) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Register number (%d) over limit\n",
+ __func__, reg);
+ return -EINVAL;
+ }
+
+ p_index = reg / 8 + 1;
+ bitnum = reg % 8;
+ if ((presence[p_index] & (1 << bitnum)) == 0x00) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Register %d is not present\n",
+ __func__, reg);
+ return -EINVAL;
+ }
+
+ structure = kmalloc(presence[0], GFP_KERNEL);
+ if (!structure) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for structure register\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + structure_offset,
+ structure,
+ presence[0]);
+ if (retval < 0)
+ goto exit;
+
+ s_index = 0;
+
+ for (regnum = 0; regnum < reg; regnum++) {
+ p_index = regnum / 8 + 1;
+ bitnum = regnum % 8;
+ if ((presence[p_index] & (1 << bitnum)) == 0x00)
+ continue;
+
+ if (structure[s_index] == 0x00)
+ s_index += 3;
+ else
+ s_index++;
+
+ while (structure[s_index] & ~MASK_7BIT)
+ s_index++;
+
+ s_index++;
+ }
+
+ cnt = 0;
+ s_index++;
+ offset = sub / 7;
+ bitnum = sub % 7;
+
+ do {
+ if (cnt == offset) {
+ if (structure[s_index + cnt] & (1 << bitnum))
+ retval = 1;
+ else
+ retval = 0;
+ goto exit;
+ }
+ cnt++;
+ } while (structure[s_index + cnt - 1] & ~MASK_7BIT);
+
+ retval = 0;
+
+exit:
+ kfree(structure);
+
+ return retval;
+}
+
+static int synaptics_rmi4_f12_init(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count)
+{
+ int retval = 0;
+ int temp;
+ unsigned char subpacket;
+ unsigned char ctrl_23_size;
+ unsigned char size_of_2d_data;
+ unsigned char size_of_query5;
+ unsigned char size_of_query8;
+ unsigned char ctrl_8_offset;
+ unsigned char ctrl_20_offset;
+ unsigned char ctrl_23_offset;
+ unsigned char ctrl_28_offset;
+ unsigned char ctrl_31_offset;
+ unsigned char ctrl_58_offset;
+ unsigned char num_of_fingers;
+ struct synaptics_rmi4_f12_extra_data *extra_data;
+ struct synaptics_rmi4_f12_query_5 *query_5 = NULL;
+ struct synaptics_rmi4_f12_query_8 *query_8 = NULL;
+ struct synaptics_rmi4_f12_ctrl_8 *ctrl_8 = NULL;
+ struct synaptics_rmi4_f12_ctrl_23 *ctrl_23 = NULL;
+ struct synaptics_rmi4_f12_ctrl_31 *ctrl_31 = NULL;
+ struct synaptics_rmi4_f12_ctrl_58 *ctrl_58 = NULL;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ fhandler->fn_number = fd->fn_number;
+ fhandler->num_of_data_sources = fd->intr_src_count;
+ fhandler->extra = kmalloc(sizeof(*extra_data), GFP_KERNEL);
+ if (!fhandler->extra) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fhandler->extra\n",
+ __func__);
+ return -ENOMEM;
+ }
+ extra_data = (struct synaptics_rmi4_f12_extra_data *)fhandler->extra;
+ size_of_2d_data = sizeof(struct synaptics_rmi4_f12_finger_data);
+
+ query_5 = kzalloc(sizeof(*query_5), GFP_KERNEL);
+ if (!query_5) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query_5\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ query_8 = kzalloc(sizeof(*query_8), GFP_KERNEL);
+ if (!query_8) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query_8\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ ctrl_8 = kzalloc(sizeof(*ctrl_8), GFP_KERNEL);
+ if (!ctrl_8) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for ctrl_8\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ ctrl_23 = kzalloc(sizeof(*ctrl_23), GFP_KERNEL);
+ if (!ctrl_23) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for ctrl_23\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ ctrl_31 = kzalloc(sizeof(*ctrl_31), GFP_KERNEL);
+ if (!ctrl_31) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for ctrl_31\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ ctrl_58 = kzalloc(sizeof(*ctrl_58), GFP_KERNEL);
+ if (!ctrl_58) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for ctrl_58\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + 4,
+ &size_of_query5,
+ sizeof(size_of_query5));
+ if (retval < 0)
+ goto exit;
+
+ if (size_of_query5 > sizeof(query_5->data))
+ size_of_query5 = sizeof(query_5->data);
+ memset(query_5->data, 0x00, sizeof(query_5->data));
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + 5,
+ query_5->data,
+ size_of_query5);
+ if (retval < 0)
+ goto exit;
+
+ ctrl_8_offset = query_5->ctrl0_is_present +
+ query_5->ctrl1_is_present +
+ query_5->ctrl2_is_present +
+ query_5->ctrl3_is_present +
+ query_5->ctrl4_is_present +
+ query_5->ctrl5_is_present +
+ query_5->ctrl6_is_present +
+ query_5->ctrl7_is_present;
+
+ ctrl_20_offset = ctrl_8_offset +
+ query_5->ctrl8_is_present +
+ query_5->ctrl9_is_present +
+ query_5->ctrl10_is_present +
+ query_5->ctrl11_is_present +
+ query_5->ctrl12_is_present +
+ query_5->ctrl13_is_present +
+ query_5->ctrl14_is_present +
+ query_5->ctrl15_is_present +
+ query_5->ctrl16_is_present +
+ query_5->ctrl17_is_present +
+ query_5->ctrl18_is_present +
+ query_5->ctrl19_is_present;
+
+ ctrl_23_offset = ctrl_20_offset +
+ query_5->ctrl20_is_present +
+ query_5->ctrl21_is_present +
+ query_5->ctrl22_is_present;
+
+ ctrl_28_offset = ctrl_23_offset +
+ query_5->ctrl23_is_present +
+ query_5->ctrl24_is_present +
+ query_5->ctrl25_is_present +
+ query_5->ctrl26_is_present +
+ query_5->ctrl27_is_present;
+
+ ctrl_31_offset = ctrl_28_offset +
+ query_5->ctrl28_is_present +
+ query_5->ctrl29_is_present +
+ query_5->ctrl30_is_present;
+
+ ctrl_58_offset = ctrl_31_offset +
+ query_5->ctrl31_is_present +
+ query_5->ctrl32_is_present +
+ query_5->ctrl33_is_present +
+ query_5->ctrl34_is_present +
+ query_5->ctrl35_is_present +
+ query_5->ctrl36_is_present +
+ query_5->ctrl37_is_present +
+ query_5->ctrl38_is_present +
+ query_5->ctrl39_is_present +
+ query_5->ctrl40_is_present +
+ query_5->ctrl41_is_present +
+ query_5->ctrl42_is_present +
+ query_5->ctrl43_is_present +
+ query_5->ctrl44_is_present +
+ query_5->ctrl45_is_present +
+ query_5->ctrl46_is_present +
+ query_5->ctrl47_is_present +
+ query_5->ctrl48_is_present +
+ query_5->ctrl49_is_present +
+ query_5->ctrl50_is_present +
+ query_5->ctrl51_is_present +
+ query_5->ctrl52_is_present +
+ query_5->ctrl53_is_present +
+ query_5->ctrl54_is_present +
+ query_5->ctrl55_is_present +
+ query_5->ctrl56_is_present +
+ query_5->ctrl57_is_present;
+
+ ctrl_23_size = 2;
+ for (subpacket = 2; subpacket <= 4; subpacket++) {
+ retval = synaptics_rmi4_f12_find_sub(rmi4_data,
+ fhandler, query_5->data, sizeof(query_5->data),
+ 6, 23, subpacket);
+ if (retval == 1)
+ ctrl_23_size++;
+ else if (retval < 0)
+ goto exit;
+
+ }
+
+ retval = synaptics_rmi4_f12_find_sub(rmi4_data,
+ fhandler, query_5->data, sizeof(query_5->data),
+ 6, 20, 0);
+ if (retval == 1)
+ rmi4_data->set_wakeup_gesture = 2;
+ else if (retval == 0)
+ rmi4_data->set_wakeup_gesture = 0;
+ else if (retval < 0)
+ goto exit;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + ctrl_23_offset,
+ ctrl_23->data,
+ ctrl_23_size);
+ if (retval < 0)
+ goto exit;
+
+ /* Maximum number of fingers supported */
+ fhandler->num_of_data_points = min_t(unsigned char,
+ ctrl_23->max_reported_objects,
+ (unsigned char)F12_FINGERS_TO_SUPPORT);
+
+ num_of_fingers = fhandler->num_of_data_points;
+ rmi4_data->num_of_fingers = num_of_fingers;
+
+ rmi4_data->stylus_enable = ctrl_23->stylus_enable;
+ rmi4_data->eraser_enable = ctrl_23->eraser_enable;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + 7,
+ &size_of_query8,
+ sizeof(size_of_query8));
+ if (retval < 0)
+ goto exit;
+
+ if (size_of_query8 > sizeof(query_8->data))
+ size_of_query8 = sizeof(query_8->data);
+ memset(query_8->data, 0x00, sizeof(query_8->data));
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + 8,
+ query_8->data,
+ size_of_query8);
+ if (retval < 0)
+ goto exit;
+
+ /* Determine the presence of the Data0 register */
+ extra_data->data1_offset = query_8->data0_is_present;
+
+ if ((size_of_query8 >= 3) && (query_8->data15_is_present)) {
+ extra_data->data15_offset = query_8->data0_is_present +
+ query_8->data1_is_present +
+ query_8->data2_is_present +
+ query_8->data3_is_present +
+ query_8->data4_is_present +
+ query_8->data5_is_present +
+ query_8->data6_is_present +
+ query_8->data7_is_present +
+ query_8->data8_is_present +
+ query_8->data9_is_present +
+ query_8->data10_is_present +
+ query_8->data11_is_present +
+ query_8->data12_is_present +
+ query_8->data13_is_present +
+ query_8->data14_is_present;
+ extra_data->data15_size = (num_of_fingers + 7) / 8;
+ } else {
+ extra_data->data15_size = 0;
+ }
+
+#ifdef REPORT_2D_PRESSURE
+ if ((size_of_query8 >= 5) && (query_8->data29_is_present)) {
+ extra_data->data29_offset = query_8->data0_is_present +
+ query_8->data1_is_present +
+ query_8->data2_is_present +
+ query_8->data3_is_present +
+ query_8->data4_is_present +
+ query_8->data5_is_present +
+ query_8->data6_is_present +
+ query_8->data7_is_present +
+ query_8->data8_is_present +
+ query_8->data9_is_present +
+ query_8->data10_is_present +
+ query_8->data11_is_present +
+ query_8->data12_is_present +
+ query_8->data13_is_present +
+ query_8->data14_is_present +
+ query_8->data15_is_present +
+ query_8->data16_is_present +
+ query_8->data17_is_present +
+ query_8->data18_is_present +
+ query_8->data19_is_present +
+ query_8->data20_is_present +
+ query_8->data21_is_present +
+ query_8->data22_is_present +
+ query_8->data23_is_present +
+ query_8->data24_is_present +
+ query_8->data25_is_present +
+ query_8->data26_is_present +
+ query_8->data27_is_present +
+ query_8->data28_is_present;
+ extra_data->data29_size = 0;
+ for (subpacket = 0; subpacket <= num_of_fingers; subpacket++) {
+ retval = synaptics_rmi4_f12_find_sub(rmi4_data,
+ fhandler, query_8->data,
+ sizeof(query_8->data),
+ 9, 29, subpacket);
+ if (retval == 1)
+ extra_data->data29_size += 2;
+ else if (retval < 0)
+ goto exit;
+ }
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + ctrl_58_offset,
+ ctrl_58->data,
+ sizeof(ctrl_58->data));
+ if (retval < 0)
+ goto exit;
+ rmi4_data->force_min =
+ (int)(ctrl_58->min_force_lsb << 0) |
+ (int)(ctrl_58->min_force_msb << 8);
+ rmi4_data->force_max =
+ (int)(ctrl_58->max_force_lsb << 0) |
+ (int)(ctrl_58->max_force_msb << 8);
+ rmi4_data->report_pressure = true;
+ } else {
+ extra_data->data29_size = 0;
+ rmi4_data->report_pressure = false;
+ }
+#endif
+
+ rmi4_data->report_enable = RPT_DEFAULT;
+#ifdef REPORT_2D_Z
+ rmi4_data->report_enable |= RPT_Z;
+#endif
+#ifdef REPORT_2D_W
+ rmi4_data->report_enable |= (RPT_WX | RPT_WY);
+#endif
+
+ retval = synaptics_rmi4_f12_set_enables(rmi4_data,
+ fhandler->full_addr.ctrl_base + ctrl_28_offset);
+ if (retval < 0)
+ goto exit;
+
+ if (query_5->ctrl8_is_present) {
+ rmi4_data->wedge_sensor = false;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + ctrl_8_offset,
+ ctrl_8->data,
+ sizeof(ctrl_8->data));
+ if (retval < 0)
+ goto exit;
+
+ /* Maximum x and y */
+ rmi4_data->sensor_max_x =
+ ((unsigned int)ctrl_8->max_x_coord_lsb << 0) |
+ ((unsigned int)ctrl_8->max_x_coord_msb << 8);
+ rmi4_data->sensor_max_y =
+ ((unsigned int)ctrl_8->max_y_coord_lsb << 0) |
+ ((unsigned int)ctrl_8->max_y_coord_msb << 8);
+
+ rmi4_data->max_touch_width = MAX_F12_TOUCH_WIDTH;
+ } else {
+ rmi4_data->wedge_sensor = true;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + ctrl_31_offset,
+ ctrl_31->data,
+ sizeof(ctrl_31->data));
+ if (retval < 0)
+ goto exit;
+
+ /* Maximum x and y */
+ rmi4_data->sensor_max_x =
+ ((unsigned int)ctrl_31->max_x_coord_lsb << 0) |
+ ((unsigned int)ctrl_31->max_x_coord_msb << 8);
+ rmi4_data->sensor_max_y =
+ ((unsigned int)ctrl_31->max_y_coord_lsb << 0) |
+ ((unsigned int)ctrl_31->max_y_coord_msb << 8);
+
+ rmi4_data->max_touch_width = MAX_F12_TOUCH_WIDTH;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Function %02x max x = %d max y = %d\n",
+ __func__, fhandler->fn_number,
+ rmi4_data->sensor_max_x,
+ rmi4_data->sensor_max_y);
+
+ if (bdata->swap_axes) {
+ temp = rmi4_data->sensor_max_x;
+ rmi4_data->sensor_max_x = rmi4_data->sensor_max_y;
+ rmi4_data->sensor_max_y = temp;
+ }
+
+ rmi4_data->f12_wakeup_gesture = query_5->ctrl27_is_present;
+ if (rmi4_data->f12_wakeup_gesture) {
+ extra_data->ctrl20_offset = ctrl_20_offset;
+ extra_data->data4_offset = query_8->data0_is_present +
+ query_8->data1_is_present +
+ query_8->data2_is_present +
+ query_8->data3_is_present;
+ }
+
+ synaptics_rmi4_set_intr_mask(fhandler, fd, intr_count);
+
+ /* Allocate memory for finger data storage space */
+ fhandler->data_size = num_of_fingers * size_of_2d_data;
+ fhandler->data = kmalloc(fhandler->data_size, GFP_KERNEL);
+ if (!fhandler->data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fhandler->data\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+exit:
+ kfree(query_5);
+ kfree(query_8);
+ kfree(ctrl_8);
+ kfree(ctrl_23);
+ kfree(ctrl_31);
+ kfree(ctrl_58);
+
+ return retval;
+}
+
+static int synaptics_rmi4_f1a_alloc_mem(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ int retval;
+ struct synaptics_rmi4_f1a_handle *f1a;
+
+ f1a = kzalloc(sizeof(*f1a), GFP_KERNEL);
+ if (!f1a) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for function handle\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ fhandler->data = (void *)f1a;
+ fhandler->extra = NULL;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base,
+ f1a->button_query.data,
+ sizeof(f1a->button_query.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read query registers\n",
+ __func__);
+ return retval;
+ }
+
+ f1a->max_count = f1a->button_query.max_button_count + 1;
+
+ f1a->button_control.txrx_map = kzalloc(f1a->max_count * 2, GFP_KERNEL);
+ if (!f1a->button_control.txrx_map) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for tx rx mapping\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ f1a->button_bitmask_size = (f1a->max_count + 7) / 8;
+
+ f1a->button_data_buffer = kcalloc(f1a->button_bitmask_size,
+ sizeof(*(f1a->button_data_buffer)), GFP_KERNEL);
+ if (!f1a->button_data_buffer) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for data buffer\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ f1a->button_map = kcalloc(f1a->max_count,
+ sizeof(*(f1a->button_map)), GFP_KERNEL);
+ if (!f1a->button_map) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_f1a_button_map(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char offset = 0;
+ struct synaptics_rmi4_f1a_query_4 query_4;
+ struct synaptics_rmi4_f1a_handle *f1a = fhandler->data;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ rmi4_data->valid_button_count = f1a->valid_button_count;
+
+ offset = f1a->button_query.has_general_control +
+ f1a->button_query.has_interrupt_enable +
+ f1a->button_query.has_multibutton_select;
+
+ if (f1a->button_query.has_tx_rx_map) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.ctrl_base + offset,
+ f1a->button_control.txrx_map,
+ f1a->max_count * 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read tx rx mapping\n",
+ __func__);
+ return retval;
+ }
+
+ rmi4_data->button_txrx_mapping = f1a->button_control.txrx_map;
+ }
+
+ if (f1a->button_query.has_query4) {
+ offset = 2 + f1a->button_query.has_query2 +
+ f1a->button_query.has_query3;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fhandler->full_addr.query_base + offset,
+ query_4.data,
+ sizeof(query_4.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read button features 4\n",
+ __func__);
+ return retval;
+ }
+
+ if (query_4.has_ctrl24)
+ rmi4_data->external_afe_buttons = true;
+ else
+ rmi4_data->external_afe_buttons = false;
+ }
+
+ if (!bdata->cap_button_map) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: cap_button_map is NULL in board file\n",
+ __func__);
+ return -ENODEV;
+ } else if (!bdata->cap_button_map->map) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Button map is missing in board file\n",
+ __func__);
+ return -ENODEV;
+ } else {
+ if (bdata->cap_button_map->nbuttons != f1a->max_count) {
+ f1a->valid_button_count = min(f1a->max_count,
+ bdata->cap_button_map->nbuttons);
+ } else {
+ f1a->valid_button_count = f1a->max_count;
+ }
+
+ for (ii = 0; ii < f1a->valid_button_count; ii++)
+ f1a->button_map[ii] = bdata->cap_button_map->map[ii];
+
+ rmi4_data->valid_button_count = f1a->valid_button_count;
+ }
+
+ return 0;
+}
+
+static void synaptics_rmi4_f1a_kfree(struct synaptics_rmi4_fn *fhandler)
+{
+ struct synaptics_rmi4_f1a_handle *f1a = fhandler->data;
+
+ if (f1a) {
+ kfree(f1a->button_control.txrx_map);
+ kfree(f1a->button_data_buffer);
+ kfree(f1a->button_map);
+ kfree(f1a);
+ fhandler->data = NULL;
+ }
+}
+
+static int synaptics_rmi4_f1a_init(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count)
+{
+ int retval;
+
+ fhandler->fn_number = fd->fn_number;
+ fhandler->num_of_data_sources = fd->intr_src_count;
+
+ synaptics_rmi4_set_intr_mask(fhandler, fd, intr_count);
+
+ retval = synaptics_rmi4_f1a_alloc_mem(rmi4_data, fhandler);
+ if (retval < 0)
+ goto error_exit;
+
+ retval = synaptics_rmi4_f1a_button_map(rmi4_data, fhandler);
+ if (retval < 0)
+ goto error_exit;
+
+ rmi4_data->button_0d_enabled = 1;
+
+ return 0;
+
+error_exit:
+ synaptics_rmi4_f1a_kfree(fhandler);
+
+ return retval;
+}
+
+static void synaptics_rmi4_empty_fn_list(struct synaptics_rmi4_data *rmi4_data)
+{
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_fn *fhandler_temp;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry_safe(fhandler,
+ fhandler_temp,
+ &rmi->support_fn_list,
+ link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F1A) {
+ synaptics_rmi4_f1a_kfree(fhandler);
+ } else {
+ kfree(fhandler->extra);
+ kfree(fhandler->data);
+ }
+ list_del(&fhandler->link);
+ kfree(fhandler);
+ }
+ }
+ INIT_LIST_HEAD(&rmi->support_fn_list);
+}
+
+static int synaptics_rmi4_check_status(struct synaptics_rmi4_data *rmi4_data,
+ bool *was_in_bl_mode)
+{
+ int retval;
+ int timeout = CHECK_STATUS_TIMEOUT_MS;
+ struct synaptics_rmi4_f01_device_status status;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr,
+ status.data,
+ sizeof(status.data));
+ if (retval < 0)
+ return retval;
+
+ while (status.status_code == STATUS_CRC_IN_PROGRESS) {
+ if (timeout > 0)
+ msleep(20);
+ else
+ return -EINVAL;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr,
+ status.data,
+ sizeof(status.data));
+ if (retval < 0)
+ return retval;
+
+ timeout -= 20;
+ }
+
+ if (timeout != CHECK_STATUS_TIMEOUT_MS)
+ *was_in_bl_mode = true;
+
+ if (status.flash_prog == 1) {
+ rmi4_data->flash_prog_mode = true;
+ pr_notice("%s: In flash prog mode, status = 0x%02x\n",
+ __func__,
+ status.status_code);
+ } else {
+ rmi4_data->flash_prog_mode = false;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_set_configured(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char device_ctrl;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set configured\n",
+ __func__);
+ return retval;
+ }
+
+ rmi4_data->no_sleep_setting = device_ctrl & NO_SLEEP_ON;
+ device_ctrl |= CONFIGURED;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set configured\n",
+ __func__);
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_alloc_fh(struct synaptics_rmi4_fn **fhandler,
+ struct synaptics_rmi4_fn_desc *rmi_fd, int page_number)
+{
+ *fhandler = kzalloc(sizeof(**fhandler), GFP_KERNEL);
+ if (!(*fhandler))
+ return -ENOMEM;
+
+ (*fhandler)->full_addr.data_base =
+ (rmi_fd->data_base_addr |
+ (page_number << 8));
+ (*fhandler)->full_addr.ctrl_base =
+ (rmi_fd->ctrl_base_addr |
+ (page_number << 8));
+ (*fhandler)->full_addr.cmd_base =
+ (rmi_fd->cmd_base_addr |
+ (page_number << 8));
+ (*fhandler)->full_addr.query_base =
+ (rmi_fd->query_base_addr |
+ (page_number << 8));
+
+ return 0;
+}
+
+static int synaptics_rmi4_query_device(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char page_number;
+ unsigned char intr_count;
+ unsigned char *f01_query;
+ unsigned short pdt_entry_addr;
+ bool f01found;
+ bool f35found;
+ bool was_in_bl_mode;
+ struct synaptics_rmi4_fn_desc rmi_fd;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+rescan_pdt:
+ f01found = false;
+ f35found = false;
+ was_in_bl_mode = false;
+ intr_count = 0;
+ INIT_LIST_HEAD(&rmi->support_fn_list);
+
+ /* Scan the page description tables of the pages to service */
+ for (page_number = 0; page_number < PAGES_TO_SERVICE; page_number++) {
+ for (pdt_entry_addr = PDT_START; pdt_entry_addr > PDT_END;
+ pdt_entry_addr -= PDT_ENTRY_SIZE) {
+ pdt_entry_addr |= (page_number << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ pdt_entry_addr,
+ (unsigned char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (retval < 0)
+ return retval;
+
+ pdt_entry_addr &= ~(MASK_8BIT << 8);
+
+ fhandler = NULL;
+
+ if (rmi_fd.fn_number == 0) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Reached end of PDT\n",
+ __func__);
+ break;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: F%02x found (page %d)\n",
+ __func__, rmi_fd.fn_number,
+ page_number);
+
+ switch (rmi_fd.fn_number) {
+ case SYNAPTICS_RMI4_F01:
+ if (rmi_fd.intr_src_count == 0)
+ break;
+
+ f01found = true;
+
+ retval = synaptics_rmi4_alloc_fh(&fhandler,
+ &rmi_fd, page_number);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc for F%d\n",
+ __func__,
+ rmi_fd.fn_number);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_f01_init(rmi4_data,
+ fhandler, &rmi_fd, intr_count);
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_check_status(rmi4_data,
+ &was_in_bl_mode);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to check status\n",
+ __func__);
+ return retval;
+ }
+
+ if (was_in_bl_mode) {
+ kfree(fhandler);
+ fhandler = NULL;
+ goto rescan_pdt;
+ }
+
+ if (rmi4_data->flash_prog_mode)
+ goto flash_prog_mode;
+
+ break;
+ case SYNAPTICS_RMI4_F11:
+ if (rmi_fd.intr_src_count == 0)
+ break;
+
+ retval = synaptics_rmi4_alloc_fh(&fhandler,
+ &rmi_fd, page_number);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc for F%d\n",
+ __func__,
+ rmi_fd.fn_number);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_f11_init(rmi4_data,
+ fhandler, &rmi_fd, intr_count);
+ if (retval < 0)
+ return retval;
+ break;
+ case SYNAPTICS_RMI4_F12:
+ if (rmi_fd.intr_src_count == 0)
+ break;
+
+ retval = synaptics_rmi4_alloc_fh(&fhandler,
+ &rmi_fd, page_number);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc for F%d\n",
+ __func__,
+ rmi_fd.fn_number);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_f12_init(rmi4_data,
+ fhandler, &rmi_fd, intr_count);
+ if (retval < 0)
+ return retval;
+ break;
+ case SYNAPTICS_RMI4_F1A:
+ if (rmi_fd.intr_src_count == 0)
+ break;
+
+ retval = synaptics_rmi4_alloc_fh(&fhandler,
+ &rmi_fd, page_number);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc for F%d\n",
+ __func__,
+ rmi_fd.fn_number);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_f1a_init(rmi4_data,
+ fhandler, &rmi_fd, intr_count);
+ if (retval < 0) {
+#ifdef IGNORE_FN_INIT_FAILURE
+ kfree(fhandler);
+ fhandler = NULL;
+#else
+ return retval;
+#endif
+ }
+ break;
+#ifdef USE_DATA_SERVER
+ case SYNAPTICS_RMI4_F21:
+ if (rmi_fd.intr_src_count == 0)
+ break;
+
+ retval = synaptics_rmi4_alloc_fh(&fhandler,
+ &rmi_fd, page_number);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc for F%d\n",
+ __func__,
+ rmi_fd.fn_number);
+ return retval;
+ }
+
+ fhandler->fn_number = rmi_fd.fn_number;
+ fhandler->num_of_data_sources =
+ rmi_fd.intr_src_count;
+
+ synaptics_rmi4_set_intr_mask(fhandler, &rmi_fd,
+ intr_count);
+ break;
+#endif
+ case SYNAPTICS_RMI4_F35:
+ f35found = true;
+ break;
+#ifdef F51_DISCRETE_FORCE
+ case SYNAPTICS_RMI4_F51:
+ rmi4_data->f51_query_base_addr =
+ rmi_fd.query_base_addr |
+ (page_number << 8);
+ break;
+#endif
+ }
+
+ /* Accumulate the interrupt count */
+ intr_count += rmi_fd.intr_src_count;
+
+ if (fhandler && rmi_fd.intr_src_count) {
+ list_add_tail(&fhandler->link,
+ &rmi->support_fn_list);
+ }
+ }
+ }
+
+ if (!f01found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F01\n",
+ __func__);
+ if (!f35found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F35\n",
+ __func__);
+ return -EINVAL;
+ } else {
+ pr_notice("%s: In microbootloader mode\n",
+ __func__);
+ return 0;
+ }
+ }
+
+flash_prog_mode:
+ rmi4_data->num_of_intr_regs = (intr_count + 7) / 8;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Number of interrupt registers = %d\n",
+ __func__, rmi4_data->num_of_intr_regs);
+
+ f01_query = kmalloc(F01_STD_QUERY_LEN, GFP_KERNEL);
+ if (!f01_query) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for f01_query\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_query_base_addr,
+ f01_query,
+ F01_STD_QUERY_LEN);
+ if (retval < 0) {
+ kfree(f01_query);
+ return retval;
+ }
+
+ /* RMI Version 4.0 currently supported */
+ rmi->version_major = 4;
+ rmi->version_minor = 0;
+
+ rmi->manufacturer_id = f01_query[0];
+ rmi->product_props = f01_query[1];
+ rmi->product_info[0] = f01_query[2];
+ rmi->product_info[1] = f01_query[3];
+ retval = secure_memcpy(rmi->product_id_string,
+ sizeof(rmi->product_id_string),
+ &f01_query[11],
+ F01_STD_QUERY_LEN - 11,
+ PRODUCT_ID_SIZE);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy product ID string\n",
+ __func__);
+ }
+
+ kfree(f01_query);
+
+ if (rmi->manufacturer_id != 1) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Non-Synaptics device found, manufacturer ID = %d\n",
+ __func__, rmi->manufacturer_id);
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_query_base_addr + F01_BUID_ID_OFFSET,
+ rmi->build_id,
+ sizeof(rmi->build_id));
+ if (retval < 0)
+ return retval;
+
+ rmi4_data->firmware_id = (unsigned int)rmi->build_id[0] +
+ (unsigned int)rmi->build_id[1] * 0x100 +
+ (unsigned int)rmi->build_id[2] * 0x10000;
+
+ memset(rmi4_data->intr_mask, 0x00, sizeof(rmi4_data->intr_mask));
+
+ /*
+ * Map out the interrupt bit masks for the interrupt sources
+ * from the registered function handlers.
+ */
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->num_of_data_sources) {
+ rmi4_data->intr_mask[fhandler->intr_reg_num] |=
+ fhandler->intr_mask;
+ }
+ }
+ }
+
+ if (rmi4_data->f11_wakeup_gesture || rmi4_data->f12_wakeup_gesture)
+ rmi4_data->enable_wakeup_gesture = WAKEUP_GESTURE;
+ else
+ rmi4_data->enable_wakeup_gesture = false;
+
+ synaptics_rmi4_set_configured(rmi4_data);
+
+ return 0;
+}
+
+static int synaptics_rmi4_gpio_setup(int gpio, bool config, int dir, int state)
+{
+ int retval = 0;
+ unsigned char buf[16];
+
+ if (config) {
+ snprintf(buf, PAGE_SIZE, "dsx_gpio_%u\n", gpio);
+
+ retval = gpio_request(gpio, buf);
+ if (retval) {
+ pr_err("%s: Failed to get gpio %d (code: %d)",
+ __func__, gpio, retval);
+ return retval;
+ }
+
+ if (dir == 0)
+ retval = gpio_direction_input(gpio);
+ else
+ retval = gpio_direction_output(gpio, state);
+ if (retval) {
+ pr_err("%s: Failed to set gpio %d direction",
+ __func__, gpio);
+ return retval;
+ }
+ } else {
+ gpio_free(gpio);
+ }
+
+ return retval;
+}
+
+static void synaptics_rmi4_set_params(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char ii;
+ struct synaptics_rmi4_f1a_handle *f1a;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_POSITION_X, 0,
+ rmi4_data->sensor_max_x, 0, 0);
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_POSITION_Y, 0,
+ rmi4_data->sensor_max_y, 0, 0);
+#ifdef REPORT_2D_W
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MAJOR, 0,
+ rmi4_data->max_touch_width, 0, 0);
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_TOUCH_MINOR, 0,
+ rmi4_data->max_touch_width, 0, 0);
+#endif
+
+ rmi4_data->input_settings.sensor_max_x = rmi4_data->sensor_max_x;
+ rmi4_data->input_settings.sensor_max_y = rmi4_data->sensor_max_y;
+ rmi4_data->input_settings.max_touch_width = rmi4_data->max_touch_width;
+
+#ifdef REPORT_2D_PRESSURE
+ if (rmi4_data->report_pressure) {
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_PRESSURE, rmi4_data->force_min,
+ rmi4_data->force_max, 0, 0);
+
+ rmi4_data->input_settings.force_min = rmi4_data->force_min;
+ rmi4_data->input_settings.force_max = rmi4_data->force_max;
+ }
+#elif defined(F51_DISCRETE_FORCE)
+ input_set_abs_params(rmi4_data->input_dev,
+ ABS_MT_PRESSURE, 0,
+ FORCE_LEVEL_MAX, 0, 0);
+#endif
+
+#ifdef TYPE_B_PROTOCOL
+#ifdef KERNEL_ABOVE_3_6
+ input_mt_init_slots(rmi4_data->input_dev,
+ rmi4_data->num_of_fingers, INPUT_MT_DIRECT);
+#else
+ input_mt_init_slots(rmi4_data->input_dev,
+ rmi4_data->num_of_fingers);
+#endif
+#endif
+
+ rmi4_data->input_settings.num_of_fingers = rmi4_data->num_of_fingers;
+
+ f1a = NULL;
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F1A)
+ f1a = fhandler->data;
+ }
+ }
+
+ if (f1a) {
+ for (ii = 0; ii < f1a->valid_button_count; ii++) {
+ set_bit(f1a->button_map[ii],
+ rmi4_data->input_dev->keybit);
+ input_set_capability(rmi4_data->input_dev,
+ EV_KEY, f1a->button_map[ii]);
+ }
+
+ rmi4_data->input_settings.valid_button_count =
+ f1a->valid_button_count;
+ }
+
+ if (vir_button_map->nbuttons) {
+ for (ii = 0; ii < vir_button_map->nbuttons; ii++) {
+ set_bit(vir_button_map->map[ii * 5],
+ rmi4_data->input_dev->keybit);
+ input_set_capability(rmi4_data->input_dev,
+ EV_KEY, vir_button_map->map[ii * 5]);
+ }
+ }
+
+ if (rmi4_data->f11_wakeup_gesture || rmi4_data->f12_wakeup_gesture) {
+ set_bit(KEY_WAKEUP, rmi4_data->input_dev->keybit);
+ input_set_capability(rmi4_data->input_dev, EV_KEY, KEY_WAKEUP);
+ }
+}
+
+static int synaptics_rmi4_set_input_dev(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ rmi4_data->input_dev = input_allocate_device();
+ if (rmi4_data->input_dev == NULL) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate input device\n",
+ __func__);
+ retval = -ENOMEM;
+ goto err_input_device;
+ }
+
+ retval = synaptics_rmi4_query_device(rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to query device\n",
+ __func__);
+ goto err_query_device;
+ }
+
+ rmi4_data->input_dev->name = PLATFORM_DRIVER_NAME;
+ rmi4_data->input_dev->phys = INPUT_PHYS_NAME;
+ rmi4_data->input_dev->id.product = SYNAPTICS_DSX_DRIVER_PRODUCT;
+ rmi4_data->input_dev->id.version = SYNAPTICS_DSX_DRIVER_VERSION;
+ rmi4_data->input_dev->dev.parent = rmi4_data->pdev->dev.parent;
+ input_set_drvdata(rmi4_data->input_dev, rmi4_data);
+
+ set_bit(EV_SYN, rmi4_data->input_dev->evbit);
+ set_bit(EV_KEY, rmi4_data->input_dev->evbit);
+ set_bit(EV_ABS, rmi4_data->input_dev->evbit);
+ set_bit(BTN_TOUCH, rmi4_data->input_dev->keybit);
+ set_bit(BTN_TOOL_FINGER, rmi4_data->input_dev->keybit);
+#ifdef INPUT_PROP_DIRECT
+ set_bit(INPUT_PROP_DIRECT, rmi4_data->input_dev->propbit);
+#endif
+
+ if (bdata->max_y_for_2d >= 0)
+ rmi4_data->sensor_max_y = bdata->max_y_for_2d;
+
+ synaptics_rmi4_set_params(rmi4_data);
+
+ retval = input_register_device(rmi4_data->input_dev);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to register input device\n",
+ __func__);
+ goto err_register_input;
+ }
+
+ rmi4_data->input_settings.stylus_enable = rmi4_data->stylus_enable;
+ rmi4_data->input_settings.eraser_enable = rmi4_data->eraser_enable;
+
+ if (!rmi4_data->stylus_enable)
+ return 0;
+
+ rmi4_data->stylus_dev = input_allocate_device();
+ if (rmi4_data->stylus_dev == NULL) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate stylus device\n",
+ __func__);
+ retval = -ENOMEM;
+ goto err_stylus_device;
+ }
+
+ rmi4_data->stylus_dev->name = STYLUS_DRIVER_NAME;
+ rmi4_data->stylus_dev->phys = STYLUS_PHYS_NAME;
+ rmi4_data->stylus_dev->id.product = SYNAPTICS_DSX_DRIVER_PRODUCT;
+ rmi4_data->stylus_dev->id.version = SYNAPTICS_DSX_DRIVER_VERSION;
+ rmi4_data->stylus_dev->dev.parent = rmi4_data->pdev->dev.parent;
+ input_set_drvdata(rmi4_data->stylus_dev, rmi4_data);
+
+ set_bit(EV_KEY, rmi4_data->stylus_dev->evbit);
+ set_bit(EV_ABS, rmi4_data->stylus_dev->evbit);
+ set_bit(BTN_TOUCH, rmi4_data->stylus_dev->keybit);
+ set_bit(BTN_TOOL_PEN, rmi4_data->stylus_dev->keybit);
+ if (rmi4_data->eraser_enable)
+ set_bit(BTN_TOOL_RUBBER, rmi4_data->stylus_dev->keybit);
+#ifdef INPUT_PROP_DIRECT
+ set_bit(INPUT_PROP_DIRECT, rmi4_data->stylus_dev->propbit);
+#endif
+
+ input_set_abs_params(rmi4_data->stylus_dev, ABS_X, 0,
+ rmi4_data->sensor_max_x, 0, 0);
+ input_set_abs_params(rmi4_data->stylus_dev, ABS_Y, 0,
+ rmi4_data->sensor_max_y, 0, 0);
+
+ retval = input_register_device(rmi4_data->stylus_dev);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to register stylus device\n",
+ __func__);
+ goto err_register_stylus;
+ }
+
+ return 0;
+
+err_register_stylus:
+ rmi4_data->stylus_dev = NULL;
+
+err_stylus_device:
+ input_unregister_device(rmi4_data->input_dev);
+ rmi4_data->input_dev = NULL;
+
+err_register_input:
+err_query_device:
+ synaptics_rmi4_empty_fn_list(rmi4_data);
+ input_free_device(rmi4_data->input_dev);
+
+err_input_device:
+ return retval;
+}
+
+static int synaptics_rmi4_set_gpio(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ retval = synaptics_rmi4_gpio_setup(
+ bdata->irq_gpio,
+ true, 0, 0);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to configure attention GPIO\n",
+ __func__);
+ goto err_gpio_irq;
+ }
+
+ if (bdata->power_gpio >= 0) {
+ retval = synaptics_rmi4_gpio_setup(
+ bdata->power_gpio,
+ true, 1, !bdata->power_on_state);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to configure power GPIO\n",
+ __func__);
+ goto err_gpio_power;
+ }
+ }
+
+ if (bdata->reset_gpio >= 0) {
+ retval = synaptics_rmi4_gpio_setup(
+ bdata->reset_gpio,
+ true, 1, !bdata->reset_on_state);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to configure reset GPIO\n",
+ __func__);
+ goto err_gpio_reset;
+ }
+ }
+
+ if (bdata->power_gpio >= 0) {
+ gpio_set_value(bdata->power_gpio, bdata->power_on_state);
+ msleep(bdata->power_delay_ms);
+ }
+
+ if (bdata->reset_gpio >= 0) {
+ gpio_set_value(bdata->reset_gpio, bdata->reset_on_state);
+ msleep(bdata->reset_active_ms);
+ gpio_set_value(bdata->reset_gpio, !bdata->reset_on_state);
+ msleep(bdata->reset_delay_ms);
+ }
+
+ return 0;
+
+err_gpio_reset:
+ if (bdata->power_gpio >= 0)
+ synaptics_rmi4_gpio_setup(bdata->power_gpio, false, 0, 0);
+
+err_gpio_power:
+ synaptics_rmi4_gpio_setup(bdata->irq_gpio, false, 0, 0);
+
+err_gpio_irq:
+ return retval;
+}
+
+static int synaptics_dsx_pinctrl_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+
+ /* Get pinctrl if target uses pinctrl */
+ rmi4_data->ts_pinctrl = devm_pinctrl_get((rmi4_data->pdev->dev.parent));
+ if (IS_ERR_OR_NULL(rmi4_data->ts_pinctrl)) {
+ retval = PTR_ERR(rmi4_data->ts_pinctrl);
+ dev_err(rmi4_data->pdev->dev.parent,
+ "Target does not use pinctrl %d\n", retval);
+ goto err_pinctrl_get;
+ }
+
+ rmi4_data->pinctrl_state_active
+ = pinctrl_lookup_state(rmi4_data->ts_pinctrl, "pmx_ts_active");
+ if (IS_ERR_OR_NULL(rmi4_data->pinctrl_state_active)) {
+ retval = PTR_ERR(rmi4_data->pinctrl_state_active);
+ dev_err(rmi4_data->pdev->dev.parent,
+ "Can not lookup %s pinstate %d\n",
+ PINCTRL_STATE_ACTIVE, retval);
+ goto err_pinctrl_lookup;
+ }
+
+ rmi4_data->pinctrl_state_suspend
+ = pinctrl_lookup_state(rmi4_data->ts_pinctrl, "pmx_ts_suspend");
+ if (IS_ERR_OR_NULL(rmi4_data->pinctrl_state_suspend)) {
+ retval = PTR_ERR(rmi4_data->pinctrl_state_suspend);
+ dev_err(rmi4_data->pdev->dev.parent,
+ "Can not lookup %s pinstate %d\n",
+ PINCTRL_STATE_SUSPEND, retval);
+ goto err_pinctrl_lookup;
+ }
+
+ rmi4_data->pinctrl_state_release
+ = pinctrl_lookup_state(rmi4_data->ts_pinctrl, "pmx_ts_release");
+ if (IS_ERR_OR_NULL(rmi4_data->pinctrl_state_release)) {
+ retval = PTR_ERR(rmi4_data->pinctrl_state_release);
+ dev_err(rmi4_data->pdev->dev.parent,
+ "Can not lookup %s pinstate %d\n",
+ PINCTRL_STATE_RELEASE, retval);
+ }
+
+ return 0;
+
+err_pinctrl_lookup:
+ devm_pinctrl_put(rmi4_data->ts_pinctrl);
+err_pinctrl_get:
+ rmi4_data->ts_pinctrl = NULL;
+ return retval;
+}
+
+
+static int synaptics_rmi4_get_reg(struct synaptics_rmi4_data *rmi4_data,
+ bool get)
+{
+ int retval;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ if (!get) {
+ retval = 0;
+ goto regulator_put;
+ }
+
+ if ((bdata->pwr_reg_name != NULL) && (*bdata->pwr_reg_name != 0)) {
+ rmi4_data->pwr_reg = regulator_get(rmi4_data->pdev->dev.parent,
+ bdata->pwr_reg_name);
+ if (IS_ERR(rmi4_data->pwr_reg)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to get power regulator\n",
+ __func__);
+ retval = PTR_ERR(rmi4_data->pwr_reg);
+ goto regulator_put;
+ }
+ }
+
+ retval = regulator_set_load(rmi4_data->pwr_reg,
+ 20000);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set regulator current avdd\n",
+ __func__);
+ goto regulator_put;
+ }
+
+ retval = regulator_set_voltage(rmi4_data->pwr_reg,
+ 3000000,
+ 3000000);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set regulator voltage avdd\n",
+ __func__);
+ goto regulator_put;
+ }
+
+ if ((bdata->bus_reg_name != NULL) && (*bdata->bus_reg_name != 0)) {
+ rmi4_data->bus_reg = regulator_get(rmi4_data->pdev->dev.parent,
+ bdata->bus_reg_name);
+ if (IS_ERR(rmi4_data->bus_reg)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to get bus pullup regulator\n",
+ __func__);
+ retval = PTR_ERR(rmi4_data->bus_reg);
+ goto regulator_put;
+ }
+ }
+
+ retval = regulator_set_load(rmi4_data->bus_reg,
+ 62000);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set regulator current vdd\n",
+ __func__);
+ goto regulator_put;
+ }
+
+ retval = regulator_set_voltage(rmi4_data->bus_reg,
+ 1800000,
+ 1800000);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set regulator voltage avdd\n",
+ __func__);
+ goto regulator_put;
+ }
+
+ return 0;
+
+regulator_put:
+ if (rmi4_data->pwr_reg) {
+ regulator_put(rmi4_data->pwr_reg);
+ rmi4_data->pwr_reg = NULL;
+ }
+
+ if (rmi4_data->bus_reg) {
+ regulator_put(rmi4_data->bus_reg);
+ rmi4_data->bus_reg = NULL;
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_enable_reg(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ if (!enable) {
+ retval = 0;
+ goto disable_pwr_reg;
+ }
+
+ if (rmi4_data->bus_reg && rmi4_data->vdd_status == 0) {
+ retval = regulator_enable(rmi4_data->bus_reg);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to enable bus pullup regulator\n",
+ __func__);
+ goto exit;
+ }
+ rmi4_data->vdd_status = 1;
+ }
+
+ if (rmi4_data->pwr_reg && rmi4_data->avdd_status == 0) {
+ retval = regulator_enable(rmi4_data->pwr_reg);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to enable power regulator\n",
+ __func__);
+ goto disable_bus_reg;
+ }
+ rmi4_data->avdd_status = 1;
+ msleep(bdata->power_delay_ms);
+ }
+
+ return 0;
+
+disable_pwr_reg:
+ if (rmi4_data->pwr_reg && rmi4_data->avdd_status == 1) {
+ regulator_disable(rmi4_data->pwr_reg);
+ rmi4_data->avdd_status = 0;
+ }
+
+disable_bus_reg:
+ if (rmi4_data->bus_reg && rmi4_data->vdd_status == 1) {
+ regulator_disable(rmi4_data->bus_reg);
+ rmi4_data->vdd_status = 0;
+ }
+
+exit:
+ return retval;
+}
+
+static int synaptics_rmi4_free_fingers(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char ii;
+
+ mutex_lock(&(rmi4_data->rmi4_report_mutex));
+
+#ifdef TYPE_B_PROTOCOL
+ for (ii = 0; ii < rmi4_data->num_of_fingers; ii++) {
+ input_mt_slot(rmi4_data->input_dev, ii);
+ input_mt_report_slot_state(rmi4_data->input_dev,
+ MT_TOOL_FINGER, 0);
+ }
+#endif
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOUCH, 0);
+ input_report_key(rmi4_data->input_dev,
+ BTN_TOOL_FINGER, 0);
+#ifndef TYPE_B_PROTOCOL
+ input_mt_sync(rmi4_data->input_dev);
+#endif
+ input_sync(rmi4_data->input_dev);
+
+ if (rmi4_data->stylus_enable) {
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOUCH, 0);
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_PEN, 0);
+ if (rmi4_data->eraser_enable) {
+ input_report_key(rmi4_data->stylus_dev,
+ BTN_TOOL_RUBBER, 0);
+ }
+ input_sync(rmi4_data->stylus_dev);
+ }
+
+ mutex_unlock(&(rmi4_data->rmi4_report_mutex));
+
+ rmi4_data->fingers_on_2d = false;
+
+ return 0;
+}
+
+static int synaptics_rmi4_sw_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char command = 0x01;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_cmd_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0)
+ return retval;
+
+ msleep(rmi4_data->hw_if->board_data->reset_delay_ms);
+
+ if (rmi4_data->hw_if->ui_hw_init) {
+ retval = rmi4_data->hw_if->ui_hw_init(rmi4_data);
+ if (retval < 0)
+ return retval;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_do_rebuild(struct synaptics_rmi4_data *rmi4_data)
+{
+ struct synaptics_rmi4_input_settings *settings;
+
+ settings = &(rmi4_data->input_settings);
+
+ if (settings->num_of_fingers != rmi4_data->num_of_fingers)
+ return 1;
+
+ if (settings->valid_button_count != rmi4_data->valid_button_count)
+ return 1;
+
+ if (settings->max_touch_width != rmi4_data->max_touch_width)
+ return 1;
+
+ if (settings->sensor_max_x != rmi4_data->sensor_max_x)
+ return 1;
+
+ if (settings->sensor_max_y != rmi4_data->sensor_max_y)
+ return 1;
+
+ if (settings->force_min != rmi4_data->force_min)
+ return 1;
+
+ if (settings->force_max != rmi4_data->force_max)
+ return 1;
+
+ if (settings->stylus_enable != rmi4_data->stylus_enable)
+ return 1;
+
+ if (settings->eraser_enable != rmi4_data->eraser_enable)
+ return 1;
+
+ return 0;
+}
+
+static void synaptics_rmi4_rebuild_work(struct work_struct *work)
+{
+ int retval;
+ unsigned char attr_count;
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct delayed_work *delayed_work =
+ container_of(work, struct delayed_work, work);
+ struct synaptics_rmi4_data *rmi4_data =
+ container_of(delayed_work, struct synaptics_rmi4_data,
+ rb_work);
+
+ mutex_lock(&(rmi4_data->rmi4_reset_mutex));
+
+ mutex_lock(&exp_data.mutex);
+
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->remove != NULL)
+ exp_fhandler->exp_fn->remove(rmi4_data);
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ synaptics_rmi4_free_fingers(rmi4_data);
+ synaptics_rmi4_empty_fn_list(rmi4_data);
+ input_unregister_device(rmi4_data->input_dev);
+ rmi4_data->input_dev = NULL;
+ if (rmi4_data->stylus_enable) {
+ input_unregister_device(rmi4_data->stylus_dev);
+ rmi4_data->stylus_dev = NULL;
+ }
+
+ retval = synaptics_rmi4_set_input_dev(rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set up input device\n",
+ __func__);
+ goto exit;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ goto exit;
+ }
+ }
+
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->init != NULL)
+ exp_fhandler->exp_fn->init(rmi4_data);
+ }
+
+exit:
+ synaptics_rmi4_irq_enable(rmi4_data, true, false);
+
+ mutex_unlock(&exp_data.mutex);
+
+ mutex_unlock(&(rmi4_data->rmi4_reset_mutex));
+}
+
+static int synaptics_rmi4_reinit_device(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ mutex_lock(&(rmi4_data->rmi4_reset_mutex));
+
+ synaptics_rmi4_free_fingers(rmi4_data);
+
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->fn_number == SYNAPTICS_RMI4_F12) {
+ synaptics_rmi4_f12_set_enables(rmi4_data, 0);
+ break;
+ }
+ }
+ }
+
+ retval = synaptics_rmi4_int_enable(rmi4_data, true);
+ if (retval < 0)
+ goto exit;
+
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->reinit != NULL)
+ exp_fhandler->exp_fn->reinit(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ synaptics_rmi4_set_configured(rmi4_data);
+
+ retval = 0;
+
+exit:
+ mutex_unlock(&(rmi4_data->rmi4_reset_mutex));
+ return retval;
+}
+
+static int synaptics_rmi4_reset_device(struct synaptics_rmi4_data *rmi4_data,
+ bool rebuild)
+{
+ int retval;
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+
+ mutex_lock(&(rmi4_data->rmi4_reset_mutex));
+
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+
+ retval = synaptics_rmi4_sw_reset(rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command\n",
+ __func__);
+ goto exit;
+ }
+
+ synaptics_rmi4_free_fingers(rmi4_data);
+
+ synaptics_rmi4_empty_fn_list(rmi4_data);
+
+ retval = synaptics_rmi4_query_device(rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to query device\n",
+ __func__);
+ goto exit;
+ }
+
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->reset != NULL)
+ exp_fhandler->exp_fn->reset(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ retval = 0;
+
+exit:
+ synaptics_rmi4_irq_enable(rmi4_data, true, false);
+
+ mutex_unlock(&(rmi4_data->rmi4_reset_mutex));
+
+ if (rebuild && synaptics_rmi4_do_rebuild(rmi4_data)) {
+ queue_delayed_work(rmi4_data->rb_workqueue,
+ &rmi4_data->rb_work,
+ msecs_to_jiffies(REBUILD_WORK_DELAY_MS));
+ }
+
+ return retval;
+}
+
+#ifdef FB_READY_RESET
+static void synaptics_rmi4_reset_work(struct work_struct *work)
+{
+ int retval = 0;
+ unsigned int timeout;
+ struct synaptics_rmi4_data *rmi4_data =
+ container_of(work, struct synaptics_rmi4_data,
+ reset_work);
+
+ timeout = FB_READY_TIMEOUT_S * 1000 / FB_READY_WAIT_MS + 1;
+
+ while (!rmi4_data->fb_ready) {
+ msleep(FB_READY_WAIT_MS);
+ timeout--;
+ if (timeout == 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for FB ready\n",
+ __func__);
+ goto err;
+ }
+ }
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ retval = synaptics_rmi4_reset_device(rmi4_data, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command\n",
+ __func__);
+ }
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+err:
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for FB ready\n",
+ __func__);
+
+}
+#endif
+
+static int synaptics_rmi4_sleep_enable(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval;
+ unsigned char device_ctrl;
+ unsigned char no_sleep_setting = rmi4_data->no_sleep_setting;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read device control\n",
+ __func__);
+ return retval;
+ }
+
+ device_ctrl = device_ctrl & ~MASK_3BIT;
+ if (enable)
+ device_ctrl = device_ctrl | SENSOR_SLEEP;
+ else
+ device_ctrl = device_ctrl | no_sleep_setting | NORMAL_OPERATION;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write device control\n",
+ __func__);
+ return retval;
+ }
+
+ rmi4_data->sensor_sleep = enable;
+
+ return retval;
+}
+
+static void synaptics_rmi4_exp_fn_work(struct work_struct *work)
+{
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler_temp;
+ struct synaptics_rmi4_data *rmi4_data = exp_data.rmi4_data;
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+ mutex_lock(&rmi4_data->rmi4_reset_mutex);
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry_safe(exp_fhandler,
+ exp_fhandler_temp,
+ &exp_data.list,
+ link) {
+ if ((exp_fhandler->exp_fn->init != NULL) &&
+ exp_fhandler->insert) {
+ exp_fhandler->exp_fn->init(rmi4_data);
+ exp_fhandler->insert = false;
+ } else if ((exp_fhandler->exp_fn->remove != NULL) &&
+ exp_fhandler->remove) {
+ exp_fhandler->exp_fn->remove(rmi4_data);
+ list_del(&exp_fhandler->link);
+ kfree(exp_fhandler);
+ }
+ }
+ }
+ mutex_unlock(&exp_data.mutex);
+ mutex_unlock(&rmi4_data->rmi4_reset_mutex);
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+}
+
+void synaptics_rmi4_new_function(struct synaptics_rmi4_exp_fn *exp_fn,
+ bool insert)
+{
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+
+ if (!exp_data.initialized) {
+ mutex_init(&exp_data.mutex);
+ INIT_LIST_HEAD(&exp_data.list);
+ exp_data.initialized = true;
+ }
+
+ mutex_lock(&exp_data.mutex);
+ if (insert) {
+ exp_fhandler = kzalloc(sizeof(*exp_fhandler), GFP_KERNEL);
+ if (!exp_fhandler) {
+ pr_err("%s: Failed to alloc mem for expansion function\n",
+ __func__);
+ goto exit;
+ }
+ exp_fhandler->exp_fn = exp_fn;
+ exp_fhandler->insert = true;
+ exp_fhandler->remove = false;
+ list_add_tail(&exp_fhandler->link, &exp_data.list);
+ } else if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link) {
+ if (exp_fhandler->exp_fn->fn_type == exp_fn->fn_type) {
+ exp_fhandler->insert = false;
+ exp_fhandler->remove = true;
+ goto exit;
+ }
+ }
+ }
+
+exit:
+ mutex_unlock(&exp_data.mutex);
+
+ if (exp_data.queue_work) {
+ queue_delayed_work(exp_data.workqueue,
+ &exp_data.work,
+ msecs_to_jiffies(EXP_FN_WORK_DELAY_MS));
+ }
+}
+EXPORT_SYMBOL(synaptics_rmi4_new_function);
+
+static int synaptics_rmi4_probe(struct platform_device *pdev)
+{
+ int retval;
+ unsigned char attr_count;
+ struct synaptics_rmi4_data *rmi4_data;
+ const struct synaptics_dsx_hw_interface *hw_if;
+ const struct synaptics_dsx_board_data *bdata;
+
+ hw_if = pdev->dev.platform_data;
+ if (!hw_if) {
+ dev_err(&pdev->dev,
+ "%s: No hardware interface found\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ bdata = hw_if->board_data;
+ if (!bdata) {
+ dev_err(&pdev->dev,
+ "%s: No board data found\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ rmi4_data = kzalloc(sizeof(*rmi4_data), GFP_KERNEL);
+ if (!rmi4_data) {
+ dev_err(&pdev->dev,
+ "%s: Failed to alloc mem for rmi4_data\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ rmi4_data->pdev = pdev;
+ rmi4_data->current_page = MASK_8BIT;
+ rmi4_data->hw_if = hw_if;
+ rmi4_data->suspend = false;
+ rmi4_data->irq_enabled = false;
+ rmi4_data->fingers_on_2d = false;
+
+ rmi4_data->reset_device = synaptics_rmi4_reset_device;
+ rmi4_data->irq_enable = synaptics_rmi4_irq_enable;
+ rmi4_data->sleep_enable = synaptics_rmi4_sleep_enable;
+ rmi4_data->report_touch = synaptics_rmi4_report_touch;
+
+ mutex_init(&(rmi4_data->rmi4_reset_mutex));
+ mutex_init(&(rmi4_data->rmi4_report_mutex));
+ mutex_init(&(rmi4_data->rmi4_io_ctrl_mutex));
+ mutex_init(&(rmi4_data->rmi4_exp_init_mutex));
+ mutex_init(&(rmi4_data->rmi4_irq_enable_mutex));
+
+ platform_set_drvdata(pdev, rmi4_data);
+
+ vir_button_map = bdata->vir_button_map;
+
+ retval = synaptics_rmi4_get_reg(rmi4_data, true);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to get regulators\n",
+ __func__);
+ goto err_get_reg;
+ }
+
+ retval = synaptics_rmi4_enable_reg(rmi4_data, true);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to enable regulators\n",
+ __func__);
+ goto err_enable_reg;
+ }
+
+ retval = synaptics_rmi4_set_gpio(rmi4_data);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to set up GPIO's\n",
+ __func__);
+ goto err_set_gpio;
+ }
+
+ retval = synaptics_dsx_pinctrl_init(rmi4_data);
+ if (!retval && rmi4_data->ts_pinctrl) {
+ /*
+ * Pinctrl handle is optional. If pinctrl handle is found
+ * let pins to be configured in active state. If not
+ * found continue further without error.
+ */
+ retval = pinctrl_select_state(rmi4_data->ts_pinctrl,
+ rmi4_data->pinctrl_state_active);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to select %s pinstate %d\n",
+ __func__, PINCTRL_STATE_ACTIVE, retval);
+ }
+ }
+
+ if (hw_if->ui_hw_init) {
+ retval = hw_if->ui_hw_init(rmi4_data);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to initialize hardware interface\n",
+ __func__);
+ goto err_ui_hw_init;
+ }
+ }
+
+ retval = synaptics_rmi4_set_input_dev(rmi4_data);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to set up input device\n",
+ __func__);
+ goto err_set_input_dev;
+ }
+
+#ifdef CONFIG_FB
+ rmi4_data->fb_notifier.notifier_call = synaptics_rmi4_dsi_panel_notifier_cb;
+ retval = msm_drm_register_client(&rmi4_data->fb_notifier);
+ if (retval < 0) {
+
+
+ dev_err(&pdev->dev,
+ "%s: Failed to register fb notifier client\n",
+ __func__);
+ }
+#endif
+
+#ifdef USE_EARLYSUSPEND
+ rmi4_data->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 1;
+ rmi4_data->early_suspend.suspend = synaptics_rmi4_early_suspend;
+ rmi4_data->early_suspend.resume = synaptics_rmi4_late_resume;
+ register_early_suspend(&rmi4_data->early_suspend);
+#endif
+
+ if (!exp_data.initialized) {
+ mutex_init(&exp_data.mutex);
+ INIT_LIST_HEAD(&exp_data.list);
+ exp_data.initialized = true;
+ }
+
+ rmi4_data->irq = gpio_to_irq(bdata->irq_gpio);
+
+ retval = synaptics_rmi4_irq_enable(rmi4_data, true, false);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to enable attention interrupt\n",
+ __func__);
+ goto err_enable_irq;
+ }
+
+ if (vir_button_map->nbuttons) {
+ rmi4_data->board_prop_dir = kobject_create_and_add(
+ "board_properties", NULL);
+ if (!rmi4_data->board_prop_dir) {
+ dev_err(&pdev->dev,
+ "%s: Failed to create board_properties directory\n",
+ __func__);
+ goto err_virtual_buttons;
+ } else {
+ retval = sysfs_create_file(rmi4_data->board_prop_dir,
+ &virtual_key_map_attr.attr);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to create virtual key map file\n",
+ __func__);
+ goto err_virtual_buttons;
+ }
+ }
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(&pdev->dev,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ goto err_sysfs;
+ }
+ }
+
+#ifdef USE_DATA_SERVER
+ memset(&interrupt_signal, 0, sizeof(interrupt_signal));
+ interrupt_signal.si_signo = SIGIO;
+ interrupt_signal.si_code = SI_USER;
+#endif
+
+ rmi4_data->rb_workqueue =
+ create_singlethread_workqueue("dsx_rebuild_workqueue");
+ INIT_DELAYED_WORK(&rmi4_data->rb_work, synaptics_rmi4_rebuild_work);
+
+ exp_data.workqueue = create_singlethread_workqueue("dsx_exp_workqueue");
+ INIT_DELAYED_WORK(&exp_data.work, synaptics_rmi4_exp_fn_work);
+ exp_data.rmi4_data = rmi4_data;
+ exp_data.queue_work = true;
+ queue_delayed_work(exp_data.workqueue,
+ &exp_data.work,
+ 0);
+
+#ifdef FB_READY_RESET
+ rmi4_data->reset_workqueue =
+ create_singlethread_workqueue("dsx_reset_workqueue");
+ INIT_WORK(&rmi4_data->reset_work, synaptics_rmi4_reset_work);
+ queue_work(rmi4_data->reset_workqueue, &rmi4_data->reset_work);
+#endif
+
+ return retval;
+
+err_sysfs:
+ for (attr_count--; attr_count >= 0; attr_count--) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+err_virtual_buttons:
+ if (rmi4_data->board_prop_dir) {
+ sysfs_remove_file(rmi4_data->board_prop_dir,
+ &virtual_key_map_attr.attr);
+ kobject_put(rmi4_data->board_prop_dir);
+ }
+
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+
+err_enable_irq:
+#ifdef CONFIG_FB
+ msm_drm_unregister_client(&rmi4_data->fb_notifier);
+#endif
+
+#ifdef USE_EARLYSUSPEND
+ unregister_early_suspend(&rmi4_data->early_suspend);
+#endif
+
+ synaptics_rmi4_empty_fn_list(rmi4_data);
+ input_unregister_device(rmi4_data->input_dev);
+ rmi4_data->input_dev = NULL;
+ if (rmi4_data->stylus_enable) {
+ input_unregister_device(rmi4_data->stylus_dev);
+ rmi4_data->stylus_dev = NULL;
+ }
+
+err_set_input_dev:
+ synaptics_rmi4_gpio_setup(bdata->irq_gpio, false, 0, 0);
+
+ if (bdata->reset_gpio >= 0)
+ synaptics_rmi4_gpio_setup(bdata->reset_gpio, false, 0, 0);
+
+ if (bdata->power_gpio >= 0)
+ synaptics_rmi4_gpio_setup(bdata->power_gpio, false, 0, 0);
+
+err_ui_hw_init:
+err_set_gpio:
+ synaptics_rmi4_enable_reg(rmi4_data, false);
+
+ if (rmi4_data->ts_pinctrl) {
+ if (IS_ERR_OR_NULL(rmi4_data->pinctrl_state_release)) {
+ devm_pinctrl_put(rmi4_data->ts_pinctrl);
+ rmi4_data->ts_pinctrl = NULL;
+ } else {
+ retval = pinctrl_select_state(
+ rmi4_data->ts_pinctrl,
+ rmi4_data->pinctrl_state_release);
+ if (retval)
+ dev_err(&pdev->dev,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ }
+ }
+
+err_enable_reg:
+ synaptics_rmi4_get_reg(rmi4_data, false);
+
+err_get_reg:
+ kfree(rmi4_data);
+
+ return retval;
+}
+
+static int synaptics_rmi4_remove(struct platform_device *pdev)
+{
+ unsigned char attr_count;
+ struct synaptics_rmi4_data *rmi4_data = platform_get_drvdata(pdev);
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+#ifdef FB_READY_RESET
+ cancel_work_sync(&rmi4_data->reset_work);
+ flush_workqueue(rmi4_data->reset_workqueue);
+ destroy_workqueue(rmi4_data->reset_workqueue);
+#endif
+
+ cancel_delayed_work_sync(&exp_data.work);
+ flush_workqueue(exp_data.workqueue);
+ destroy_workqueue(exp_data.workqueue);
+
+ cancel_delayed_work_sync(&rmi4_data->rb_work);
+ flush_workqueue(rmi4_data->rb_workqueue);
+ destroy_workqueue(rmi4_data->rb_workqueue);
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ if (rmi4_data->board_prop_dir) {
+ sysfs_remove_file(rmi4_data->board_prop_dir,
+ &virtual_key_map_attr.attr);
+ kobject_put(rmi4_data->board_prop_dir);
+ }
+
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+
+#ifdef CONFIG_FB
+ msm_drm_unregister_client(&rmi4_data->fb_notifier);
+#endif
+
+#ifdef USE_EARLYSUSPEND
+ unregister_early_suspend(&rmi4_data->early_suspend);
+#endif
+
+ synaptics_rmi4_empty_fn_list(rmi4_data);
+ input_unregister_device(rmi4_data->input_dev);
+ rmi4_data->input_dev = NULL;
+ if (rmi4_data->stylus_enable) {
+ input_unregister_device(rmi4_data->stylus_dev);
+ rmi4_data->stylus_dev = NULL;
+ }
+
+ synaptics_rmi4_gpio_setup(bdata->irq_gpio, false, 0, 0);
+
+ if (bdata->reset_gpio >= 0)
+ synaptics_rmi4_gpio_setup(bdata->reset_gpio, false, 0, 0);
+
+ if (bdata->power_gpio >= 0)
+ synaptics_rmi4_gpio_setup(bdata->power_gpio, false, 0, 0);
+
+ if (rmi4_data->ts_pinctrl) {
+ if (IS_ERR_OR_NULL(rmi4_data->pinctrl_state_release)) {
+ devm_pinctrl_put(rmi4_data->ts_pinctrl);
+ rmi4_data->ts_pinctrl = NULL;
+ } else {
+ pinctrl_select_state(
+ rmi4_data->ts_pinctrl,
+ rmi4_data->pinctrl_state_release);
+ }
+ }
+
+ synaptics_rmi4_enable_reg(rmi4_data, false);
+ synaptics_rmi4_get_reg(rmi4_data, false);
+
+ kfree(rmi4_data);
+
+ return 0;
+}
+
+#ifdef CONFIG_FB
+static int synaptics_rmi4_dsi_panel_notifier_cb(struct notifier_block *self,
+ unsigned long event, void *data)
+{
+ int transition;
+ struct msm_drm_notifier *evdata = data;
+ struct synaptics_rmi4_data *rmi4_data =
+ container_of(self, struct synaptics_rmi4_data,
+ fb_notifier);
+
+ if (!evdata || (evdata->id != 0))
+ return 0;
+
+ if (evdata && evdata->data && rmi4_data) {
+ if (event == MSM_DRM_EVENT_BLANK) {
+ transition = *(int *)evdata->data;
+ if (transition == MSM_DRM_BLANK_POWERDOWN) {
+ synaptics_rmi4_suspend(&rmi4_data->pdev->dev);
+ rmi4_data->fb_ready = false;
+ } else if (transition == MSM_DRM_BLANK_UNBLANK) {
+ synaptics_rmi4_resume(&rmi4_data->pdev->dev);
+ rmi4_data->fb_ready = true;
+ }
+ }
+ }
+
+ return 0;
+}
+#endif
+
+#ifdef USE_EARLYSUSPEND
+static int synaptics_rmi4_early_suspend(struct early_suspend *h)
+{
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_data *rmi4_data =
+ container_of(h, struct synaptics_rmi4_data,
+ early_suspend);
+ unsigned char device_ctrl;
+
+ if (rmi4_data->stay_awake)
+ return retval;
+
+ if (rmi4_data->enable_wakeup_gesture) {
+ if (rmi4_data->no_sleep_setting) {
+ synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ device_ctrl = device_ctrl & ~NO_SLEEP_ON;
+ synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ }
+ synaptics_rmi4_wakeup_gesture(rmi4_data, true);
+ enable_irq_wake(rmi4_data->irq);
+ goto exit;
+ }
+
+#ifdef SYNA_TDDI
+ if (rmi4_data->no_sleep_setting) {
+ synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ device_ctrl = device_ctrl & ~NO_SLEEP_ON;
+ synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ }
+ synaptics_rmi4_wakeup_gesture(rmi4_data, true);
+ usleep(TDDI_LPWG_WAIT_US);
+#endif
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+ synaptics_rmi4_sleep_enable(rmi4_data, true);
+ synaptics_rmi4_free_fingers(rmi4_data);
+
+exit:
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->early_suspend != NULL)
+ exp_fhandler->exp_fn->early_suspend(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ rmi4_data->suspend = true;
+
+ return retval;
+}
+
+static int synaptics_rmi4_late_resume(struct early_suspend *h)
+{
+#ifdef FB_READY_RESET
+ int retval;
+#endif
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_data *rmi4_data =
+ container_of(h, struct synaptics_rmi4_data,
+ early_suspend);
+
+ if (rmi4_data->stay_awake)
+ return retval;
+
+ if (rmi4_data->enable_wakeup_gesture) {
+ disable_irq_wake(rmi4_data->irq);
+ goto exit;
+ }
+
+ rmi4_data->current_page = MASK_8BIT;
+
+ if (rmi4_data->suspend) {
+ synaptics_rmi4_sleep_enable(rmi4_data, false);
+ synaptics_rmi4_irq_enable(rmi4_data, true, false);
+ }
+
+exit:
+#ifdef FB_READY_RESET
+ if (rmi4_data->suspend) {
+ retval = synaptics_rmi4_reset_device(rmi4_data, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command\n",
+ __func__);
+ }
+ }
+#endif
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->late_resume != NULL)
+ exp_fhandler->exp_fn->late_resume(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ rmi4_data->suspend = false;
+
+ return retval;
+}
+#endif
+
+static int synaptics_rmi4_suspend(struct device *dev)
+{
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+ unsigned char device_ctrl;
+
+ if (rmi4_data->stay_awake)
+ return 0;
+
+ if (rmi4_data->enable_wakeup_gesture) {
+ if (rmi4_data->no_sleep_setting) {
+ synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ device_ctrl = device_ctrl & ~NO_SLEEP_ON;
+ synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ }
+ synaptics_rmi4_wakeup_gesture(rmi4_data, true);
+ enable_irq_wake(rmi4_data->irq);
+ goto exit;
+ }
+
+ if (!rmi4_data->suspend) {
+#ifdef SYNA_TDDI
+ if (rmi4_data->no_sleep_setting) {
+ synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ device_ctrl = device_ctrl & ~NO_SLEEP_ON;
+ synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ }
+ synaptics_rmi4_wakeup_gesture(rmi4_data, true);
+ usleep(TDDI_LPWG_WAIT_US);
+#endif
+ synaptics_rmi4_irq_enable(rmi4_data, false, false);
+ synaptics_rmi4_sleep_enable(rmi4_data, true);
+ synaptics_rmi4_free_fingers(rmi4_data);
+ }
+
+ if (rmi4_data->ts_pinctrl)
+ pinctrl_select_state(rmi4_data->ts_pinctrl,
+ rmi4_data->pinctrl_state_suspend);
+
+ synaptics_rmi4_enable_reg(rmi4_data, false);
+
+exit:
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->suspend != NULL)
+ exp_fhandler->exp_fn->suspend(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ rmi4_data->suspend = true;
+
+ return 0;
+}
+
+static int synaptics_rmi4_resume(struct device *dev)
+{
+#ifdef FB_READY_RESET
+ int retval;
+#endif
+ struct synaptics_rmi4_exp_fhandler *exp_fhandler;
+ struct synaptics_rmi4_data *rmi4_data = dev_get_drvdata(dev);
+
+ if (rmi4_data->stay_awake)
+ return 0;
+
+ if (rmi4_data->enable_wakeup_gesture) {
+ disable_irq_wake(rmi4_data->irq);
+ synaptics_rmi4_wakeup_gesture(rmi4_data, false);
+ goto exit;
+ }
+
+ synaptics_rmi4_enable_reg(rmi4_data, true);
+
+ if (rmi4_data->ts_pinctrl)
+ pinctrl_select_state(rmi4_data->ts_pinctrl,
+ rmi4_data->pinctrl_state_active);
+
+ rmi4_data->current_page = MASK_8BIT;
+
+ synaptics_rmi4_sleep_enable(rmi4_data, false);
+ synaptics_rmi4_irq_enable(rmi4_data, true, false);
+
+exit:
+#ifdef FB_READY_RESET
+ retval = synaptics_rmi4_reset_device(rmi4_data, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command\n",
+ __func__);
+ }
+#endif
+ mutex_lock(&exp_data.mutex);
+ if (!list_empty(&exp_data.list)) {
+ list_for_each_entry(exp_fhandler, &exp_data.list, link)
+ if (exp_fhandler->exp_fn->resume != NULL)
+ exp_fhandler->exp_fn->resume(rmi4_data);
+ }
+ mutex_unlock(&exp_data.mutex);
+
+ rmi4_data->suspend = false;
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static const struct dev_pm_ops synaptics_rmi4_dev_pm_ops = {
+#ifndef CONFIG_FB
+ .suspend = synaptics_rmi4_suspend,
+ .resume = synaptics_rmi4_resume,
+#endif
+};
+#endif
+
+static struct platform_driver synaptics_rmi4_driver = {
+ .driver = {
+ .name = PLATFORM_DRIVER_NAME,
+ .owner = THIS_MODULE,
+#ifdef CONFIG_PM
+ .pm = &synaptics_rmi4_dev_pm_ops,
+#endif
+ },
+ .probe = synaptics_rmi4_probe,
+ .remove = synaptics_rmi4_remove,
+};
+
+static int __init synaptics_rmi4_init(void)
+{
+ int retval;
+
+ retval = synaptics_rmi4_bus_init();
+ if (retval)
+ return retval;
+
+ return platform_driver_register(&synaptics_rmi4_driver);
+}
+
+static void __exit synaptics_rmi4_exit(void)
+{
+ platform_driver_unregister(&synaptics_rmi4_driver);
+
+ synaptics_rmi4_bus_exit();
+}
+
+module_init(synaptics_rmi4_init);
+module_exit(synaptics_rmi4_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX Touch Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.h b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.h
new file mode 100644
index 0000000..3e0c0db
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_core.h
@@ -0,0 +1,535 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#ifndef _SYNAPTICS_DSX_RMI4_H_
+#define _SYNAPTICS_DSX_RMI4_H_
+
+#define SYNAPTICS_DS4 (1 << 0)
+#define SYNAPTICS_DS5 (1 << 1)
+#define SYNAPTICS_DSX_DRIVER_PRODUCT (SYNAPTICS_DS4 | SYNAPTICS_DS5)
+#define SYNAPTICS_DSX_DRIVER_VERSION 0x2070
+
+#include <linux/version.h>
+#ifdef CONFIG_FB
+#include <linux/notifier.h>
+#include <linux/fb.h>
+#endif
+#ifdef CONFIG_HAS_EARLYSUSPEND
+#include <linux/earlysuspend.h>
+#endif
+
+#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 38))
+#define KERNEL_ABOVE_2_6_38
+#endif
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 7, 0))
+#define KERNEL_ABOVE_3_6
+#endif
+
+#ifdef KERNEL_ABOVE_2_6_38
+#define sstrtoul(...) kstrtoul(__VA_ARGS__)
+#else
+#define sstrtoul(...) strict_strtoul(__VA_ARGS__)
+#endif
+/*
+*#define F51_DISCRETE_FORCE
+*#ifdef F51_DISCRETE_FORCE
+*#define FORCE_LEVEL_ADDR 0x0419
+*#define FORCE_LEVEL_MAX 255
+*#define CAL_DATA_SIZE 144
+*#endif
+*#define SYNA_TDDI
+*/
+#define PDT_PROPS (0X00EF)
+#define PDT_START (0x00E9)
+#define PDT_END (0x00D0)
+#define PDT_ENTRY_SIZE (0x0006)
+#define PAGES_TO_SERVICE (10)
+#define PAGE_SELECT_LEN (2)
+#define ADDRESS_LEN (2)
+
+#define SYNAPTICS_RMI4_F01 (0x01)
+#define SYNAPTICS_RMI4_F11 (0x11)
+#define SYNAPTICS_RMI4_F12 (0x12)
+#define SYNAPTICS_RMI4_F1A (0x1A)
+#define SYNAPTICS_RMI4_F21 (0x21)
+#define SYNAPTICS_RMI4_F34 (0x34)
+#define SYNAPTICS_RMI4_F35 (0x35)
+#define SYNAPTICS_RMI4_F38 (0x38)
+#define SYNAPTICS_RMI4_F51 (0x51)
+#define SYNAPTICS_RMI4_F54 (0x54)
+#define SYNAPTICS_RMI4_F55 (0x55)
+#define SYNAPTICS_RMI4_FDB (0xDB)
+
+#define PRODUCT_INFO_SIZE 2
+#define PRODUCT_ID_SIZE 10
+#define BUILD_ID_SIZE 3
+
+#define F12_FINGERS_TO_SUPPORT 10
+#define F12_NO_OBJECT_STATUS 0x00
+#define F12_FINGER_STATUS 0x01
+#define F12_ACTIVE_STYLUS_STATUS 0x02
+#define F12_PALM_STATUS 0x03
+#define F12_HOVERING_FINGER_STATUS 0x05
+#define F12_GLOVED_FINGER_STATUS 0x06
+#define F12_NARROW_OBJECT_STATUS 0x07
+#define F12_HAND_EDGE_STATUS 0x08
+#define F12_COVER_STATUS 0x0A
+#define F12_STYLUS_STATUS 0x0B
+#define F12_ERASER_STATUS 0x0C
+#define F12_SMALL_OBJECT_STATUS 0x0D
+
+#define F12_GESTURE_DETECTION_LEN 5
+
+#define MAX_NUMBER_OF_BUTTONS 4
+#define MAX_INTR_REGISTERS 4
+
+#define MASK_16BIT 0xFFFF
+#define MASK_8BIT 0xFF
+#define MASK_7BIT 0x7F
+#define MASK_6BIT 0x3F
+#define MASK_5BIT 0x1F
+#define MASK_4BIT 0x0F
+#define MASK_3BIT 0x07
+#define MASK_2BIT 0x03
+#define MASK_1BIT 0x01
+
+#define PINCTRL_STATE_ACTIVE "pmx_ts_active"
+#define PINCTRL_STATE_SUSPEND "pmx_ts_suspend"
+#define PINCTRL_STATE_RELEASE "pmx_ts_release"
+
+enum exp_fn {
+ RMI_DEV = 0,
+ RMI_FW_UPDATER,
+ RMI_TEST_REPORTING,
+ RMI_PROXIMITY,
+ RMI_ACTIVE_PEN,
+ RMI_GESTURE,
+ RMI_VIDEO,
+ RMI_DEBUG,
+ RMI_LAST,
+};
+
+/*
+ * struct synaptics_rmi4_fn_desc - function descriptor fields in PDT entry
+ * @query_base_addr: base address for query registers
+ * @cmd_base_addr: base address for command registers
+ * @ctrl_base_addr: base address for control registers
+ * @data_base_addr: base address for data registers
+ * @intr_src_count: number of interrupt sources
+ * @fn_version: version of function
+ * @fn_number: function number
+ */
+struct synaptics_rmi4_fn_desc {
+ union {
+ struct {
+ unsigned char query_base_addr;
+ unsigned char cmd_base_addr;
+ unsigned char ctrl_base_addr;
+ unsigned char data_base_addr;
+ unsigned char intr_src_count:3;
+ unsigned char reserved_1:2;
+ unsigned char fn_version:2;
+ unsigned char reserved_2:1;
+ unsigned char fn_number;
+ } __packed;
+ unsigned char data[6];
+ };
+};
+
+/*
+ * synaptics_rmi4_fn_full_addr - full 16-bit base addresses
+ * @query_base: 16-bit base address for query registers
+ * @cmd_base: 16-bit base address for command registers
+ * @ctrl_base: 16-bit base address for control registers
+ * @data_base: 16-bit base address for data registers
+ */
+struct synaptics_rmi4_fn_full_addr {
+ unsigned short query_base;
+ unsigned short cmd_base;
+ unsigned short ctrl_base;
+ unsigned short data_base;
+};
+
+/*
+ * struct synaptics_rmi4_f11_extra_data - extra data of F$11
+ * @data38_offset: offset to F11_2D_DATA38 register
+ */
+struct synaptics_rmi4_f11_extra_data {
+ unsigned char data38_offset;
+};
+
+/*
+ * struct synaptics_rmi4_f12_extra_data - extra data of F$12
+ * @data1_offset: offset to F12_2D_DATA01 register
+ * @data4_offset: offset to F12_2D_DATA04 register
+ * @data15_offset: offset to F12_2D_DATA15 register
+ * @data15_size: size of F12_2D_DATA15 register
+ * @data15_data: buffer for reading F12_2D_DATA15 register
+ * @data29_offset: offset to F12_2D_DATA29 register
+ * @data29_size: size of F12_2D_DATA29 register
+ * @data29_data: buffer for reading F12_2D_DATA29 register
+ * @ctrl20_offset: offset to F12_2D_CTRL20 register
+ */
+struct synaptics_rmi4_f12_extra_data {
+ unsigned char data1_offset;
+ unsigned char data4_offset;
+ unsigned char data15_offset;
+ unsigned char data15_size;
+ unsigned char data15_data[(F12_FINGERS_TO_SUPPORT + 7) / 8];
+ unsigned char data29_offset;
+ unsigned char data29_size;
+ unsigned char data29_data[F12_FINGERS_TO_SUPPORT * 2];
+ unsigned char ctrl20_offset;
+};
+
+/*
+ * struct synaptics_rmi4_fn - RMI function handler
+ * @fn_number: function number
+ * @num_of_data_sources: number of data sources
+ * @num_of_data_points: maximum number of fingers supported
+ * @intr_reg_num: index to associated interrupt register
+ * @intr_mask: interrupt mask
+ * @full_addr: full 16-bit base addresses of function registers
+ * @link: linked list for function handlers
+ * @data_size: size of private data
+ * @data: pointer to private data
+ * @extra: pointer to extra data
+ */
+struct synaptics_rmi4_fn {
+ unsigned char fn_number;
+ unsigned char num_of_data_sources;
+ unsigned char num_of_data_points;
+ unsigned char intr_reg_num;
+ unsigned char intr_mask;
+ struct synaptics_rmi4_fn_full_addr full_addr;
+ struct list_head link;
+ int data_size;
+ void *data;
+ void *extra;
+};
+
+/*
+ * struct synaptics_rmi4_input_settings - current input settings
+ * @num_of_fingers: maximum number of fingers for 2D touch
+ * @valid_button_count: number of valid 0D buttons
+ * @max_touch_width: maximum touch width
+ * @sensor_max_x: maximum x coordinate for 2D touch
+ * @sensor_max_y: maximum y coordinate for 2D touch
+ * @force_min: minimum force value
+ * @force_max: maximum force value
+ * @stylus_enable: flag to indicate reporting of stylus data
+ * @eraser_enable: flag to indicate reporting of eraser data
+ */
+struct synaptics_rmi4_input_settings {
+ unsigned char num_of_fingers;
+ unsigned char valid_button_count;
+ unsigned char max_touch_width;
+ int sensor_max_x;
+ int sensor_max_y;
+ int force_min;
+ int force_max;
+ bool stylus_enable;
+ bool eraser_enable;
+};
+
+/*
+ * struct synaptics_rmi4_device_info - device information
+ * @version_major: RMI protocol major version number
+ * @version_minor: RMI protocol minor version number
+ * @manufacturer_id: manufacturer ID
+ * @product_props: product properties
+ * @product_info: product information
+ * @product_id_string: product ID
+ * @build_id: firmware build ID
+ * @support_fn_list: linked list for function handlers
+ */
+struct synaptics_rmi4_device_info {
+ unsigned int version_major;
+ unsigned int version_minor;
+ unsigned char manufacturer_id;
+ unsigned char product_props;
+ unsigned char product_info[PRODUCT_INFO_SIZE];
+ unsigned char product_id_string[PRODUCT_ID_SIZE + 1];
+ unsigned char build_id[BUILD_ID_SIZE];
+ struct list_head support_fn_list;
+};
+
+/*
+ * struct synaptics_rmi4_data - RMI4 device instance data
+ * @pdev: pointer to platform device
+ * @input_dev: pointer to associated input device
+ * @stylus_dev: pointer to associated stylus device
+ * @hw_if: pointer to hardware interface data
+ * @rmi4_mod_info: device information
+ * @board_prop_dir: /sys/board_properties directory for virtual key map file
+ * @pwr_reg: pointer to regulator for power control
+ * @bus_reg: pointer to regulator for bus pullup control
+ * @rmi4_reset_mutex: mutex for software reset
+ * @rmi4_report_mutex: mutex for input event reporting
+ * @rmi4_io_ctrl_mutex: mutex for communication interface I/O
+ * @rmi4_exp_init_mutex: mutex for expansion function module initialization
+ * @rmi4_irq_enable_mutex: mutex for enabling/disabling interrupt
+ * @rb_work: work for rebuilding input device
+ * @rb_workqueue: workqueue for rebuilding input device
+ * @fb_notifier: framebuffer notifier client
+ * @reset_work: work for issuing reset after display framebuffer ready
+ * @reset_workqueue: workqueue for issuing reset after display framebuffer ready
+ * @early_suspend: early suspend power management
+ * @current_page: current RMI page for register access
+ * @button_0d_enabled: switch for enabling 0d button support
+ * @num_of_tx: number of Tx channels for 2D touch
+ * @num_of_rx: number of Rx channels for 2D touch
+ * @num_of_fingers: maximum number of fingers for 2D touch
+ * @max_touch_width: maximum touch width
+ * @valid_button_count: number of valid 0D buttons
+ * @report_enable: input data to report for F$12
+ * @no_sleep_setting: default setting of NoSleep in F01_RMI_CTRL00 register
+ * @gesture_detection: detected gesture type and properties
+ * @intr_mask: interrupt enable mask
+ * @button_txrx_mapping: Tx Rx mapping of 0D buttons
+ * @num_of_intr_regs: number of interrupt registers
+ * @f01_query_base_addr: query base address for f$01
+ * @f01_cmd_base_addr: command base address for f$01
+ * @f01_ctrl_base_addr: control base address for f$01
+ * @f01_data_base_addr: data base address for f$01
+ * @f51_query_base_addr: query base address for f$51
+ * @firmware_id: firmware build ID
+ * @irq: attention interrupt
+ * @sensor_max_x: maximum x coordinate for 2D touch
+ * @sensor_max_y: maximum y coordinate for 2D touch
+ * @force_min: minimum force value
+ * @force_max: maximum force value
+ * @set_wakeup_gesture: location of set wakeup gesture
+ * @flash_prog_mode: flag to indicate flash programming mode status
+ * @irq_enabled: flag to indicate attention interrupt enable status
+ * @fingers_on_2d: flag to indicate presence of fingers in 2D area
+ * @suspend: flag to indicate whether in suspend state
+ * @sensor_sleep: flag to indicate sleep state of sensor
+ * @stay_awake: flag to indicate whether to stay awake during suspend
+ * @fb_ready: flag to indicate whether display framebuffer in ready state
+ * @f11_wakeup_gesture: flag to indicate support for wakeup gestures in F$11
+ * @f12_wakeup_gesture: flag to indicate support for wakeup gestures in F$12
+ * @enable_wakeup_gesture: flag to indicate usage of wakeup gestures
+ * @wedge_sensor: flag to indicate use of wedge sensor
+ * @report_pressure: flag to indicate reporting of pressure data
+ * @stylus_enable: flag to indicate reporting of stylus data
+ * @eraser_enable: flag to indicate reporting of eraser data
+ * @external_afe_buttons: flag to indicate presence of external AFE buttons
+ * @reset_device: pointer to device reset function
+ * @irq_enable: pointer to interrupt enable function
+ * @sleep_enable: pointer to sleep enable function
+ * @report_touch: pointer to touch reporting function
+ */
+struct synaptics_rmi4_data {
+ struct platform_device *pdev;
+ struct input_dev *input_dev;
+ struct input_dev *stylus_dev;
+ const struct synaptics_dsx_hw_interface *hw_if;
+ struct synaptics_rmi4_device_info rmi4_mod_info;
+ struct synaptics_rmi4_input_settings input_settings;
+ struct kobject *board_prop_dir;
+ struct regulator *pwr_reg;
+ struct regulator *bus_reg;
+ struct mutex rmi4_reset_mutex;
+ struct mutex rmi4_report_mutex;
+ struct mutex rmi4_io_ctrl_mutex;
+ struct mutex rmi4_exp_init_mutex;
+ struct mutex rmi4_irq_enable_mutex;
+ struct delayed_work rb_work;
+ struct workqueue_struct *rb_workqueue;
+ struct pinctrl *ts_pinctrl;
+ struct pinctrl_state *pinctrl_state_active;
+ struct pinctrl_state *pinctrl_state_suspend;
+ struct pinctrl_state *pinctrl_state_release;
+#ifdef CONFIG_FB
+ struct notifier_block fb_notifier;
+ struct work_struct reset_work;
+ struct workqueue_struct *reset_workqueue;
+#endif
+#ifdef CONFIG_HAS_EARLYSUSPEND
+ struct early_suspend early_suspend;
+#endif
+ unsigned char current_page;
+ unsigned char button_0d_enabled;
+ unsigned char num_of_tx;
+ unsigned char num_of_rx;
+ unsigned char num_of_fingers;
+ unsigned char max_touch_width;
+ unsigned char valid_button_count;
+ unsigned char report_enable;
+ unsigned char no_sleep_setting;
+ unsigned char gesture_detection[F12_GESTURE_DETECTION_LEN];
+ unsigned char intr_mask[MAX_INTR_REGISTERS];
+ unsigned char *button_txrx_mapping;
+ unsigned short num_of_intr_regs;
+ unsigned short f01_query_base_addr;
+ unsigned short f01_cmd_base_addr;
+ unsigned short f01_ctrl_base_addr;
+ unsigned short f01_data_base_addr;
+#ifdef F51_DISCRETE_FORCE
+ unsigned short f51_query_base_addr;
+#endif
+ unsigned int firmware_id;
+ int irq;
+ int sensor_max_x;
+ int sensor_max_y;
+ int force_min;
+ int force_max;
+ int set_wakeup_gesture;
+ int avdd_status;
+ int vdd_status;
+ bool flash_prog_mode;
+ bool irq_enabled;
+ bool fingers_on_2d;
+ bool suspend;
+ bool sensor_sleep;
+ bool stay_awake;
+ bool fb_ready;
+ bool f11_wakeup_gesture;
+ bool f12_wakeup_gesture;
+ bool enable_wakeup_gesture;
+ bool wedge_sensor;
+ bool report_pressure;
+ bool stylus_enable;
+ bool eraser_enable;
+ bool external_afe_buttons;
+ int (*reset_device)(struct synaptics_rmi4_data *rmi4_data,
+ bool rebuild);
+ int (*irq_enable)(struct synaptics_rmi4_data *rmi4_data, bool enable,
+ bool attn_only);
+ int (*sleep_enable)(struct synaptics_rmi4_data *rmi4_data,
+ bool enable);
+ void (*report_touch)(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn *fhandler);
+};
+
+struct synaptics_dsx_bus_access {
+ unsigned char type;
+ int (*read)(struct synaptics_rmi4_data *rmi4_data, unsigned short addr,
+ unsigned char *data, unsigned int length);
+ int (*write)(struct synaptics_rmi4_data *rmi4_data, unsigned short addr,
+ unsigned char *data, unsigned int length);
+};
+
+struct synaptics_dsx_hw_interface {
+ struct synaptics_dsx_board_data *board_data;
+ const struct synaptics_dsx_bus_access *bus_access;
+ int (*bl_hw_init)(struct synaptics_rmi4_data *rmi4_data);
+ int (*ui_hw_init)(struct synaptics_rmi4_data *rmi4_data);
+};
+
+struct synaptics_rmi4_exp_fn {
+ enum exp_fn fn_type;
+ int (*init)(struct synaptics_rmi4_data *rmi4_data);
+ void (*remove)(struct synaptics_rmi4_data *rmi4_data);
+ void (*reset)(struct synaptics_rmi4_data *rmi4_data);
+ void (*reinit)(struct synaptics_rmi4_data *rmi4_data);
+ void (*early_suspend)(struct synaptics_rmi4_data *rmi4_data);
+ void (*suspend)(struct synaptics_rmi4_data *rmi4_data);
+ void (*resume)(struct synaptics_rmi4_data *rmi4_data);
+ void (*late_resume)(struct synaptics_rmi4_data *rmi4_data);
+ void (*attn)(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask);
+};
+
+int synaptics_rmi4_bus_init(void);
+
+void synaptics_rmi4_bus_exit(void);
+
+void synaptics_rmi4_new_function(struct synaptics_rmi4_exp_fn *exp_fn_module,
+ bool insert);
+
+int synaptics_fw_updater(const unsigned char *fw_data);
+
+static inline int synaptics_rmi4_reg_read(
+ struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr,
+ unsigned char *data,
+ unsigned int len)
+{
+ return rmi4_data->hw_if->bus_access->read(rmi4_data, addr, data, len);
+}
+
+static inline int synaptics_rmi4_reg_write(
+ struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr,
+ unsigned char *data,
+ unsigned int len)
+{
+ return rmi4_data->hw_if->bus_access->write(rmi4_data, addr, data, len);
+}
+
+static inline ssize_t synaptics_rmi4_show_error(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ dev_warn(dev, "%s Attempted to read from write-only attribute %s\n",
+ __func__, attr->attr.name);
+ return -EPERM;
+}
+
+static inline ssize_t synaptics_rmi4_store_error(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ dev_warn(dev, "%s Attempted to write to read-only attribute %s\n",
+ __func__, attr->attr.name);
+ return -EPERM;
+}
+
+static inline int secure_memcpy(unsigned char *dest, unsigned int dest_size,
+ const unsigned char *src, unsigned int src_size,
+ unsigned int count)
+{
+ if (dest == NULL || src == NULL)
+ return -EINVAL;
+
+ if (count > dest_size || count > src_size)
+ return -EINVAL;
+
+ memcpy((void *)dest, (const void *)src, count);
+
+ return 0;
+}
+
+static inline void batohs(unsigned short *dest, unsigned char *src)
+{
+ *dest = src[1] * 0x100 + src[0];
+}
+
+static inline void hstoba(unsigned char *dest, unsigned short src)
+{
+ dest[0] = src % 0x100;
+ dest[1] = src / 0x100;
+}
+
+#endif
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_fw_update.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_fw_update.c
new file mode 100644
index 0000000..7f62e01
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_fw_update.c
@@ -0,0 +1,5809 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/firmware.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define FW_IHEX_NAME "synaptics/startup_fw_update.bin"
+#define FW_IMAGE_NAME "synaptics/startup_fw_update.img"
+/*
+*#define DO_STARTUP_FW_UPDATE
+*/
+/*
+*#ifdef DO_STARTUP_FW_UPDATE
+*#ifdef CONFIG_FB
+*#define WAIT_FOR_FB_READY
+*#define FB_READY_WAIT_MS 100
+*#define FB_READY_TIMEOUT_S 30
+*#endif
+*#endif
+*/
+/*
+*#define MAX_WRITE_SIZE 4096
+*/
+
+#define ENABLE_SYS_REFLASH false
+#define FORCE_UPDATE false
+#define DO_LOCKDOWN false
+
+#define MAX_IMAGE_NAME_LEN 256
+#define MAX_FIRMWARE_ID_LEN 10
+
+#define IMAGE_HEADER_VERSION_05 0x05
+#define IMAGE_HEADER_VERSION_06 0x06
+#define IMAGE_HEADER_VERSION_10 0x10
+
+#define IMAGE_AREA_OFFSET 0x100
+#define LOCKDOWN_SIZE 0x50
+
+#define MAX_UTILITY_PARAMS 20
+
+#define V5V6_BOOTLOADER_ID_OFFSET 0
+#define V5V6_CONFIG_ID_SIZE 4
+
+#define V5_PROPERTIES_OFFSET 2
+#define V5_BLOCK_SIZE_OFFSET 3
+#define V5_BLOCK_COUNT_OFFSET 5
+#define V5_BLOCK_NUMBER_OFFSET 0
+#define V5_BLOCK_DATA_OFFSET 2
+
+#define V6_PROPERTIES_OFFSET 1
+#define V6_BLOCK_SIZE_OFFSET 2
+#define V6_BLOCK_COUNT_OFFSET 3
+#define V6_PROPERTIES_2_OFFSET 4
+#define V6_GUEST_CODE_BLOCK_COUNT_OFFSET 5
+#define V6_BLOCK_NUMBER_OFFSET 0
+#define V6_BLOCK_DATA_OFFSET 1
+#define V6_FLASH_COMMAND_OFFSET 2
+#define V6_FLASH_STATUS_OFFSET 3
+
+#define V7_CONFIG_ID_SIZE 32
+
+#define V7_FLASH_STATUS_OFFSET 0
+#define V7_PARTITION_ID_OFFSET 1
+#define V7_BLOCK_NUMBER_OFFSET 2
+#define V7_TRANSFER_LENGTH_OFFSET 3
+#define V7_COMMAND_OFFSET 4
+#define V7_PAYLOAD_OFFSET 5
+
+#define V7_PARTITION_SUPPORT_BYTES 4
+
+#define F35_ERROR_CODE_OFFSET 0
+#define F35_FLASH_STATUS_OFFSET 5
+#define F35_CHUNK_NUM_LSB_OFFSET 0
+#define F35_CHUNK_NUM_MSB_OFFSET 1
+#define F35_CHUNK_DATA_OFFSET 2
+#define F35_CHUNK_COMMAND_OFFSET 18
+
+#define F35_CHUNK_SIZE 16
+#define F35_ERASE_ALL_WAIT_MS 5000
+#define F35_RESET_WAIT_MS 250
+
+#define SLEEP_MODE_NORMAL (0x00)
+#define SLEEP_MODE_SENSOR_SLEEP (0x01)
+#define SLEEP_MODE_RESERVED0 (0x02)
+#define SLEEP_MODE_RESERVED1 (0x03)
+
+#define ENABLE_WAIT_MS (1 * 1000)
+#define WRITE_WAIT_MS (3 * 1000)
+#define ERASE_WAIT_MS (5 * 1000)
+
+#define MIN_SLEEP_TIME_US 50
+#define MAX_SLEEP_TIME_US 100
+
+#define INT_DISABLE_WAIT_MS 20
+#define ENTER_FLASH_PROG_WAIT_MS 20
+#define READ_CONFIG_WAIT_MS 20
+
+static int fwu_do_reflash(void);
+
+static int fwu_recovery_check_status(void);
+
+static ssize_t fwu_sysfs_show_image(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t fwu_sysfs_store_image(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t fwu_sysfs_do_recovery_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_write_config_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_read_config_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_config_area_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_image_name_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_image_size_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_block_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_utility_parameter_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_guest_code_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t fwu_sysfs_write_guest_code_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+#ifdef SYNA_TDDI
+static ssize_t fwu_sysfs_write_lockdown_code_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t fwu_sysfs_read_lockdown_code_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+#endif
+
+enum f34_version {
+ F34_V0 = 0,
+ F34_V1,
+ F34_V2,
+};
+
+enum bl_version {
+ BL_V5 = 5,
+ BL_V6 = 6,
+ BL_V7 = 7,
+ BL_V8 = 8,
+};
+
+enum flash_area {
+ NONE = 0,
+ UI_FIRMWARE,
+ UI_CONFIG,
+};
+
+enum update_mode {
+ NORMAL = 1,
+ FORCE = 2,
+ LOCKDOWN = 8,
+};
+
+enum config_area {
+ UI_CONFIG_AREA = 0,
+ PM_CONFIG_AREA,
+ BL_CONFIG_AREA,
+ DP_CONFIG_AREA,
+ FLASH_CONFIG_AREA,
+#ifdef SYNA_TDDI
+ TDDI_FORCE_CONFIG_AREA,
+ TDDI_LCM_DATA_AREA,
+ TDDI_OEM_DATA_AREA,
+#endif
+ UPP_AREA,
+};
+
+enum v7_status {
+ SUCCESS = 0x00,
+ DEVICE_NOT_IN_BOOTLOADER_MODE,
+ INVALID_PARTITION,
+ INVALID_COMMAND,
+ INVALID_BLOCK_OFFSET,
+ INVALID_TRANSFER,
+ NOT_ERASED,
+ FLASH_PROGRAMMING_KEY_INCORRECT,
+ BAD_PARTITION_TABLE,
+ CHECKSUM_FAILED,
+ FLASH_HARDWARE_FAILURE = 0x1f,
+};
+
+enum v7_partition_id {
+ BOOTLOADER_PARTITION = 0x01,
+ DEVICE_CONFIG_PARTITION,
+ FLASH_CONFIG_PARTITION,
+ MANUFACTURING_BLOCK_PARTITION,
+ GUEST_SERIALIZATION_PARTITION,
+ GLOBAL_PARAMETERS_PARTITION,
+ CORE_CODE_PARTITION,
+ CORE_CONFIG_PARTITION,
+ GUEST_CODE_PARTITION,
+ DISPLAY_CONFIG_PARTITION,
+ EXTERNAL_TOUCH_AFE_CONFIG_PARTITION,
+ UTILITY_PARAMETER_PARTITION,
+};
+
+enum v7_flash_command {
+ CMD_V7_IDLE = 0x00,
+ CMD_V7_ENTER_BL,
+ CMD_V7_READ,
+ CMD_V7_WRITE,
+ CMD_V7_ERASE,
+ CMD_V7_ERASE_AP,
+ CMD_V7_SENSOR_ID,
+};
+
+enum v5v6_flash_command {
+ CMD_V5V6_IDLE = 0x0,
+ CMD_V5V6_WRITE_FW = 0x2,
+ CMD_V5V6_ERASE_ALL = 0x3,
+ CMD_V5V6_WRITE_LOCKDOWN = 0x4,
+ CMD_V5V6_READ_CONFIG = 0x5,
+ CMD_V5V6_WRITE_CONFIG = 0x6,
+ CMD_V5V6_ERASE_UI_CONFIG = 0x7,
+ CMD_V5V6_ERASE_BL_CONFIG = 0x9,
+ CMD_V5V6_ERASE_DISP_CONFIG = 0xa,
+ CMD_V5V6_ERASE_GUEST_CODE = 0xb,
+ CMD_V5V6_WRITE_GUEST_CODE = 0xc,
+ CMD_V5V6_ERASE_CHIP = 0x0d,
+ CMD_V5V6_ENABLE_FLASH_PROG = 0xf,
+#ifdef SYNA_TDDI
+ CMD_V5V6_ERASE_FORCE_CONFIG = 0x11,
+ CMD_V5V6_READ_FORCE_CONFIG = 0x12,
+ CMD_V5V6_WRITE_FORCE_CONFIG = 0x13,
+ CMD_V5V6_ERASE_LOCKDOWN_DATA = 0x1a,
+ CMD_V5V6_READ_LOCKDOWN_DATA = 0x1b,
+ CMD_V5V6_WRITE_LOCKDOWN_DATA = 0x1c,
+ CMD_V5V6_ERASE_LCM_DATA = 0x1d,
+ CMD_V5V6_ERASE_OEM_DATA = 0x1e,
+#endif
+};
+
+enum flash_command {
+ CMD_IDLE = 0,
+ CMD_WRITE_FW,
+ CMD_WRITE_CONFIG,
+ CMD_WRITE_LOCKDOWN,
+ CMD_WRITE_GUEST_CODE,
+ CMD_WRITE_BOOTLOADER,
+ CMD_WRITE_UTILITY_PARAM,
+ CMD_READ_CONFIG,
+ CMD_ERASE_ALL,
+ CMD_ERASE_UI_FIRMWARE,
+ CMD_ERASE_UI_CONFIG,
+ CMD_ERASE_BL_CONFIG,
+ CMD_ERASE_DISP_CONFIG,
+ CMD_ERASE_FLASH_CONFIG,
+ CMD_ERASE_GUEST_CODE,
+ CMD_ERASE_BOOTLOADER,
+ CMD_ERASE_UTILITY_PARAMETER,
+ CMD_ENABLE_FLASH_PROG,
+#ifdef SYNA_TDDI
+ CMD_ERASE_CHIP,
+ CMD_ERASE_FORCE_CONFIG,
+ CMD_READ_FORCE_CONFIG,
+ CMD_WRITE_FORCE_CONFIG,
+ CMD_ERASE_LOCKDOWN_DATA,
+ CMD_READ_LOCKDOWN_DATA,
+ CMD_WRITE_LOCKDOWN_DATA,
+ CMD_ERASE_LCM_DATA,
+ CMD_READ_LCM_DATA,
+ CMD_WRITE_LCM_DATA,
+ CMD_ERASE_OEM_DATA,
+ CMD_READ_OEM_DATA,
+ CMD_WRITE_OEM_DATA,
+#endif
+};
+
+enum f35_flash_command {
+ CMD_F35_IDLE = 0x0,
+ CMD_F35_RESERVED = 0x1,
+ CMD_F35_WRITE_CHUNK = 0x2,
+ CMD_F35_ERASE_ALL = 0x3,
+ CMD_F35_RESET = 0x10,
+};
+
+enum container_id {
+ TOP_LEVEL_CONTAINER = 0,
+ UI_CONTAINER,
+ UI_CONFIG_CONTAINER,
+ BL_CONTAINER,
+ BL_IMAGE_CONTAINER,
+ BL_CONFIG_CONTAINER,
+ BL_LOCKDOWN_INFO_CONTAINER,
+ PERMANENT_CONFIG_CONTAINER,
+ GUEST_CODE_CONTAINER,
+ BL_PROTOCOL_DESCRIPTOR_CONTAINER,
+ UI_PROTOCOL_DESCRIPTOR_CONTAINER,
+ RMI_SELF_DISCOVERY_CONTAINER,
+ RMI_PAGE_CONTENT_CONTAINER,
+ GENERAL_INFORMATION_CONTAINER,
+ DEVICE_CONFIG_CONTAINER,
+ FLASH_CONFIG_CONTAINER,
+ GUEST_SERIALIZATION_CONTAINER,
+ GLOBAL_PARAMETERS_CONTAINER,
+ CORE_CODE_CONTAINER,
+ CORE_CONFIG_CONTAINER,
+ DISPLAY_CONFIG_CONTAINER,
+ EXTERNAL_TOUCH_AFE_CONFIG_CONTAINER,
+ UTILITY_CONTAINER,
+ UTILITY_PARAMETER_CONTAINER,
+};
+
+enum utility_parameter_id {
+ UNUSED = 0,
+ FORCE_PARAMETER,
+ ANTI_BENDING_PARAMETER,
+};
+
+struct pdt_properties {
+ union {
+ struct {
+ unsigned char reserved_1:6;
+ unsigned char has_bsr:1;
+ unsigned char reserved_2:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct partition_table {
+ unsigned char partition_id:5;
+ unsigned char byte_0_reserved:3;
+ unsigned char byte_1_reserved;
+ unsigned char partition_length_7_0;
+ unsigned char partition_length_15_8;
+ unsigned char start_physical_address_7_0;
+ unsigned char start_physical_address_15_8;
+ unsigned char partition_properties_7_0;
+ unsigned char partition_properties_15_8;
+} __packed;
+
+struct f01_device_control {
+ union {
+ struct {
+ unsigned char sleep_mode:2;
+ unsigned char nosleep:1;
+ unsigned char reserved:2;
+ unsigned char charger_connected:1;
+ unsigned char report_rate:1;
+ unsigned char configured:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f34_v7_query_0 {
+ union {
+ struct {
+ unsigned char subpacket_1_size:3;
+ unsigned char has_config_id:1;
+ unsigned char f34_query0_b4:1;
+ unsigned char has_thqa:1;
+ unsigned char f34_query0_b6__7:2;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f34_v7_query_1_7 {
+ union {
+ struct {
+ /* query 1 */
+ unsigned char bl_minor_revision;
+ unsigned char bl_major_revision;
+
+ /* query 2 */
+ unsigned char bl_fw_id_7_0;
+ unsigned char bl_fw_id_15_8;
+ unsigned char bl_fw_id_23_16;
+ unsigned char bl_fw_id_31_24;
+
+ /* query 3 */
+ unsigned char minimum_write_size;
+ unsigned char block_size_7_0;
+ unsigned char block_size_15_8;
+ unsigned char flash_page_size_7_0;
+ unsigned char flash_page_size_15_8;
+
+ /* query 4 */
+ unsigned char adjustable_partition_area_size_7_0;
+ unsigned char adjustable_partition_area_size_15_8;
+
+ /* query 5 */
+ unsigned char flash_config_length_7_0;
+ unsigned char flash_config_length_15_8;
+
+ /* query 6 */
+ unsigned char payload_length_7_0;
+ unsigned char payload_length_15_8;
+
+ /* query 7 */
+ unsigned char f34_query7_b0:1;
+ unsigned char has_bootloader:1;
+ unsigned char has_device_config:1;
+ unsigned char has_flash_config:1;
+ unsigned char has_manufacturing_block:1;
+ unsigned char has_guest_serialization:1;
+ unsigned char has_global_parameters:1;
+ unsigned char has_core_code:1;
+ unsigned char has_core_config:1;
+ unsigned char has_guest_code:1;
+ unsigned char has_display_config:1;
+ unsigned char f34_query7_b11__15:5;
+ unsigned char f34_query7_b16__23;
+ unsigned char f34_query7_b24__31;
+ } __packed;
+ unsigned char data[21];
+ };
+};
+
+struct f34_v7_data0 {
+ union {
+ struct {
+ unsigned char operation_status:5;
+ unsigned char device_cfg_status:2;
+ unsigned char bl_mode:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f34_v7_data_1_5 {
+ union {
+ struct {
+ unsigned char partition_id:5;
+ unsigned char f34_data1_b5__7:3;
+ unsigned char block_offset_7_0;
+ unsigned char block_offset_15_8;
+ unsigned char transfer_length_7_0;
+ unsigned char transfer_length_15_8;
+ unsigned char command;
+ unsigned char payload_0;
+ unsigned char payload_1;
+ } __packed;
+ unsigned char data[8];
+ };
+};
+
+struct f34_v5v6_flash_properties {
+ union {
+ struct {
+ unsigned char reg_map:1;
+ unsigned char unlocked:1;
+ unsigned char has_config_id:1;
+ unsigned char has_pm_config:1;
+ unsigned char has_bl_config:1;
+ unsigned char has_disp_config:1;
+ unsigned char has_ctrl1:1;
+ unsigned char has_query4:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f34_v5v6_flash_properties_2 {
+ union {
+ struct {
+ unsigned char has_guest_code:1;
+ unsigned char f34_query4_b1:1;
+ unsigned char has_gesture_config:1;
+ unsigned char has_force_config:1;
+ unsigned char has_lockdown_data:1;
+ unsigned char has_lcm_data:1;
+ unsigned char has_oem_data:1;
+ unsigned char f34_query4_b7:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct register_offset {
+ unsigned char properties;
+ unsigned char properties_2;
+ unsigned char block_size;
+ unsigned char block_count;
+ unsigned char gc_block_count;
+ unsigned char flash_status;
+ unsigned char partition_id;
+ unsigned char block_number;
+ unsigned char transfer_length;
+ unsigned char flash_cmd;
+ unsigned char payload;
+};
+
+struct block_count {
+ unsigned short ui_firmware;
+ unsigned short ui_config;
+ unsigned short dp_config;
+ unsigned short pm_config;
+ unsigned short fl_config;
+ unsigned short bl_image;
+ unsigned short bl_config;
+ unsigned short utility_param;
+ unsigned short lockdown;
+ unsigned short guest_code;
+#ifdef SYNA_TDDI
+ unsigned short tddi_force_config;
+ unsigned short tddi_lockdown_data;
+ unsigned short tddi_lcm_data;
+ unsigned short tddi_oem_data;
+#endif
+ unsigned short total_count;
+};
+
+struct physical_address {
+ unsigned short ui_firmware;
+ unsigned short ui_config;
+ unsigned short dp_config;
+ unsigned short pm_config;
+ unsigned short fl_config;
+ unsigned short bl_image;
+ unsigned short bl_config;
+ unsigned short utility_param;
+ unsigned short lockdown;
+ unsigned short guest_code;
+};
+
+struct container_descriptor {
+ unsigned char content_checksum[4];
+ unsigned char container_id[2];
+ unsigned char minor_version;
+ unsigned char major_version;
+ unsigned char reserved_08;
+ unsigned char reserved_09;
+ unsigned char reserved_0a;
+ unsigned char reserved_0b;
+ unsigned char container_option_flags[4];
+ unsigned char content_options_length[4];
+ unsigned char content_options_address[4];
+ unsigned char content_length[4];
+ unsigned char content_address[4];
+};
+
+struct image_header_10 {
+ unsigned char checksum[4];
+ unsigned char reserved_04;
+ unsigned char reserved_05;
+ unsigned char minor_header_version;
+ unsigned char major_header_version;
+ unsigned char reserved_08;
+ unsigned char reserved_09;
+ unsigned char reserved_0a;
+ unsigned char reserved_0b;
+ unsigned char top_level_container_start_addr[4];
+};
+
+struct image_header_05_06 {
+ /* 0x00 - 0x0f */
+ unsigned char checksum[4];
+ unsigned char reserved_04;
+ unsigned char reserved_05;
+ unsigned char options_firmware_id:1;
+ unsigned char options_bootloader:1;
+ unsigned char options_guest_code:1;
+ unsigned char options_tddi:1;
+ unsigned char options_reserved:4;
+ unsigned char header_version;
+ unsigned char firmware_size[4];
+ unsigned char config_size[4];
+ /* 0x10 - 0x1f */
+ unsigned char product_id[PRODUCT_ID_SIZE];
+ unsigned char package_id[2];
+ unsigned char package_id_revision[2];
+ unsigned char product_info[PRODUCT_INFO_SIZE];
+ /* 0x20 - 0x2f */
+ unsigned char bootloader_addr[4];
+ unsigned char bootloader_size[4];
+ unsigned char ui_addr[4];
+ unsigned char ui_size[4];
+ /* 0x30 - 0x3f */
+ unsigned char ds_id[16];
+ /* 0x40 - 0x4f */
+ union {
+ struct {
+ unsigned char cstmr_product_id[PRODUCT_ID_SIZE];
+ unsigned char reserved_4a_4f[6];
+ };
+ struct {
+ unsigned char dsp_cfg_addr[4];
+ unsigned char dsp_cfg_size[4];
+ unsigned char reserved_48_4f[8];
+ };
+ };
+ /* 0x50 - 0x53 */
+ unsigned char firmware_id[4];
+};
+
+struct block_data {
+ unsigned int size;
+ const unsigned char *data;
+};
+
+struct image_metadata {
+ bool contains_firmware_id;
+ bool contains_bootloader;
+ bool contains_guest_code;
+ bool contains_disp_config;
+ bool contains_perm_config;
+ bool contains_flash_config;
+ bool contains_utility_param;
+ unsigned int firmware_id;
+ unsigned int checksum;
+ unsigned int bootloader_size;
+ unsigned int disp_config_offset;
+ unsigned char bl_version;
+ unsigned char product_id[PRODUCT_ID_SIZE + 1];
+ unsigned char cstmr_product_id[PRODUCT_ID_SIZE + 1];
+ unsigned char utility_param_id[MAX_UTILITY_PARAMS];
+ struct block_data bootloader;
+ struct block_data utility;
+ struct block_data ui_firmware;
+ struct block_data ui_config;
+ struct block_data dp_config;
+ struct block_data pm_config;
+ struct block_data fl_config;
+ struct block_data bl_image;
+ struct block_data bl_config;
+ struct block_data utility_param[MAX_UTILITY_PARAMS];
+ struct block_data lockdown;
+ struct block_data guest_code;
+ struct block_count blkcount;
+ struct physical_address phyaddr;
+};
+
+struct synaptics_rmi4_fwu_handle {
+ enum bl_version bl_version;
+ bool initialized;
+ bool in_bl_mode;
+ bool in_ub_mode;
+ bool bl_mode_device;
+ bool force_update;
+ bool do_lockdown;
+ bool has_guest_code;
+#ifdef SYNA_TDDI
+ bool has_force_config;
+ bool has_lockdown_data;
+ bool has_lcm_data;
+ bool has_oem_data;
+#endif
+ bool has_utility_param;
+ bool new_partition_table;
+ bool incompatible_partition_tables;
+ bool write_bootloader;
+ unsigned int data_pos;
+ unsigned char *ext_data_source;
+ unsigned char *read_config_buf;
+ unsigned char intr_mask;
+ unsigned char command;
+ unsigned char bootloader_id[2];
+ unsigned char config_id[32];
+ unsigned char flash_status;
+ unsigned char partitions;
+#ifdef F51_DISCRETE_FORCE
+ unsigned char *cal_data;
+ unsigned short cal_data_off;
+ unsigned short cal_data_size;
+ unsigned short cal_data_buf_size;
+ unsigned short cal_packet_data_size;
+#endif
+ unsigned short block_size;
+ unsigned short config_size;
+ unsigned short config_area;
+ unsigned short config_block_count;
+ unsigned short flash_config_length;
+ unsigned short payload_length;
+ unsigned short partition_table_bytes;
+ unsigned short read_config_buf_size;
+ const unsigned char *config_data;
+ const unsigned char *image;
+ unsigned char *image_name;
+ unsigned int image_size;
+ struct image_metadata img;
+ struct register_offset off;
+ struct block_count blkcount;
+ struct physical_address phyaddr;
+ struct f34_v5v6_flash_properties flash_properties;
+ struct synaptics_rmi4_fn_desc f34_fd;
+ struct synaptics_rmi4_fn_desc f35_fd;
+ struct synaptics_rmi4_data *rmi4_data;
+ struct workqueue_struct *fwu_workqueue;
+ struct work_struct fwu_work;
+};
+
+static struct bin_attribute dev_attr_data = {
+ .attr = {
+ .name = "data",
+ .mode = 0664,
+ },
+ .size = 0,
+ .read = fwu_sysfs_show_image,
+ .write = fwu_sysfs_store_image,
+};
+
+static struct device_attribute attrs[] = {
+ __ATTR(dorecovery, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_do_recovery_store),
+ __ATTR(doreflash, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_do_reflash_store),
+ __ATTR(writeconfig, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_write_config_store),
+ __ATTR(readconfig, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_read_config_store),
+ __ATTR(configarea, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_config_area_store),
+ __ATTR(imagename, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_image_name_store),
+ __ATTR(imagesize, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_image_size_store),
+ __ATTR(blocksize, 0444,
+ fwu_sysfs_block_size_show,
+ synaptics_rmi4_store_error),
+ __ATTR(fwblockcount, 0444,
+ fwu_sysfs_firmware_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(configblockcount, 0444,
+ fwu_sysfs_configuration_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(dispconfigblockcount, 0444,
+ fwu_sysfs_disp_config_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(permconfigblockcount, 0444,
+ fwu_sysfs_perm_config_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(blconfigblockcount, 0444,
+ fwu_sysfs_bl_config_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(uppblockcount, 0444,
+ fwu_sysfs_utility_parameter_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(guestcodeblockcount, 0444,
+ fwu_sysfs_guest_code_block_count_show,
+ synaptics_rmi4_store_error),
+ __ATTR(writeguestcode, 0220,
+ synaptics_rmi4_show_error,
+ fwu_sysfs_write_guest_code_store),
+#ifdef SYNA_TDDI
+ __ATTR(lockdowncode, 0664,
+ fwu_sysfs_read_lockdown_code_show,
+ fwu_sysfs_write_lockdown_code_store),
+#endif
+};
+
+static struct synaptics_rmi4_fwu_handle *fwu;
+
+DECLARE_COMPLETION(fwu_remove_complete);
+
+DEFINE_MUTEX(fwu_sysfs_mutex);
+
+static void calculate_checksum(unsigned short *data, unsigned long len,
+ unsigned long *result)
+{
+ unsigned long temp;
+ unsigned long sum1 = 0xffff;
+ unsigned long sum2 = 0xffff;
+
+ *result = 0xffffffff;
+
+ while (len--) {
+ temp = *data;
+ sum1 += temp;
+ sum2 += sum1;
+ sum1 = (sum1 & 0xffff) + (sum1 >> 16);
+ sum2 = (sum2 & 0xffff) + (sum2 >> 16);
+ data++;
+ }
+
+ *result = sum2 << 16 | sum1;
+
+ return;
+}
+
+static void convert_to_little_endian(unsigned char *dest, unsigned long src)
+{
+ dest[0] = (unsigned char)(src & 0xff);
+ dest[1] = (unsigned char)((src >> 8) & 0xff);
+ dest[2] = (unsigned char)((src >> 16) & 0xff);
+ dest[3] = (unsigned char)((src >> 24) & 0xff);
+
+ return;
+}
+
+static unsigned int le_to_uint(const unsigned char *ptr)
+{
+ return (unsigned int)ptr[0] +
+ (unsigned int)ptr[1] * 0x100 +
+ (unsigned int)ptr[2] * 0x10000 +
+ (unsigned int)ptr[3] * 0x1000000;
+}
+
+#ifdef F51_DISCRETE_FORCE
+static int fwu_f51_force_data_init(void)
+{
+ int retval;
+ unsigned char query_count;
+ unsigned char packet_info;
+ unsigned char offset[2];
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f51_query_base_addr + 7,
+ offset,
+ sizeof(offset));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read force data offset\n",
+ __func__);
+ return retval;
+ }
+
+ fwu->cal_data_off = offset[0] | offset[1] << 8;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f51_query_base_addr,
+ &query_count,
+ sizeof(query_count));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read number of F51 query registers\n",
+ __func__);
+ return retval;
+ }
+
+ if (query_count >= 10) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f51_query_base_addr + 9,
+ &packet_info,
+ sizeof(packet_info));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F51 packet register info\n",
+ __func__);
+ return retval;
+ }
+
+ if (packet_info & MASK_1BIT) {
+ fwu->cal_packet_data_size = packet_info >> 1;
+ fwu->cal_packet_data_size *= 2;
+ } else {
+ fwu->cal_packet_data_size = 0;
+ }
+ } else {
+ fwu->cal_packet_data_size = 0;
+ }
+
+ fwu->cal_data_size = CAL_DATA_SIZE + fwu->cal_packet_data_size;
+ if (fwu->cal_data_size > fwu->cal_data_buf_size) {
+ kfree(fwu->cal_data);
+ fwu->cal_data_buf_size = fwu->cal_data_size;
+ fwu->cal_data = kmalloc(fwu->cal_data_buf_size, GFP_KERNEL);
+ if (!fwu->cal_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fwu->cal_data\n",
+ __func__);
+ fwu->cal_data_buf_size = 0;
+ return -ENOMEM;
+ }
+ }
+
+ return 0;
+}
+#endif
+
+static int fwu_allocate_read_config_buf(unsigned int count)
+{
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (count > fwu->read_config_buf_size) {
+ kfree(fwu->read_config_buf);
+ fwu->read_config_buf = kzalloc(count, GFP_KERNEL);
+ if (!fwu->read_config_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fwu->read_config_buf\n",
+ __func__);
+ fwu->read_config_buf_size = 0;
+ return -ENOMEM;
+ }
+ fwu->read_config_buf_size = count;
+ }
+
+ return 0;
+}
+
+static void fwu_compare_partition_tables(void)
+{
+ fwu->incompatible_partition_tables = false;
+
+ if (fwu->phyaddr.bl_image != fwu->img.phyaddr.bl_image)
+ fwu->incompatible_partition_tables = true;
+ else if (fwu->phyaddr.lockdown != fwu->img.phyaddr.lockdown)
+ fwu->incompatible_partition_tables = true;
+ else if (fwu->phyaddr.bl_config != fwu->img.phyaddr.bl_config)
+ fwu->incompatible_partition_tables = true;
+ else if (fwu->phyaddr.utility_param != fwu->img.phyaddr.utility_param)
+ fwu->incompatible_partition_tables = true;
+
+ if (fwu->bl_version == BL_V7) {
+ if (fwu->phyaddr.fl_config != fwu->img.phyaddr.fl_config)
+ fwu->incompatible_partition_tables = true;
+ }
+
+ fwu->new_partition_table = false;
+
+ if (fwu->phyaddr.ui_firmware != fwu->img.phyaddr.ui_firmware)
+ fwu->new_partition_table = true;
+ else if (fwu->phyaddr.ui_config != fwu->img.phyaddr.ui_config)
+ fwu->new_partition_table = true;
+
+ if (fwu->flash_properties.has_disp_config) {
+ if (fwu->phyaddr.dp_config != fwu->img.phyaddr.dp_config)
+ fwu->new_partition_table = true;
+ }
+
+ if (fwu->has_guest_code) {
+ if (fwu->phyaddr.guest_code != fwu->img.phyaddr.guest_code)
+ fwu->new_partition_table = true;
+ }
+
+ return;
+}
+
+static void fwu_parse_partition_table(const unsigned char *partition_table,
+ struct block_count *blkcount, struct physical_address *phyaddr)
+{
+ unsigned char ii;
+ unsigned char index;
+ unsigned char offset;
+ unsigned short partition_length;
+ unsigned short physical_address;
+ struct partition_table *ptable;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ for (ii = 0; ii < fwu->partitions; ii++) {
+ index = ii * 8 + 2;
+ ptable = (struct partition_table *)&partition_table[index];
+ partition_length = ptable->partition_length_15_8 << 8 |
+ ptable->partition_length_7_0;
+ physical_address = ptable->start_physical_address_15_8 << 8 |
+ ptable->start_physical_address_7_0;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Partition entry %d:\n",
+ __func__, ii);
+ for (offset = 0; offset < 8; offset++) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: 0x%02x\n",
+ __func__,
+ partition_table[index + offset]);
+ }
+ switch (ptable->partition_id) {
+ case CORE_CODE_PARTITION:
+ blkcount->ui_firmware = partition_length;
+ phyaddr->ui_firmware = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Core code block count: %d\n",
+ __func__, blkcount->ui_firmware);
+ blkcount->total_count += partition_length;
+ break;
+ case CORE_CONFIG_PARTITION:
+ blkcount->ui_config = partition_length;
+ phyaddr->ui_config = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Core config block count: %d\n",
+ __func__, blkcount->ui_config);
+ blkcount->total_count += partition_length;
+ break;
+ case BOOTLOADER_PARTITION:
+ blkcount->bl_image = partition_length;
+ phyaddr->bl_image = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Bootloader block count: %d\n",
+ __func__, blkcount->bl_image);
+ blkcount->total_count += partition_length;
+ break;
+ case UTILITY_PARAMETER_PARTITION:
+ blkcount->utility_param = partition_length;
+ phyaddr->utility_param = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Utility parameter block count: %d\n",
+ __func__, blkcount->utility_param);
+ blkcount->total_count += partition_length;
+ break;
+ case DISPLAY_CONFIG_PARTITION:
+ blkcount->dp_config = partition_length;
+ phyaddr->dp_config = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Display config block count: %d\n",
+ __func__, blkcount->dp_config);
+ blkcount->total_count += partition_length;
+ break;
+ case FLASH_CONFIG_PARTITION:
+ blkcount->fl_config = partition_length;
+ phyaddr->fl_config = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Flash config block count: %d\n",
+ __func__, blkcount->fl_config);
+ blkcount->total_count += partition_length;
+ break;
+ case GUEST_CODE_PARTITION:
+ blkcount->guest_code = partition_length;
+ phyaddr->guest_code = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Guest code block count: %d\n",
+ __func__, blkcount->guest_code);
+ blkcount->total_count += partition_length;
+ break;
+ case GUEST_SERIALIZATION_PARTITION:
+ blkcount->pm_config = partition_length;
+ phyaddr->pm_config = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Guest serialization block count: %d\n",
+ __func__, blkcount->pm_config);
+ blkcount->total_count += partition_length;
+ break;
+ case GLOBAL_PARAMETERS_PARTITION:
+ blkcount->bl_config = partition_length;
+ phyaddr->bl_config = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Global parameters block count: %d\n",
+ __func__, blkcount->bl_config);
+ blkcount->total_count += partition_length;
+ break;
+ case DEVICE_CONFIG_PARTITION:
+ blkcount->lockdown = partition_length;
+ phyaddr->lockdown = physical_address;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Device config block count: %d\n",
+ __func__, blkcount->lockdown);
+ blkcount->total_count += partition_length;
+ break;
+ };
+ }
+
+ return;
+}
+
+static void fwu_parse_image_header_10_utility(const unsigned char *image)
+{
+ unsigned char ii;
+ unsigned char num_of_containers;
+ unsigned int addr;
+ unsigned int container_id;
+ unsigned int length;
+ const unsigned char *content;
+ struct container_descriptor *descriptor;
+
+ num_of_containers = fwu->img.utility.size / 4;
+
+ for (ii = 0; ii < num_of_containers; ii++) {
+ if (ii >= MAX_UTILITY_PARAMS)
+ continue;
+ addr = le_to_uint(fwu->img.utility.data + (ii * 4));
+ descriptor = (struct container_descriptor *)(image + addr);
+ container_id = descriptor->container_id[0] |
+ descriptor->container_id[1] << 8;
+ content = image + le_to_uint(descriptor->content_address);
+ length = le_to_uint(descriptor->content_length);
+ switch (container_id) {
+ case UTILITY_PARAMETER_CONTAINER:
+ fwu->img.utility_param[ii].data = content;
+ fwu->img.utility_param[ii].size = length;
+ fwu->img.utility_param_id[ii] = content[0];
+ break;
+ default:
+ break;
+ };
+ }
+
+ return;
+}
+
+static void fwu_parse_image_header_10_bootloader(const unsigned char *image)
+{
+ unsigned char ii;
+ unsigned char num_of_containers;
+ unsigned int addr;
+ unsigned int container_id;
+ unsigned int length;
+ const unsigned char *content;
+ struct container_descriptor *descriptor;
+
+ num_of_containers = (fwu->img.bootloader.size - 4) / 4;
+
+ for (ii = 1; ii <= num_of_containers; ii++) {
+ addr = le_to_uint(fwu->img.bootloader.data + (ii * 4));
+ descriptor = (struct container_descriptor *)(image + addr);
+ container_id = descriptor->container_id[0] |
+ descriptor->container_id[1] << 8;
+ content = image + le_to_uint(descriptor->content_address);
+ length = le_to_uint(descriptor->content_length);
+ switch (container_id) {
+ case BL_IMAGE_CONTAINER:
+ fwu->img.bl_image.data = content;
+ fwu->img.bl_image.size = length;
+ break;
+ case BL_CONFIG_CONTAINER:
+ case GLOBAL_PARAMETERS_CONTAINER:
+ fwu->img.bl_config.data = content;
+ fwu->img.bl_config.size = length;
+ break;
+ case BL_LOCKDOWN_INFO_CONTAINER:
+ case DEVICE_CONFIG_CONTAINER:
+ fwu->img.lockdown.data = content;
+ fwu->img.lockdown.size = length;
+ break;
+ default:
+ break;
+ };
+ }
+
+ return;
+}
+
+static void fwu_parse_image_header_10(void)
+{
+ unsigned char ii;
+ unsigned char num_of_containers;
+ unsigned int addr;
+ unsigned int offset;
+ unsigned int container_id;
+ unsigned int length;
+ const unsigned char *image;
+ const unsigned char *content;
+ struct container_descriptor *descriptor;
+ struct image_header_10 *header;
+
+ image = fwu->image;
+ header = (struct image_header_10 *)image;
+
+ fwu->img.checksum = le_to_uint(header->checksum);
+
+ /* address of top level container */
+ offset = le_to_uint(header->top_level_container_start_addr);
+ descriptor = (struct container_descriptor *)(image + offset);
+
+ /* address of top level container content */
+ offset = le_to_uint(descriptor->content_address);
+ num_of_containers = le_to_uint(descriptor->content_length) / 4;
+
+ for (ii = 0; ii < num_of_containers; ii++) {
+ addr = le_to_uint(image + offset);
+ offset += 4;
+ descriptor = (struct container_descriptor *)(image + addr);
+ container_id = descriptor->container_id[0] |
+ descriptor->container_id[1] << 8;
+ content = image + le_to_uint(descriptor->content_address);
+ length = le_to_uint(descriptor->content_length);
+ switch (container_id) {
+ case UI_CONTAINER:
+ case CORE_CODE_CONTAINER:
+ fwu->img.ui_firmware.data = content;
+ fwu->img.ui_firmware.size = length;
+ break;
+ case UI_CONFIG_CONTAINER:
+ case CORE_CONFIG_CONTAINER:
+ fwu->img.ui_config.data = content;
+ fwu->img.ui_config.size = length;
+ break;
+ case BL_CONTAINER:
+ fwu->img.bl_version = *content;
+ fwu->img.bootloader.data = content;
+ fwu->img.bootloader.size = length;
+ fwu_parse_image_header_10_bootloader(image);
+ break;
+ case UTILITY_CONTAINER:
+ fwu->img.utility.data = content;
+ fwu->img.utility.size = length;
+ fwu_parse_image_header_10_utility(image);
+ break;
+ case GUEST_CODE_CONTAINER:
+ fwu->img.contains_guest_code = true;
+ fwu->img.guest_code.data = content;
+ fwu->img.guest_code.size = length;
+ break;
+ case DISPLAY_CONFIG_CONTAINER:
+ fwu->img.contains_disp_config = true;
+ fwu->img.dp_config.data = content;
+ fwu->img.dp_config.size = length;
+ break;
+ case PERMANENT_CONFIG_CONTAINER:
+ case GUEST_SERIALIZATION_CONTAINER:
+ fwu->img.contains_perm_config = true;
+ fwu->img.pm_config.data = content;
+ fwu->img.pm_config.size = length;
+ break;
+ case FLASH_CONFIG_CONTAINER:
+ fwu->img.contains_flash_config = true;
+ fwu->img.fl_config.data = content;
+ fwu->img.fl_config.size = length;
+ break;
+ case GENERAL_INFORMATION_CONTAINER:
+ fwu->img.contains_firmware_id = true;
+ fwu->img.firmware_id = le_to_uint(content + 4);
+ break;
+ default:
+ break;
+ }
+ }
+
+ return;
+}
+
+static void fwu_parse_image_header_05_06(void)
+{
+ int retval;
+ const unsigned char *image;
+ struct image_header_05_06 *header;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ image = fwu->image;
+ header = (struct image_header_05_06 *)image;
+
+ fwu->img.checksum = le_to_uint(header->checksum);
+
+ fwu->img.bl_version = header->header_version;
+
+ fwu->img.contains_bootloader = header->options_bootloader;
+ if (fwu->img.contains_bootloader)
+ fwu->img.bootloader_size = le_to_uint(header->bootloader_size);
+
+ fwu->img.ui_firmware.size = le_to_uint(header->firmware_size);
+ if (fwu->img.ui_firmware.size) {
+ fwu->img.ui_firmware.data = image + IMAGE_AREA_OFFSET;
+ if (fwu->img.contains_bootloader)
+ fwu->img.ui_firmware.data += fwu->img.bootloader_size;
+ }
+
+ if ((fwu->img.bl_version == BL_V6) && header->options_tddi)
+ fwu->img.ui_firmware.data = image + IMAGE_AREA_OFFSET;
+
+ fwu->img.ui_config.size = le_to_uint(header->config_size);
+ if (fwu->img.ui_config.size) {
+ fwu->img.ui_config.data = fwu->img.ui_firmware.data +
+ fwu->img.ui_firmware.size;
+ }
+
+ if (fwu->img.contains_bootloader || header->options_tddi)
+ fwu->img.contains_disp_config = true;
+ else
+ fwu->img.contains_disp_config = false;
+
+ if (fwu->img.contains_disp_config) {
+ fwu->img.disp_config_offset = le_to_uint(header->dsp_cfg_addr);
+ fwu->img.dp_config.size = le_to_uint(header->dsp_cfg_size);
+ fwu->img.dp_config.data = image + fwu->img.disp_config_offset;
+ } else {
+ retval = secure_memcpy(fwu->img.cstmr_product_id,
+ sizeof(fwu->img.cstmr_product_id),
+ header->cstmr_product_id,
+ sizeof(header->cstmr_product_id),
+ PRODUCT_ID_SIZE);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy custom product ID string\n",
+ __func__);
+ }
+ fwu->img.cstmr_product_id[PRODUCT_ID_SIZE] = 0;
+ }
+
+ fwu->img.contains_firmware_id = header->options_firmware_id;
+ if (fwu->img.contains_firmware_id)
+ fwu->img.firmware_id = le_to_uint(header->firmware_id);
+
+ retval = secure_memcpy(fwu->img.product_id,
+ sizeof(fwu->img.product_id),
+ header->product_id,
+ sizeof(header->product_id),
+ PRODUCT_ID_SIZE);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy product ID string\n",
+ __func__);
+ }
+ fwu->img.product_id[PRODUCT_ID_SIZE] = 0;
+
+ fwu->img.lockdown.size = LOCKDOWN_SIZE;
+ fwu->img.lockdown.data = image + IMAGE_AREA_OFFSET - LOCKDOWN_SIZE;
+
+ return;
+}
+
+static int fwu_parse_image_info(void)
+{
+ struct image_header_10 *header;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ header = (struct image_header_10 *)fwu->image;
+
+ memset(&fwu->img, 0x00, sizeof(fwu->img));
+
+ switch (header->major_header_version) {
+ case IMAGE_HEADER_VERSION_10:
+ fwu_parse_image_header_10();
+ break;
+ case IMAGE_HEADER_VERSION_05:
+ case IMAGE_HEADER_VERSION_06:
+ fwu_parse_image_header_05_06();
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Unsupported image file format (0x%02x)\n",
+ __func__, header->major_header_version);
+ return -EINVAL;
+ }
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8) {
+ if (!fwu->img.contains_flash_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No flash config found in firmware image\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ fwu_parse_partition_table(fwu->img.fl_config.data,
+ &fwu->img.blkcount, &fwu->img.phyaddr);
+
+ if (fwu->img.blkcount.utility_param)
+ fwu->img.contains_utility_param = true;
+
+ fwu_compare_partition_tables();
+ } else {
+ fwu->new_partition_table = false;
+ fwu->incompatible_partition_tables = false;
+ }
+
+ return 0;
+}
+
+static int fwu_read_flash_status(void)
+{
+ int retval;
+ unsigned char status;
+ unsigned char command;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f34_fd.data_base_addr + fwu->off.flash_status,
+ &status,
+ sizeof(status));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash status\n",
+ __func__);
+ return retval;
+ }
+
+ fwu->in_bl_mode = status >> 7;
+
+ if (fwu->bl_version == BL_V5)
+ fwu->flash_status = (status >> 4) & MASK_3BIT;
+ else if (fwu->bl_version == BL_V6)
+ fwu->flash_status = status & MASK_3BIT;
+ else if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ fwu->flash_status = status & MASK_5BIT;
+
+ if (fwu->write_bootloader)
+ fwu->flash_status = 0x00;
+
+ if (fwu->flash_status != 0x00) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Flash status = %d, command = 0x%02x\n",
+ __func__, fwu->flash_status, fwu->command);
+ }
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8) {
+ if (fwu->flash_status == 0x08)
+ fwu->flash_status = 0x00;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f34_fd.data_base_addr + fwu->off.flash_cmd,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash command\n",
+ __func__);
+ return retval;
+ }
+
+ if (fwu->bl_version == BL_V5)
+ fwu->command = command & MASK_4BIT;
+ else if (fwu->bl_version == BL_V6)
+ fwu->command = command & MASK_6BIT;
+ else if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ fwu->command = command;
+
+ if (fwu->write_bootloader)
+ fwu->command = 0x00;
+
+ return 0;
+}
+
+static int fwu_wait_for_idle(int timeout_ms, bool poll)
+{
+ int count = 0;
+ int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ do {
+ usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US);
+
+ count++;
+ if (poll || (count == timeout_count))
+ fwu_read_flash_status();
+
+ if ((fwu->command == CMD_IDLE) && (fwu->flash_status == 0x00))
+ return 0;
+ } while (count < timeout_count);
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for idle status\n",
+ __func__);
+
+ return -ETIMEDOUT;
+}
+
+static int fwu_write_f34_v7_command_single_transaction(unsigned char cmd)
+{
+ int retval;
+ unsigned char data_base;
+ struct f34_v7_data_1_5 data_1_5;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ memset(data_1_5.data, 0x00, sizeof(data_1_5.data));
+
+ switch (cmd) {
+ case CMD_ERASE_ALL:
+ data_1_5.partition_id = CORE_CODE_PARTITION;
+ data_1_5.command = CMD_V7_ERASE_AP;
+ break;
+ case CMD_ERASE_UI_FIRMWARE:
+ data_1_5.partition_id = CORE_CODE_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_BL_CONFIG:
+ data_1_5.partition_id = GLOBAL_PARAMETERS_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_UI_CONFIG:
+ data_1_5.partition_id = CORE_CONFIG_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_DISP_CONFIG:
+ data_1_5.partition_id = DISPLAY_CONFIG_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_FLASH_CONFIG:
+ data_1_5.partition_id = FLASH_CONFIG_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_GUEST_CODE:
+ data_1_5.partition_id = GUEST_CODE_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_BOOTLOADER:
+ data_1_5.partition_id = BOOTLOADER_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ERASE_UTILITY_PARAMETER:
+ data_1_5.partition_id = UTILITY_PARAMETER_PARTITION;
+ data_1_5.command = CMD_V7_ERASE;
+ break;
+ case CMD_ENABLE_FLASH_PROG:
+ data_1_5.partition_id = BOOTLOADER_PARTITION;
+ data_1_5.command = CMD_V7_ENTER_BL;
+ break;
+ };
+
+ data_1_5.payload_0 = fwu->bootloader_id[0];
+ data_1_5.payload_1 = fwu->bootloader_id[1];
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.partition_id,
+ data_1_5.data,
+ sizeof(data_1_5.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write single transaction command\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_write_f34_v7_command(unsigned char cmd)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char command;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ switch (cmd) {
+ case CMD_WRITE_FW:
+ case CMD_WRITE_CONFIG:
+ case CMD_WRITE_LOCKDOWN:
+ case CMD_WRITE_GUEST_CODE:
+ case CMD_WRITE_BOOTLOADER:
+ case CMD_WRITE_UTILITY_PARAM:
+ command = CMD_V7_WRITE;
+ break;
+ case CMD_READ_CONFIG:
+ command = CMD_V7_READ;
+ break;
+ case CMD_ERASE_ALL:
+ command = CMD_V7_ERASE_AP;
+ break;
+ case CMD_ERASE_UI_FIRMWARE:
+ case CMD_ERASE_BL_CONFIG:
+ case CMD_ERASE_UI_CONFIG:
+ case CMD_ERASE_DISP_CONFIG:
+ case CMD_ERASE_FLASH_CONFIG:
+ case CMD_ERASE_GUEST_CODE:
+ case CMD_ERASE_BOOTLOADER:
+ case CMD_ERASE_UTILITY_PARAMETER:
+ command = CMD_V7_ERASE;
+ break;
+ case CMD_ENABLE_FLASH_PROG:
+ command = CMD_V7_ENTER_BL;
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid command 0x%02x\n",
+ __func__, cmd);
+ return -EINVAL;
+ };
+
+ fwu->command = command;
+
+ switch (cmd) {
+ case CMD_ERASE_ALL:
+ case CMD_ERASE_UI_FIRMWARE:
+ case CMD_ERASE_BL_CONFIG:
+ case CMD_ERASE_UI_CONFIG:
+ case CMD_ERASE_DISP_CONFIG:
+ case CMD_ERASE_FLASH_CONFIG:
+ case CMD_ERASE_GUEST_CODE:
+ case CMD_ERASE_BOOTLOADER:
+ case CMD_ERASE_UTILITY_PARAMETER:
+ case CMD_ENABLE_FLASH_PROG:
+ retval = fwu_write_f34_v7_command_single_transaction(cmd);
+ if (retval < 0)
+ return retval;
+ else
+ return 0;
+ default:
+ break;
+ };
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.flash_cmd,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write flash command\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_write_f34_v5v6_command(unsigned char cmd)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char command;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ switch (cmd) {
+ case CMD_IDLE:
+ command = CMD_V5V6_IDLE;
+ break;
+ case CMD_WRITE_FW:
+ command = CMD_V5V6_WRITE_FW;
+ break;
+ case CMD_WRITE_CONFIG:
+ command = CMD_V5V6_WRITE_CONFIG;
+ break;
+ case CMD_WRITE_LOCKDOWN:
+ command = CMD_V5V6_WRITE_LOCKDOWN;
+ break;
+ case CMD_WRITE_GUEST_CODE:
+ command = CMD_V5V6_WRITE_GUEST_CODE;
+ break;
+ case CMD_READ_CONFIG:
+ command = CMD_V5V6_READ_CONFIG;
+ break;
+ case CMD_ERASE_ALL:
+ command = CMD_V5V6_ERASE_ALL;
+ break;
+ case CMD_ERASE_UI_CONFIG:
+ command = CMD_V5V6_ERASE_UI_CONFIG;
+ break;
+ case CMD_ERASE_DISP_CONFIG:
+ command = CMD_V5V6_ERASE_DISP_CONFIG;
+ break;
+ case CMD_ERASE_GUEST_CODE:
+ command = CMD_V5V6_ERASE_GUEST_CODE;
+ break;
+ case CMD_ENABLE_FLASH_PROG:
+ command = CMD_V5V6_ENABLE_FLASH_PROG;
+ break;
+#ifdef SYNA_TDDI
+ case CMD_ERASE_CHIP:
+ command = CMD_V5V6_ERASE_CHIP;
+ break;
+ case CMD_ERASE_FORCE_CONFIG:
+ command = CMD_V5V6_ERASE_FORCE_CONFIG;
+ break;
+ case CMD_READ_FORCE_CONFIG:
+ command = CMD_V5V6_READ_FORCE_CONFIG;
+ break;
+ case CMD_WRITE_FORCE_CONFIG:
+ command = CMD_V5V6_WRITE_CONFIG;
+ break;
+ case CMD_ERASE_LOCKDOWN_DATA:
+ command = CMD_V5V6_ERASE_LOCKDOWN_DATA;
+ break;
+ case CMD_READ_LOCKDOWN_DATA:
+ command = CMD_V5V6_READ_LOCKDOWN_DATA;
+ break;
+ case CMD_WRITE_LOCKDOWN_DATA:
+ command = CMD_V5V6_WRITE_LOCKDOWN_DATA;
+ break;
+ case CMD_ERASE_LCM_DATA:
+ command = CMD_V5V6_ERASE_LCM_DATA;
+ break;
+ case CMD_ERASE_OEM_DATA:
+ command = CMD_V5V6_ERASE_OEM_DATA;
+ break;
+#endif
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid command 0x%02x\n",
+ __func__, cmd);
+ return -EINVAL;
+ }
+
+ switch (cmd) {
+ case CMD_ERASE_ALL:
+ case CMD_ERASE_UI_CONFIG:
+ case CMD_ERASE_DISP_CONFIG:
+ case CMD_ERASE_GUEST_CODE:
+#ifdef SYNA_TDDI
+ case CMD_ERASE_CHIP:
+ case CMD_ERASE_FORCE_CONFIG:
+ case CMD_ERASE_LOCKDOWN_DATA:
+ case CMD_ERASE_LCM_DATA:
+ case CMD_ERASE_OEM_DATA:
+#endif
+ case CMD_ENABLE_FLASH_PROG:
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.payload,
+ fwu->bootloader_id,
+ sizeof(fwu->bootloader_id));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write bootloader ID\n",
+ __func__);
+ return retval;
+ }
+ break;
+ default:
+ break;
+ };
+
+ fwu->command = command;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.flash_cmd,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command 0x%02x\n",
+ __func__, command);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_write_f34_command(unsigned char cmd)
+{
+ int retval;
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ retval = fwu_write_f34_v7_command(cmd);
+ else
+ retval = fwu_write_f34_v5v6_command(cmd);
+
+ return retval;
+}
+
+static int fwu_write_f34_v7_partition_id(unsigned char cmd)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char partition;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ switch (cmd) {
+ case CMD_WRITE_FW:
+ partition = CORE_CODE_PARTITION;
+ break;
+ case CMD_WRITE_CONFIG:
+ case CMD_READ_CONFIG:
+ if (fwu->config_area == UI_CONFIG_AREA)
+ partition = CORE_CONFIG_PARTITION;
+ else if (fwu->config_area == DP_CONFIG_AREA)
+ partition = DISPLAY_CONFIG_PARTITION;
+ else if (fwu->config_area == PM_CONFIG_AREA)
+ partition = GUEST_SERIALIZATION_PARTITION;
+ else if (fwu->config_area == BL_CONFIG_AREA)
+ partition = GLOBAL_PARAMETERS_PARTITION;
+ else if (fwu->config_area == FLASH_CONFIG_AREA)
+ partition = FLASH_CONFIG_PARTITION;
+ else if (fwu->config_area == UPP_AREA)
+ partition = UTILITY_PARAMETER_PARTITION;
+ break;
+ case CMD_WRITE_LOCKDOWN:
+ partition = DEVICE_CONFIG_PARTITION;
+ break;
+ case CMD_WRITE_GUEST_CODE:
+ partition = GUEST_CODE_PARTITION;
+ break;
+ case CMD_WRITE_BOOTLOADER:
+ partition = BOOTLOADER_PARTITION;
+ break;
+ case CMD_WRITE_UTILITY_PARAM:
+ partition = UTILITY_PARAMETER_PARTITION;
+ break;
+ case CMD_ERASE_ALL:
+ partition = CORE_CODE_PARTITION;
+ break;
+ case CMD_ERASE_BL_CONFIG:
+ partition = GLOBAL_PARAMETERS_PARTITION;
+ break;
+ case CMD_ERASE_UI_CONFIG:
+ partition = CORE_CONFIG_PARTITION;
+ break;
+ case CMD_ERASE_DISP_CONFIG:
+ partition = DISPLAY_CONFIG_PARTITION;
+ break;
+ case CMD_ERASE_FLASH_CONFIG:
+ partition = FLASH_CONFIG_PARTITION;
+ break;
+ case CMD_ERASE_GUEST_CODE:
+ partition = GUEST_CODE_PARTITION;
+ break;
+ case CMD_ERASE_BOOTLOADER:
+ partition = BOOTLOADER_PARTITION;
+ break;
+ case CMD_ENABLE_FLASH_PROG:
+ partition = BOOTLOADER_PARTITION;
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid command 0x%02x\n",
+ __func__, cmd);
+ return -EINVAL;
+ };
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.partition_id,
+ &partition,
+ sizeof(partition));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write partition ID\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_write_f34_partition_id(unsigned char cmd)
+{
+ int retval;
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ retval = fwu_write_f34_v7_partition_id(cmd);
+ else
+ retval = 0;
+
+ return retval;
+}
+
+static int fwu_read_f34_v7_partition_table(unsigned char *partition_table)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char length[2];
+ unsigned short block_number = 0;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ fwu->config_area = FLASH_CONFIG_AREA;
+
+ retval = fwu_write_f34_partition_id(CMD_READ_CONFIG);
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.block_number,
+ (unsigned char *)&block_number,
+ sizeof(block_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block number\n",
+ __func__);
+ return retval;
+ }
+
+ length[0] = (unsigned char)(fwu->flash_config_length & MASK_8BIT);
+ length[1] = (unsigned char)(fwu->flash_config_length >> 8);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.transfer_length,
+ length,
+ sizeof(length));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write transfer length\n",
+ __func__);
+ return retval;
+ }
+
+ retval = fwu_write_f34_command(CMD_READ_CONFIG);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command\n",
+ __func__);
+ return retval;
+ }
+
+ msleep(READ_CONFIG_WAIT_MS);
+
+ retval = fwu_wait_for_idle(WRITE_WAIT_MS, true);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to wait for idle status\n",
+ __func__);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_base + fwu->off.payload,
+ partition_table,
+ fwu->partition_table_bytes);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read block data\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_read_f34_v7_queries(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char query_base;
+ unsigned char index;
+ unsigned char offset;
+ unsigned char *ptable;
+ struct f34_v7_query_0 query_0;
+ struct f34_v7_query_1_7 query_1_7;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ query_base = fwu->f34_fd.query_base_addr;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ query_base,
+ query_0.data,
+ sizeof(query_0.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read query 0\n",
+ __func__);
+ return retval;
+ }
+
+ offset = query_0.subpacket_1_size + 1;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ query_base + offset,
+ query_1_7.data,
+ sizeof(query_1_7.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read queries 1 to 7\n",
+ __func__);
+ return retval;
+ }
+
+ fwu->bootloader_id[0] = query_1_7.bl_minor_revision;
+ fwu->bootloader_id[1] = query_1_7.bl_major_revision;
+
+ if (fwu->bootloader_id[1] == BL_V8)
+ fwu->bl_version = BL_V8;
+
+ fwu->block_size = query_1_7.block_size_15_8 << 8 |
+ query_1_7.block_size_7_0;
+
+ fwu->flash_config_length = query_1_7.flash_config_length_15_8 << 8 |
+ query_1_7.flash_config_length_7_0;
+
+ fwu->payload_length = query_1_7.payload_length_15_8 << 8 |
+ query_1_7.payload_length_7_0;
+
+ fwu->off.flash_status = V7_FLASH_STATUS_OFFSET;
+ fwu->off.partition_id = V7_PARTITION_ID_OFFSET;
+ fwu->off.block_number = V7_BLOCK_NUMBER_OFFSET;
+ fwu->off.transfer_length = V7_TRANSFER_LENGTH_OFFSET;
+ fwu->off.flash_cmd = V7_COMMAND_OFFSET;
+ fwu->off.payload = V7_PAYLOAD_OFFSET;
+
+ index = sizeof(query_1_7.data) - V7_PARTITION_SUPPORT_BYTES;
+
+ fwu->partitions = 0;
+ for (offset = 0; offset < V7_PARTITION_SUPPORT_BYTES; offset++) {
+ for (ii = 0; ii < 8; ii++) {
+ if (query_1_7.data[index + offset] & (1 << ii))
+ fwu->partitions++;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Supported partitions: 0x%02x\n",
+ __func__, query_1_7.data[index + offset]);
+ }
+
+ fwu->partition_table_bytes = fwu->partitions * 8 + 2;
+
+ ptable = kzalloc(fwu->partition_table_bytes, GFP_KERNEL);
+ if (!ptable) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for partition table\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ retval = fwu_read_f34_v7_partition_table(ptable);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read partition table\n",
+ __func__);
+ kfree(ptable);
+ return retval;
+ }
+
+ fwu_parse_partition_table(ptable, &fwu->blkcount, &fwu->phyaddr);
+
+ if (fwu->blkcount.dp_config)
+ fwu->flash_properties.has_disp_config = 1;
+ else
+ fwu->flash_properties.has_disp_config = 0;
+
+ if (fwu->blkcount.pm_config)
+ fwu->flash_properties.has_pm_config = 1;
+ else
+ fwu->flash_properties.has_pm_config = 0;
+
+ if (fwu->blkcount.bl_config)
+ fwu->flash_properties.has_bl_config = 1;
+ else
+ fwu->flash_properties.has_bl_config = 0;
+
+ if (fwu->blkcount.guest_code)
+ fwu->has_guest_code = 1;
+ else
+ fwu->has_guest_code = 0;
+
+ if (fwu->blkcount.utility_param)
+ fwu->has_utility_param = 1;
+ else
+ fwu->has_utility_param = 0;
+
+ kfree(ptable);
+
+ return 0;
+}
+
+static int fwu_read_f34_v5v6_queries(void)
+{
+ int retval;
+ unsigned char count;
+ unsigned char base;
+ unsigned char offset;
+ unsigned char buf[10];
+ struct f34_v5v6_flash_properties_2 properties_2;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ base = fwu->f34_fd.query_base_addr;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + V5V6_BOOTLOADER_ID_OFFSET,
+ fwu->bootloader_id,
+ sizeof(fwu->bootloader_id));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read bootloader ID\n",
+ __func__);
+ return retval;
+ }
+
+ if (fwu->bl_version == BL_V5) {
+ fwu->off.properties = V5_PROPERTIES_OFFSET;
+ fwu->off.block_size = V5_BLOCK_SIZE_OFFSET;
+ fwu->off.block_count = V5_BLOCK_COUNT_OFFSET;
+ fwu->off.block_number = V5_BLOCK_NUMBER_OFFSET;
+ fwu->off.payload = V5_BLOCK_DATA_OFFSET;
+ } else if (fwu->bl_version == BL_V6) {
+ fwu->off.properties = V6_PROPERTIES_OFFSET;
+ fwu->off.properties_2 = V6_PROPERTIES_2_OFFSET;
+ fwu->off.block_size = V6_BLOCK_SIZE_OFFSET;
+ fwu->off.block_count = V6_BLOCK_COUNT_OFFSET;
+ fwu->off.gc_block_count = V6_GUEST_CODE_BLOCK_COUNT_OFFSET;
+ fwu->off.block_number = V6_BLOCK_NUMBER_OFFSET;
+ fwu->off.payload = V6_BLOCK_DATA_OFFSET;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + fwu->off.block_size,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read block size info\n",
+ __func__);
+ return retval;
+ }
+
+ batohs(&fwu->block_size, &(buf[0]));
+
+ if (fwu->bl_version == BL_V5) {
+ fwu->off.flash_cmd = fwu->off.payload + fwu->block_size;
+ fwu->off.flash_status = fwu->off.flash_cmd;
+ } else if (fwu->bl_version == BL_V6) {
+ fwu->off.flash_cmd = V6_FLASH_COMMAND_OFFSET;
+ fwu->off.flash_status = V6_FLASH_STATUS_OFFSET;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + fwu->off.properties,
+ fwu->flash_properties.data,
+ sizeof(fwu->flash_properties.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash properties\n",
+ __func__);
+ return retval;
+ }
+
+ count = 4;
+
+ if (fwu->flash_properties.has_pm_config)
+ count += 2;
+
+ if (fwu->flash_properties.has_bl_config)
+ count += 2;
+
+ if (fwu->flash_properties.has_disp_config)
+ count += 2;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + fwu->off.block_count,
+ buf,
+ count);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read block count info\n",
+ __func__);
+ return retval;
+ }
+
+ batohs(&fwu->blkcount.ui_firmware, &(buf[0]));
+ batohs(&fwu->blkcount.ui_config, &(buf[2]));
+
+ count = 4;
+
+ if (fwu->flash_properties.has_pm_config) {
+ batohs(&fwu->blkcount.pm_config, &(buf[count]));
+ count += 2;
+ }
+
+ if (fwu->flash_properties.has_bl_config) {
+ batohs(&fwu->blkcount.bl_config, &(buf[count]));
+ count += 2;
+ }
+
+ if (fwu->flash_properties.has_disp_config)
+ batohs(&fwu->blkcount.dp_config, &(buf[count]));
+
+ fwu->has_guest_code = false;
+#ifdef SYNA_TDDI
+ fwu->has_force_config = false;
+ fwu->has_lockdown_data = false;
+ fwu->has_lcm_data = false;
+ fwu->has_oem_data = false;
+#endif
+
+ if (fwu->flash_properties.has_query4) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + fwu->off.properties_2,
+ properties_2.data,
+ sizeof(properties_2.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash properties 2\n",
+ __func__);
+ return retval;
+ }
+ offset = fwu->off.properties_2 + 1;
+ count = 0;
+ if (properties_2.has_guest_code) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + offset + count,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read guest code block count\n",
+ __func__);
+ return retval;
+ }
+
+ batohs(&fwu->blkcount.guest_code, &(buf[0]));
+ count++;
+ fwu->has_guest_code = true;
+ }
+#ifdef SYNA_TDDI
+ if (properties_2.has_force_config) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + offset + count,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read tddi force block count\n",
+ __func__);
+ return retval;
+ }
+ batohs(&fwu->blkcount.tddi_force_config, &(buf[0]));
+ count++;
+ fwu->has_force_config = true;
+ }
+ if (properties_2.has_lockdown_data) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + offset + count,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read tddi lockdown block count\n",
+ __func__);
+ return retval;
+ }
+ batohs(&fwu->blkcount.tddi_lockdown_data, &(buf[0]));
+ count++;
+ fwu->has_lockdown_data = true;
+ }
+ if (properties_2.has_lcm_data) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + offset + count,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read tddi lcm block count\n",
+ __func__);
+ return retval;
+ }
+ batohs(&fwu->blkcount.tddi_lcm_data, &(buf[0]));
+ count++;
+ fwu->has_lcm_data = true;
+ }
+ if (properties_2.has_oem_data) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ base + offset + count,
+ buf,
+ 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read tddi oem block count\n",
+ __func__);
+ return retval;
+ }
+ batohs(&fwu->blkcount.tddi_oem_data, &(buf[0]));
+ fwu->has_oem_data = true;
+ }
+#endif
+ }
+
+ fwu->has_utility_param = false;
+
+ return 0;
+}
+
+static int fwu_read_f34_queries(void)
+{
+ int retval;
+
+ memset(&fwu->blkcount, 0x00, sizeof(fwu->blkcount));
+ memset(&fwu->phyaddr, 0x00, sizeof(fwu->phyaddr));
+
+ if (fwu->bl_version == BL_V7)
+ retval = fwu_read_f34_v7_queries();
+ else
+ retval = fwu_read_f34_v5v6_queries();
+
+ return retval;
+}
+
+static int fwu_write_f34_v7_blocks(unsigned char *block_ptr,
+ unsigned short block_cnt, unsigned char command)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char length[2];
+ unsigned short transfer;
+ unsigned short remaining = block_cnt;
+ unsigned short block_number = 0;
+ unsigned short left_bytes;
+ unsigned short write_size;
+ unsigned short max_write_size;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ retval = fwu_write_f34_partition_id(command);
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.block_number,
+ (unsigned char *)&block_number,
+ sizeof(block_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block number\n",
+ __func__);
+ return retval;
+ }
+
+ do {
+ if (remaining / fwu->payload_length)
+ transfer = fwu->payload_length;
+ else
+ transfer = remaining;
+
+ length[0] = (unsigned char)(transfer & MASK_8BIT);
+ length[1] = (unsigned char)(transfer >> 8);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.transfer_length,
+ length,
+ sizeof(length));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write transfer length (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ retval = fwu_write_f34_command(command);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+#ifdef MAX_WRITE_SIZE
+ max_write_size = MAX_WRITE_SIZE;
+ if (max_write_size >= transfer * fwu->block_size)
+ max_write_size = transfer * fwu->block_size;
+ else if (max_write_size > fwu->block_size)
+ max_write_size -= max_write_size % fwu->block_size;
+ else
+ max_write_size = fwu->block_size;
+#else
+ max_write_size = transfer * fwu->block_size;
+#endif
+ left_bytes = transfer * fwu->block_size;
+
+ do {
+ if (left_bytes / max_write_size)
+ write_size = max_write_size;
+ else
+ write_size = left_bytes;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.payload,
+ block_ptr,
+ write_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block data (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ block_ptr += write_size;
+ left_bytes -= write_size;
+ } while (left_bytes);
+
+ retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to wait for idle status (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ remaining -= transfer;
+ } while (remaining);
+
+ return 0;
+}
+
+static int fwu_write_f34_v5v6_blocks(unsigned char *block_ptr,
+ unsigned short block_cnt, unsigned char command)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char block_number[] = {0, 0};
+ unsigned short blk;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ block_number[1] |= (fwu->config_area << 5);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.block_number,
+ block_number,
+ sizeof(block_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block number\n",
+ __func__);
+ return retval;
+ }
+
+ for (blk = 0; blk < block_cnt; blk++) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.payload,
+ block_ptr,
+ fwu->block_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block data (block %d)\n",
+ __func__, blk);
+ return retval;
+ }
+
+ retval = fwu_write_f34_command(command);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command for block %d\n",
+ __func__, blk);
+ return retval;
+ }
+
+ retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to wait for idle status (block %d)\n",
+ __func__, blk);
+ return retval;
+ }
+
+ block_ptr += fwu->block_size;
+ }
+
+ return 0;
+}
+
+static int fwu_write_f34_blocks(unsigned char *block_ptr,
+ unsigned short block_cnt, unsigned char cmd)
+{
+ int retval;
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ retval = fwu_write_f34_v7_blocks(block_ptr, block_cnt, cmd);
+ else
+ retval = fwu_write_f34_v5v6_blocks(block_ptr, block_cnt, cmd);
+
+ return retval;
+}
+
+static int fwu_read_f34_v7_blocks(unsigned short block_cnt,
+ unsigned char command)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char length[2];
+ unsigned short transfer;
+ unsigned short remaining = block_cnt;
+ unsigned short block_number = 0;
+ unsigned short index = 0;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ retval = fwu_write_f34_partition_id(command);
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.block_number,
+ (unsigned char *)&block_number,
+ sizeof(block_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block number\n",
+ __func__);
+ return retval;
+ }
+
+ do {
+ if (remaining / fwu->payload_length)
+ transfer = fwu->payload_length;
+ else
+ transfer = remaining;
+
+ length[0] = (unsigned char)(transfer & MASK_8BIT);
+ length[1] = (unsigned char)(transfer >> 8);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.transfer_length,
+ length,
+ sizeof(length));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write transfer length (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ retval = fwu_write_f34_command(command);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to wait for idle status (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_base + fwu->off.payload,
+ &fwu->read_config_buf[index],
+ transfer * fwu->block_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read block data (remaining = %d)\n",
+ __func__, remaining);
+ return retval;
+ }
+
+ index += (transfer * fwu->block_size);
+ remaining -= transfer;
+ } while (remaining);
+
+ return 0;
+}
+
+static int fwu_read_f34_v5v6_blocks(unsigned short block_cnt,
+ unsigned char command)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char block_number[] = {0, 0};
+ unsigned short blk;
+ unsigned short index = 0;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f34_fd.data_base_addr;
+
+ block_number[1] |= (fwu->config_area << 5);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ data_base + fwu->off.block_number,
+ block_number,
+ sizeof(block_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write block number\n",
+ __func__);
+ return retval;
+ }
+
+ for (blk = 0; blk < block_cnt; blk++) {
+ retval = fwu_write_f34_command(command);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write read config command\n",
+ __func__);
+ return retval;
+ }
+
+ retval = fwu_wait_for_idle(WRITE_WAIT_MS, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to wait for idle status\n",
+ __func__);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_base + fwu->off.payload,
+ &fwu->read_config_buf[index],
+ fwu->block_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read block data (block %d)\n",
+ __func__, blk);
+ return retval;
+ }
+
+ index += fwu->block_size;
+ }
+
+ return 0;
+}
+
+static int fwu_read_f34_blocks(unsigned short block_cnt, unsigned char cmd)
+{
+ int retval;
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ retval = fwu_read_f34_v7_blocks(block_cnt, cmd);
+ else
+ retval = fwu_read_f34_v5v6_blocks(block_cnt, cmd);
+
+ return retval;
+}
+
+static int fwu_get_image_firmware_id(unsigned int *fw_id)
+{
+ int retval;
+ unsigned char index = 0;
+ char *strptr;
+ char *firmware_id;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (fwu->img.contains_firmware_id) {
+ *fw_id = fwu->img.firmware_id;
+ } else {
+ strptr = strnstr(fwu->image_name, "PR", MAX_IMAGE_NAME_LEN);
+ if (!strptr) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No valid PR number (PRxxxxxxx) found in image file name (%s)\n",
+ __func__, fwu->image_name);
+ return -EINVAL;
+ }
+
+ strptr += 2;
+ firmware_id = kzalloc(MAX_FIRMWARE_ID_LEN, GFP_KERNEL);
+ if (!firmware_id) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for firmware_id\n",
+ __func__);
+ return -ENOMEM;
+ }
+ while (strptr[index] >= '0' && strptr[index] <= '9') {
+ firmware_id[index] = strptr[index];
+ index++;
+ if (index == MAX_FIRMWARE_ID_LEN - 1)
+ break;
+ }
+
+ retval = sstrtoul(firmware_id, 10, (unsigned long *)fw_id);
+ kfree(firmware_id);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to obtain image firmware ID\n",
+ __func__);
+ return -EINVAL;
+ }
+ }
+
+ return 0;
+}
+
+static int fwu_get_device_config_id(void)
+{
+ int retval;
+ unsigned char config_id_size;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ config_id_size = V7_CONFIG_ID_SIZE;
+ else
+ config_id_size = V5V6_CONFIG_ID_SIZE;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f34_fd.ctrl_base_addr,
+ fwu->config_id,
+ config_id_size);
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static enum flash_area fwu_go_nogo(void)
+{
+ int retval;
+ enum flash_area flash_area = NONE;
+ unsigned char ii;
+ unsigned char config_id_size;
+ unsigned int device_fw_id;
+ unsigned int image_fw_id;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (fwu->force_update) {
+ flash_area = UI_FIRMWARE;
+ goto exit;
+ }
+
+ /* Update both UI and config if device is in bootloader mode */
+ if (fwu->bl_mode_device) {
+ flash_area = UI_FIRMWARE;
+ goto exit;
+ }
+
+ /* Get device firmware ID */
+ device_fw_id = rmi4_data->firmware_id;
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device firmware ID = %d\n",
+ __func__, device_fw_id);
+
+ /* Get image firmware ID */
+ retval = fwu_get_image_firmware_id(&image_fw_id);
+ if (retval < 0) {
+ flash_area = NONE;
+ goto exit;
+ }
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Image firmware ID = %d\n",
+ __func__, image_fw_id);
+
+ if (image_fw_id > device_fw_id) {
+ flash_area = UI_FIRMWARE;
+ goto exit;
+ } else if (image_fw_id < device_fw_id) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Image firmware ID older than device firmware ID\n",
+ __func__);
+ flash_area = NONE;
+ goto exit;
+ }
+
+ /* Get device config ID */
+ retval = fwu_get_device_config_id();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read device config ID\n",
+ __func__);
+ flash_area = NONE;
+ goto exit;
+ }
+
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ config_id_size = V7_CONFIG_ID_SIZE;
+ else
+ config_id_size = V5V6_CONFIG_ID_SIZE;
+
+ for (ii = 0; ii < config_id_size; ii++) {
+ if (fwu->img.ui_config.data[ii] > fwu->config_id[ii]) {
+ flash_area = UI_CONFIG;
+ goto exit;
+ } else if (fwu->img.ui_config.data[ii] < fwu->config_id[ii]) {
+ flash_area = NONE;
+ goto exit;
+ }
+ }
+
+ flash_area = NONE;
+
+exit:
+ if (flash_area == NONE) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: No need to do reflash\n",
+ __func__);
+ } else {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Updating %s\n",
+ __func__,
+ flash_area == UI_FIRMWARE ?
+ "UI firmware and config" :
+ "UI config only");
+ }
+
+ return flash_area;
+}
+
+static int fwu_scan_pdt(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char intr_count = 0;
+ unsigned char intr_off;
+ unsigned char intr_src;
+ unsigned short addr;
+ bool f01found = false;
+ bool f34found = false;
+ bool f35found = false;
+ struct synaptics_rmi4_fn_desc rmi_fd;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ fwu->in_ub_mode = false;
+
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (retval < 0)
+ return retval;
+
+ if (rmi_fd.fn_number) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Found F%02x\n",
+ __func__, rmi_fd.fn_number);
+ switch (rmi_fd.fn_number) {
+ case SYNAPTICS_RMI4_F01:
+ f01found = true;
+
+ rmi4_data->f01_query_base_addr =
+ rmi_fd.query_base_addr;
+ rmi4_data->f01_ctrl_base_addr =
+ rmi_fd.ctrl_base_addr;
+ rmi4_data->f01_data_base_addr =
+ rmi_fd.data_base_addr;
+ rmi4_data->f01_cmd_base_addr =
+ rmi_fd.cmd_base_addr;
+ break;
+ case SYNAPTICS_RMI4_F34:
+ f34found = true;
+ fwu->f34_fd.query_base_addr =
+ rmi_fd.query_base_addr;
+ fwu->f34_fd.ctrl_base_addr =
+ rmi_fd.ctrl_base_addr;
+ fwu->f34_fd.data_base_addr =
+ rmi_fd.data_base_addr;
+
+ switch (rmi_fd.fn_version) {
+ case F34_V0:
+ fwu->bl_version = BL_V5;
+ break;
+ case F34_V1:
+ fwu->bl_version = BL_V6;
+ break;
+ case F34_V2:
+ fwu->bl_version = BL_V7;
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Unrecognized F34 version\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ fwu->intr_mask = 0;
+ intr_src = rmi_fd.intr_src_count;
+ intr_off = intr_count % 8;
+ for (ii = intr_off;
+ ii < (intr_src + intr_off);
+ ii++) {
+ fwu->intr_mask |= 1 << ii;
+ }
+ break;
+ case SYNAPTICS_RMI4_F35:
+ f35found = true;
+ fwu->f35_fd.query_base_addr =
+ rmi_fd.query_base_addr;
+ fwu->f35_fd.ctrl_base_addr =
+ rmi_fd.ctrl_base_addr;
+ fwu->f35_fd.data_base_addr =
+ rmi_fd.data_base_addr;
+ fwu->f35_fd.cmd_base_addr =
+ rmi_fd.cmd_base_addr;
+ break;
+ }
+ } else {
+ break;
+ }
+
+ intr_count += rmi_fd.intr_src_count;
+ }
+
+ if (!f01found || !f34found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find both F01 and F34\n",
+ __func__);
+ if (!f35found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F35\n",
+ __func__);
+ return -EINVAL;
+ } else {
+ fwu->in_ub_mode = true;
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: In microbootloader mode\n",
+ __func__);
+ fwu_recovery_check_status();
+ return 0;
+ }
+ }
+
+ rmi4_data->intr_mask[0] |= fwu->intr_mask;
+
+ addr = rmi4_data->f01_ctrl_base_addr + 1;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ addr,
+ &(rmi4_data->intr_mask[0]),
+ sizeof(rmi4_data->intr_mask[0]));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set interrupt enable bit\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_enter_flash_prog(void)
+{
+ int retval;
+ struct f01_device_control f01_device_control;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_read_flash_status();
+ if (retval < 0)
+ return retval;
+
+ if (fwu->in_bl_mode)
+ return 0;
+
+ retval = rmi4_data->irq_enable(rmi4_data, false, true);
+ if (retval < 0)
+ return retval;
+
+ msleep(INT_DISABLE_WAIT_MS);
+
+ retval = fwu_write_f34_command(CMD_ENABLE_FLASH_PROG);
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_wait_for_idle(ENABLE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ if (!fwu->in_bl_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: BL mode not entered\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (rmi4_data->hw_if->bl_hw_init) {
+ retval = rmi4_data->hw_if->bl_hw_init(rmi4_data);
+ if (retval < 0)
+ return retval;
+ }
+
+ retval = fwu_scan_pdt();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_read_f34_queries();
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ f01_device_control.data,
+ sizeof(f01_device_control.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F01 device control\n",
+ __func__);
+ return retval;
+ }
+
+ f01_device_control.nosleep = true;
+ f01_device_control.sleep_mode = SLEEP_MODE_NORMAL;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ f01_device_control.data,
+ sizeof(f01_device_control.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write F01 device control\n",
+ __func__);
+ return retval;
+ }
+
+ msleep(ENTER_FLASH_PROG_WAIT_MS);
+
+ return retval;
+}
+
+static int fwu_check_ui_firmware_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.ui_firmware.size / fwu->block_size;
+
+ if (block_count != fwu->blkcount.ui_firmware) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: UI firmware size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_check_ui_configuration_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.ui_config.size / fwu->block_size;
+
+ if (block_count != fwu->blkcount.ui_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: UI configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_check_dp_configuration_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.dp_config.size / fwu->block_size;
+
+ if (block_count != fwu->blkcount.dp_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Display configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_check_pm_configuration_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.pm_config.size / fwu->block_size;
+
+ if (block_count != fwu->blkcount.pm_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Permanent configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_check_bl_configuration_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.bl_config.size / fwu->block_size;
+
+ if (block_count != fwu->blkcount.bl_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Bootloader configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_check_guest_code_size(void)
+{
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->img.guest_code.size / fwu->block_size;
+ if (block_count != fwu->blkcount.guest_code) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Guest code size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_erase_configuration(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ switch (fwu->config_area) {
+ case UI_CONFIG_AREA:
+ retval = fwu_write_f34_command(CMD_ERASE_UI_CONFIG);
+ if (retval < 0)
+ return retval;
+ break;
+ case DP_CONFIG_AREA:
+ retval = fwu_write_f34_command(CMD_ERASE_DISP_CONFIG);
+ if (retval < 0)
+ return retval;
+ break;
+ case BL_CONFIG_AREA:
+ retval = fwu_write_f34_command(CMD_ERASE_BL_CONFIG);
+ if (retval < 0)
+ return retval;
+ break;
+ case FLASH_CONFIG_AREA:
+ retval = fwu_write_f34_command(CMD_ERASE_FLASH_CONFIG);
+ if (retval < 0)
+ return retval;
+ break;
+ case UPP_AREA:
+ retval = fwu_write_f34_command(CMD_ERASE_UTILITY_PARAMETER);
+ if (retval < 0)
+ return retval;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid config area\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase command written\n",
+ __func__);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ return retval;
+}
+
+static int fwu_erase_bootloader(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_write_f34_command(CMD_ERASE_BOOTLOADER);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase command written\n",
+ __func__);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ return 0;
+}
+
+#ifdef SYNA_TDDI
+static int fwu_erase_lockdown_data(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_write_f34_command(CMD_ERASE_LOCKDOWN_DATA);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase command written\n",
+ __func__);
+
+ msleep(100);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ return 0;
+}
+
+#endif
+
+static int fwu_erase_guest_code(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_write_f34_command(CMD_ERASE_GUEST_CODE);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase command written\n",
+ __func__);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ return 0;
+}
+
+static int fwu_erase_all(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (fwu->bl_version == BL_V7) {
+ retval = fwu_write_f34_command(CMD_ERASE_UI_FIRMWARE);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase command written\n",
+ __func__);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ fwu->config_area = UI_CONFIG_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+ } else {
+ retval = fwu_write_f34_command(CMD_ERASE_ALL);
+ if (retval < 0)
+ return retval;
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Erase all command written\n",
+ __func__);
+
+ retval = fwu_wait_for_idle(ERASE_WAIT_MS, false);
+ if (!(fwu->bl_version == BL_V8 &&
+ fwu->flash_status == BAD_PARTITION_TABLE)) {
+ if (retval < 0)
+ return retval;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Idle status detected\n",
+ __func__);
+
+ if (fwu->bl_version == BL_V8)
+ return 0;
+ }
+
+ if (fwu->flash_properties.has_disp_config) {
+ fwu->config_area = DP_CONFIG_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+ }
+
+ if (fwu->has_guest_code) {
+ retval = fwu_erase_guest_code();
+ if (retval < 0)
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_write_firmware(void)
+{
+ unsigned short firmware_block_count;
+
+ firmware_block_count = fwu->img.ui_firmware.size / fwu->block_size;
+
+ return fwu_write_f34_blocks((unsigned char *)fwu->img.ui_firmware.data,
+ firmware_block_count, CMD_WRITE_FW);
+}
+
+static int fwu_write_bootloader(void)
+{
+ int retval;
+ unsigned short bootloader_block_count;
+
+ bootloader_block_count = fwu->img.bl_image.size / fwu->block_size;
+
+ fwu->write_bootloader = true;
+ retval = fwu_write_f34_blocks((unsigned char *)fwu->img.bl_image.data,
+ bootloader_block_count, CMD_WRITE_BOOTLOADER);
+ fwu->write_bootloader = false;
+
+ return retval;
+}
+
+static int fwu_write_utility_parameter(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char checksum_array[4];
+ unsigned char *pbuf;
+ unsigned short remaining_size;
+ unsigned short utility_param_size;
+ unsigned long checksum;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ utility_param_size = fwu->blkcount.utility_param * fwu->block_size;
+ retval = fwu_allocate_read_config_buf(utility_param_size);
+ if (retval < 0)
+ return retval;
+ memset(fwu->read_config_buf, 0x00, utility_param_size);
+
+ pbuf = fwu->read_config_buf;
+ remaining_size = utility_param_size - 4;
+
+ for (ii = 0; ii < MAX_UTILITY_PARAMS; ii++) {
+ if (fwu->img.utility_param_id[ii] == UNUSED)
+ continue;
+
+#ifdef F51_DISCRETE_FORCE
+ if (fwu->img.utility_param_id[ii] == FORCE_PARAMETER) {
+ if (fwu->bl_mode_device) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device in bootloader mode, skipping calibration data restoration\n",
+ __func__);
+ goto image_param;
+ }
+ retval = secure_memcpy(&(pbuf[4]),
+ remaining_size - 4,
+ fwu->cal_data,
+ fwu->cal_data_buf_size,
+ fwu->cal_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy force calibration data\n",
+ __func__);
+ return retval;
+ }
+ pbuf[0] = FORCE_PARAMETER;
+ pbuf[1] = 0x00;
+ pbuf[2] = (4 + fwu->cal_data_size) / 2;
+ pbuf += (fwu->cal_data_size + 4);
+ remaining_size -= (fwu->cal_data_size + 4);
+ continue;
+ }
+image_param:
+#endif
+
+ retval = secure_memcpy(pbuf,
+ remaining_size,
+ fwu->img.utility_param[ii].data,
+ fwu->img.utility_param[ii].size,
+ fwu->img.utility_param[ii].size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy utility parameter data\n",
+ __func__);
+ return retval;
+ }
+ pbuf += fwu->img.utility_param[ii].size;
+ remaining_size -= fwu->img.utility_param[ii].size;
+ }
+
+ calculate_checksum((unsigned short *)fwu->read_config_buf,
+ ((utility_param_size - 4) / 2),
+ &checksum);
+
+ convert_to_little_endian(checksum_array, checksum);
+
+ fwu->read_config_buf[utility_param_size - 4] = checksum_array[0];
+ fwu->read_config_buf[utility_param_size - 3] = checksum_array[1];
+ fwu->read_config_buf[utility_param_size - 2] = checksum_array[2];
+ fwu->read_config_buf[utility_param_size - 1] = checksum_array[3];
+
+ retval = fwu_write_f34_blocks((unsigned char *)fwu->read_config_buf,
+ fwu->blkcount.utility_param, CMD_WRITE_UTILITY_PARAM);
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int fwu_write_configuration(void)
+{
+ return fwu_write_f34_blocks((unsigned char *)fwu->config_data,
+ fwu->config_block_count, CMD_WRITE_CONFIG);
+}
+
+static int fwu_write_ui_configuration(void)
+{
+ fwu->config_area = UI_CONFIG_AREA;
+ fwu->config_data = fwu->img.ui_config.data;
+ fwu->config_size = fwu->img.ui_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ return fwu_write_configuration();
+}
+
+static int fwu_write_dp_configuration(void)
+{
+ fwu->config_area = DP_CONFIG_AREA;
+ fwu->config_data = fwu->img.dp_config.data;
+ fwu->config_size = fwu->img.dp_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ return fwu_write_configuration();
+}
+
+static int fwu_write_pm_configuration(void)
+{
+ fwu->config_area = PM_CONFIG_AREA;
+ fwu->config_data = fwu->img.pm_config.data;
+ fwu->config_size = fwu->img.pm_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ return fwu_write_configuration();
+}
+
+#ifdef SYNA_TDDI
+static int fwu_write_tddi_lockdown_data(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_write_f34_blocks(fwu->read_config_buf,
+ fwu->blkcount.tddi_lockdown_data,
+ CMD_WRITE_LOCKDOWN_DATA);
+ if (retval < 0)
+ return retval;
+ rmi4_data->reset_device(rmi4_data, false);
+ return 0;
+}
+#endif
+
+static int fwu_write_flash_configuration(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ fwu->config_area = FLASH_CONFIG_AREA;
+ fwu->config_data = fwu->img.fl_config.data;
+ fwu->config_size = fwu->img.fl_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ if (fwu->config_block_count != fwu->blkcount.fl_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Flash configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+
+ rmi4_data->reset_device(rmi4_data, false);
+
+ return 0;
+}
+
+static int fwu_write_guest_code(void)
+{
+ int retval;
+ unsigned short guest_code_block_count;
+
+ guest_code_block_count = fwu->img.guest_code.size / fwu->block_size;
+
+ retval = fwu_write_f34_blocks((unsigned char *)fwu->img.guest_code.data,
+ guest_code_block_count, CMD_WRITE_GUEST_CODE);
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int fwu_write_lockdown(void)
+{
+ unsigned short lockdown_block_count;
+
+ lockdown_block_count = fwu->img.lockdown.size / fwu->block_size;
+
+ return fwu_write_f34_blocks((unsigned char *)fwu->img.lockdown.data,
+ lockdown_block_count, CMD_WRITE_LOCKDOWN);
+}
+
+static int fwu_write_partition_table_v8(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ fwu->config_area = FLASH_CONFIG_AREA;
+ fwu->config_data = fwu->img.fl_config.data;
+ fwu->config_size = fwu->img.fl_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ if (fwu->config_block_count != fwu->blkcount.fl_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Flash configuration size mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+
+ rmi4_data->reset_device(rmi4_data, false);
+
+ return 0;
+}
+
+static int fwu_write_partition_table_v7(void)
+{
+ int retval;
+ unsigned short block_count;
+
+ block_count = fwu->blkcount.bl_config;
+ fwu->config_area = BL_CONFIG_AREA;
+ fwu->config_size = fwu->block_size * block_count;
+
+ retval = fwu_allocate_read_config_buf(fwu->config_size);
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_write_flash_configuration();
+ if (retval < 0)
+ return retval;
+
+ fwu->config_area = BL_CONFIG_AREA;
+ fwu->config_data = fwu->read_config_buf;
+ fwu->config_size = fwu->img.bl_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int fwu_write_bl_area_v7(void)
+{
+ int retval;
+ bool has_utility_param;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ has_utility_param = fwu->has_utility_param;
+
+ if (fwu->has_utility_param) {
+ fwu->config_area = UPP_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+ }
+
+ fwu->config_area = BL_CONFIG_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+
+ fwu->config_area = FLASH_CONFIG_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_erase_bootloader();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_write_bootloader();
+ if (retval < 0)
+ return retval;
+
+ msleep(rmi4_data->hw_if->board_data->reset_delay_ms);
+ rmi4_data->reset_device(rmi4_data, false);
+
+ fwu->config_area = FLASH_CONFIG_AREA;
+ fwu->config_data = fwu->img.fl_config.data;
+ fwu->config_size = fwu->img.fl_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+ rmi4_data->reset_device(rmi4_data, false);
+
+ fwu->config_area = BL_CONFIG_AREA;
+ fwu->config_data = fwu->img.bl_config.data;
+ fwu->config_size = fwu->img.bl_config.size;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+
+ if (fwu->img.contains_utility_param) {
+ retval = fwu_write_utility_parameter();
+ if (retval < 0)
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_do_reflash(void)
+{
+ int retval;
+ bool do_bl_update = false;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!fwu->new_partition_table) {
+ retval = fwu_check_ui_firmware_size();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_check_ui_configuration_size();
+ if (retval < 0)
+ return retval;
+
+ if (fwu->flash_properties.has_disp_config &&
+ fwu->img.contains_disp_config) {
+ retval = fwu_check_dp_configuration_size();
+ if (retval < 0)
+ return retval;
+ }
+
+ if (fwu->has_guest_code && fwu->img.contains_guest_code) {
+ retval = fwu_check_guest_code_size();
+ if (retval < 0)
+ return retval;
+ }
+ } else if (fwu->bl_version == BL_V7) {
+ retval = fwu_check_bl_configuration_size();
+ if (retval < 0)
+ return retval;
+ }
+
+ if (!fwu->has_utility_param && fwu->img.contains_utility_param) {
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ do_bl_update = true;
+ }
+
+ if (fwu->has_utility_param && !fwu->img.contains_utility_param) {
+ if (fwu->bl_version == BL_V7 || fwu->bl_version == BL_V8)
+ do_bl_update = true;
+ }
+
+ if (!do_bl_update && fwu->incompatible_partition_tables) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Incompatible partition tables\n",
+ __func__);
+ return -EINVAL;
+ } else if (!do_bl_update && fwu->new_partition_table) {
+ if (!fwu->force_update) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Partition table mismatch\n",
+ __func__);
+ return -EINVAL;
+ }
+ }
+
+ retval = fwu_erase_all();
+ if (retval < 0)
+ return retval;
+
+ if (do_bl_update) {
+ retval = fwu_write_bl_area_v7();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Bootloader area programmed\n", __func__);
+ } else if (fwu->bl_version == BL_V7 && fwu->new_partition_table) {
+ retval = fwu_write_partition_table_v7();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Partition table programmed\n", __func__);
+ } else if (fwu->bl_version == BL_V8) {
+ retval = fwu_write_partition_table_v8();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Partition table programmed\n", __func__);
+ }
+
+ fwu->config_area = UI_CONFIG_AREA;
+ if (fwu->flash_properties.has_disp_config &&
+ fwu->img.contains_disp_config) {
+ retval = fwu_write_dp_configuration();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Display configuration programmed\n", __func__);
+ }
+
+ retval = fwu_write_ui_configuration();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Configuration programmed\n", __func__);
+
+ if (fwu->has_guest_code && fwu->img.contains_guest_code) {
+ retval = fwu_write_guest_code();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Guest code programmed\n", __func__);
+ }
+
+ retval = fwu_write_firmware();
+ if (retval < 0)
+ return retval;
+ pr_notice("%s: Firmware programmed\n", __func__);
+
+ return retval;
+}
+
+static int fwu_do_read_config(void)
+{
+ int retval;
+ unsigned short block_count;
+ unsigned short config_area;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ switch (fwu->config_area) {
+ case UI_CONFIG_AREA:
+ block_count = fwu->blkcount.ui_config;
+ break;
+ case DP_CONFIG_AREA:
+ if (!fwu->flash_properties.has_disp_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Display configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.dp_config;
+ break;
+ case PM_CONFIG_AREA:
+ if (!fwu->flash_properties.has_pm_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Permanent configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.pm_config;
+ break;
+ case BL_CONFIG_AREA:
+ if (!fwu->flash_properties.has_bl_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Bootloader configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.bl_config;
+ break;
+ case UPP_AREA:
+ if (!fwu->has_utility_param) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Utility parameter not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.utility_param;
+ break;
+#ifdef SYNA_TDDI
+ case TDDI_FORCE_CONFIG_AREA:
+ if (!fwu->has_force_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: force configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.tddi_force_config;
+ break;
+ case TDDI_OEM_DATA_AREA:
+ if (!fwu->has_oem_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: oem data not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.tddi_oem_data;
+ break;
+ case TDDI_LCM_DATA_AREA:
+ if (!fwu->has_lcm_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: lcm data not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ block_count = fwu->blkcount.tddi_lcm_data;
+ break;
+#endif
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid config area\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (block_count == 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid block count\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ if (fwu->bl_version == BL_V5 || fwu->bl_version == BL_V6) {
+ config_area = fwu->config_area;
+ retval = fwu_enter_flash_prog();
+ fwu->config_area = config_area;
+ if (retval < 0)
+ goto exit;
+ }
+
+ fwu->config_size = fwu->block_size * block_count;
+
+ retval = fwu_allocate_read_config_buf(fwu->config_size);
+ if (retval < 0)
+ goto exit;
+
+ retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
+
+exit:
+ if (fwu->bl_version == BL_V5 || fwu->bl_version == BL_V6)
+ rmi4_data->reset_device(rmi4_data, false);
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+
+ return retval;
+}
+
+#ifdef SYNA_TDDI
+static int fwu_do_read_tddi_lockdown_data(void)
+{
+ int retval = -EINVAL;
+ unsigned short block_count;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->blkcount.tddi_lockdown_data;
+ fwu->config_size = fwu->block_size * block_count;
+
+ if (fwu->bl_version != BL_V6) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not support lockdown data in bl v.%d\n",
+ __func__,
+ fwu->bl_version);
+ goto exit;
+ } else if (!fwu->has_lockdown_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not support lockdown data\n", __func__);
+ goto exit;
+ }
+
+ kfree(fwu->read_config_buf);
+
+ fwu->read_config_buf = kzalloc(fwu->config_size, GFP_KERNEL);
+
+ if (!fwu->read_config_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fwu->read_config_buf\n",
+ __func__);
+ fwu->read_config_buf_size = 0;
+ retval = -ENOMEM;
+ goto exit;
+ }
+ fwu->read_config_buf_size = fwu->config_size;
+ retval = fwu_read_f34_blocks(block_count, CMD_READ_LOCKDOWN_DATA);
+exit:
+ return retval;
+}
+
+int get_tddi_lockdown_data(unsigned char *lockdown_data, unsigned short leng)
+{
+ int retval;
+
+ retval = fwu_do_read_tddi_lockdown_data();
+ if (retval < 0)
+ return retval;
+ memcpy(lockdown_data, fwu->read_config_buf, leng);
+ return retval;
+}
+
+int set_tddi_lockdown_data(unsigned char *lockdown_data, unsigned short leng)
+{
+ int retval = -EINVAL;
+ unsigned long checksum;
+ unsigned char checksum_array[4];
+ unsigned short blk_cnt;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (fwu->bl_version != BL_V6) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not support lockdown data in bl v.%d\n",
+ __func__,
+ fwu->bl_version);
+ goto exit;
+ } else if (!fwu->has_lockdown_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not support lockdown data\n", __func__);
+ goto exit;
+ }
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ goto exit;
+
+ retval = fwu_erase_lockdown_data();
+ if (retval < 0)
+ goto exit;
+
+ blk_cnt = fwu->blkcount.tddi_lockdown_data;
+
+ fwu->config_size = fwu->blkcount.tddi_lockdown_data * fwu->block_size;
+ retval = fwu_allocate_read_config_buf(fwu->config_size);
+ if (retval < 0)
+ goto exit;
+ memset(fwu->read_config_buf, 0x00, fwu->config_size);
+ retval = secure_memcpy(fwu->read_config_buf, fwu->config_size,
+ lockdown_data, leng, leng);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy tddi lockdwon data\n",
+ __func__);
+ goto exit;
+ }
+
+ calculate_checksum((unsigned short *)fwu->read_config_buf,
+ ((fwu->config_size - 4) / 2),
+ &checksum);
+
+ convert_to_little_endian(checksum_array, checksum);
+
+ fwu->read_config_buf[blk_cnt * fwu->block_size - 4] = checksum_array[0];
+ fwu->read_config_buf[blk_cnt * fwu->block_size - 3] = checksum_array[1];
+ fwu->read_config_buf[blk_cnt * fwu->block_size - 2] = checksum_array[2];
+ fwu->read_config_buf[blk_cnt * fwu->block_size - 1] = checksum_array[3];
+ retval = fwu_write_tddi_lockdown_data();
+exit:
+ return retval;
+}
+#endif
+
+static int fwu_do_lockdown_v7(void)
+{
+ int retval;
+ struct f34_v7_data0 status;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f34_fd.data_base_addr + fwu->off.flash_status,
+ status.data,
+ sizeof(status.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash status\n",
+ __func__);
+ return retval;
+ }
+
+ if (status.device_cfg_status == 2) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device already locked down\n",
+ __func__);
+ return 0;
+ }
+
+ retval = fwu_write_lockdown();
+ if (retval < 0)
+ return retval;
+
+ pr_notice("%s: Lockdown programmed\n", __func__);
+
+ return retval;
+}
+
+static int fwu_do_lockdown_v5v6(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+#ifdef SYNA_TDDI
+ unsigned char *img_ld;
+
+ img_ld = (unsigned char *)fwu->img.lockdown.data;
+ if (fwu->has_lockdown_data) {
+ retval = set_tddi_lockdown_data(img_ld,
+ LOCKDOWN_SIZE);
+ if (retval < 0)
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write lockdown data\n",
+ __func__);
+ return retval;
+ }
+#endif
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ return retval;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f34_fd.query_base_addr + fwu->off.properties,
+ fwu->flash_properties.data,
+ sizeof(fwu->flash_properties.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash properties\n",
+ __func__);
+ return retval;
+ }
+
+ if (fwu->flash_properties.unlocked == 0) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device already locked down\n",
+ __func__);
+ return 0;
+ }
+
+ retval = fwu_write_lockdown();
+ if (retval < 0)
+ return retval;
+
+ pr_notice("%s: Lockdown programmed\n", __func__);
+
+ return retval;
+}
+
+#ifdef F51_DISCRETE_FORCE
+static int fwu_do_restore_f51_cal_data(void)
+{
+ int retval;
+ unsigned char checksum_array[4];
+ unsigned short block_count;
+ unsigned long checksum;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ block_count = fwu->blkcount.ui_config;
+ fwu->config_size = fwu->block_size * block_count;
+ fwu->config_area = UI_CONFIG_AREA;
+
+ retval = fwu_allocate_read_config_buf(fwu->config_size);
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_read_f34_blocks(block_count, CMD_READ_CONFIG);
+ if (retval < 0)
+ return retval;
+
+ retval = secure_memcpy(&fwu->read_config_buf[fwu->cal_data_off],
+ fwu->cal_data_size, fwu->cal_data,
+ fwu->cal_data_buf_size, fwu->cal_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to restore calibration data\n",
+ __func__);
+ return retval;
+ }
+
+ calculate_checksum((unsigned short *)fwu->read_config_buf,
+ ((fwu->config_size - 4) / 2),
+ &checksum);
+
+ convert_to_little_endian(checksum_array, checksum);
+
+ fwu->read_config_buf[fwu->config_size - 4] = checksum_array[0];
+ fwu->read_config_buf[fwu->config_size - 3] = checksum_array[1];
+ fwu->read_config_buf[fwu->config_size - 2] = checksum_array[2];
+ fwu->read_config_buf[fwu->config_size - 1] = checksum_array[3];
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ return retval;
+
+ fwu->config_area = UI_CONFIG_AREA;
+ fwu->config_data = fwu->read_config_buf;
+ fwu->config_block_count = fwu->config_size / fwu->block_size;
+
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ return retval;
+
+ retval = fwu_write_configuration();
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+#endif
+
+static int fwu_start_write_guest_code(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_parse_image_info();
+ if (retval < 0)
+ return -EINVAL;
+
+ if (!fwu->has_guest_code) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Guest code not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (!fwu->img.contains_guest_code) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No guest code in firmware image\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ pr_notice("%s: Start of write guest code process\n", __func__);
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ goto exit;
+
+ retval = fwu_check_guest_code_size();
+ if (retval < 0)
+ goto exit;
+
+ retval = fwu_erase_guest_code();
+ if (retval < 0)
+ goto exit;
+
+ retval = fwu_write_guest_code();
+ if (retval < 0)
+ goto exit;
+
+ pr_notice("%s: Guest code programmed\n", __func__);
+
+exit:
+ rmi4_data->reset_device(rmi4_data, false);
+
+ pr_notice("%s: End of write guest code process\n", __func__);
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+
+ rmi4_data->stay_awake = false;
+
+ return retval;
+}
+
+static int fwu_start_write_config(void)
+{
+ int retval;
+ unsigned short config_area;
+ unsigned int device_fw_id;
+ unsigned int image_fw_id;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = fwu_parse_image_info();
+ if (retval < 0)
+ return -EINVAL;
+
+ switch (fwu->config_area) {
+ case UI_CONFIG_AREA:
+ device_fw_id = rmi4_data->firmware_id;
+ retval = fwu_get_image_firmware_id(&image_fw_id);
+ if (retval < 0)
+ return retval;
+ if (device_fw_id != image_fw_id) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Device and image firmware IDs don't match\n",
+ __func__);
+ return -EINVAL;
+ }
+ retval = fwu_check_ui_configuration_size();
+ if (retval < 0)
+ return retval;
+ break;
+ case DP_CONFIG_AREA:
+ if (!fwu->flash_properties.has_disp_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Display configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ if (!fwu->img.contains_disp_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No display configuration in firmware image\n",
+ __func__);
+ return -EINVAL;
+ }
+ retval = fwu_check_dp_configuration_size();
+ if (retval < 0)
+ return retval;
+ break;
+ case PM_CONFIG_AREA:
+ if (!fwu->flash_properties.has_pm_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Permanent configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+ if (!fwu->img.contains_perm_config) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No permanent configuration in firmware image\n",
+ __func__);
+ return -EINVAL;
+ }
+ retval = fwu_check_pm_configuration_size();
+ if (retval < 0)
+ return retval;
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Configuration not supported\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ pr_notice("%s: Start of write config process\n", __func__);
+
+ config_area = fwu->config_area;
+
+ retval = fwu_enter_flash_prog();
+ if (retval < 0)
+ goto exit;
+
+ fwu->config_area = config_area;
+
+ if (fwu->config_area != PM_CONFIG_AREA) {
+ retval = fwu_erase_configuration();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to erase config\n",
+ __func__);
+ goto exit;
+ }
+ }
+
+ switch (fwu->config_area) {
+ case UI_CONFIG_AREA:
+ retval = fwu_write_ui_configuration();
+ if (retval < 0)
+ goto exit;
+ break;
+ case DP_CONFIG_AREA:
+ retval = fwu_write_dp_configuration();
+ if (retval < 0)
+ goto exit;
+ break;
+ case PM_CONFIG_AREA:
+ retval = fwu_write_pm_configuration();
+ if (retval < 0)
+ goto exit;
+ break;
+ }
+
+ pr_notice("%s: Config written\n", __func__);
+
+exit:
+ switch (fwu->config_area) {
+ case UI_CONFIG_AREA:
+ rmi4_data->reset_device(rmi4_data, true);
+ break;
+ case DP_CONFIG_AREA:
+ case PM_CONFIG_AREA:
+ rmi4_data->reset_device(rmi4_data, false);
+ break;
+ }
+
+ pr_notice("%s: End of write config process\n", __func__);
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+
+ rmi4_data->stay_awake = false;
+
+ return retval;
+}
+
+static int fwu_start_reflash(void)
+{
+ int retval = 0;
+ enum flash_area flash_area;
+ bool do_rebuild = false;
+ const struct firmware *fw_entry = NULL;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ pr_notice("%s: Start of reflash process\n", __func__);
+
+ if (fwu->image == NULL) {
+ retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
+ FW_IMAGE_NAME, sizeof(FW_IMAGE_NAME),
+ sizeof(FW_IMAGE_NAME));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy image file name\n",
+ __func__);
+ goto exit;
+ }
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Requesting firmware image %s\n",
+ __func__, fwu->image_name);
+
+ retval = request_firmware(&fw_entry, fwu->image_name,
+ rmi4_data->pdev->dev.parent);
+ if (retval != 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Firmware image %s not available\n",
+ __func__, fwu->image_name);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Firmware image size = %d\n",
+ __func__, (unsigned int)fw_entry->size);
+
+ fwu->image = fw_entry->data;
+ }
+
+ retval = fwu_parse_image_info();
+ if (retval < 0)
+ goto exit;
+
+ if (fwu->blkcount.total_count != fwu->img.blkcount.total_count) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Flash size mismatch\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (fwu->bl_version != fwu->img.bl_version) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Bootloader version mismatch\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ retval = fwu_read_flash_status();
+ if (retval < 0)
+ goto exit;
+
+ if (fwu->in_bl_mode) {
+ fwu->bl_mode_device = true;
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device in bootloader mode\n",
+ __func__);
+ } else {
+ fwu->bl_mode_device = false;
+ }
+
+ flash_area = fwu_go_nogo();
+
+ if (flash_area != NONE) {
+ retval = fwu_enter_flash_prog();
+ if (retval < 0) {
+ rmi4_data->reset_device(rmi4_data, false);
+ goto exit;
+ }
+ }
+
+#ifdef F51_DISCRETE_FORCE
+ if (flash_area != NONE && !fwu->bl_mode_device) {
+ fwu->config_size = fwu->block_size * fwu->blkcount.ui_config;
+ fwu->config_area = UI_CONFIG_AREA;
+
+ retval = fwu_allocate_read_config_buf(fwu->config_size);
+ if (retval < 0) {
+ rmi4_data->reset_device(rmi4_data, false);
+ goto exit;
+ }
+
+ retval = fwu_read_f34_blocks(fwu->blkcount.ui_config,
+ CMD_READ_CONFIG);
+ if (retval < 0) {
+ rmi4_data->reset_device(rmi4_data, false);
+ goto exit;
+ }
+
+ retval = secure_memcpy(fwu->cal_data, fwu->cal_data_buf_size,
+ &fwu->read_config_buf[fwu->cal_data_off],
+ fwu->cal_data_size, fwu->cal_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to save calibration data\n",
+ __func__);
+ rmi4_data->reset_device(rmi4_data, false);
+ goto exit;
+ }
+ }
+#endif
+
+ switch (flash_area) {
+ case UI_FIRMWARE:
+ do_rebuild = true;
+ retval = fwu_do_reflash();
+#ifdef F51_DISCRETE_FORCE
+ if (retval < 0)
+ break;
+
+ if (fwu->has_utility_param || fwu->img.contains_utility_param)
+ break;
+
+ rmi4_data->reset_device(rmi4_data, false);
+
+ if (fwu->bl_mode_device || fwu->in_bl_mode) {
+ dev_info(rmi4_data->pdev->dev.parent,
+ "%s: Device in bootloader mode, skipping calibration data restoration\n",
+ __func__);
+ break;
+ }
+
+ retval = fwu_do_restore_f51_cal_data();
+#endif
+ break;
+ case UI_CONFIG:
+ do_rebuild = true;
+ retval = fwu_check_ui_configuration_size();
+ if (retval < 0)
+ break;
+ fwu->config_area = UI_CONFIG_AREA;
+ retval = fwu_erase_configuration();
+ if (retval < 0)
+ break;
+ retval = fwu_write_ui_configuration();
+#ifdef F51_DISCRETE_FORCE
+ if (retval < 0)
+ break;
+
+ if (fwu->has_utility_param)
+ break;
+
+ retval = fwu_do_restore_f51_cal_data();
+#endif
+ break;
+ case NONE:
+ default:
+ break;
+ }
+
+ if (retval < 0) {
+ do_rebuild = false;
+ rmi4_data->reset_device(rmi4_data, false);
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do reflash\n",
+ __func__);
+ goto exit;
+ }
+
+ if (fwu->do_lockdown && (fwu->img.lockdown.data != NULL)) {
+ switch (fwu->bl_version) {
+ case BL_V5:
+ case BL_V6:
+ retval = fwu_do_lockdown_v5v6();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do lockdown\n",
+ __func__);
+ }
+ rmi4_data->reset_device(rmi4_data, false);
+ break;
+ case BL_V7:
+ case BL_V8:
+ retval = fwu_do_lockdown_v7();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do lockdown\n",
+ __func__);
+ }
+ rmi4_data->reset_device(rmi4_data, false);
+ break;
+ default:
+ break;
+ }
+ }
+
+exit:
+ if (fw_entry)
+ release_firmware(fw_entry);
+
+ if (do_rebuild)
+ rmi4_data->reset_device(rmi4_data, true);
+
+ pr_notice("%s: End of reflash process\n", __func__);
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+
+ rmi4_data->stay_awake = false;
+
+ return retval;
+}
+
+static int fwu_recovery_check_status(void)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char status;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f35_fd.data_base_addr;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_base + F35_ERROR_CODE_OFFSET,
+ &status,
+ 1);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read status\n",
+ __func__);
+ return retval;
+ }
+
+ status = status & MASK_5BIT;
+
+ if (status != 0x00) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Recovery mode status = %d\n",
+ __func__, status);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int fwu_recovery_erase_completion(void)
+{
+ int retval;
+ unsigned char data_base;
+ unsigned char command;
+ unsigned char status;
+ unsigned int timeout = F35_ERASE_ALL_WAIT_MS / 20;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ data_base = fwu->f35_fd.data_base_addr;
+
+ do {
+ command = 0x01;
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ fwu->f35_fd.cmd_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue command\n",
+ __func__);
+ return retval;
+ }
+
+ do {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ fwu->f35_fd.cmd_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read command status\n",
+ __func__);
+ return retval;
+ }
+
+ if ((command & 0x01) == 0x00)
+ break;
+
+ msleep(20);
+ timeout--;
+ } while (timeout > 0);
+
+ if (timeout == 0)
+ goto exit;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ data_base + F35_FLASH_STATUS_OFFSET,
+ &status,
+ sizeof(status));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read flash status\n",
+ __func__);
+ return retval;
+ }
+
+ if ((status & 0x01) == 0x00)
+ break;
+
+ msleep(20);
+ timeout--;
+ } while (timeout > 0);
+
+exit:
+ if (timeout == 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for flash erase completion\n",
+ __func__);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int fwu_recovery_erase_all(void)
+{
+ int retval;
+ unsigned char ctrl_base;
+ unsigned char command = CMD_F35_ERASE_ALL;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ ctrl_base = fwu->f35_fd.ctrl_base_addr;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ ctrl_base + F35_CHUNK_COMMAND_OFFSET,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue erase all command\n",
+ __func__);
+ return retval;
+ }
+
+ if (fwu->f35_fd.cmd_base_addr) {
+ retval = fwu_recovery_erase_completion();
+ if (retval < 0)
+ return retval;
+ } else {
+ msleep(F35_ERASE_ALL_WAIT_MS);
+ }
+
+ retval = fwu_recovery_check_status();
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int fwu_recovery_write_chunk(void)
+{
+ int retval;
+ unsigned char ctrl_base;
+ unsigned char chunk_number[] = {0, 0};
+ unsigned char chunk_spare;
+ unsigned char chunk_size;
+ unsigned char buf[F35_CHUNK_SIZE + 1];
+ unsigned short chunk;
+ unsigned short chunk_total;
+ unsigned short bytes_written = 0;
+ unsigned char *chunk_ptr = (unsigned char *)fwu->image;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ ctrl_base = fwu->f35_fd.ctrl_base_addr;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ ctrl_base + F35_CHUNK_NUM_LSB_OFFSET,
+ chunk_number,
+ sizeof(chunk_number));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write chunk number\n",
+ __func__);
+ return retval;
+ }
+
+ buf[sizeof(buf) - 1] = CMD_F35_WRITE_CHUNK;
+
+ chunk_total = fwu->image_size / F35_CHUNK_SIZE;
+ chunk_spare = fwu->image_size % F35_CHUNK_SIZE;
+ if (chunk_spare)
+ chunk_total++;
+
+ for (chunk = 0; chunk < chunk_total; chunk++) {
+ if (chunk_spare && chunk == chunk_total - 1)
+ chunk_size = chunk_spare;
+ else
+ chunk_size = F35_CHUNK_SIZE;
+
+ memset(buf, 0x00, F35_CHUNK_SIZE);
+ secure_memcpy(buf, sizeof(buf), chunk_ptr,
+ fwu->image_size - bytes_written,
+ chunk_size);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ ctrl_base + F35_CHUNK_DATA_OFFSET,
+ buf,
+ sizeof(buf));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write chunk data (chunk %d)\n",
+ __func__, chunk);
+ return retval;
+ }
+ chunk_ptr += chunk_size;
+ bytes_written += chunk_size;
+ }
+
+ retval = fwu_recovery_check_status();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write chunk data\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int fwu_recovery_reset(void)
+{
+ int retval;
+ unsigned char ctrl_base;
+ unsigned char command = CMD_F35_RESET;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ ctrl_base = fwu->f35_fd.ctrl_base_addr;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ ctrl_base + F35_CHUNK_COMMAND_OFFSET,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to issue reset command\n",
+ __func__);
+ return retval;
+ }
+
+ msleep(F35_RESET_WAIT_MS);
+
+ return 0;
+}
+
+static int fwu_start_recovery(void)
+{
+ int retval;
+ const struct firmware *fw_entry = NULL;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ mutex_lock(&rmi4_data->rmi4_exp_init_mutex);
+
+ pr_notice("%s: Start of recovery process\n", __func__);
+
+ if (fwu->image == NULL) {
+ retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
+ FW_IHEX_NAME, sizeof(FW_IHEX_NAME),
+ sizeof(FW_IHEX_NAME));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy ihex file name\n",
+ __func__);
+ goto exit;
+ }
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Requesting firmware ihex %s\n",
+ __func__, fwu->image_name);
+
+ retval = request_firmware(&fw_entry, fwu->image_name,
+ rmi4_data->pdev->dev.parent);
+ if (retval != 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Firmware ihex %s not available\n",
+ __func__, fwu->image_name);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Firmware image size = %d\n",
+ __func__, (unsigned int)fw_entry->size);
+
+ fwu->image = fw_entry->data;
+ fwu->image_size = fw_entry->size;
+ }
+
+ retval = rmi4_data->irq_enable(rmi4_data, false, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to disable interrupt\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = fwu_recovery_erase_all();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do erase all in recovery mode\n",
+ __func__);
+ goto exit;
+ }
+
+ pr_notice("%s: External flash erased\n", __func__);
+
+ retval = fwu_recovery_write_chunk();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write chunk data in recovery mode\n",
+ __func__);
+ goto exit;
+ }
+
+ pr_notice("%s: Chunk data programmed\n", __func__);
+
+ retval = fwu_recovery_reset();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to reset device in recovery mode\n",
+ __func__);
+ goto exit;
+ }
+
+ pr_notice("%s: Recovery mode reset issued\n", __func__);
+
+ rmi4_data->reset_device(rmi4_data, true);
+
+ retval = 0;
+
+exit:
+ if (fw_entry)
+ release_firmware(fw_entry);
+
+ pr_notice("%s: End of recovery process\n", __func__);
+
+ mutex_unlock(&rmi4_data->rmi4_exp_init_mutex);
+
+ rmi4_data->stay_awake = false;
+
+ return retval;
+}
+
+int synaptics_fw_updater(const unsigned char *fw_data)
+{
+ int retval;
+
+ if (!fwu)
+ return -ENODEV;
+
+ if (!fwu->initialized)
+ return -ENODEV;
+
+ if (fwu->in_ub_mode) {
+ fwu->image = NULL;
+ retval = fwu_start_recovery();
+ if (retval < 0)
+ return retval;
+ }
+
+ fwu->image = fw_data;
+
+ retval = fwu_start_reflash();
+
+ fwu->image = NULL;
+
+ return retval;
+}
+EXPORT_SYMBOL(synaptics_fw_updater);
+
+#ifdef DO_STARTUP_FW_UPDATE
+static void fwu_startup_fw_update_work(struct work_struct *work)
+{
+ static unsigned char do_once = 1;
+#ifdef WAIT_FOR_FB_READY
+ unsigned int timeout;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+#endif
+
+ if (!do_once)
+ return;
+ do_once = 0;
+
+#ifdef WAIT_FOR_FB_READY
+ timeout = FB_READY_TIMEOUT_S * 1000 / FB_READY_WAIT_MS + 1;
+
+ while (!rmi4_data->fb_ready) {
+ msleep(FB_READY_WAIT_MS);
+ timeout--;
+ if (timeout == 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for FB ready\n",
+ __func__);
+ return;
+ }
+ }
+#endif
+
+ synaptics_fw_updater(NULL);
+
+ return;
+}
+#endif
+
+static ssize_t fwu_sysfs_show_image(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (count < fwu->config_size) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not enough space (%d bytes) in buffer\n",
+ __func__, (unsigned int)count);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ retval = secure_memcpy(buf, count, fwu->read_config_buf,
+ fwu->read_config_buf_size, fwu->config_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy config data\n",
+ __func__);
+ goto exit;
+ } else {
+ retval = fwu->config_size;
+ }
+
+exit:
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_store_image(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = secure_memcpy(&fwu->ext_data_source[fwu->data_pos],
+ fwu->image_size - fwu->data_pos, buf, count, count);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy image data\n",
+ __func__);
+ goto exit;
+ } else {
+ retval = count;
+ }
+
+ fwu->data_pos += count;
+
+exit:
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_do_recovery_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (kstrtouint(buf, 10, &input) != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (!fwu->in_ub_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not in microbootloader mode\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (!fwu->ext_data_source) {
+ retval = -EINVAL;
+ goto exit;
+ } else {
+ fwu->image = fwu->ext_data_source;
+ }
+
+ retval = fwu_start_recovery();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do recovery\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ kfree(fwu->ext_data_source);
+ fwu->ext_data_source = NULL;
+ fwu->image = NULL;
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (kstrtouint(buf, 10, &input) != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (fwu->in_ub_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: In microbootloader mode\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (!fwu->ext_data_source) {
+ retval = -EINVAL;
+ goto exit;
+ } else {
+ fwu->image = fwu->ext_data_source;
+ }
+
+ if (input & LOCKDOWN) {
+ fwu->do_lockdown = true;
+ input &= ~LOCKDOWN;
+ }
+
+ if ((input != NORMAL) && (input != FORCE)) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (input == FORCE)
+ fwu->force_update = true;
+
+ retval = synaptics_fw_updater(fwu->image);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do reflash\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ kfree(fwu->ext_data_source);
+ fwu->ext_data_source = NULL;
+ fwu->image = NULL;
+ fwu->force_update = FORCE_UPDATE;
+ fwu->do_lockdown = DO_LOCKDOWN;
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_write_config_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (kstrtouint(buf, 10, &input) != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (input != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (fwu->in_ub_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: In microbootloader mode\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (!fwu->ext_data_source) {
+ retval = -EINVAL;
+ goto exit;
+ } else {
+ fwu->image = fwu->ext_data_source;
+ }
+
+ retval = fwu_start_write_config();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write config\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ kfree(fwu->ext_data_source);
+ fwu->ext_data_source = NULL;
+ fwu->image = NULL;
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_read_config_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input != 1)
+ return -EINVAL;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (fwu->in_ub_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: In microbootloader mode\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ retval = fwu_do_read_config();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read config\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+static ssize_t fwu_sysfs_config_area_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long config_area;
+
+ retval = sstrtoul(buf, 10, &config_area);
+ if (retval)
+ return retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ fwu->config_area = config_area;
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return count;
+}
+
+static ssize_t fwu_sysfs_image_name_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = secure_memcpy(fwu->image_name, MAX_IMAGE_NAME_LEN,
+ buf, count, count);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy image file name\n",
+ __func__);
+ } else {
+ retval = count;
+ }
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_image_size_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long size;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &size);
+ if (retval)
+ return retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ fwu->image_size = size;
+ fwu->data_pos = 0;
+
+ kfree(fwu->ext_data_source);
+ fwu->ext_data_source = kzalloc(fwu->image_size, GFP_KERNEL);
+ if (!fwu->ext_data_source) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for image data\n",
+ __func__);
+ retval = -ENOMEM;
+ } else {
+ retval = count;
+ }
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_block_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->block_size);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.ui_firmware);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.ui_config);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.dp_config);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.pm_config);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.bl_config);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_utility_parameter_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.utility_param);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_guest_code_block_count_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", fwu->blkcount.guest_code);
+
+ mutex_unlock(&fwu_sysfs_mutex);
+
+ return retval;
+}
+
+static ssize_t fwu_sysfs_write_guest_code_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (kstrtouint(buf, 10, &input) != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (input != 1) {
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (fwu->in_ub_mode) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: In microbootloader mode\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if (!fwu->ext_data_source) {
+ retval = -EINVAL;
+ goto exit;
+ } else {
+ fwu->image = fwu->ext_data_source;
+ }
+
+ retval = fwu_start_write_guest_code();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write guest code\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ kfree(fwu->ext_data_source);
+ fwu->ext_data_source = NULL;
+ fwu->image = NULL;
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval;
+}
+
+#ifdef SYNA_TDDI
+static ssize_t fwu_sysfs_read_lockdown_code_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ unsigned short lockdown_data_size;
+ unsigned char *lockdown_data;
+ char ld_val[2];
+ int retval = 0;
+ int i = 0;
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ lockdown_data_size = fwu->blkcount.tddi_lockdown_data * fwu->block_size;
+ lockdown_data = kzalloc(lockdown_data_size, GFP_KERNEL);
+ if (!lockdown_data) {
+ mutex_unlock(&fwu_sysfs_mutex);
+ return -ENOMEM;
+ }
+
+ if (get_tddi_lockdown_data(lockdown_data, lockdown_data_size) < 0) {
+ kfree(lockdown_data);
+ mutex_unlock(&fwu_sysfs_mutex);
+ return -EINVAL;
+ }
+
+ for (i = 0; i < lockdown_data_size; i++) {
+ retval += snprintf(ld_val, PAGE_SIZE, "%02x",
+ *(lockdown_data + i));
+ strlcat(buf, ld_val, lockdown_data_size);
+ }
+ *(buf + retval) = '\n';
+ kfree(lockdown_data);
+ mutex_unlock(&fwu_sysfs_mutex);
+ return retval + 1;
+}
+
+static ssize_t fwu_sysfs_write_lockdown_code_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned short lockdown_data_size = (count - 1) / 2;
+ unsigned char *lockdown_data;
+ unsigned char temp[2];
+ int ld_val;
+ int i = 0;
+
+ for (i = 0; i < (count - 1); i++) {
+ if (((*buf >= '0') && (*buf <= '9')) ||
+ (('a' < *buf) && (*buf > 'f')) ||
+ (('A' < *buf) && (*buf > 'F')))
+ continue;
+ else
+ return -EINVAL;
+ }
+
+ if (count % 2 != 1)
+ return -EINVAL;
+
+ lockdown_data = kzalloc(lockdown_data_size, GFP_KERNEL);
+ if (!lockdown_data)
+ return -ENOMEM;
+
+ for (i = 0; i < lockdown_data_size; i++) {
+ memcpy(temp, (buf + 2 * i), sizeof(temp));
+ if (kstrtoint(temp, 16, &ld_val) == 1)
+ *(lockdown_data + i) = ld_val & 0xff;
+ }
+
+ if (!mutex_trylock(&fwu_sysfs_mutex))
+ return -EBUSY;
+
+ if (set_tddi_lockdown_data(lockdown_data, lockdown_data_size) < 0) {
+ kfree(lockdown_data);
+ mutex_unlock(&fwu_sysfs_mutex);
+ return -EINVAL;
+ }
+ kfree(lockdown_data);
+ mutex_unlock(&fwu_sysfs_mutex);
+ return count;
+}
+#endif
+static void synaptics_rmi4_fwu_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!fwu)
+ return;
+
+ if (fwu->intr_mask & intr_mask)
+ fwu_read_flash_status();
+
+ return;
+}
+
+static int synaptics_rmi4_fwu_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char attr_count;
+ struct pdt_properties pdt_props;
+
+ if (fwu) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ fwu = kzalloc(sizeof(*fwu), GFP_KERNEL);
+ if (!fwu) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for fwu\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ fwu->image_name = kzalloc(MAX_IMAGE_NAME_LEN, GFP_KERNEL);
+ if (!fwu->image_name) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for image name\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_fwu;
+ }
+
+ fwu->rmi4_data = rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ PDT_PROPS,
+ pdt_props.data,
+ sizeof(pdt_props.data));
+ if (retval < 0) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read PDT properties, assuming 0x00\n",
+ __func__);
+ } else if (pdt_props.has_bsr) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Reflash for LTS not currently supported\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_free_mem;
+ }
+
+ retval = fwu_scan_pdt();
+ if (retval < 0)
+ goto exit_free_mem;
+
+ if (!fwu->in_ub_mode) {
+ retval = fwu_read_f34_queries();
+ if (retval < 0)
+ goto exit_free_mem;
+
+ retval = fwu_get_device_config_id();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read device config ID\n",
+ __func__);
+ goto exit_free_mem;
+ }
+ }
+
+ fwu->force_update = FORCE_UPDATE;
+ fwu->do_lockdown = DO_LOCKDOWN;
+ fwu->initialized = true;
+
+#ifdef DO_STARTUP_FW_UPDATE
+ fwu->fwu_workqueue = create_singlethread_workqueue("fwu_workqueue");
+ INIT_WORK(&fwu->fwu_work, fwu_startup_fw_update_work);
+ queue_work(fwu->fwu_workqueue,
+ &fwu->fwu_work);
+#endif
+
+#ifdef F51_DISCRETE_FORCE
+ fwu_read_flash_status();
+ if (!fwu->in_bl_mode) {
+ retval = fwu_f51_force_data_init();
+ if (retval < 0)
+ goto exit_free_mem;
+ }
+#endif
+
+ if (ENABLE_SYS_REFLASH == false)
+ return 0;
+
+ retval = sysfs_create_bin_file(&rmi4_data->input_dev->dev.kobj,
+ &dev_attr_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs bin file\n",
+ __func__);
+ goto exit_free_mem;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_remove_attrs;
+ }
+ }
+
+ return 0;
+
+exit_remove_attrs:
+ for (attr_count--; attr_count >= 0; attr_count--) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
+
+exit_free_mem:
+ kfree(fwu->image_name);
+
+exit_free_fwu:
+ kfree(fwu);
+ fwu = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_fwu_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char attr_count;
+
+ if (!fwu)
+ goto exit;
+
+#ifdef DO_STARTUP_FW_UPDATE
+ cancel_work_sync(&fwu->fwu_work);
+ flush_workqueue(fwu->fwu_workqueue);
+ destroy_workqueue(fwu->fwu_workqueue);
+#endif
+
+#ifdef F51_DISCRETE_FORCE
+ kfree(fwu->cal_data);
+#endif
+ kfree(fwu->read_config_buf);
+ kfree(fwu->image_name);
+ kfree(fwu);
+ fwu = NULL;
+
+ if (ENABLE_SYS_REFLASH == false)
+ goto exit;
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
+
+exit:
+ complete(&fwu_remove_complete);
+
+ return;
+}
+
+static void synaptics_rmi4_fwu_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+
+ if (!fwu) {
+ synaptics_rmi4_fwu_init(rmi4_data);
+ return;
+ }
+
+ retval = fwu_scan_pdt();
+ if (retval < 0)
+ return;
+
+ if (!fwu->in_ub_mode)
+ fwu_read_f34_queries();
+
+#ifdef F51_DISCRETE_FORCE
+ fwu_read_flash_status();
+ if (!fwu->in_bl_mode)
+ fwu_f51_force_data_init();
+#endif
+
+ return;
+}
+
+static struct synaptics_rmi4_exp_fn fwu_module = {
+ .fn_type = RMI_FW_UPDATER,
+ .init = synaptics_rmi4_fwu_init,
+ .remove = synaptics_rmi4_fwu_remove,
+ .reset = synaptics_rmi4_fwu_reset,
+ .reinit = NULL,
+ .early_suspend = NULL,
+ .suspend = NULL,
+ .resume = NULL,
+ .late_resume = NULL,
+ .attn = synaptics_rmi4_fwu_attn,
+};
+
+static int __init rmi4_fw_update_module_init(void)
+{
+ synaptics_rmi4_new_function(&fwu_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_fw_update_module_exit(void)
+{
+ synaptics_rmi4_new_function(&fwu_module, false);
+
+ wait_for_completion(&fwu_remove_complete);
+
+ return;
+}
+
+module_init(rmi4_fw_update_module_init);
+module_exit(rmi4_fw_update_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX FW Update Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_gesture.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_gesture.c
new file mode 100644
index 0000000..875670b
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_gesture.c
@@ -0,0 +1,2308 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define GESTURE_PHYS_NAME "synaptics_dsx/gesture"
+
+#define TUNING_SYSFS_DIR_NAME "tuning"
+
+#define STORE_GESTURES
+#ifdef STORE_GESTURES
+#define GESTURES_TO_STORE 10
+#endif
+
+#define CTRL23_FINGER_REPORT_ENABLE_BIT 0
+#define CTRL27_UDG_ENABLE_BIT 4
+#define WAKEUP_GESTURE_MODE 0x02
+
+static ssize_t udg_sysfs_engine_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_detection_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_detection_score_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_detection_index_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_registration_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_registration_begin_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_registration_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_max_index_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_detection_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_index_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_template_valid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_valid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_template_clear_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_trace_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t udg_sysfs_template_data_store(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t udg_sysfs_trace_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t udg_sysfs_template_displacement_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_template_displacement_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_rotation_invariance_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_rotation_invariance_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_scale_invariance_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_scale_invariance_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_threshold_factor_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_threshold_factor_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_match_metric_threshold_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_match_metric_threshold_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t udg_sysfs_max_inter_stroke_time_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t udg_sysfs_max_inter_stroke_time_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static int udg_read_tuning_params(void);
+
+static int udg_write_tuning_params(void);
+
+static int udg_detection_enable(bool enable);
+
+static int udg_engine_enable(bool enable);
+
+static int udg_set_index(unsigned char index);
+
+#ifdef STORE_GESTURES
+static int udg_read_valid_data(void);
+static int udg_write_valid_data(void);
+static int udg_read_template_data(unsigned char index);
+static int udg_write_template_data(void);
+#endif
+
+enum gesture_type {
+ DETECTION = 0x0f,
+ REGISTRATION = 0x10,
+};
+
+struct udg_tuning {
+ union {
+ struct {
+ unsigned char maximum_number_of_templates;
+ unsigned char template_size;
+ unsigned char template_disp_lsb;
+ unsigned char template_disp_msb;
+ unsigned char rotation_inv_lsb;
+ unsigned char rotation_inv_msb;
+ unsigned char scale_inv_lsb;
+ unsigned char scale_inv_msb;
+ unsigned char thres_factor_lsb;
+ unsigned char thres_factor_msb;
+ unsigned char metric_thres_lsb;
+ unsigned char metric_thres_msb;
+ unsigned char inter_stroke_lsb;
+ unsigned char inter_stroke_msb;
+ } __packed;
+ unsigned char data[14];
+ };
+};
+
+struct udg_addr {
+ unsigned short data_4;
+ unsigned short ctrl_18;
+ unsigned short ctrl_20;
+ unsigned short ctrl_23;
+ unsigned short ctrl_27;
+ unsigned short ctrl_41;
+ unsigned short trace_x;
+ unsigned short trace_y;
+ unsigned short trace_segment;
+ unsigned short template_helper;
+ unsigned short template_data;
+ unsigned short template_flags;
+};
+
+struct synaptics_rmi4_f12_query_0 {
+ union {
+ struct {
+ struct {
+ unsigned char has_register_descriptors:1;
+ unsigned char has_closed_cover:1;
+ unsigned char has_fast_glove_detect:1;
+ unsigned char has_dribble:1;
+ unsigned char has_4p4_jitter_filter_strength:1;
+ unsigned char f12_query0_s0_b5__7:3;
+ } __packed;
+ struct {
+ unsigned char max_num_templates:4;
+ unsigned char f12_query0_s1_b4__7:4;
+ unsigned char template_size_lsb;
+ unsigned char template_size_msb;
+ } __packed;
+ };
+ unsigned char data[4];
+ };
+};
+
+struct synaptics_rmi4_f12_query_5 {
+ union {
+ struct {
+ unsigned char size_of_query6;
+ struct {
+ unsigned char ctrl0_is_present:1;
+ unsigned char ctrl1_is_present:1;
+ unsigned char ctrl2_is_present:1;
+ unsigned char ctrl3_is_present:1;
+ unsigned char ctrl4_is_present:1;
+ unsigned char ctrl5_is_present:1;
+ unsigned char ctrl6_is_present:1;
+ unsigned char ctrl7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl8_is_present:1;
+ unsigned char ctrl9_is_present:1;
+ unsigned char ctrl10_is_present:1;
+ unsigned char ctrl11_is_present:1;
+ unsigned char ctrl12_is_present:1;
+ unsigned char ctrl13_is_present:1;
+ unsigned char ctrl14_is_present:1;
+ unsigned char ctrl15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl16_is_present:1;
+ unsigned char ctrl17_is_present:1;
+ unsigned char ctrl18_is_present:1;
+ unsigned char ctrl19_is_present:1;
+ unsigned char ctrl20_is_present:1;
+ unsigned char ctrl21_is_present:1;
+ unsigned char ctrl22_is_present:1;
+ unsigned char ctrl23_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl24_is_present:1;
+ unsigned char ctrl25_is_present:1;
+ unsigned char ctrl26_is_present:1;
+ unsigned char ctrl27_is_present:1;
+ unsigned char ctrl28_is_present:1;
+ unsigned char ctrl29_is_present:1;
+ unsigned char ctrl30_is_present:1;
+ unsigned char ctrl31_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl32_is_present:1;
+ unsigned char ctrl33_is_present:1;
+ unsigned char ctrl34_is_present:1;
+ unsigned char ctrl35_is_present:1;
+ unsigned char ctrl36_is_present:1;
+ unsigned char ctrl37_is_present:1;
+ unsigned char ctrl38_is_present:1;
+ unsigned char ctrl39_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl40_is_present:1;
+ unsigned char ctrl41_is_present:1;
+ unsigned char ctrl42_is_present:1;
+ unsigned char ctrl43_is_present:1;
+ unsigned char ctrl44_is_present:1;
+ unsigned char ctrl45_is_present:1;
+ unsigned char ctrl46_is_present:1;
+ unsigned char ctrl47_is_present:1;
+ } __packed;
+ };
+ unsigned char data[7];
+ };
+};
+
+struct synaptics_rmi4_f12_query_8 {
+ union {
+ struct {
+ unsigned char size_of_query9;
+ struct {
+ unsigned char data0_is_present:1;
+ unsigned char data1_is_present:1;
+ unsigned char data2_is_present:1;
+ unsigned char data3_is_present:1;
+ unsigned char data4_is_present:1;
+ unsigned char data5_is_present:1;
+ unsigned char data6_is_present:1;
+ unsigned char data7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char data8_is_present:1;
+ unsigned char data9_is_present:1;
+ unsigned char data10_is_present:1;
+ unsigned char data11_is_present:1;
+ unsigned char data12_is_present:1;
+ unsigned char data13_is_present:1;
+ unsigned char data14_is_present:1;
+ unsigned char data15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char data16_is_present:1;
+ unsigned char data17_is_present:1;
+ unsigned char data18_is_present:1;
+ unsigned char data19_is_present:1;
+ unsigned char data20_is_present:1;
+ unsigned char data21_is_present:1;
+ unsigned char data22_is_present:1;
+ unsigned char data23_is_present:1;
+ } __packed;
+ };
+ unsigned char data[4];
+ };
+};
+
+struct synaptics_rmi4_f12_control_41 {
+ union {
+ struct {
+ unsigned char enable_registration:1;
+ unsigned char template_index:4;
+ unsigned char begin:1;
+ unsigned char f12_ctrl41_b6__7:2;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct synaptics_rmi4_udg_handle {
+ atomic_t attn_event;
+ unsigned char intr_mask;
+ unsigned char report_flags;
+ unsigned char object_type_enable1;
+ unsigned char object_type_enable2;
+ unsigned char trace_size;
+ unsigned char template_index;
+ unsigned char max_num_templates;
+ unsigned char detection_score;
+ unsigned char detection_index;
+ unsigned char detection_status;
+ unsigned char registration_status;
+ unsigned char *ctrl_buf;
+ unsigned char *trace_data_buf;
+ unsigned char *template_data_buf;
+#ifdef STORE_GESTURES
+ unsigned char gestures_to_store;
+ unsigned char *storage_buf;
+ unsigned char valid_buf[2];
+#endif
+ unsigned short trace_data_buf_size;
+ unsigned short template_size;
+ unsigned short template_data_size;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ unsigned short ctrl_18_sub10_off;
+ unsigned short ctrl_20_sub1_off;
+ unsigned short ctrl_23_sub3_off;
+ unsigned short ctrl_27_sub5_off;
+ struct input_dev *udg_dev;
+ struct kobject *tuning_dir;
+ struct udg_addr addr;
+ struct udg_tuning tuning;
+ struct synaptics_rmi4_data *rmi4_data;
+};
+
+static struct device_attribute attrs[] = {
+ __ATTR(engine_enable, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_engine_enable_store),
+ __ATTR(detection_enable, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_detection_enable_store),
+ __ATTR(detection_score, 0444,
+ udg_sysfs_detection_score_show,
+ synaptics_rmi4_store_error),
+ __ATTR(detection_index, 0444,
+ udg_sysfs_detection_index_show,
+ synaptics_rmi4_store_error),
+ __ATTR(registration_enable, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_registration_enable_store),
+ __ATTR(registration_begin, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_registration_begin_store),
+ __ATTR(registration_status, 0444,
+ udg_sysfs_registration_status_show,
+ synaptics_rmi4_store_error),
+ __ATTR(template_size, 0444,
+ udg_sysfs_template_size_show,
+ synaptics_rmi4_store_error),
+ __ATTR(template_max_index, 0444,
+ udg_sysfs_template_max_index_show,
+ synaptics_rmi4_store_error),
+ __ATTR(template_detection, 0444,
+ udg_sysfs_template_detection_show,
+ synaptics_rmi4_store_error),
+ __ATTR(template_index, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_template_index_store),
+ __ATTR(template_valid, 0664,
+ udg_sysfs_template_valid_show,
+ udg_sysfs_template_valid_store),
+ __ATTR(template_clear, 0220,
+ synaptics_rmi4_show_error,
+ udg_sysfs_template_clear_store),
+ __ATTR(trace_size, 0444,
+ udg_sysfs_trace_size_show,
+ synaptics_rmi4_store_error),
+};
+
+static struct bin_attribute template_data = {
+ .attr = {
+ .name = "template_data",
+ .mode = 0664,
+ },
+ .size = 0,
+ .read = udg_sysfs_template_data_show,
+ .write = udg_sysfs_template_data_store,
+};
+
+static struct bin_attribute trace_data = {
+ .attr = {
+ .name = "trace_data",
+ .mode = 0444,
+ },
+ .size = 0,
+ .read = udg_sysfs_trace_data_show,
+ .write = NULL,
+};
+
+static struct device_attribute params[] = {
+ __ATTR(template_displacement, 0664,
+ udg_sysfs_template_displacement_show,
+ udg_sysfs_template_displacement_store),
+ __ATTR(rotation_invariance, 0664,
+ udg_sysfs_rotation_invariance_show,
+ udg_sysfs_rotation_invariance_store),
+ __ATTR(scale_invariance, 0664,
+ udg_sysfs_scale_invariance_show,
+ udg_sysfs_scale_invariance_store),
+ __ATTR(threshold_factor, 0664,
+ udg_sysfs_threshold_factor_show,
+ udg_sysfs_threshold_factor_store),
+ __ATTR(match_metric_threshold, 0664,
+ udg_sysfs_match_metric_threshold_show,
+ udg_sysfs_match_metric_threshold_store),
+ __ATTR(max_inter_stroke_time, 0664,
+ udg_sysfs_max_inter_stroke_time_show,
+ udg_sysfs_max_inter_stroke_time_store),
+};
+
+static struct synaptics_rmi4_udg_handle *udg;
+
+static unsigned char ctrl_18_sub_size[] = {10, 10, 10, 2, 3, 4, 3, 3, 1, 1};
+static unsigned char ctrl_20_sub_size[] = {2};
+static unsigned char ctrl_23_sub_size[] = {1, 1, 1};
+static unsigned char ctrl_27_sub_size[] = {1, 5, 2, 1, 7};
+
+DECLARE_COMPLETION(udg_remove_complete);
+
+static ssize_t udg_sysfs_engine_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ bool enable;
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ enable = true;
+ else if (input == 0)
+ enable = false;
+ else
+ return -EINVAL;
+
+ retval = udg_engine_enable(enable);
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_detection_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ bool enable;
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ enable = true;
+ else if (input == 0)
+ enable = false;
+ else
+ return -EINVAL;
+
+ udg->detection_status = 0;
+
+ retval = udg_detection_enable(enable);
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_detection_score_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", udg->detection_score);
+}
+
+static ssize_t udg_sysfs_detection_index_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", udg->detection_index);
+}
+
+static ssize_t udg_sysfs_registration_enable_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ bool enable;
+ unsigned int input;
+ struct synaptics_rmi4_f12_control_41 control_41;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ enable = true;
+ else if (input == 0)
+ enable = false;
+ else
+ return -EINVAL;
+
+ if (enable) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_23,
+ udg->ctrl_buf,
+ udg->ctrl_23_sub3_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->ctrl_buf[0] = 0;
+ udg->ctrl_buf[0] |= (1 << CTRL23_FINGER_REPORT_ENABLE_BIT);
+ if (udg->ctrl_23_sub3_off)
+ udg->ctrl_buf[udg->ctrl_23_sub3_off] = 0;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_23,
+ udg->ctrl_buf,
+ udg->ctrl_23_sub3_off + 1);
+ if (retval < 0)
+ return retval;
+ } else {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_23,
+ udg->ctrl_buf,
+ udg->ctrl_23_sub3_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->ctrl_buf[0] = udg->object_type_enable1;
+ if (udg->ctrl_23_sub3_off) {
+ udg->ctrl_buf[udg->ctrl_23_sub3_off] =
+ udg->object_type_enable2;
+ }
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_23,
+ udg->ctrl_buf,
+ udg->ctrl_23_sub3_off + 1);
+ if (retval < 0)
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ control_41.enable_registration = enable ? 1 : 0;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_registration_begin_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ bool begin;
+ unsigned int input;
+ struct synaptics_rmi4_f12_control_41 control_41;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ begin = true;
+ else if (input == 0)
+ begin = false;
+ else
+ return -EINVAL;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ control_41.begin = begin ? 1 : 0;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_registration_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "0x%02x\n", udg->registration_status);
+}
+
+static ssize_t udg_sysfs_template_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", udg->template_size);
+}
+
+static ssize_t udg_sysfs_template_max_index_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", udg->max_num_templates - 1);
+}
+
+static ssize_t udg_sysfs_template_detection_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ int attn_event;
+ unsigned char detection_status;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ attn_event = atomic_read(&udg->attn_event);
+ atomic_set(&udg->attn_event, 0);
+
+ if (attn_event == 0)
+ return snprintf(buf, PAGE_SIZE, "0\n");
+
+ if (udg->detection_status == 0) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.data_4,
+ rmi4_data->gesture_detection,
+ sizeof(rmi4_data->gesture_detection));
+ if (retval < 0)
+ return retval;
+
+ udg->detection_status = rmi4_data->gesture_detection[0];
+ }
+
+ detection_status = udg->detection_status;
+ udg->detection_status = 0;
+
+ switch (detection_status) {
+ case DETECTION:
+ udg->detection_score = rmi4_data->gesture_detection[1];
+ udg->detection_index = rmi4_data->gesture_detection[4];
+ udg->trace_size = rmi4_data->gesture_detection[3];
+ break;
+ case REGISTRATION:
+ udg->registration_status = rmi4_data->gesture_detection[1];
+ udg->trace_size = rmi4_data->gesture_detection[3];
+ break;
+ default:
+ return snprintf(buf, PAGE_SIZE, "0\n");
+ }
+
+ return snprintf(buf, PAGE_SIZE, "0x%02x\n", detection_status);
+}
+
+static ssize_t udg_sysfs_template_index_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long index;
+
+ retval = sstrtoul(buf, 10, &index);
+ if (retval)
+ return retval;
+
+ retval = udg_set_index((unsigned char)index);
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_template_valid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned char valid;
+ unsigned char offset;
+ unsigned char byte_num;
+ unsigned char template_flags[2];
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ byte_num = udg->template_index / 8;
+ offset = udg->template_index % 8;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.template_flags,
+ template_flags,
+ sizeof(template_flags));
+ if (retval < 0)
+ return retval;
+
+ valid = (template_flags[byte_num] & (1 << offset)) >> offset;
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", valid);
+}
+
+static ssize_t udg_sysfs_template_valid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long valid;
+ unsigned char offset;
+ unsigned char byte_num;
+ unsigned char template_flags[2];
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &valid);
+ if (retval)
+ return retval;
+
+ if (valid > 0)
+ valid = 1;
+
+ byte_num = udg->template_index / 8;
+ offset = udg->template_index % 8;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.template_flags,
+ template_flags,
+ sizeof(template_flags));
+ if (retval < 0)
+ return retval;
+
+ if (valid)
+ template_flags[byte_num] |= (1 << offset);
+ else
+ template_flags[byte_num] &= ~(1 << offset);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.template_flags,
+ template_flags,
+ sizeof(template_flags));
+ if (retval < 0)
+ return retval;
+
+#ifdef STORE_GESTURES
+ udg_read_valid_data();
+#endif
+
+ return count;
+}
+
+static ssize_t udg_sysfs_template_clear_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ const char cmd[] = {'0', 0};
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input != 1)
+ return -EINVAL;
+
+ memset(udg->template_data_buf, 0x00, udg->template_data_size);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.template_data,
+ udg->template_data_buf,
+ udg->template_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to clear template data\n",
+ __func__);
+ return retval;
+ }
+
+ retval = udg_sysfs_template_valid_store(dev, attr, cmd, 1);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to clear valid bit\n",
+ __func__);
+ return retval;
+ }
+
+#ifdef STORE_GESTURES
+ udg_read_template_data(udg->template_index);
+ udg_read_valid_data();
+#endif
+
+ return count;
+}
+
+static ssize_t udg_sysfs_trace_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", udg->trace_size);
+}
+
+static ssize_t udg_sysfs_trace_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ unsigned short index = 0;
+ unsigned short trace_data_size;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ trace_data_size = udg->trace_size * 5;
+
+ if (trace_data_size == 0)
+ return -EINVAL;
+
+ if (count < trace_data_size) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not enough space (%d bytes) in buffer\n",
+ __func__, (unsigned int)count);
+ return -EINVAL;
+ }
+
+ if (udg->trace_data_buf_size < trace_data_size) {
+ if (udg->trace_data_buf_size)
+ kfree(udg->trace_data_buf);
+ udg->trace_data_buf = kzalloc(trace_data_size, GFP_KERNEL);
+ if (!udg->trace_data_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for trace data buffer\n",
+ __func__);
+ udg->trace_data_buf_size = 0;
+ return -ENOMEM;
+ }
+ udg->trace_data_buf_size = trace_data_size;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.trace_x,
+ &udg->trace_data_buf[index],
+ udg->trace_size * 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read trace X data\n",
+ __func__);
+ return retval;
+ } else {
+ index += udg->trace_size * 2;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.trace_y,
+ &udg->trace_data_buf[index],
+ udg->trace_size * 2);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read trace Y data\n",
+ __func__);
+ return retval;
+ } else {
+ index += udg->trace_size * 2;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.trace_segment,
+ &udg->trace_data_buf[index],
+ udg->trace_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read trace segment data\n",
+ __func__);
+ return retval;
+ }
+
+ retval = secure_memcpy(buf, count, udg->trace_data_buf,
+ udg->trace_data_buf_size, trace_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy trace data\n",
+ __func__);
+ return retval;
+ }
+
+ return trace_data_size;
+}
+
+static ssize_t udg_sysfs_template_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (count < udg->template_data_size) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Not enough space (%d bytes) in buffer\n",
+ __func__, (unsigned int)count);
+ return -EINVAL;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.template_data,
+ udg->template_data_buf,
+ udg->template_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read template data\n",
+ __func__);
+ return retval;
+ }
+
+ retval = secure_memcpy(buf, count, udg->template_data_buf,
+ udg->template_data_size, udg->template_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy template data\n",
+ __func__);
+ return retval;
+ }
+
+#ifdef STORE_GESTURES
+ udg_read_template_data(udg->template_index);
+ udg_read_valid_data();
+#endif
+
+ return udg->template_data_size;
+}
+
+static ssize_t udg_sysfs_template_data_store(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = secure_memcpy(udg->template_data_buf, udg->template_data_size,
+ buf, count, count);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy template data\n",
+ __func__);
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.template_data,
+ udg->template_data_buf,
+ count);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write template data\n",
+ __func__);
+ return retval;
+ }
+
+#ifdef STORE_GESTURES
+ udg_read_template_data(udg->template_index);
+ udg_read_valid_data();
+#endif
+
+ return count;
+}
+
+static ssize_t udg_sysfs_template_displacement_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short template_displacement;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ template_displacement =
+ ((unsigned short)udg->tuning.template_disp_lsb << 0) |
+ ((unsigned short)udg->tuning.template_disp_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", template_displacement);
+}
+
+static ssize_t udg_sysfs_template_displacement_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.template_disp_lsb = (unsigned char)(input >> 0);
+ udg->tuning.template_disp_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_rotation_invariance_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short rotation_invariance;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ rotation_invariance =
+ ((unsigned short)udg->tuning.rotation_inv_lsb << 0) |
+ ((unsigned short)udg->tuning.rotation_inv_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", rotation_invariance);
+}
+
+static ssize_t udg_sysfs_rotation_invariance_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.rotation_inv_lsb = (unsigned char)(input >> 0);
+ udg->tuning.rotation_inv_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_scale_invariance_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short scale_invariance;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ scale_invariance =
+ ((unsigned short)udg->tuning.scale_inv_lsb << 0) |
+ ((unsigned short)udg->tuning.scale_inv_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", scale_invariance);
+}
+
+static ssize_t udg_sysfs_scale_invariance_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.scale_inv_lsb = (unsigned char)(input >> 0);
+ udg->tuning.scale_inv_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_threshold_factor_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short threshold_factor;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ threshold_factor =
+ ((unsigned short)udg->tuning.thres_factor_lsb << 0) |
+ ((unsigned short)udg->tuning.thres_factor_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", threshold_factor);
+}
+
+static ssize_t udg_sysfs_threshold_factor_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.thres_factor_lsb = (unsigned char)(input >> 0);
+ udg->tuning.thres_factor_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_match_metric_threshold_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short match_metric_threshold;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ match_metric_threshold =
+ ((unsigned short)udg->tuning.metric_thres_lsb << 0) |
+ ((unsigned short)udg->tuning.metric_thres_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", match_metric_threshold);
+}
+
+static ssize_t udg_sysfs_match_metric_threshold_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.metric_thres_lsb = (unsigned char)(input >> 0);
+ udg->tuning.metric_thres_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t udg_sysfs_max_inter_stroke_time_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned short max_inter_stroke_time;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ max_inter_stroke_time =
+ ((unsigned short)udg->tuning.inter_stroke_lsb << 0) |
+ ((unsigned short)udg->tuning.inter_stroke_msb << 8);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", max_inter_stroke_time);
+}
+
+static ssize_t udg_sysfs_max_inter_stroke_time_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long input;
+
+ retval = sstrtoul(buf, 10, &input);
+ if (retval)
+ return retval;
+
+ retval = udg_read_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ udg->tuning.inter_stroke_lsb = (unsigned char)(input >> 0);
+ udg->tuning.inter_stroke_msb = (unsigned char)(input >> 8);
+
+ retval = udg_write_tuning_params();
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static int udg_ctrl_subpacket(unsigned char ctrlreg,
+ unsigned char subpacket,
+ struct synaptics_rmi4_f12_query_5 *query_5)
+{
+ int retval;
+ unsigned char cnt;
+ unsigned char regnum;
+ unsigned char bitnum;
+ unsigned char q5_index;
+ unsigned char q6_index;
+ unsigned char offset;
+ unsigned char max_ctrlreg;
+ unsigned char *query_6;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ max_ctrlreg = (sizeof(query_5->data) - 1) * 8 - 1;
+
+ if (ctrlreg > max_ctrlreg) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Control register number (%d) over limit\n",
+ __func__, ctrlreg);
+ return -EINVAL;
+ }
+
+ q5_index = ctrlreg / 8 + 1;
+ bitnum = ctrlreg % 8;
+ if ((query_5->data[q5_index] & (1 << bitnum)) == 0x00) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Control %d is not present\n",
+ __func__, ctrlreg);
+ return -EINVAL;
+ }
+
+ query_6 = kmalloc(query_5->size_of_query6, GFP_KERNEL);
+ if (!query_6) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query 6\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 6,
+ query_6,
+ query_5->size_of_query6);
+ if (retval < 0)
+ goto exit;
+
+ q6_index = 0;
+
+ for (regnum = 0; regnum < ctrlreg; regnum++) {
+ q5_index = regnum / 8 + 1;
+ bitnum = regnum % 8;
+ if ((query_5->data[q5_index] & (1 << bitnum)) == 0x00)
+ continue;
+
+ if (query_6[q6_index] == 0x00)
+ q6_index += 3;
+ else
+ q6_index++;
+
+ while (query_6[q6_index] & ~MASK_7BIT)
+ q6_index++;
+
+ q6_index++;
+ }
+
+ cnt = 0;
+ q6_index++;
+ offset = subpacket / 7;
+ bitnum = subpacket % 7;
+
+ do {
+ if (cnt == offset) {
+ if (query_6[q6_index + cnt] & (1 << bitnum))
+ retval = 1;
+ else
+ retval = 0;
+ goto exit;
+ }
+ cnt++;
+ } while (query_6[q6_index + cnt - 1] & ~MASK_7BIT);
+
+ retval = 0;
+
+exit:
+ kfree(query_6);
+
+ return retval;
+}
+
+static int udg_read_tuning_params(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_18,
+ udg->ctrl_buf,
+ udg->ctrl_18_sub10_off + sizeof(struct udg_tuning));
+ if (retval < 0)
+ return retval;
+
+ secure_memcpy(udg->tuning.data,
+ sizeof(udg->tuning.data),
+ (unsigned char *)&udg->ctrl_buf[udg->ctrl_18_sub10_off],
+ sizeof(struct udg_tuning),
+ sizeof(struct udg_tuning));
+
+ return 0;
+}
+
+static int udg_write_tuning_params(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ secure_memcpy((unsigned char *)&udg->ctrl_buf[udg->ctrl_18_sub10_off],
+ sizeof(struct udg_tuning),
+ udg->tuning.data,
+ sizeof(udg->tuning.data),
+ sizeof(struct udg_tuning));
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_18,
+ udg->ctrl_buf,
+ udg->ctrl_18_sub10_off + sizeof(struct udg_tuning));
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int udg_detection_enable(bool enable)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_20,
+ udg->ctrl_buf,
+ udg->ctrl_20_sub1_off + 1);
+ if (retval < 0)
+ return retval;
+
+ if (enable)
+ udg->ctrl_buf[udg->ctrl_20_sub1_off] = WAKEUP_GESTURE_MODE;
+ else
+ udg->ctrl_buf[udg->ctrl_20_sub1_off] = udg->report_flags;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_20,
+ udg->ctrl_buf,
+ udg->ctrl_20_sub1_off + 1);
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int udg_engine_enable(bool enable)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (enable) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_27,
+ udg->ctrl_buf,
+ udg->ctrl_27_sub5_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->ctrl_buf[udg->ctrl_27_sub5_off] |=
+ (1 << CTRL27_UDG_ENABLE_BIT);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_27,
+ udg->ctrl_buf,
+ udg->ctrl_27_sub5_off + 1);
+ if (retval < 0)
+ return retval;
+ } else {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_27,
+ udg->ctrl_buf,
+ udg->ctrl_27_sub5_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->ctrl_buf[udg->ctrl_27_sub5_off] &=
+ ~(1 << CTRL27_UDG_ENABLE_BIT);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_27,
+ udg->ctrl_buf,
+ udg->ctrl_27_sub5_off + 1);
+ if (retval < 0)
+ return retval;
+ }
+
+ return 0;
+}
+
+static void udg_report(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ atomic_set(&udg->attn_event, 1);
+
+ if (rmi4_data->suspend) {
+ if (rmi4_data->gesture_detection[0] == 0) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.data_4,
+ rmi4_data->gesture_detection,
+ sizeof(rmi4_data->gesture_detection));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read gesture detection\n",
+ __func__);
+ return;
+ }
+ }
+
+ udg->detection_status = rmi4_data->gesture_detection[0];
+ rmi4_data->gesture_detection[0] = 0;
+
+ if (udg->detection_status == DETECTION) {
+ input_report_key(udg->udg_dev, KEY_WAKEUP, 1);
+ input_sync(udg->udg_dev);
+ input_report_key(udg->udg_dev, KEY_WAKEUP, 0);
+ input_sync(udg->udg_dev);
+ rmi4_data->suspend = false;
+ }
+ }
+
+ return;
+}
+
+static int udg_set_index(unsigned char index)
+{
+ int retval;
+ struct synaptics_rmi4_f12_control_41 control_41;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ if (index >= udg->max_num_templates)
+ return -EINVAL;
+
+ udg->template_index = index;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ control_41.template_index = udg->template_index;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.ctrl_41,
+ control_41.data,
+ sizeof(control_41.data));
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+#ifdef STORE_GESTURES
+static int udg_read_valid_data(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.template_flags,
+ udg->valid_buf,
+ sizeof(udg->valid_buf));
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int udg_write_valid_data(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.template_flags,
+ udg->valid_buf,
+ sizeof(udg->valid_buf));
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int udg_read_template_data(unsigned char index)
+{
+ int retval;
+ unsigned char *storage;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ udg_set_index(index);
+ storage = &(udg->storage_buf[index * udg->template_data_size]);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.template_data,
+ storage,
+ udg->template_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read template data\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int udg_write_template_data(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char *storage;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ for (ii = 0; ii < udg->gestures_to_store; ii++) {
+ udg_set_index(ii);
+ storage = &(udg->storage_buf[ii * udg->template_data_size]);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ udg->addr.template_data,
+ storage,
+ udg->template_data_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write template data\n",
+ __func__);
+ return retval;
+ }
+ }
+
+ return 0;
+}
+#endif
+
+static int udg_reg_init(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char data_offset;
+ unsigned char size_of_query;
+ unsigned char ctrl_18_offset;
+ unsigned char ctrl_20_offset;
+ unsigned char ctrl_23_offset;
+ unsigned char ctrl_27_offset;
+ unsigned char ctrl_41_offset;
+ struct synaptics_rmi4_f12_query_0 query_0;
+ struct synaptics_rmi4_f12_query_5 query_5;
+ struct synaptics_rmi4_f12_query_8 query_8;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 7,
+ &size_of_query,
+ sizeof(size_of_query));
+ if (retval < 0)
+ return retval;
+
+ if (size_of_query < 4) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: User defined gesture support unavailable (missing data registers)\n",
+ __func__);
+ retval = -ENODEV;
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 8,
+ query_8.data,
+ sizeof(query_8.data));
+ if (retval < 0)
+ return retval;
+
+ if ((query_8.data16_is_present) &&
+ (query_8.data17_is_present) &&
+ (query_8.data18_is_present) &&
+ (query_8.data19_is_present) &&
+ (query_8.data20_is_present) &&
+ (query_8.data21_is_present)) {
+ data_offset = query_8.data0_is_present +
+ query_8.data1_is_present +
+ query_8.data2_is_present +
+ query_8.data3_is_present;
+ udg->addr.data_4 = udg->data_base_addr + data_offset;
+ data_offset = data_offset +
+ query_8.data4_is_present +
+ query_8.data5_is_present +
+ query_8.data6_is_present +
+ query_8.data7_is_present +
+ query_8.data8_is_present +
+ query_8.data9_is_present +
+ query_8.data10_is_present +
+ query_8.data11_is_present +
+ query_8.data12_is_present +
+ query_8.data13_is_present +
+ query_8.data14_is_present +
+ query_8.data15_is_present;
+ udg->addr.trace_x = udg->data_base_addr + data_offset;
+ udg->addr.trace_y = udg->addr.trace_x + 1;
+ udg->addr.trace_segment = udg->addr.trace_y + 1;
+ udg->addr.template_helper = udg->addr.trace_segment + 1;
+ udg->addr.template_data = udg->addr.template_helper + 1;
+ udg->addr.template_flags = udg->addr.template_data + 1;
+ } else {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: User defined gesture support unavailable (missing data registers)\n",
+ __func__);
+ retval = -ENODEV;
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 4,
+ &size_of_query,
+ sizeof(size_of_query));
+ if (retval < 0)
+ return retval;
+
+ if (size_of_query < 7) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: User defined gesture support unavailable (missing control registers)\n",
+ __func__);
+ retval = -ENODEV;
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 5,
+ query_5.data,
+ sizeof(query_5.data));
+ if (retval < 0)
+ return retval;
+
+ ctrl_18_offset = query_5.ctrl0_is_present +
+ query_5.ctrl1_is_present +
+ query_5.ctrl2_is_present +
+ query_5.ctrl3_is_present +
+ query_5.ctrl4_is_present +
+ query_5.ctrl5_is_present +
+ query_5.ctrl6_is_present +
+ query_5.ctrl7_is_present +
+ query_5.ctrl8_is_present +
+ query_5.ctrl9_is_present +
+ query_5.ctrl10_is_present +
+ query_5.ctrl11_is_present +
+ query_5.ctrl12_is_present +
+ query_5.ctrl13_is_present +
+ query_5.ctrl14_is_present +
+ query_5.ctrl15_is_present +
+ query_5.ctrl16_is_present +
+ query_5.ctrl17_is_present;
+
+ ctrl_20_offset = ctrl_18_offset +
+ query_5.ctrl18_is_present +
+ query_5.ctrl19_is_present;
+
+ ctrl_23_offset = ctrl_20_offset +
+ query_5.ctrl20_is_present +
+ query_5.ctrl21_is_present +
+ query_5.ctrl22_is_present;
+
+ ctrl_27_offset = ctrl_23_offset+
+ query_5.ctrl23_is_present +
+ query_5.ctrl24_is_present +
+ query_5.ctrl25_is_present +
+ query_5.ctrl26_is_present;
+
+ ctrl_41_offset = ctrl_27_offset+
+ query_5.ctrl27_is_present +
+ query_5.ctrl28_is_present +
+ query_5.ctrl29_is_present +
+ query_5.ctrl30_is_present +
+ query_5.ctrl31_is_present +
+ query_5.ctrl32_is_present +
+ query_5.ctrl33_is_present +
+ query_5.ctrl34_is_present +
+ query_5.ctrl35_is_present +
+ query_5.ctrl36_is_present +
+ query_5.ctrl37_is_present +
+ query_5.ctrl38_is_present +
+ query_5.ctrl39_is_present +
+ query_5.ctrl40_is_present;
+
+ udg->addr.ctrl_18 = udg->control_base_addr + ctrl_18_offset;
+ udg->addr.ctrl_20 = udg->control_base_addr + ctrl_20_offset;
+ udg->addr.ctrl_23 = udg->control_base_addr + ctrl_23_offset;
+ udg->addr.ctrl_27 = udg->control_base_addr + ctrl_27_offset;
+ udg->addr.ctrl_41 = udg->control_base_addr + ctrl_41_offset;
+
+ udg->ctrl_18_sub10_off = 0;
+ for (ii = 0; ii < 10; ii++) {
+ retval = udg_ctrl_subpacket(18, ii, &query_5);
+ if (retval == 1)
+ udg->ctrl_18_sub10_off += ctrl_18_sub_size[ii];
+ else if (retval < 0)
+ return retval;
+ }
+
+ udg->ctrl_20_sub1_off = 0;
+ for (ii = 0; ii < 1; ii++) {
+ retval = udg_ctrl_subpacket(20, ii, &query_5);
+ if (retval == 1)
+ udg->ctrl_20_sub1_off += ctrl_20_sub_size[ii];
+ else if (retval < 0)
+ return retval;
+ }
+
+ udg->ctrl_23_sub3_off = 0;
+ for (ii = 0; ii < 3; ii++) {
+ retval = udg_ctrl_subpacket(23, ii, &query_5);
+ if (retval == 1)
+ udg->ctrl_23_sub3_off += ctrl_23_sub_size[ii];
+ else if (retval < 0)
+ return retval;
+ }
+
+ retval = udg_ctrl_subpacket(23, 3, &query_5);
+ if (retval == 0)
+ udg->ctrl_23_sub3_off = 0;
+ else if (retval < 0)
+ return retval;
+
+ udg->ctrl_27_sub5_off = 0;
+ for (ii = 0; ii < 5; ii++) {
+ retval = udg_ctrl_subpacket(27, ii, &query_5);
+ if (retval == 1)
+ udg->ctrl_27_sub5_off += ctrl_27_sub_size[ii];
+ else if (retval < 0)
+ return retval;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->query_base_addr + 0,
+ query_0.data,
+ sizeof(query_0.data));
+ if (retval < 0)
+ return retval;
+
+ udg->max_num_templates = query_0.max_num_templates;
+ udg->template_size =
+ ((unsigned short)query_0.template_size_lsb << 0) |
+ ((unsigned short)query_0.template_size_msb << 8);
+ udg->template_data_size = udg->template_size * 4 * 2 + 4 + 1;
+
+#ifdef STORE_GESTURES
+ udg->gestures_to_store = udg->max_num_templates;
+ if (GESTURES_TO_STORE < udg->gestures_to_store)
+ udg->gestures_to_store = GESTURES_TO_STORE;
+#endif
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_20,
+ udg->ctrl_buf,
+ udg->ctrl_20_sub1_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->report_flags = udg->ctrl_buf[udg->ctrl_20_sub1_off];
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ udg->addr.ctrl_23,
+ udg->ctrl_buf,
+ udg->ctrl_23_sub3_off + 1);
+ if (retval < 0)
+ return retval;
+
+ udg->object_type_enable1 = udg->ctrl_buf[0];
+ if (udg->ctrl_23_sub3_off)
+ udg->object_type_enable2 = udg->ctrl_buf[udg->ctrl_23_sub3_off];
+
+ return retval;
+}
+
+static int udg_scan_pdt(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char page;
+ unsigned char intr_count = 0;
+ unsigned char intr_off;
+ unsigned char intr_src;
+ unsigned short addr;
+ struct synaptics_rmi4_fn_desc fd;
+ struct synaptics_rmi4_data *rmi4_data = udg->rmi4_data;
+
+ for (page = 0; page < PAGES_TO_SERVICE; page++) {
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ addr |= (page << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&fd,
+ sizeof(fd));
+ if (retval < 0)
+ return retval;
+
+ addr &= ~(MASK_8BIT << 8);
+
+ if (fd.fn_number) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Found F%02x\n",
+ __func__, fd.fn_number);
+ switch (fd.fn_number) {
+ case SYNAPTICS_RMI4_F12:
+ goto f12_found;
+ break;
+ }
+ } else {
+ break;
+ }
+
+ intr_count += fd.intr_src_count;
+ }
+ }
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F12\n",
+ __func__);
+ return -EINVAL;
+
+f12_found:
+ udg->query_base_addr = fd.query_base_addr | (page << 8);
+ udg->control_base_addr = fd.ctrl_base_addr | (page << 8);
+ udg->data_base_addr = fd.data_base_addr | (page << 8);
+ udg->command_base_addr = fd.cmd_base_addr | (page << 8);
+
+ retval = udg_reg_init();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to initialize user defined gesture registers\n",
+ __func__);
+ return retval;
+ }
+
+ udg->intr_mask = 0;
+ intr_src = fd.intr_src_count;
+ intr_off = intr_count % 8;
+ for (ii = intr_off;
+ ii < (intr_src + intr_off);
+ ii++) {
+ udg->intr_mask |= 1 << ii;
+ }
+
+ rmi4_data->intr_mask[0] |= udg->intr_mask;
+
+ addr = rmi4_data->f01_ctrl_base_addr + 1;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ addr,
+ &rmi4_data->intr_mask[0],
+ sizeof(rmi4_data->intr_mask[0]));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set interrupt enable bit\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static void synaptics_rmi4_udg_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!udg)
+ return;
+
+ if (udg->intr_mask & intr_mask)
+ udg_report();
+
+ return;
+}
+
+static int synaptics_rmi4_udg_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char size;
+ unsigned char attr_count;
+ unsigned char param_count;
+
+ if (udg) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ udg = kzalloc(sizeof(*udg), GFP_KERNEL);
+ if (!udg) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for udg\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ size = 0;
+ for (ii = 0; ii < sizeof(ctrl_18_sub_size); ii++)
+ size += ctrl_18_sub_size[ii];
+ size += sizeof(struct udg_tuning);
+ udg->ctrl_buf = kzalloc(size, GFP_KERNEL);
+ if (!udg->ctrl_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for ctrl_buf\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_udg;
+ }
+
+ udg->rmi4_data = rmi4_data;
+
+ retval = udg_scan_pdt();
+ if (retval < 0)
+ goto exit_free_ctrl_buf;
+
+ udg->template_data_buf = kzalloc(udg->template_data_size, GFP_KERNEL);
+ if (!udg->template_data_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for template_data_buf\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_ctrl_buf;
+ }
+
+#ifdef STORE_GESTURES
+ udg->storage_buf = kzalloc(
+ udg->template_data_size * udg->gestures_to_store,
+ GFP_KERNEL);
+ if (!udg->storage_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for storage_buf\n",
+ __func__);
+ kfree(udg->template_data_buf);
+ retval = -ENOMEM;
+ goto exit_free_ctrl_buf;
+ }
+#endif
+
+ udg->udg_dev = input_allocate_device();
+ if (udg->udg_dev == NULL) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate gesture device\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_template_data_buf;
+ }
+
+ udg->udg_dev->name = GESTURE_DRIVER_NAME;
+ udg->udg_dev->phys = GESTURE_PHYS_NAME;
+ udg->udg_dev->id.product = SYNAPTICS_DSX_DRIVER_PRODUCT;
+ udg->udg_dev->id.version = SYNAPTICS_DSX_DRIVER_VERSION;
+ udg->udg_dev->dev.parent = rmi4_data->pdev->dev.parent;
+ input_set_drvdata(udg->udg_dev, rmi4_data);
+
+ set_bit(EV_KEY, udg->udg_dev->evbit);
+ set_bit(KEY_WAKEUP, udg->udg_dev->keybit);
+ input_set_capability(udg->udg_dev, EV_KEY, KEY_WAKEUP);
+
+ retval = input_register_device(udg->udg_dev);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to register gesture device\n",
+ __func__);
+ input_free_device(udg->udg_dev);
+ goto exit_free_template_data_buf;
+ }
+
+ udg->tuning_dir = kobject_create_and_add(TUNING_SYSFS_DIR_NAME,
+ &udg->udg_dev->dev.kobj);
+ if (!udg->tuning_dir) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create tuning sysfs directory\n",
+ __func__);
+ goto exit_unregister_input_device;
+ }
+
+ retval = sysfs_create_bin_file(&udg->udg_dev->dev.kobj, &template_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create template data bin file\n",
+ __func__);
+ goto exit_remove_sysfs_directory;
+ }
+
+ retval = sysfs_create_bin_file(&udg->udg_dev->dev.kobj, &trace_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create trace data bin file\n",
+ __func__);
+ goto exit_remove_bin_file;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(&udg->udg_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_remove_attrs;
+ }
+ }
+
+ for (param_count = 0; param_count < ARRAY_SIZE(params); param_count++) {
+ retval = sysfs_create_file(udg->tuning_dir,
+ ¶ms[param_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create tuning parameters\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_remove_params;
+ }
+ }
+
+ retval = udg_engine_enable(true);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to enable gesture engine\n",
+ __func__);
+ goto exit_remove_params;
+ }
+
+ return 0;
+
+exit_remove_params:
+ for (param_count--; param_count >= 0; param_count--) {
+ sysfs_remove_file(udg->tuning_dir,
+ ¶ms[param_count].attr);
+ }
+
+exit_remove_attrs:
+ for (attr_count--; attr_count >= 0; attr_count--) {
+ sysfs_remove_file(&udg->udg_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ sysfs_remove_bin_file(&udg->udg_dev->dev.kobj, &trace_data);
+
+exit_remove_bin_file:
+ sysfs_remove_bin_file(&udg->udg_dev->dev.kobj, &template_data);
+
+exit_remove_sysfs_directory:
+ kobject_put(udg->tuning_dir);
+
+exit_unregister_input_device:
+ input_unregister_device(udg->udg_dev);
+
+exit_free_template_data_buf:
+#ifdef STORE_GESTURES
+ kfree(udg->storage_buf);
+#endif
+ kfree(udg->template_data_buf);
+
+exit_free_ctrl_buf:
+ kfree(udg->ctrl_buf);
+
+exit_free_udg:
+ kfree(udg);
+ udg = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_udg_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char count;
+
+ if (!udg)
+ goto exit;
+
+ for (count = 0; count < ARRAY_SIZE(params); count++) {
+ sysfs_remove_file(udg->tuning_dir,
+ ¶ms[count].attr);
+ }
+
+ for (count = 0; count < ARRAY_SIZE(attrs); count++) {
+ sysfs_remove_file(&udg->udg_dev->dev.kobj,
+ &attrs[count].attr);
+ }
+
+ sysfs_remove_bin_file(&udg->udg_dev->dev.kobj, &trace_data);
+ sysfs_remove_bin_file(&udg->udg_dev->dev.kobj, &template_data);
+ kobject_put(udg->tuning_dir);
+
+ input_unregister_device(udg->udg_dev);
+#ifdef STORE_GESTURES
+ kfree(udg->storage_buf);
+#endif
+ kfree(udg->template_data_buf);
+ kfree(udg->trace_data_buf);
+ kfree(udg->ctrl_buf);
+ kfree(udg);
+ udg = NULL;
+
+exit:
+ complete(&udg_remove_complete);
+
+ return;
+}
+
+static void synaptics_rmi4_udg_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg) {
+ synaptics_rmi4_udg_init(rmi4_data);
+ return;
+ }
+
+ udg_scan_pdt();
+ udg_engine_enable(true);
+#ifdef STORE_GESTURES
+ udg_write_template_data();
+ udg_write_valid_data();
+#endif
+
+ return;
+}
+
+static void synaptics_rmi4_udg_reinit(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg)
+ return;
+
+ udg_engine_enable(true);
+#ifdef STORE_GESTURES
+ udg_write_template_data();
+ udg_write_valid_data();
+#endif
+
+ return;
+}
+
+static void synaptics_rmi4_udg_e_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg)
+ return;
+
+ rmi4_data->sleep_enable(rmi4_data, false);
+ rmi4_data->irq_enable(rmi4_data, true, false);
+ enable_irq_wake(rmi4_data->irq);
+
+ udg_engine_enable(true);
+ udg_detection_enable(true);
+
+ return;
+}
+
+static void synaptics_rmi4_udg_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg)
+ return;
+
+ rmi4_data->sleep_enable(rmi4_data, false);
+ rmi4_data->irq_enable(rmi4_data, true, false);
+ enable_irq_wake(rmi4_data->irq);
+
+ udg_engine_enable(true);
+ udg_detection_enable(true);
+
+ return;
+}
+
+static void synaptics_rmi4_udg_resume(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg)
+ return;
+
+ disable_irq_wake(rmi4_data->irq);
+ udg_detection_enable(false);
+
+ return;
+}
+
+static void synaptics_rmi4_udg_l_resume(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!udg)
+ return;
+
+ disable_irq_wake(rmi4_data->irq);
+ udg_detection_enable(false);
+
+ return;
+}
+
+static struct synaptics_rmi4_exp_fn gesture_module = {
+ .fn_type = RMI_GESTURE,
+ .init = synaptics_rmi4_udg_init,
+ .remove = synaptics_rmi4_udg_remove,
+ .reset = synaptics_rmi4_udg_reset,
+ .reinit = synaptics_rmi4_udg_reinit,
+ .early_suspend = synaptics_rmi4_udg_e_suspend,
+ .suspend = synaptics_rmi4_udg_suspend,
+ .resume = synaptics_rmi4_udg_resume,
+ .late_resume = synaptics_rmi4_udg_l_resume,
+ .attn = synaptics_rmi4_udg_attn,
+};
+
+static int __init rmi4_gesture_module_init(void)
+{
+ synaptics_rmi4_new_function(&gesture_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_gesture_module_exit(void)
+{
+ synaptics_rmi4_new_function(&gesture_module, false);
+
+ wait_for_completion(&udg_remove_complete);
+
+ return;
+}
+
+module_init(rmi4_gesture_module_init);
+module_exit(rmi4_gesture_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX User Defined Gesture Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_i2c.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_i2c.c
new file mode 100644
index 0000000..8776d4a
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_i2c.c
@@ -0,0 +1,606 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/types.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define SYN_I2C_RETRY_TIMES 10
+#define rd_msgs 1
+
+static unsigned char *wr_buf;
+
+static struct synaptics_dsx_hw_interface hw_if;
+
+static struct platform_device *synaptics_dsx_i2c_device;
+
+#ifdef CONFIG_OF
+static int parse_dt(struct device *dev, struct synaptics_dsx_board_data *bdata)
+{
+ int retval;
+ u32 value;
+ const char *name;
+ struct property *prop;
+ struct device_node *np = dev->of_node;
+
+ bdata->irq_gpio = of_get_named_gpio_flags(np,
+ "synaptics,irq-gpio", 0,
+ (enum of_gpio_flags *)&bdata->irq_flags);
+
+ retval = of_property_read_u32(np, "synaptics,irq-on-state",
+ &value);
+ if (retval < 0)
+ bdata->irq_on_state = 0;
+ else
+ bdata->irq_on_state = value;
+
+ retval = of_property_read_string(np, "synaptics,pwr-reg-name", &name);
+ if (retval < 0)
+ bdata->pwr_reg_name = NULL;
+ else
+ bdata->pwr_reg_name = name;
+
+ retval = of_property_read_string(np, "synaptics,bus-reg-name", &name);
+ if (retval < 0)
+ bdata->bus_reg_name = NULL;
+ else
+ bdata->bus_reg_name = name;
+
+ prop = of_find_property(np, "synaptics,power-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->power_gpio = of_get_named_gpio_flags(np,
+ "synaptics,power-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,power-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_on_state = value;
+ }
+ } else {
+ bdata->power_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,power-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,power-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_delay_ms = value;
+ }
+ } else {
+ bdata->power_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->reset_gpio = of_get_named_gpio_flags(np,
+ "synaptics,reset-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,reset-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_on_state = value;
+ }
+ retval = of_property_read_u32(np, "synaptics,reset-active-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-active-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_active_ms = value;
+ }
+ } else {
+ bdata->reset_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,reset-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_delay_ms = value;
+ }
+ } else {
+ bdata->reset_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,max-y-for-2d", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,max-y-for-2d",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,max-y-for-2d property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->max_y_for_2d = value;
+ }
+ } else {
+ bdata->max_y_for_2d = -1;
+ }
+
+ bdata->swap_axes = of_property_read_bool(np, "synaptics,swap-axes");
+ bdata->x_flip = of_property_read_bool(np, "synaptics,x-flip");
+ bdata->y_flip = of_property_read_bool(np, "synaptics,y-flip");
+
+ prop = of_find_property(np, "synaptics,ub-i2c-addr", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,ub-i2c-addr",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,ub-i2c-addr property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->ub_i2c_addr = (unsigned short)value;
+ }
+ } else {
+ bdata->ub_i2c_addr = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,cap-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->cap_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->cap_button_map->map)
+ return -ENOMEM;
+ bdata->cap_button_map->nbuttons = prop->length / sizeof(u32);
+ retval = of_property_read_u32_array(np,
+ "synaptics,cap-button-codes",
+ bdata->cap_button_map->map,
+ bdata->cap_button_map->nbuttons);
+ if (retval < 0) {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+ } else {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+
+ prop = of_find_property(np, "synaptics,vir-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->vir_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->vir_button_map->map)
+ return -ENOMEM;
+ bdata->vir_button_map->nbuttons = prop->length / sizeof(u32);
+ bdata->vir_button_map->nbuttons /= 5;
+ retval = of_property_read_u32_array(np,
+ "synaptics,vir-button-codes",
+ bdata->vir_button_map->map,
+ bdata->vir_button_map->nbuttons * 5);
+ if (retval < 0) {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+ } else {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+
+ return 0;
+}
+#endif
+
+static int synaptics_rmi4_i2c_alloc_buf(struct synaptics_rmi4_data *rmi4_data,
+ unsigned int count)
+{
+ static unsigned int buf_size;
+
+ if (count > buf_size) {
+ if (buf_size)
+ kfree(wr_buf);
+ wr_buf = kzalloc(count, GFP_KERNEL);
+ if (!wr_buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for buffer\n",
+ __func__);
+ buf_size = 0;
+ return -ENOMEM;
+ }
+ buf_size = count;
+ }
+
+ return 0;
+}
+
+static void synaptics_rmi4_i2c_check_addr(struct synaptics_rmi4_data *rmi4_data,
+ struct i2c_client *i2c)
+{
+ if (hw_if.board_data->ub_i2c_addr == -1)
+ return;
+
+ if (hw_if.board_data->i2c_addr == i2c->addr)
+ hw_if.board_data->i2c_addr = hw_if.board_data->ub_i2c_addr;
+ else
+ hw_if.board_data->i2c_addr = i2c->addr;
+
+ return;
+}
+
+static int synaptics_rmi4_i2c_set_page(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr)
+{
+ int retval = 0;
+ unsigned char retry;
+ unsigned char buf[PAGE_SELECT_LEN];
+ unsigned char page;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ struct i2c_msg msg[2];
+
+ msg[0].addr = hw_if.board_data->i2c_addr;
+ msg[0].flags = 0;
+ msg[0].len = PAGE_SELECT_LEN;
+ msg[0].buf = buf;
+
+ page = ((addr >> 8) & MASK_8BIT);
+ buf[0] = MASK_8BIT;
+ buf[1] = page;
+
+ if (page != rmi4_data->current_page) {
+ for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
+ if (i2c_transfer(i2c->adapter, &msg[0], 1) == 1) {
+ rmi4_data->current_page = page;
+ retval = PAGE_SELECT_LEN;
+ break;
+ }
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: I2C retry %d\n",
+ __func__, retry + 1);
+ msleep(20);
+
+ if (retry == SYN_I2C_RETRY_TIMES / 2) {
+ synaptics_rmi4_i2c_check_addr(rmi4_data, i2c);
+ msg[0].addr = hw_if.board_data->i2c_addr;
+ }
+ }
+ } else {
+ retval = PAGE_SELECT_LEN;
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_i2c_read(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval = 0;
+ unsigned char retry;
+ unsigned char buf;
+ unsigned char index = 0;
+ unsigned char xfer_msgs;
+ unsigned char remaining_msgs;
+ unsigned short i2c_addr;
+ unsigned short data_offset = 0;
+ unsigned int remaining_length = length;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ struct i2c_adapter *adap = i2c->adapter;
+ struct i2c_msg msg[rd_msgs + 1];
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ retval = synaptics_rmi4_i2c_set_page(rmi4_data, addr);
+ if (retval != PAGE_SELECT_LEN) {
+ retval = -EIO;
+ goto exit;
+ }
+
+ msg[0].addr = hw_if.board_data->i2c_addr;
+ msg[0].flags = 0;
+ msg[0].len = 1;
+ msg[0].buf = &buf;
+ msg[rd_msgs].addr = hw_if.board_data->i2c_addr;
+ msg[rd_msgs].flags = I2C_M_RD;
+ msg[rd_msgs].len = (unsigned short)remaining_length;
+ msg[rd_msgs].buf = &data[data_offset];
+
+ buf = addr & MASK_8BIT;
+
+ remaining_msgs = rd_msgs + 1;
+
+ while (remaining_msgs) {
+ xfer_msgs = remaining_msgs;
+ for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
+ retval = i2c_transfer(adap, &msg[index], xfer_msgs);
+ if (retval == xfer_msgs)
+ break;
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: I2C retry %d\n",
+ __func__, retry + 1);
+ msleep(20);
+
+ if (retry == SYN_I2C_RETRY_TIMES / 2) {
+ synaptics_rmi4_i2c_check_addr(rmi4_data, i2c);
+ i2c_addr = hw_if.board_data->i2c_addr;
+ msg[0].addr = i2c_addr;
+ msg[rd_msgs].addr = i2c_addr;
+ }
+ }
+
+ if (retry == SYN_I2C_RETRY_TIMES) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: I2C read over retry limit\n",
+ __func__);
+ retval = -EIO;
+ goto exit;
+ }
+
+ remaining_msgs -= xfer_msgs;
+ index += xfer_msgs;
+ }
+
+ retval = length;
+
+exit:
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static int synaptics_rmi4_i2c_write(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval;
+ unsigned char retry;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ struct i2c_msg msg[2];
+
+ retval = synaptics_rmi4_i2c_alloc_buf(rmi4_data, length + 1);
+ if (retval < 0)
+ return retval;
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ retval = synaptics_rmi4_i2c_set_page(rmi4_data, addr);
+ if (retval != PAGE_SELECT_LEN) {
+ retval = -EIO;
+ goto exit;
+ }
+
+ msg[0].addr = hw_if.board_data->i2c_addr;
+ msg[0].flags = 0;
+ msg[0].len = (unsigned short)(length + 1);
+ msg[0].buf = wr_buf;
+
+ wr_buf[0] = addr & MASK_8BIT;
+ retval = secure_memcpy(&wr_buf[1], length, &data[0], length, length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy data\n",
+ __func__);
+ goto exit;
+ }
+
+ for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
+ if (i2c_transfer(i2c->adapter, &msg[0], 1) == 1) {
+ retval = length;
+ break;
+ }
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: I2C retry %d\n",
+ __func__, retry + 1);
+ msleep(20);
+
+ if (retry == SYN_I2C_RETRY_TIMES / 2) {
+ synaptics_rmi4_i2c_check_addr(rmi4_data, i2c);
+ msg[0].addr = hw_if.board_data->i2c_addr;
+ }
+ }
+
+ if (retry == SYN_I2C_RETRY_TIMES) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: I2C write over retry limit\n",
+ __func__);
+ retval = -EIO;
+ }
+
+exit:
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static struct synaptics_dsx_bus_access bus_access = {
+ .type = BUS_I2C,
+ .read = synaptics_rmi4_i2c_read,
+ .write = synaptics_rmi4_i2c_write,
+};
+
+static void synaptics_rmi4_i2c_dev_release(struct device *dev)
+{
+ kfree(synaptics_dsx_i2c_device);
+
+ return;
+}
+
+static int synaptics_rmi4_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *dev_id)
+{
+ int retval;
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&client->dev,
+ "%s: SMBus byte data commands not supported by host\n",
+ __func__);
+ return -EIO;
+ }
+
+ synaptics_dsx_i2c_device = kzalloc(
+ sizeof(struct platform_device),
+ GFP_KERNEL);
+ if (!synaptics_dsx_i2c_device) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for synaptics_dsx_i2c_device\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+#ifdef CONFIG_OF
+ if (client->dev.of_node) {
+ hw_if.board_data = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_board_data),
+ GFP_KERNEL);
+ if (!hw_if.board_data) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for board data\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->cap_button_map = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->cap_button_map) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for 0D button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->vir_button_map = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->vir_button_map) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for virtual button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ parse_dt(&client->dev, hw_if.board_data);
+ }
+#else
+ hw_if.board_data = client->dev.platform_data;
+#endif
+
+ hw_if.bus_access = &bus_access;
+ hw_if.board_data->i2c_addr = client->addr;
+
+ synaptics_dsx_i2c_device->name = PLATFORM_DRIVER_NAME;
+ synaptics_dsx_i2c_device->id = 0;
+ synaptics_dsx_i2c_device->num_resources = 0;
+ synaptics_dsx_i2c_device->dev.parent = &client->dev;
+ synaptics_dsx_i2c_device->dev.platform_data = &hw_if;
+ synaptics_dsx_i2c_device->dev.release = synaptics_rmi4_i2c_dev_release;
+
+ retval = platform_device_register(synaptics_dsx_i2c_device);
+ if (retval) {
+ dev_err(&client->dev,
+ "%s: Failed to register platform device\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_i2c_remove(struct i2c_client *client)
+{
+ platform_device_unregister(synaptics_dsx_i2c_device);
+
+ return 0;
+}
+
+static const struct i2c_device_id synaptics_rmi4_id_table[] = {
+ {I2C_DRIVER_NAME, 0},
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, synaptics_rmi4_id_table);
+
+#ifdef CONFIG_OF
+static struct of_device_id synaptics_rmi4_of_match_table[] = {
+ {
+ .compatible = "synaptics,dsx-i2c",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, synaptics_rmi4_of_match_table);
+#else
+#define synaptics_rmi4_of_match_table NULL
+#endif
+
+static struct i2c_driver synaptics_rmi4_i2c_driver = {
+ .driver = {
+ .name = I2C_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = synaptics_rmi4_of_match_table,
+ },
+ .probe = synaptics_rmi4_i2c_probe,
+ .remove = synaptics_rmi4_i2c_remove,
+ .id_table = synaptics_rmi4_id_table,
+};
+
+int synaptics_rmi4_bus_init(void)
+{
+ return i2c_add_driver(&synaptics_rmi4_i2c_driver);
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_init);
+
+void synaptics_rmi4_bus_exit(void)
+{
+ kfree(wr_buf);
+
+ i2c_del_driver(&synaptics_rmi4_i2c_driver);
+
+ return;
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX I2C Bus Support Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_proximity.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_proximity.c
new file mode 100644
index 0000000..518b805
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_proximity.c
@@ -0,0 +1,692 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define PROX_PHYS_NAME "synaptics_dsx/proximity"
+
+#define HOVER_Z_MAX (255)
+
+#define HOVERING_FINGER_EN (1 << 4)
+
+static ssize_t synaptics_rmi4_hover_finger_en_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t synaptics_rmi4_hover_finger_en_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static struct device_attribute attrs[] = {
+ __ATTR(hover_finger_en, 0664,
+ synaptics_rmi4_hover_finger_en_show,
+ synaptics_rmi4_hover_finger_en_store),
+};
+
+struct synaptics_rmi4_f12_query_5 {
+ union {
+ struct {
+ unsigned char size_of_query6;
+ struct {
+ unsigned char ctrl0_is_present:1;
+ unsigned char ctrl1_is_present:1;
+ unsigned char ctrl2_is_present:1;
+ unsigned char ctrl3_is_present:1;
+ unsigned char ctrl4_is_present:1;
+ unsigned char ctrl5_is_present:1;
+ unsigned char ctrl6_is_present:1;
+ unsigned char ctrl7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl8_is_present:1;
+ unsigned char ctrl9_is_present:1;
+ unsigned char ctrl10_is_present:1;
+ unsigned char ctrl11_is_present:1;
+ unsigned char ctrl12_is_present:1;
+ unsigned char ctrl13_is_present:1;
+ unsigned char ctrl14_is_present:1;
+ unsigned char ctrl15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl16_is_present:1;
+ unsigned char ctrl17_is_present:1;
+ unsigned char ctrl18_is_present:1;
+ unsigned char ctrl19_is_present:1;
+ unsigned char ctrl20_is_present:1;
+ unsigned char ctrl21_is_present:1;
+ unsigned char ctrl22_is_present:1;
+ unsigned char ctrl23_is_present:1;
+ } __packed;
+ };
+ unsigned char data[4];
+ };
+};
+
+struct synaptics_rmi4_f12_query_8 {
+ union {
+ struct {
+ unsigned char size_of_query9;
+ struct {
+ unsigned char data0_is_present:1;
+ unsigned char data1_is_present:1;
+ unsigned char data2_is_present:1;
+ unsigned char data3_is_present:1;
+ unsigned char data4_is_present:1;
+ unsigned char data5_is_present:1;
+ unsigned char data6_is_present:1;
+ unsigned char data7_is_present:1;
+ } __packed;
+ };
+ unsigned char data[2];
+ };
+};
+
+struct prox_finger_data {
+ union {
+ struct {
+ unsigned char object_type_and_status;
+ unsigned char x_lsb;
+ unsigned char x_msb;
+ unsigned char y_lsb;
+ unsigned char y_msb;
+ unsigned char z;
+ } __packed;
+ unsigned char proximity_data[6];
+ };
+};
+
+struct synaptics_rmi4_prox_handle {
+ bool hover_finger_present;
+ bool hover_finger_en;
+ unsigned char intr_mask;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ unsigned short hover_finger_en_addr;
+ unsigned short hover_finger_data_addr;
+ struct input_dev *prox_dev;
+ struct prox_finger_data *finger_data;
+ struct synaptics_rmi4_data *rmi4_data;
+};
+
+static struct synaptics_rmi4_prox_handle *prox;
+
+DECLARE_COMPLETION(prox_remove_complete);
+
+static void prox_hover_finger_lift(void)
+{
+ input_report_key(prox->prox_dev, BTN_TOUCH, 0);
+ input_report_key(prox->prox_dev, BTN_TOOL_FINGER, 0);
+ input_sync(prox->prox_dev);
+ prox->hover_finger_present = false;
+
+ return;
+}
+
+static void prox_hover_finger_report(void)
+{
+ int retval;
+ int x;
+ int y;
+ int z;
+ struct prox_finger_data *data;
+ struct synaptics_rmi4_data *rmi4_data = prox->rmi4_data;
+
+ data = prox->finger_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ prox->hover_finger_data_addr,
+ data->proximity_data,
+ sizeof(data->proximity_data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read hovering finger data\n",
+ __func__);
+ return;
+ }
+
+ if (data->object_type_and_status != F12_HOVERING_FINGER_STATUS) {
+ if (prox->hover_finger_present)
+ prox_hover_finger_lift();
+
+ return;
+ }
+
+ x = (data->x_msb << 8) | (data->x_lsb);
+ y = (data->y_msb << 8) | (data->y_lsb);
+ z = HOVER_Z_MAX - data->z;
+
+ input_report_key(prox->prox_dev, BTN_TOUCH, 0);
+ input_report_key(prox->prox_dev, BTN_TOOL_FINGER, 1);
+ input_report_abs(prox->prox_dev, ABS_X, x);
+ input_report_abs(prox->prox_dev, ABS_Y, y);
+ input_report_abs(prox->prox_dev, ABS_DISTANCE, z);
+
+ input_sync(prox->prox_dev);
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: x = %d y = %d z = %d\n",
+ __func__, x, y, z);
+
+ prox->hover_finger_present = true;
+
+ return;
+}
+
+static int prox_set_hover_finger_en(void)
+{
+ int retval;
+ unsigned char object_report_enable;
+ struct synaptics_rmi4_data *rmi4_data = prox->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ prox->hover_finger_en_addr,
+ &object_report_enable,
+ sizeof(object_report_enable));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read from object report enable register\n",
+ __func__);
+ return retval;
+ }
+
+ if (prox->hover_finger_en)
+ object_report_enable |= HOVERING_FINGER_EN;
+ else
+ object_report_enable &= ~HOVERING_FINGER_EN;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ prox->hover_finger_en_addr,
+ &object_report_enable,
+ sizeof(object_report_enable));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write to object report enable register\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static void prox_set_params(void)
+{
+ input_set_abs_params(prox->prox_dev, ABS_X, 0,
+ prox->rmi4_data->sensor_max_x, 0, 0);
+ input_set_abs_params(prox->prox_dev, ABS_Y, 0,
+ prox->rmi4_data->sensor_max_y, 0, 0);
+ input_set_abs_params(prox->prox_dev, ABS_DISTANCE, 0,
+ HOVER_Z_MAX, 0, 0);
+
+ return;
+}
+
+static int prox_reg_init(void)
+{
+ int retval;
+ unsigned char ctrl_23_offset;
+ unsigned char data_1_offset;
+ struct synaptics_rmi4_f12_query_5 query_5;
+ struct synaptics_rmi4_f12_query_8 query_8;
+ struct synaptics_rmi4_data *rmi4_data = prox->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ prox->query_base_addr + 5,
+ query_5.data,
+ sizeof(query_5.data));
+ if (retval < 0)
+ return retval;
+
+ ctrl_23_offset = query_5.ctrl0_is_present +
+ query_5.ctrl1_is_present +
+ query_5.ctrl2_is_present +
+ query_5.ctrl3_is_present +
+ query_5.ctrl4_is_present +
+ query_5.ctrl5_is_present +
+ query_5.ctrl6_is_present +
+ query_5.ctrl7_is_present +
+ query_5.ctrl8_is_present +
+ query_5.ctrl9_is_present +
+ query_5.ctrl10_is_present +
+ query_5.ctrl11_is_present +
+ query_5.ctrl12_is_present +
+ query_5.ctrl13_is_present +
+ query_5.ctrl14_is_present +
+ query_5.ctrl15_is_present +
+ query_5.ctrl16_is_present +
+ query_5.ctrl17_is_present +
+ query_5.ctrl18_is_present +
+ query_5.ctrl19_is_present +
+ query_5.ctrl20_is_present +
+ query_5.ctrl21_is_present +
+ query_5.ctrl22_is_present;
+
+ prox->hover_finger_en_addr = prox->control_base_addr + ctrl_23_offset;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ prox->query_base_addr + 8,
+ query_8.data,
+ sizeof(query_8.data));
+ if (retval < 0)
+ return retval;
+
+ data_1_offset = query_8.data0_is_present;
+ prox->hover_finger_data_addr = prox->data_base_addr + data_1_offset;
+
+ return retval;
+}
+
+static int prox_scan_pdt(void)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char page;
+ unsigned char intr_count = 0;
+ unsigned char intr_off;
+ unsigned char intr_src;
+ unsigned short addr;
+ struct synaptics_rmi4_fn_desc fd;
+ struct synaptics_rmi4_data *rmi4_data = prox->rmi4_data;
+
+ for (page = 0; page < PAGES_TO_SERVICE; page++) {
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ addr |= (page << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&fd,
+ sizeof(fd));
+ if (retval < 0)
+ return retval;
+
+ addr &= ~(MASK_8BIT << 8);
+
+ if (fd.fn_number) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Found F%02x\n",
+ __func__, fd.fn_number);
+ switch (fd.fn_number) {
+ case SYNAPTICS_RMI4_F12:
+ goto f12_found;
+ break;
+ }
+ } else {
+ break;
+ }
+
+ intr_count += fd.intr_src_count;
+ }
+ }
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F12\n",
+ __func__);
+ return -EINVAL;
+
+f12_found:
+ prox->query_base_addr = fd.query_base_addr | (page << 8);
+ prox->control_base_addr = fd.ctrl_base_addr | (page << 8);
+ prox->data_base_addr = fd.data_base_addr | (page << 8);
+ prox->command_base_addr = fd.cmd_base_addr | (page << 8);
+
+ retval = prox_reg_init();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to initialize proximity registers\n",
+ __func__);
+ return retval;
+ }
+
+ prox->intr_mask = 0;
+ intr_src = fd.intr_src_count;
+ intr_off = intr_count % 8;
+ for (ii = intr_off;
+ ii < (intr_src + intr_off);
+ ii++) {
+ prox->intr_mask |= 1 << ii;
+ }
+
+ rmi4_data->intr_mask[0] |= prox->intr_mask;
+
+ addr = rmi4_data->f01_ctrl_base_addr + 1;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ addr,
+ &(rmi4_data->intr_mask[0]),
+ sizeof(rmi4_data->intr_mask[0]));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set interrupt enable bit\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static ssize_t synaptics_rmi4_hover_finger_en_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ if (!prox)
+ return -ENODEV;
+
+ return snprintf(buf, PAGE_SIZE, "%u\n",
+ prox->hover_finger_en);
+}
+
+static ssize_t synaptics_rmi4_hover_finger_en_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = prox->rmi4_data;
+
+ if (!prox)
+ return -ENODEV;
+
+ if (kstrtouint(buf, 16, &input) != 1)
+ return -EINVAL;
+
+ if (input == 1)
+ prox->hover_finger_en = true;
+ else if (input == 0)
+ prox->hover_finger_en = false;
+ else
+ return -EINVAL;
+
+ retval = prox_set_hover_finger_en();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to change hovering finger enable setting\n",
+ __func__);
+ return retval;
+ }
+
+ return count;
+}
+
+int synaptics_rmi4_prox_hover_finger_en(bool enable)
+{
+ int retval;
+
+ if (!prox)
+ return -ENODEV;
+
+ prox->hover_finger_en = enable;
+
+ retval = prox_set_hover_finger_en();
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+EXPORT_SYMBOL(synaptics_rmi4_prox_hover_finger_en);
+
+static void synaptics_rmi4_prox_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!prox)
+ return;
+
+ if (prox->intr_mask & intr_mask)
+ prox_hover_finger_report();
+
+ return;
+}
+
+static int synaptics_rmi4_prox_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char attr_count;
+
+ if (prox) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ prox = kzalloc(sizeof(*prox), GFP_KERNEL);
+ if (!prox) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for prox\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ prox->finger_data = kzalloc(sizeof(*(prox->finger_data)), GFP_KERNEL);
+ if (!prox->finger_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for finger_data\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_prox;
+ }
+
+ prox->rmi4_data = rmi4_data;
+
+ retval = prox_scan_pdt();
+ if (retval < 0)
+ goto exit_free_finger_data;
+
+ prox->hover_finger_en = true;
+
+ retval = prox_set_hover_finger_en();
+ if (retval < 0)
+ return retval;
+
+ prox->prox_dev = input_allocate_device();
+ if (prox->prox_dev == NULL) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate proximity device\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit_free_finger_data;
+ }
+
+ prox->prox_dev->name = PROXIMITY_DRIVER_NAME;
+ prox->prox_dev->phys = PROX_PHYS_NAME;
+ prox->prox_dev->id.product = SYNAPTICS_DSX_DRIVER_PRODUCT;
+ prox->prox_dev->id.version = SYNAPTICS_DSX_DRIVER_VERSION;
+ prox->prox_dev->dev.parent = rmi4_data->pdev->dev.parent;
+ input_set_drvdata(prox->prox_dev, rmi4_data);
+
+ set_bit(EV_KEY, prox->prox_dev->evbit);
+ set_bit(EV_ABS, prox->prox_dev->evbit);
+ set_bit(BTN_TOUCH, prox->prox_dev->keybit);
+ set_bit(BTN_TOOL_FINGER, prox->prox_dev->keybit);
+#ifdef INPUT_PROP_DIRECT
+ set_bit(INPUT_PROP_DIRECT, prox->prox_dev->propbit);
+#endif
+
+ prox_set_params();
+
+ retval = input_register_device(prox->prox_dev);
+ if (retval) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to register proximity device\n",
+ __func__);
+ goto exit_free_input_device;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ goto exit_free_sysfs;
+ }
+ }
+
+ return 0;
+
+exit_free_sysfs:
+ for (attr_count--; attr_count >= 0; attr_count--) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ input_unregister_device(prox->prox_dev);
+ prox->prox_dev = NULL;
+
+exit_free_input_device:
+ if (prox->prox_dev)
+ input_free_device(prox->prox_dev);
+
+exit_free_finger_data:
+ kfree(prox->finger_data);
+
+exit_free_prox:
+ kfree(prox);
+ prox = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_prox_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char attr_count;
+
+ if (!prox)
+ goto exit;
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
+ &attrs[attr_count].attr);
+ }
+
+ input_unregister_device(prox->prox_dev);
+ kfree(prox->finger_data);
+ kfree(prox);
+ prox = NULL;
+
+exit:
+ complete(&prox_remove_complete);
+
+ return;
+}
+
+static void synaptics_rmi4_prox_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!prox) {
+ synaptics_rmi4_prox_init(rmi4_data);
+ return;
+ }
+
+ prox_hover_finger_lift();
+
+ prox_scan_pdt();
+
+ prox_set_hover_finger_en();
+
+ return;
+}
+
+static void synaptics_rmi4_prox_reinit(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!prox)
+ return;
+
+ prox_hover_finger_lift();
+
+ prox_set_hover_finger_en();
+
+ return;
+}
+
+static void synaptics_rmi4_prox_e_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!prox)
+ return;
+
+ prox_hover_finger_lift();
+
+ return;
+}
+
+static void synaptics_rmi4_prox_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!prox)
+ return;
+
+ prox_hover_finger_lift();
+
+ return;
+}
+
+static struct synaptics_rmi4_exp_fn proximity_module = {
+ .fn_type = RMI_PROXIMITY,
+ .init = synaptics_rmi4_prox_init,
+ .remove = synaptics_rmi4_prox_remove,
+ .reset = synaptics_rmi4_prox_reset,
+ .reinit = synaptics_rmi4_prox_reinit,
+ .early_suspend = synaptics_rmi4_prox_e_suspend,
+ .suspend = synaptics_rmi4_prox_suspend,
+ .resume = NULL,
+ .late_resume = NULL,
+ .attn = synaptics_rmi4_prox_attn,
+};
+
+static int __init rmi4_proximity_module_init(void)
+{
+ synaptics_rmi4_new_function(&proximity_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_proximity_module_exit(void)
+{
+ synaptics_rmi4_new_function(&proximity_module, false);
+
+ wait_for_completion(&prox_remove_complete);
+
+ return;
+}
+
+module_init(rmi4_proximity_module_init);
+module_exit(rmi4_proximity_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX Proximity Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_dev.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_dev.c
new file mode 100644
index 0000000..61cf979
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_dev.c
@@ -0,0 +1,1064 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/signal.h>
+#include <linux/sched.h>
+#include <linux/gpio.h>
+#include <linux/uaccess.h>
+#include <linux/cdev.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define CHAR_DEVICE_NAME "rmi"
+#define DEVICE_CLASS_NAME "rmidev"
+#define SYSFS_FOLDER_NAME "rmidev"
+#define DEV_NUMBER 1
+#define REG_ADDR_LIMIT 0xFFFF
+
+#define RMIDEV_MAJOR_NUM 0
+
+static ssize_t rmidev_sysfs_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t rmidev_sysfs_data_store(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static ssize_t rmidev_sysfs_open_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t rmidev_sysfs_release_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t rmidev_sysfs_attn_state_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmidev_sysfs_pid_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmidev_sysfs_pid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t rmidev_sysfs_term_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t rmidev_sysfs_intr_mask_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmidev_sysfs_intr_mask_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t rmidev_sysfs_concurrent_show(struct device *dev,
+ struct device_attribute *attr, char *buf);
+
+static ssize_t rmidev_sysfs_concurrent_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+struct rmidev_handle {
+ dev_t dev_no;
+ pid_t pid;
+ unsigned char intr_mask;
+ unsigned char *tmpbuf;
+ unsigned int tmpbuf_size;
+ struct device dev;
+ struct synaptics_rmi4_data *rmi4_data;
+ struct kobject *sysfs_dir;
+ struct siginfo interrupt_signal;
+ struct siginfo terminate_signal;
+ struct task_struct *task;
+ void *data;
+ bool concurrent;
+};
+
+struct rmidev_data {
+ int ref_count;
+ struct cdev main_dev;
+ struct class *device_class;
+ struct mutex file_mutex;
+ struct rmidev_handle *rmi_dev;
+};
+
+static struct bin_attribute attr_data = {
+ .attr = {
+ .name = "data",
+ .mode = 0664,
+ },
+ .size = 0,
+ .read = rmidev_sysfs_data_show,
+ .write = rmidev_sysfs_data_store,
+};
+
+static struct device_attribute attrs[] = {
+ __ATTR(open, 0220,
+ synaptics_rmi4_show_error,
+ rmidev_sysfs_open_store),
+ __ATTR(release, 0220,
+ synaptics_rmi4_show_error,
+ rmidev_sysfs_release_store),
+ __ATTR(attn_state, 0444,
+ rmidev_sysfs_attn_state_show,
+ synaptics_rmi4_store_error),
+ __ATTR(pid, 0664,
+ rmidev_sysfs_pid_show,
+ rmidev_sysfs_pid_store),
+ __ATTR(term, 0220,
+ synaptics_rmi4_show_error,
+ rmidev_sysfs_term_store),
+ __ATTR(intr_mask, 0664,
+ rmidev_sysfs_intr_mask_show,
+ rmidev_sysfs_intr_mask_store),
+ __ATTR(concurrent, 0664,
+ rmidev_sysfs_concurrent_show,
+ rmidev_sysfs_concurrent_store),
+};
+
+static int rmidev_major_num = RMIDEV_MAJOR_NUM;
+
+static struct class *rmidev_device_class;
+
+static struct rmidev_handle *rmidev;
+
+DECLARE_COMPLETION(rmidev_remove_complete);
+
+static irqreturn_t rmidev_sysfs_irq(int irq, void *data)
+{
+ struct synaptics_rmi4_data *rmi4_data = data;
+
+ sysfs_notify(&rmi4_data->input_dev->dev.kobj,
+ SYSFS_FOLDER_NAME, "attn_state");
+
+ return IRQ_HANDLED;
+}
+
+static int rmidev_sysfs_irq_enable(struct synaptics_rmi4_data *rmi4_data,
+ bool enable)
+{
+ int retval = 0;
+ unsigned char intr_status[MAX_INTR_REGISTERS];
+ unsigned long irq_flags = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING |
+ IRQF_ONESHOT;
+
+ mutex_lock(&(rmi4_data->rmi4_irq_enable_mutex));
+
+ if (enable) {
+ if (rmi4_data->irq_enabled) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Interrupt already enabled\n",
+ __func__);
+ goto exit;
+ }
+
+ /* Clear interrupts first */
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_data_base_addr + 1,
+ intr_status,
+ rmi4_data->num_of_intr_regs);
+ if (retval < 0)
+ goto exit;
+
+ retval = request_threaded_irq(rmi4_data->irq, NULL,
+ rmidev_sysfs_irq, irq_flags,
+ PLATFORM_DRIVER_NAME, rmi4_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create irq thread\n",
+ __func__);
+ goto exit;
+ }
+
+ rmi4_data->irq_enabled = true;
+ } else {
+ if (rmi4_data->irq_enabled) {
+ disable_irq(rmi4_data->irq);
+ free_irq(rmi4_data->irq, rmi4_data);
+ rmi4_data->irq_enabled = false;
+ }
+ }
+
+exit:
+ mutex_unlock(&(rmi4_data->rmi4_irq_enable_mutex));
+
+ return retval;
+}
+
+static ssize_t rmidev_sysfs_data_show(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ unsigned char intr_status = 0;
+ unsigned int length = (unsigned int)count;
+ unsigned short address = (unsigned short)pos;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ if (length > (REG_ADDR_LIMIT - address)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Out of register map limit\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (length) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ address,
+ (unsigned char *)buf,
+ length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read data\n",
+ __func__);
+ return retval;
+ }
+ } else {
+ return -EINVAL;
+ }
+
+ if (!rmidev->concurrent)
+ goto exit;
+
+ if (address != rmi4_data->f01_data_base_addr)
+ goto exit;
+
+ if (length <= 1)
+ goto exit;
+
+ intr_status = buf[1];
+
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->num_of_data_sources) {
+ if (fhandler->intr_mask & intr_status) {
+ rmi4_data->report_touch(rmi4_data,
+ fhandler);
+ }
+ }
+ }
+ }
+
+exit:
+ return length;
+}
+
+static ssize_t rmidev_sysfs_data_store(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ unsigned int length = (unsigned int)count;
+ unsigned short address = (unsigned short)pos;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (length > (REG_ADDR_LIMIT - address)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Out of register map limit\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (length) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ address,
+ (unsigned char *)buf,
+ length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write data\n",
+ __func__);
+ return retval;
+ }
+ } else {
+ return -EINVAL;
+ }
+
+ return length;
+}
+
+static ssize_t rmidev_sysfs_open_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input != 1)
+ return -EINVAL;
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ rmi4_data->irq_enable(rmi4_data, false, false);
+ rmidev_sysfs_irq_enable(rmi4_data, true);
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Attention interrupt disabled\n",
+ __func__);
+
+ return count;
+}
+
+static ssize_t rmidev_sysfs_release_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input != 1)
+ return -EINVAL;
+
+ rmidev_sysfs_irq_enable(rmi4_data, false);
+
+ rmi4_data->reset_device(rmi4_data, false);
+
+ rmi4_data->stay_awake = false;
+
+ return count;
+}
+
+static ssize_t rmidev_sysfs_attn_state_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int attn_state;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ attn_state = gpio_get_value(bdata->irq_gpio);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", attn_state);
+}
+
+static ssize_t rmidev_sysfs_pid_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", rmidev->pid);
+}
+
+static ssize_t rmidev_sysfs_pid_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ rmidev->pid = input;
+
+ if (rmidev->pid) {
+ rmidev->task = pid_task(find_vpid(rmidev->pid), PIDTYPE_PID);
+ if (!rmidev->task) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to locate PID of data logging tool\n",
+ __func__);
+ return -EINVAL;
+ }
+ }
+
+ return count;
+}
+
+static ssize_t rmidev_sysfs_term_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ if (input != 1)
+ return -EINVAL;
+
+ if (rmidev->pid)
+ send_sig_info(SIGTERM, &rmidev->terminate_signal, rmidev->task);
+
+ return count;
+}
+
+static ssize_t rmidev_sysfs_intr_mask_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "0x%02x\n", rmidev->intr_mask);
+}
+
+static ssize_t rmidev_sysfs_intr_mask_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ rmidev->intr_mask = (unsigned char)input;
+
+ return count;
+}
+
+static ssize_t rmidev_sysfs_concurrent_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%d\n", rmidev->concurrent);
+}
+
+static ssize_t rmidev_sysfs_concurrent_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 10, &input) != 1)
+ return -EINVAL;
+
+ rmidev->concurrent = input > 0 ? true : false;
+
+ return count;
+}
+
+static int rmidev_allocate_buffer(int count)
+{
+ if (count + 1 > rmidev->tmpbuf_size) {
+ if (rmidev->tmpbuf_size)
+ kfree(rmidev->tmpbuf);
+ rmidev->tmpbuf = kzalloc(count + 1, GFP_KERNEL);
+ if (!rmidev->tmpbuf) {
+ dev_err(rmidev->rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for buffer\n",
+ __func__);
+ rmidev->tmpbuf_size = 0;
+ return -ENOMEM;
+ }
+ rmidev->tmpbuf_size = count + 1;
+ }
+
+ return 0;
+}
+
+/*
+ * rmidev_llseek - set register address to access for RMI device
+ *
+ * @filp: pointer to file structure
+ * @off:
+ * if whence == SEEK_SET,
+ * off: 16-bit RMI register address
+ * if whence == SEEK_CUR,
+ * off: offset from current position
+ * if whence == SEEK_END,
+ * off: offset from end position (0xFFFF)
+ * @whence: SEEK_SET, SEEK_CUR, or SEEK_END
+ */
+static loff_t rmidev_llseek(struct file *filp, loff_t off, int whence)
+{
+ loff_t newpos;
+ struct rmidev_data *dev_data = filp->private_data;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (IS_ERR(dev_data)) {
+ pr_err("%s: Pointer of char device data is invalid", __func__);
+ return -EBADF;
+ }
+
+ mutex_lock(&(dev_data->file_mutex));
+
+ switch (whence) {
+ case SEEK_SET:
+ newpos = off;
+ break;
+ case SEEK_CUR:
+ newpos = filp->f_pos + off;
+ break;
+ case SEEK_END:
+ newpos = REG_ADDR_LIMIT + off;
+ break;
+ default:
+ newpos = -EINVAL;
+ goto clean_up;
+ }
+
+ if (newpos < 0 || newpos > REG_ADDR_LIMIT) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: New position 0x%04x is invalid\n",
+ __func__, (unsigned int)newpos);
+ newpos = -EINVAL;
+ goto clean_up;
+ }
+
+ filp->f_pos = newpos;
+
+clean_up:
+ mutex_unlock(&(dev_data->file_mutex));
+
+ return newpos;
+}
+
+/*
+ * rmidev_read: read register data from RMI device
+ *
+ * @filp: pointer to file structure
+ * @buf: pointer to user space buffer
+ * @count: number of bytes to read
+ * @f_pos: starting RMI register address
+ */
+static ssize_t rmidev_read(struct file *filp, char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ ssize_t retval;
+ unsigned char intr_status = 0;
+ unsigned short address;
+ struct rmidev_data *dev_data = filp->private_data;
+ struct synaptics_rmi4_fn *fhandler;
+ struct synaptics_rmi4_device_info *rmi;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ rmi = &(rmi4_data->rmi4_mod_info);
+
+ if (IS_ERR(dev_data)) {
+ pr_err("%s: Pointer of char device data is invalid", __func__);
+ return -EBADF;
+ }
+
+ if (count == 0)
+ return 0;
+
+ if (count > (REG_ADDR_LIMIT - *f_pos))
+ count = REG_ADDR_LIMIT - *f_pos;
+
+ address = (unsigned short)(*f_pos);
+
+ mutex_lock(&(dev_data->file_mutex));
+
+ rmidev_allocate_buffer(count);
+
+ retval = synaptics_rmi4_reg_read(rmidev->rmi4_data,
+ *f_pos,
+ rmidev->tmpbuf,
+ count);
+ if (retval < 0)
+ goto clean_up;
+
+ if (copy_to_user(buf, rmidev->tmpbuf, count))
+ retval = -EFAULT;
+ else
+ *f_pos += retval;
+
+ if (!rmidev->concurrent)
+ goto clean_up;
+
+ if (address != rmi4_data->f01_data_base_addr)
+ goto clean_up;
+
+ if (count <= 1)
+ goto clean_up;
+
+ intr_status = rmidev->tmpbuf[1];
+
+ if (!list_empty(&rmi->support_fn_list)) {
+ list_for_each_entry(fhandler, &rmi->support_fn_list, link) {
+ if (fhandler->num_of_data_sources) {
+ if (fhandler->intr_mask & intr_status) {
+ rmi4_data->report_touch(rmi4_data,
+ fhandler);
+ }
+ }
+ }
+ }
+
+clean_up:
+ mutex_unlock(&(dev_data->file_mutex));
+
+ return retval;
+}
+
+/*
+ * rmidev_write: write register data to RMI device
+ *
+ * @filp: pointer to file structure
+ * @buf: pointer to user space buffer
+ * @count: number of bytes to write
+ * @f_pos: starting RMI register address
+ */
+static ssize_t rmidev_write(struct file *filp, const char __user *buf,
+ size_t count, loff_t *f_pos)
+{
+ ssize_t retval;
+ struct rmidev_data *dev_data = filp->private_data;
+
+ if (IS_ERR(dev_data)) {
+ pr_err("%s: Pointer of char device data is invalid", __func__);
+ return -EBADF;
+ }
+
+ if (count == 0)
+ return 0;
+
+ if (count > (REG_ADDR_LIMIT - *f_pos))
+ count = REG_ADDR_LIMIT - *f_pos;
+
+ mutex_lock(&(dev_data->file_mutex));
+
+ rmidev_allocate_buffer(count);
+
+ if (copy_from_user(rmidev->tmpbuf, buf, count))
+ return -EFAULT;
+
+ retval = synaptics_rmi4_reg_write(rmidev->rmi4_data,
+ *f_pos,
+ rmidev->tmpbuf,
+ count);
+ if (retval >= 0)
+ *f_pos += retval;
+
+ mutex_unlock(&(dev_data->file_mutex));
+
+ return retval;
+}
+
+static int rmidev_open(struct inode *inp, struct file *filp)
+{
+ int retval = 0;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+ struct rmidev_data *dev_data =
+ container_of(inp->i_cdev, struct rmidev_data, main_dev);
+
+ if (!dev_data)
+ return -EACCES;
+
+ if (rmi4_data->sensor_sleep) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Sensor sleeping\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ rmi4_data->stay_awake = true;
+
+ filp->private_data = dev_data;
+
+ mutex_lock(&(dev_data->file_mutex));
+
+ rmi4_data->irq_enable(rmi4_data, false, false);
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Attention interrupt disabled\n",
+ __func__);
+
+ if (dev_data->ref_count < 1)
+ dev_data->ref_count++;
+ else
+ retval = -EACCES;
+
+ mutex_unlock(&(dev_data->file_mutex));
+
+ return retval;
+}
+
+static int rmidev_release(struct inode *inp, struct file *filp)
+{
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+ struct rmidev_data *dev_data =
+ container_of(inp->i_cdev, struct rmidev_data, main_dev);
+
+ if (!dev_data)
+ return -EACCES;
+
+ mutex_lock(&(dev_data->file_mutex));
+
+ dev_data->ref_count--;
+ if (dev_data->ref_count < 0)
+ dev_data->ref_count = 0;
+
+ rmi4_data->reset_device(rmi4_data, false);
+
+ rmi4_data->stay_awake = false;
+
+ mutex_unlock(&(dev_data->file_mutex));
+
+ return 0;
+}
+
+static const struct file_operations rmidev_fops = {
+ .owner = THIS_MODULE,
+ .llseek = rmidev_llseek,
+ .read = rmidev_read,
+ .write = rmidev_write,
+ .open = rmidev_open,
+ .release = rmidev_release,
+};
+
+static void rmidev_device_cleanup(struct rmidev_data *dev_data)
+{
+ dev_t devno;
+ struct synaptics_rmi4_data *rmi4_data = rmidev->rmi4_data;
+
+ if (dev_data) {
+ devno = dev_data->main_dev.dev;
+
+ if (dev_data->device_class)
+ device_destroy(dev_data->device_class, devno);
+
+ cdev_del(&dev_data->main_dev);
+
+ unregister_chrdev_region(devno, 1);
+
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: rmidev device removed\n",
+ __func__);
+ }
+
+ return;
+}
+
+static char *rmi_char_devnode(struct device *dev, umode_t *mode)
+{
+ if (!mode)
+ return NULL;
+
+ *mode = (S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH);
+
+ return kasprintf(GFP_KERNEL, "rmi/%s", dev_name(dev));
+}
+
+static int rmidev_create_device_class(void)
+{
+ if (rmidev_device_class != NULL)
+ return 0;
+
+ rmidev_device_class = class_create(THIS_MODULE, DEVICE_CLASS_NAME);
+
+ if (IS_ERR(rmidev_device_class)) {
+ pr_err("%s: Failed to create /dev/%s\n",
+ __func__, CHAR_DEVICE_NAME);
+ return -ENODEV;
+ }
+
+ rmidev_device_class->devnode = rmi_char_devnode;
+
+ return 0;
+}
+
+static void rmidev_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!rmidev)
+ return;
+
+ if (rmidev->pid && (rmidev->intr_mask & intr_mask))
+ send_sig_info(SIGIO, &rmidev->interrupt_signal, rmidev->task);
+
+ return;
+}
+
+static int rmidev_init_device(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ dev_t dev_no;
+ unsigned char attr_count;
+ struct rmidev_data *dev_data;
+ struct device *device_ptr;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ if (rmidev) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ rmidev = kzalloc(sizeof(*rmidev), GFP_KERNEL);
+ if (!rmidev) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for rmidev\n",
+ __func__);
+ retval = -ENOMEM;
+ goto err_rmidev;
+ }
+
+ rmidev->rmi4_data = rmi4_data;
+
+ memset(&rmidev->interrupt_signal, 0, sizeof(rmidev->interrupt_signal));
+ rmidev->interrupt_signal.si_signo = SIGIO;
+ rmidev->interrupt_signal.si_code = SI_USER;
+
+ memset(&rmidev->terminate_signal, 0, sizeof(rmidev->terminate_signal));
+ rmidev->terminate_signal.si_signo = SIGTERM;
+ rmidev->terminate_signal.si_code = SI_USER;
+
+ retval = rmidev_create_device_class();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create device class\n",
+ __func__);
+ goto err_device_class;
+ }
+
+ if (rmidev_major_num) {
+ dev_no = MKDEV(rmidev_major_num, DEV_NUMBER);
+ retval = register_chrdev_region(dev_no, 1, CHAR_DEVICE_NAME);
+ } else {
+ retval = alloc_chrdev_region(&dev_no, 0, 1, CHAR_DEVICE_NAME);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to allocate char device region\n",
+ __func__);
+ goto err_device_region;
+ }
+
+ rmidev_major_num = MAJOR(dev_no);
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Major number of rmidev = %d\n",
+ __func__, rmidev_major_num);
+ }
+
+ dev_data = kzalloc(sizeof(*dev_data), GFP_KERNEL);
+ if (!dev_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for dev_data\n",
+ __func__);
+ retval = -ENOMEM;
+ goto err_dev_data;
+ }
+
+ mutex_init(&dev_data->file_mutex);
+ dev_data->rmi_dev = rmidev;
+ rmidev->data = dev_data;
+
+ cdev_init(&dev_data->main_dev, &rmidev_fops);
+
+ retval = cdev_add(&dev_data->main_dev, dev_no, 1);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to add rmi char device\n",
+ __func__);
+ goto err_char_device;
+ }
+
+ dev_set_name(&rmidev->dev, "rmidev%d", MINOR(dev_no));
+ dev_data->device_class = rmidev_device_class;
+
+ device_ptr = device_create(dev_data->device_class, NULL, dev_no,
+ NULL, CHAR_DEVICE_NAME"%d", MINOR(dev_no));
+ if (IS_ERR(device_ptr)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create rmi char device\n",
+ __func__);
+ retval = -ENODEV;
+ goto err_char_device;
+ }
+
+ retval = gpio_export(bdata->irq_gpio, false);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to export attention gpio\n",
+ __func__);
+ } else {
+ retval = gpio_export_link(&(rmi4_data->input_dev->dev),
+ "attn", bdata->irq_gpio);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s Failed to create gpio symlink\n",
+ __func__);
+ } else {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Exported attention gpio %d\n",
+ __func__, bdata->irq_gpio);
+ }
+ }
+
+ rmidev->sysfs_dir = kobject_create_and_add(SYSFS_FOLDER_NAME,
+ &rmi4_data->input_dev->dev.kobj);
+ if (!rmidev->sysfs_dir) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs directory\n",
+ __func__);
+ retval = -ENODEV;
+ goto err_sysfs_dir;
+ }
+
+ retval = sysfs_create_bin_file(rmidev->sysfs_dir,
+ &attr_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs bin file\n",
+ __func__);
+ goto err_sysfs_bin;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(rmidev->sysfs_dir,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ retval = -ENODEV;
+ goto err_sysfs_attrs;
+ }
+ }
+
+ return 0;
+
+err_sysfs_attrs:
+ for (attr_count--; attr_count >= 0; attr_count--)
+ sysfs_remove_file(rmidev->sysfs_dir, &attrs[attr_count].attr);
+
+ sysfs_remove_bin_file(rmidev->sysfs_dir, &attr_data);
+
+err_sysfs_bin:
+ kobject_put(rmidev->sysfs_dir);
+
+err_sysfs_dir:
+ sysfs_remove_link(&(rmi4_data->input_dev->dev.kobj), "attn");
+ gpio_unexport(bdata->irq_gpio);
+
+err_char_device:
+ rmidev_device_cleanup(dev_data);
+ kfree(dev_data);
+
+err_dev_data:
+ unregister_chrdev_region(dev_no, 1);
+
+err_device_region:
+ if (rmidev_device_class != NULL) {
+ class_destroy(rmidev_device_class);
+ rmidev_device_class = NULL;
+ }
+
+err_device_class:
+ kfree(rmidev);
+ rmidev = NULL;
+
+err_rmidev:
+ return retval;
+}
+
+static void rmidev_remove_device(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char attr_count;
+ struct rmidev_data *dev_data;
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ if (!rmidev)
+ goto exit;
+
+ rmidev_major_num = RMIDEV_MAJOR_NUM;
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
+ sysfs_remove_file(rmidev->sysfs_dir, &attrs[attr_count].attr);
+
+ sysfs_remove_bin_file(rmidev->sysfs_dir, &attr_data);
+
+ kobject_put(rmidev->sysfs_dir);
+
+ sysfs_remove_link(&(rmi4_data->input_dev->dev.kobj), "attn");
+ gpio_unexport(bdata->irq_gpio);
+
+ dev_data = rmidev->data;
+ if (dev_data) {
+ rmidev_device_cleanup(dev_data);
+ kfree(dev_data);
+ }
+
+ unregister_chrdev_region(rmidev->dev_no, 1);
+
+ if (rmidev_device_class != NULL) {
+ class_destroy(rmidev_device_class);
+ rmidev_device_class = NULL;
+ }
+
+ kfree(rmidev->tmpbuf);
+
+ kfree(rmidev);
+ rmidev = NULL;
+
+exit:
+ complete(&rmidev_remove_complete);
+
+ return;
+}
+
+static struct synaptics_rmi4_exp_fn rmidev_module = {
+ .fn_type = RMI_DEV,
+ .init = rmidev_init_device,
+ .remove = rmidev_remove_device,
+ .reset = NULL,
+ .reinit = NULL,
+ .early_suspend = NULL,
+ .suspend = NULL,
+ .resume = NULL,
+ .late_resume = NULL,
+ .attn = rmidev_attn,
+};
+
+static int __init rmidev_module_init(void)
+{
+ synaptics_rmi4_new_function(&rmidev_module, true);
+
+ return 0;
+}
+
+static void __exit rmidev_module_exit(void)
+{
+ synaptics_rmi4_new_function(&rmidev_module, false);
+
+ wait_for_completion(&rmidev_remove_complete);
+
+ return;
+}
+
+module_init(rmidev_module_init);
+module_exit(rmidev_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX RMI Dev Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_hid_i2c.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_hid_i2c.c
new file mode 100644
index 0000000..244e97e
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_rmi_hid_i2c.c
@@ -0,0 +1,1006 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/gpio.h>
+#include <linux/types.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define SYN_I2C_RETRY_TIMES 10
+
+#define REPORT_ID_GET_BLOB 0x07
+#define REPORT_ID_WRITE 0x09
+#define REPORT_ID_READ_ADDRESS 0x0a
+#define REPORT_ID_READ_DATA 0x0b
+#define REPORT_ID_SET_RMI_MODE 0x0f
+
+#define PREFIX_USAGE_PAGE_1BYTE 0x05
+#define PREFIX_USAGE_PAGE_2BYTES 0x06
+#define PREFIX_USAGE 0x09
+#define PREFIX_REPORT_ID 0x85
+#define PREFIX_REPORT_COUNT_1BYTE 0x95
+#define PREFIX_REPORT_COUNT_2BYTES 0x96
+
+#define USAGE_GET_BLOB 0xc5
+#define USAGE_WRITE 0x02
+#define USAGE_READ_ADDRESS 0x03
+#define USAGE_READ_DATA 0x04
+#define USAGE_SET_MODE 0x06
+
+#define FEATURE_REPORT_TYPE 0x03
+
+#define VENDOR_DEFINED_PAGE 0xff00
+
+#define BLOB_REPORT_SIZE 256
+
+#define RESET_COMMAND 0x01
+#define GET_REPORT_COMMAND 0x02
+#define SET_REPORT_COMMAND 0x03
+#define SET_POWER_COMMAND 0x08
+
+#define FINGER_MODE 0x00
+#define RMI_MODE 0x02
+
+struct hid_report_info {
+ unsigned char get_blob_id;
+ unsigned char write_id;
+ unsigned char read_addr_id;
+ unsigned char read_data_id;
+ unsigned char set_mode_id;
+ unsigned int blob_size;
+};
+
+static struct hid_report_info hid_report;
+
+struct hid_device_descriptor {
+ unsigned short device_descriptor_length;
+ unsigned short format_version;
+ unsigned short report_descriptor_length;
+ unsigned short report_descriptor_index;
+ unsigned short input_register_index;
+ unsigned short input_report_max_length;
+ unsigned short output_register_index;
+ unsigned short output_report_max_length;
+ unsigned short command_register_index;
+ unsigned short data_register_index;
+ unsigned short vendor_id;
+ unsigned short product_id;
+ unsigned short version_id;
+ unsigned int reserved;
+};
+
+static struct hid_device_descriptor hid_dd;
+
+struct i2c_rw_buffer {
+ unsigned char *read;
+ unsigned char *write;
+ unsigned int read_size;
+ unsigned int write_size;
+};
+
+static struct i2c_rw_buffer buffer;
+
+#ifdef CONFIG_OF
+static int parse_dt(struct device *dev, struct synaptics_dsx_board_data *bdata)
+{
+ int retval;
+ u32 value;
+ const char *name;
+ struct property *prop;
+ struct device_node *np = dev->of_node;
+
+ bdata->irq_gpio = of_get_named_gpio_flags(np,
+ "synaptics,irq-gpio", 0,
+ (enum of_gpio_flags *)&bdata->irq_flags);
+
+ retval = of_property_read_u32(np, "synaptics,irq-on-state",
+ &value);
+ if (retval < 0)
+ bdata->irq_on_state = 0;
+ else
+ bdata->irq_on_state = value;
+
+ retval = of_property_read_string(np, "synaptics,pwr-reg-name", &name);
+ if (retval < 0)
+ bdata->pwr_reg_name = NULL;
+ else
+ bdata->pwr_reg_name = name;
+
+ retval = of_property_read_string(np, "synaptics,bus-reg-name", &name);
+ if (retval < 0)
+ bdata->bus_reg_name = NULL;
+ else
+ bdata->bus_reg_name = name;
+
+ prop = of_find_property(np, "synaptics,power-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->power_gpio = of_get_named_gpio_flags(np,
+ "synaptics,power-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,power-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_on_state = value;
+ }
+ } else {
+ bdata->power_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,power-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,power-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_delay_ms = value;
+ }
+ } else {
+ bdata->power_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->reset_gpio = of_get_named_gpio_flags(np,
+ "synaptics,reset-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,reset-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_on_state = value;
+ }
+ retval = of_property_read_u32(np, "synaptics,reset-active-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-active-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_active_ms = value;
+ }
+ } else {
+ bdata->reset_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,reset-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_delay_ms = value;
+ }
+ } else {
+ bdata->reset_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,dev-dscrptr-addr", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,dev-dscrptr-addr",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,dev-dscrptr-addr property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->device_descriptor_addr = (unsigned short)value;
+ }
+ } else {
+ bdata->device_descriptor_addr = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,max-y-for-2d", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,max-y-for-2d",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,max-y-for-2d property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->max_y_for_2d = value;
+ }
+ } else {
+ bdata->max_y_for_2d = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,swap-axes", NULL);
+ bdata->swap_axes = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,x-flip", NULL);
+ bdata->x_flip = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,y-flip", NULL);
+ bdata->y_flip = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,ub-i2c-addr", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,ub-i2c-addr",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,ub-i2c-addr property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->ub_i2c_addr = (unsigned short)value;
+ }
+ } else {
+ bdata->ub_i2c_addr = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,cap-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->cap_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->cap_button_map->map)
+ return -ENOMEM;
+ bdata->cap_button_map->nbuttons = prop->length / sizeof(u32);
+ retval = of_property_read_u32_array(np,
+ "synaptics,cap-button-codes",
+ bdata->cap_button_map->map,
+ bdata->cap_button_map->nbuttons);
+ if (retval < 0) {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+ } else {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+
+ prop = of_find_property(np, "synaptics,vir-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->vir_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->vir_button_map->map)
+ return -ENOMEM;
+ bdata->vir_button_map->nbuttons = prop->length / sizeof(u32);
+ bdata->vir_button_map->nbuttons /= 5;
+ retval = of_property_read_u32_array(np,
+ "synaptics,vir-button-codes",
+ bdata->vir_button_map->map,
+ bdata->vir_button_map->nbuttons * 5);
+ if (retval < 0) {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+ } else {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+
+ return 0;
+}
+#endif
+
+static int do_i2c_transfer(struct i2c_client *client, struct i2c_msg *msg)
+{
+ unsigned char retry;
+
+ for (retry = 0; retry < SYN_I2C_RETRY_TIMES; retry++) {
+ if (i2c_transfer(client->adapter, msg, 1) == 1)
+ break;
+ dev_err(&client->dev,
+ "%s: I2C retry %d\n",
+ __func__, retry + 1);
+ msleep(20);
+ }
+
+ if (retry == SYN_I2C_RETRY_TIMES) {
+ dev_err(&client->dev,
+ "%s: I2C transfer over retry limit\n",
+ __func__);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int check_buffer(unsigned char **buffer, unsigned int *buffer_size,
+ unsigned int length)
+{
+ if (*buffer_size < length) {
+ if (*buffer_size)
+ kfree(*buffer);
+ *buffer = kzalloc(length, GFP_KERNEL);
+ if (!(*buffer))
+ return -ENOMEM;
+ *buffer_size = length;
+ }
+
+ return 0;
+}
+
+static int generic_read(struct i2c_client *client, unsigned short length)
+{
+ int retval;
+ struct i2c_msg msg[] = {
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .len = length,
+ }
+ };
+
+ check_buffer(&buffer.read, &buffer.read_size, length);
+ msg[0].buf = buffer.read;
+
+ retval = do_i2c_transfer(client, msg);
+
+ return retval;
+}
+
+static int generic_write(struct i2c_client *client, unsigned short length)
+{
+ int retval;
+ struct i2c_msg msg[] = {
+ {
+ .addr = client->addr,
+ .flags = 0,
+ .len = length,
+ .buf = buffer.write,
+ }
+ };
+
+ retval = do_i2c_transfer(client, msg);
+
+ return retval;
+}
+
+static void traverse_report_descriptor(unsigned int *index)
+{
+ unsigned char size;
+ unsigned char *buf = buffer.read;
+
+ size = buf[*index] & MASK_2BIT;
+ switch (size) {
+ case 0: /* 0 bytes */
+ *index += 1;
+ break;
+ case 1: /* 1 byte */
+ *index += 2;
+ break;
+ case 2: /* 2 bytes */
+ *index += 3;
+ break;
+ case 3: /* 4 bytes */
+ *index += 5;
+ break;
+ default:
+ break;
+ }
+
+ return;
+}
+
+static void find_blob_size(unsigned int index)
+{
+ unsigned int ii = index;
+ unsigned char *buf = buffer.read;
+
+ while (ii < hid_dd.report_descriptor_length) {
+ if (buf[ii] == PREFIX_REPORT_COUNT_1BYTE) {
+ hid_report.blob_size = buf[ii + 1];
+ return;
+ } else if (buf[ii] == PREFIX_REPORT_COUNT_2BYTES) {
+ hid_report.blob_size = buf[ii + 1] | (buf[ii + 2] << 8);
+ return;
+ }
+ traverse_report_descriptor(&ii);
+ }
+
+ return;
+}
+
+static void find_reports(unsigned int index)
+{
+ unsigned int ii = index;
+ unsigned char *buf = buffer.read;
+ static unsigned int report_id_index;
+ static unsigned char report_id;
+ static unsigned short usage_page;
+
+ if (buf[ii] == PREFIX_REPORT_ID) {
+ report_id = buf[ii + 1];
+ report_id_index = ii;
+ return;
+ }
+
+ if (buf[ii] == PREFIX_USAGE_PAGE_1BYTE) {
+ usage_page = buf[ii + 1];
+ return;
+ } else if (buf[ii] == PREFIX_USAGE_PAGE_2BYTES) {
+ usage_page = buf[ii + 1] | (buf[ii + 2] << 8);
+ return;
+ }
+
+ if ((usage_page == VENDOR_DEFINED_PAGE) && (buf[ii] == PREFIX_USAGE)) {
+ switch (buf[ii + 1]) {
+ case USAGE_GET_BLOB:
+ hid_report.get_blob_id = report_id;
+ find_blob_size(report_id_index);
+ break;
+ case USAGE_WRITE:
+ hid_report.write_id = report_id;
+ break;
+ case USAGE_READ_ADDRESS:
+ hid_report.read_addr_id = report_id;
+ break;
+ case USAGE_READ_DATA:
+ hid_report.read_data_id = report_id;
+ break;
+ case USAGE_SET_MODE:
+ hid_report.set_mode_id = report_id;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return;
+}
+
+static int parse_report_descriptor(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned int ii = 0;
+ unsigned char *buf;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+
+ buffer.write[0] = hid_dd.report_descriptor_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.report_descriptor_index >> 8;
+ retval = generic_write(i2c, 2);
+ if (retval < 0)
+ return retval;
+ retval = generic_read(i2c, hid_dd.report_descriptor_length);
+ if (retval < 0)
+ return retval;
+
+ buf = buffer.read;
+
+ hid_report.get_blob_id = REPORT_ID_GET_BLOB;
+ hid_report.write_id = REPORT_ID_WRITE;
+ hid_report.read_addr_id = REPORT_ID_READ_ADDRESS;
+ hid_report.read_data_id = REPORT_ID_READ_DATA;
+ hid_report.set_mode_id = REPORT_ID_SET_RMI_MODE;
+ hid_report.blob_size = BLOB_REPORT_SIZE;
+
+ while (ii < hid_dd.report_descriptor_length) {
+ find_reports(ii);
+ traverse_report_descriptor(&ii);
+ }
+
+ return 0;
+}
+
+static int switch_to_rmi(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ check_buffer(&buffer.write, &buffer.write_size, 11);
+
+ /* set rmi mode */
+ buffer.write[0] = hid_dd.command_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.command_register_index >> 8;
+ buffer.write[2] = (FEATURE_REPORT_TYPE << 4) | hid_report.set_mode_id;
+ buffer.write[3] = SET_REPORT_COMMAND;
+ buffer.write[4] = hid_report.set_mode_id;
+ buffer.write[5] = hid_dd.data_register_index & MASK_8BIT;
+ buffer.write[6] = hid_dd.data_register_index >> 8;
+ buffer.write[7] = 0x04;
+ buffer.write[8] = 0x00;
+ buffer.write[9] = hid_report.set_mode_id;
+ buffer.write[10] = RMI_MODE;
+
+ retval = generic_write(i2c, 11);
+
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static int check_report_mode(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned short report_size;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ check_buffer(&buffer.write, &buffer.write_size, 7);
+
+ buffer.write[0] = hid_dd.command_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.command_register_index >> 8;
+ buffer.write[2] = (FEATURE_REPORT_TYPE << 4) | hid_report.set_mode_id;
+ buffer.write[3] = GET_REPORT_COMMAND;
+ buffer.write[4] = hid_report.set_mode_id;
+ buffer.write[5] = hid_dd.data_register_index & MASK_8BIT;
+ buffer.write[6] = hid_dd.data_register_index >> 8;
+
+ retval = generic_write(i2c, 7);
+ if (retval < 0)
+ goto exit;
+
+ retval = generic_read(i2c, 2);
+ if (retval < 0)
+ goto exit;
+
+ report_size = (buffer.read[1] << 8) | buffer.read[0];
+
+ retval = generic_write(i2c, 7);
+ if (retval < 0)
+ goto exit;
+
+ retval = generic_read(i2c, report_size);
+ if (retval < 0)
+ goto exit;
+
+ retval = buffer.read[3];
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Report mode = %d\n",
+ __func__, retval);
+
+exit:
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static int hid_i2c_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ check_buffer(&buffer.write, &buffer.write_size, 6);
+
+ /* read device descriptor */
+ buffer.write[0] = bdata->device_descriptor_addr & MASK_8BIT;
+ buffer.write[1] = bdata->device_descriptor_addr >> 8;
+ retval = generic_write(i2c, 2);
+ if (retval < 0)
+ goto exit;
+ retval = generic_read(i2c, sizeof(hid_dd));
+ if (retval < 0)
+ goto exit;
+ retval = secure_memcpy((unsigned char *)&hid_dd,
+ sizeof(struct hid_device_descriptor),
+ buffer.read,
+ buffer.read_size,
+ sizeof(hid_dd));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy device descriptor data\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = parse_report_descriptor(rmi4_data);
+ if (retval < 0)
+ goto exit;
+
+ /* set power */
+ buffer.write[0] = hid_dd.command_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.command_register_index >> 8;
+ buffer.write[2] = 0x00;
+ buffer.write[3] = SET_POWER_COMMAND;
+ retval = generic_write(i2c, 4);
+ if (retval < 0)
+ goto exit;
+
+ /* reset */
+ buffer.write[0] = hid_dd.command_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.command_register_index >> 8;
+ buffer.write[2] = 0x00;
+ buffer.write[3] = RESET_COMMAND;
+ retval = generic_write(i2c, 4);
+ if (retval < 0)
+ goto exit;
+
+ while (gpio_get_value(bdata->irq_gpio))
+ msleep(20);
+
+ retval = generic_read(i2c, hid_dd.input_report_max_length);
+ if (retval < 0)
+ goto exit;
+
+ /* get blob */
+ buffer.write[0] = hid_dd.command_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.command_register_index >> 8;
+ buffer.write[2] = (FEATURE_REPORT_TYPE << 4) | hid_report.get_blob_id;
+ buffer.write[3] = 0x02;
+ buffer.write[4] = hid_dd.data_register_index & MASK_8BIT;
+ buffer.write[5] = hid_dd.data_register_index >> 8;
+
+ retval = generic_write(i2c, 6);
+ if (retval < 0)
+ goto exit;
+
+ msleep(20);
+
+ retval = generic_read(i2c, hid_report.blob_size + 3);
+ if (retval < 0)
+ goto exit;
+
+exit:
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to initialize HID/I2C interface\n",
+ __func__);
+ return retval;
+ }
+
+ retval = switch_to_rmi(rmi4_data);
+
+ return retval;
+}
+
+static int synaptics_rmi4_i2c_read(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval;
+ unsigned char retry;
+ unsigned char recover = 1;
+ unsigned short report_length;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ struct i2c_msg msg[] = {
+ {
+ .addr = i2c->addr,
+ .flags = 0,
+ .len = hid_dd.output_report_max_length + 2,
+ },
+ {
+ .addr = i2c->addr,
+ .flags = I2C_M_RD,
+ .len = (unsigned short)(length + 4),
+ },
+ };
+
+recover:
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ check_buffer(&buffer.write, &buffer.write_size,
+ hid_dd.output_report_max_length + 2);
+ msg[0].buf = buffer.write;
+ buffer.write[0] = hid_dd.output_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.output_register_index >> 8;
+ buffer.write[2] = hid_dd.output_report_max_length & MASK_8BIT;
+ buffer.write[3] = hid_dd.output_report_max_length >> 8;
+ buffer.write[4] = hid_report.read_addr_id;
+ buffer.write[5] = 0x00;
+ buffer.write[6] = addr & MASK_8BIT;
+ buffer.write[7] = addr >> 8;
+ buffer.write[8] = (unsigned char)length;
+ buffer.write[9] = (unsigned char)(length >> 8);
+
+ check_buffer(&buffer.read, &buffer.read_size, length + 4);
+ msg[1].buf = buffer.read;
+
+ retval = do_i2c_transfer(i2c, &msg[0]);
+ if (retval != 0)
+ goto exit;
+
+ retry = 0;
+ do {
+ retval = do_i2c_transfer(i2c, &msg[1]);
+ if (retval == 0)
+ retval = length;
+ else
+ goto exit;
+
+ report_length = (buffer.read[1] << 8) | buffer.read[0];
+ if (report_length == hid_dd.input_report_max_length) {
+ retval = secure_memcpy(&data[0], length,
+ &buffer.read[4], buffer.read_size - 4,
+ length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy data\n",
+ __func__);
+ } else {
+ retval = length;
+ }
+ goto exit;
+ }
+
+ msleep(20);
+ retry++;
+ } while (retry < SYN_I2C_RETRY_TIMES);
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to receive read report\n",
+ __func__);
+ retval = -EIO;
+
+exit:
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ if ((retval != length) && (recover == 1)) {
+ recover = 0;
+ if (check_report_mode(rmi4_data) != RMI_MODE) {
+ retval = hid_i2c_init(rmi4_data);
+ if (retval == 0)
+ goto recover;
+ }
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_i2c_write(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval;
+ unsigned char recover = 1;
+ unsigned int msg_length;
+ struct i2c_client *i2c = to_i2c_client(rmi4_data->pdev->dev.parent);
+ struct i2c_msg msg[] = {
+ {
+ .addr = i2c->addr,
+ .flags = 0,
+ }
+ };
+
+ if ((length + 10) < (hid_dd.output_report_max_length + 2))
+ msg_length = hid_dd.output_report_max_length + 2;
+ else
+ msg_length = length + 10;
+
+recover:
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ check_buffer(&buffer.write, &buffer.write_size, msg_length);
+ msg[0].len = (unsigned short)msg_length;
+ msg[0].buf = buffer.write;
+ buffer.write[0] = hid_dd.output_register_index & MASK_8BIT;
+ buffer.write[1] = hid_dd.output_register_index >> 8;
+ buffer.write[2] = hid_dd.output_report_max_length & MASK_8BIT;
+ buffer.write[3] = hid_dd.output_report_max_length >> 8;
+ buffer.write[4] = hid_report.write_id;
+ buffer.write[5] = 0x00;
+ buffer.write[6] = addr & MASK_8BIT;
+ buffer.write[7] = addr >> 8;
+ buffer.write[8] = (unsigned char)length;
+ buffer.write[9] = (unsigned char)(length >> 8);
+ retval = secure_memcpy(&buffer.write[10], buffer.write_size - 10,
+ &data[0], length, length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy data\n",
+ __func__);
+ } else {
+ retval = do_i2c_transfer(i2c, msg);
+ if (retval == 0)
+ retval = length;
+ }
+
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ if ((retval != length) && (recover == 1)) {
+ recover = 0;
+ if (check_report_mode(rmi4_data) != RMI_MODE) {
+ retval = hid_i2c_init(rmi4_data);
+ if (retval == 0)
+ goto recover;
+ }
+ }
+
+ return retval;
+}
+
+static struct synaptics_dsx_bus_access bus_access = {
+ .type = BUS_I2C,
+ .read = synaptics_rmi4_i2c_read,
+ .write = synaptics_rmi4_i2c_write,
+};
+
+static struct synaptics_dsx_hw_interface hw_if;
+
+static struct platform_device *synaptics_dsx_i2c_device;
+
+static void synaptics_rmi4_i2c_dev_release(struct device *dev)
+{
+ kfree(synaptics_dsx_i2c_device);
+
+ return;
+}
+
+static int synaptics_rmi4_i2c_probe(struct i2c_client *client,
+ const struct i2c_device_id *dev_id)
+{
+ int retval;
+
+ if (!i2c_check_functionality(client->adapter,
+ I2C_FUNC_SMBUS_BYTE_DATA)) {
+ dev_err(&client->dev,
+ "%s: SMBus byte data commands not supported by host\n",
+ __func__);
+ return -EIO;
+ }
+
+ synaptics_dsx_i2c_device = kzalloc(
+ sizeof(struct platform_device),
+ GFP_KERNEL);
+ if (!synaptics_dsx_i2c_device) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for synaptics_dsx_i2c_device\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+#ifdef CONFIG_OF
+ if (client->dev.of_node) {
+ hw_if.board_data = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_board_data),
+ GFP_KERNEL);
+ if (!hw_if.board_data) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for board data\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->cap_button_map = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->cap_button_map) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for 0D button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->vir_button_map = devm_kzalloc(&client->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->vir_button_map) {
+ dev_err(&client->dev,
+ "%s: Failed to allocate memory for virtual button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ parse_dt(&client->dev, hw_if.board_data);
+ }
+#else
+ hw_if.board_data = client->dev.platform_data;
+#endif
+
+ hw_if.bus_access = &bus_access;
+ hw_if.bl_hw_init = switch_to_rmi;
+ hw_if.ui_hw_init = hid_i2c_init;
+
+ synaptics_dsx_i2c_device->name = PLATFORM_DRIVER_NAME;
+ synaptics_dsx_i2c_device->id = 0;
+ synaptics_dsx_i2c_device->num_resources = 0;
+ synaptics_dsx_i2c_device->dev.parent = &client->dev;
+ synaptics_dsx_i2c_device->dev.platform_data = &hw_if;
+ synaptics_dsx_i2c_device->dev.release = synaptics_rmi4_i2c_dev_release;
+
+ retval = platform_device_register(synaptics_dsx_i2c_device);
+ if (retval) {
+ dev_err(&client->dev,
+ "%s: Failed to register platform device\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_i2c_remove(struct i2c_client *client)
+{
+ if (buffer.read_size)
+ kfree(buffer.read);
+
+ if (buffer.write_size)
+ kfree(buffer.write);
+
+ platform_device_unregister(synaptics_dsx_i2c_device);
+
+ return 0;
+}
+
+static const struct i2c_device_id synaptics_rmi4_id_table[] = {
+ {I2C_DRIVER_NAME, 0},
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, synaptics_rmi4_id_table);
+
+#ifdef CONFIG_OF
+static struct of_device_id synaptics_rmi4_of_match_table[] = {
+ {
+ .compatible = "synaptics,dsx-rmi-hid-i2c",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, synaptics_rmi4_of_match_table);
+#else
+#define synaptics_rmi4_of_match_table NULL
+#endif
+
+static struct i2c_driver synaptics_rmi4_i2c_driver = {
+ .driver = {
+ .name = I2C_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = synaptics_rmi4_of_match_table,
+ },
+ .probe = synaptics_rmi4_i2c_probe,
+ .remove = synaptics_rmi4_i2c_remove,
+ .id_table = synaptics_rmi4_id_table,
+};
+
+int synaptics_rmi4_bus_init(void)
+{
+ return i2c_add_driver(&synaptics_rmi4_i2c_driver);
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_init);
+
+void synaptics_rmi4_bus_exit(void)
+{
+ i2c_del_driver(&synaptics_rmi4_i2c_driver);
+
+ return;
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX I2C Bus Support Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_spi.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_spi.c
new file mode 100644
index 0000000..e2dafbb
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_spi.c
@@ -0,0 +1,712 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/spi/spi.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/types.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define SPI_READ 0x80
+#define SPI_WRITE 0x00
+
+static unsigned char *buf;
+
+static struct spi_transfer *xfer;
+
+#ifdef CONFIG_OF
+static int parse_dt(struct device *dev, struct synaptics_dsx_board_data *bdata)
+{
+ int retval;
+ u32 value;
+ const char *name;
+ struct property *prop;
+ struct device_node *np = dev->of_node;
+
+ bdata->irq_gpio = of_get_named_gpio_flags(np,
+ "synaptics,irq-gpio", 0,
+ (enum of_gpio_flags *)&bdata->irq_flags);
+
+ retval = of_property_read_u32(np, "synaptics,irq-on-state",
+ &value);
+ if (retval < 0)
+ bdata->irq_on_state = 0;
+ else
+ bdata->irq_on_state = value;
+
+ retval = of_property_read_string(np, "synaptics,pwr-reg-name", &name);
+ if (retval < 0)
+ bdata->pwr_reg_name = NULL;
+ else
+ bdata->pwr_reg_name = name;
+
+ retval = of_property_read_string(np, "synaptics,bus-reg-name", &name);
+ if (retval < 0)
+ bdata->bus_reg_name = NULL;
+ else
+ bdata->bus_reg_name = name;
+
+ prop = of_find_property(np, "synaptics,power-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->power_gpio = of_get_named_gpio_flags(np,
+ "synaptics,power-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,power-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_on_state = value;
+ }
+ } else {
+ bdata->power_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,power-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,power-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,power-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->power_delay_ms = value;
+ }
+ } else {
+ bdata->power_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-gpio", NULL);
+ if (prop && prop->length) {
+ bdata->reset_gpio = of_get_named_gpio_flags(np,
+ "synaptics,reset-gpio", 0, NULL);
+ retval = of_property_read_u32(np, "synaptics,reset-on-state",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-on-state property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_on_state = value;
+ }
+ retval = of_property_read_u32(np, "synaptics,reset-active-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-active-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_active_ms = value;
+ }
+ } else {
+ bdata->reset_gpio = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,reset-delay-ms", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,reset-delay-ms",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,reset-delay-ms property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->reset_delay_ms = value;
+ }
+ } else {
+ bdata->reset_delay_ms = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,byte-delay-us", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,byte-delay-us",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,byte-delay-us property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->byte_delay_us = value;
+ }
+ } else {
+ bdata->byte_delay_us = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,block-delay-us", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,block-delay-us",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,block-delay-us property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->block_delay_us = value;
+ }
+ } else {
+ bdata->block_delay_us = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,address-delay-us", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,address-delay-us",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,address-delay-us property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->addr_delay_us = value;
+ }
+ } else {
+ bdata->addr_delay_us = 0;
+ }
+
+ prop = of_find_property(np, "synaptics,max-y-for-2d", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,max-y-for-2d",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,max-y-for-2d property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->max_y_for_2d = value;
+ }
+ } else {
+ bdata->max_y_for_2d = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,swap-axes", NULL);
+ bdata->swap_axes = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,x-flip", NULL);
+ bdata->x_flip = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,y-flip", NULL);
+ bdata->y_flip = prop > 0 ? true : false;
+
+ prop = of_find_property(np, "synaptics,ub-i2c-addr", NULL);
+ if (prop && prop->length) {
+ retval = of_property_read_u32(np, "synaptics,ub-i2c-addr",
+ &value);
+ if (retval < 0) {
+ dev_err(dev, "%s: Unable to read synaptics,ub-i2c-addr property\n",
+ __func__);
+ return retval;
+ } else {
+ bdata->ub_i2c_addr = (unsigned short)value;
+ }
+ } else {
+ bdata->ub_i2c_addr = -1;
+ }
+
+ prop = of_find_property(np, "synaptics,cap-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->cap_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->cap_button_map->map)
+ return -ENOMEM;
+ bdata->cap_button_map->nbuttons = prop->length / sizeof(u32);
+ retval = of_property_read_u32_array(np,
+ "synaptics,cap-button-codes",
+ bdata->cap_button_map->map,
+ bdata->cap_button_map->nbuttons);
+ if (retval < 0) {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+ } else {
+ bdata->cap_button_map->nbuttons = 0;
+ bdata->cap_button_map->map = NULL;
+ }
+
+ prop = of_find_property(np, "synaptics,vir-button-codes", NULL);
+ if (prop && prop->length) {
+ bdata->vir_button_map->map = devm_kzalloc(dev,
+ prop->length,
+ GFP_KERNEL);
+ if (!bdata->vir_button_map->map)
+ return -ENOMEM;
+ bdata->vir_button_map->nbuttons = prop->length / sizeof(u32);
+ bdata->vir_button_map->nbuttons /= 5;
+ retval = of_property_read_u32_array(np,
+ "synaptics,vir-button-codes",
+ bdata->vir_button_map->map,
+ bdata->vir_button_map->nbuttons * 5);
+ if (retval < 0) {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+ } else {
+ bdata->vir_button_map->nbuttons = 0;
+ bdata->vir_button_map->map = NULL;
+ }
+
+ return 0;
+}
+#endif
+
+static int synaptics_rmi4_spi_alloc_buf(struct synaptics_rmi4_data *rmi4_data,
+ unsigned int size, unsigned int count)
+{
+ static unsigned int buf_size;
+ static unsigned int xfer_count;
+
+ if (size > buf_size) {
+ if (buf_size)
+ kfree(buf);
+ buf = kmalloc(size, GFP_KERNEL);
+ if (!buf) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for buf\n",
+ __func__);
+ buf_size = 0;
+ return -ENOMEM;
+ }
+ buf_size = size;
+ }
+
+ if (count > xfer_count) {
+ if (xfer_count)
+ kfree(xfer);
+ xfer = kcalloc(count, sizeof(struct spi_transfer), GFP_KERNEL);
+ if (!xfer) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for xfer\n",
+ __func__);
+ xfer_count = 0;
+ return -ENOMEM;
+ }
+ xfer_count = count;
+ } else {
+ memset(xfer, 0, count * sizeof(struct spi_transfer));
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_spi_set_page(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr)
+{
+ int retval;
+ unsigned int index;
+ unsigned int byte_count = PAGE_SELECT_LEN + 1;
+ unsigned char page;
+ struct spi_message msg;
+ struct spi_device *spi = to_spi_device(rmi4_data->pdev->dev.parent);
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ page = ((addr >> 8) & MASK_8BIT);
+ if ((page >> 7) == (rmi4_data->current_page >> 7))
+ return PAGE_SELECT_LEN;
+
+ spi_message_init(&msg);
+
+ retval = synaptics_rmi4_spi_alloc_buf(rmi4_data, byte_count,
+ byte_count);
+ if (retval < 0)
+ return retval;
+
+ buf[0] = SPI_WRITE;
+ buf[1] = MASK_8BIT;
+ buf[2] = page;
+
+ if (bdata->byte_delay_us == 0) {
+ xfer[0].len = byte_count;
+ xfer[0].tx_buf = &buf[0];
+ if (bdata->block_delay_us)
+ xfer[0].delay_usecs = bdata->block_delay_us;
+ spi_message_add_tail(&xfer[0], &msg);
+ } else {
+ for (index = 0; index < byte_count; index++) {
+ xfer[index].len = 1;
+ xfer[index].tx_buf = &buf[index];
+ if (index == 1)
+ xfer[index].delay_usecs = bdata->addr_delay_us;
+ else
+ xfer[index].delay_usecs = bdata->byte_delay_us;
+ spi_message_add_tail(&xfer[index], &msg);
+ }
+ if (bdata->block_delay_us)
+ xfer[index - 1].delay_usecs = bdata->block_delay_us;
+ }
+
+ retval = spi_sync(spi, &msg);
+ if (retval == 0) {
+ rmi4_data->current_page = page;
+ retval = PAGE_SELECT_LEN;
+ } else {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to complete SPI transfer, error = %d\n",
+ __func__, retval);
+ }
+
+ return retval;
+}
+
+static int synaptics_rmi4_spi_read(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval;
+ unsigned int index;
+ unsigned int byte_count = length + ADDRESS_LEN;
+ unsigned char txbuf[ADDRESS_LEN];
+ struct spi_message msg;
+ struct spi_device *spi = to_spi_device(rmi4_data->pdev->dev.parent);
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ spi_message_init(&msg);
+
+ txbuf[0] = (addr >> 8) | SPI_READ;
+ txbuf[1] = addr & MASK_8BIT;
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ retval = synaptics_rmi4_spi_set_page(rmi4_data, addr);
+ if (retval != PAGE_SELECT_LEN) {
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+ return -EIO;
+ }
+
+ if (bdata->byte_delay_us == 0) {
+ retval = synaptics_rmi4_spi_alloc_buf(rmi4_data, length,
+ 2);
+ } else {
+ retval = synaptics_rmi4_spi_alloc_buf(rmi4_data, length,
+ byte_count);
+ }
+ if (retval < 0) {
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+ return retval;
+ }
+
+ if (bdata->byte_delay_us == 0) {
+ xfer[0].len = ADDRESS_LEN;
+ xfer[0].tx_buf = &txbuf[0];
+ spi_message_add_tail(&xfer[0], &msg);
+ xfer[1].len = length;
+ xfer[1].rx_buf = &buf[0];
+ if (bdata->block_delay_us)
+ xfer[1].delay_usecs = bdata->block_delay_us;
+ spi_message_add_tail(&xfer[1], &msg);
+ } else {
+ for (index = 0; index < byte_count; index++) {
+ xfer[index].len = 1;
+ if (index < ADDRESS_LEN)
+ xfer[index].tx_buf = &txbuf[index];
+ else
+ xfer[index].rx_buf = &buf[index - ADDRESS_LEN];
+ if (index == 1)
+ xfer[index].delay_usecs = bdata->addr_delay_us;
+ else
+ xfer[index].delay_usecs = bdata->byte_delay_us;
+ spi_message_add_tail(&xfer[index], &msg);
+ }
+ if (bdata->block_delay_us)
+ xfer[index - 1].delay_usecs = bdata->block_delay_us;
+ }
+
+ retval = spi_sync(spi, &msg);
+ if (retval == 0) {
+ retval = secure_memcpy(data, length, buf, length, length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy data\n",
+ __func__);
+ } else {
+ retval = length;
+ }
+ } else {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to complete SPI transfer, error = %d\n",
+ __func__, retval);
+ }
+
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static int synaptics_rmi4_spi_write(struct synaptics_rmi4_data *rmi4_data,
+ unsigned short addr, unsigned char *data, unsigned int length)
+{
+ int retval;
+ unsigned int index;
+ unsigned int byte_count = length + ADDRESS_LEN;
+ struct spi_message msg;
+ struct spi_device *spi = to_spi_device(rmi4_data->pdev->dev.parent);
+ const struct synaptics_dsx_board_data *bdata =
+ rmi4_data->hw_if->board_data;
+
+ spi_message_init(&msg);
+
+ mutex_lock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ retval = synaptics_rmi4_spi_set_page(rmi4_data, addr);
+ if (retval != PAGE_SELECT_LEN) {
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+ return -EIO;
+ }
+
+ if (bdata->byte_delay_us == 0) {
+ retval = synaptics_rmi4_spi_alloc_buf(rmi4_data, byte_count,
+ 1);
+ } else {
+ retval = synaptics_rmi4_spi_alloc_buf(rmi4_data, byte_count,
+ byte_count);
+ }
+ if (retval < 0) {
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+ return retval;
+ }
+
+ buf[0] = (addr >> 8) & ~SPI_READ;
+ buf[1] = addr & MASK_8BIT;
+ retval = secure_memcpy(&buf[ADDRESS_LEN],
+ byte_count - ADDRESS_LEN, data, length, length);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy data\n",
+ __func__);
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+ return retval;
+ }
+
+ if (bdata->byte_delay_us == 0) {
+ xfer[0].len = byte_count;
+ xfer[0].tx_buf = &buf[0];
+ if (bdata->block_delay_us)
+ xfer[0].delay_usecs = bdata->block_delay_us;
+ spi_message_add_tail(xfer, &msg);
+ } else {
+ for (index = 0; index < byte_count; index++) {
+ xfer[index].len = 1;
+ xfer[index].tx_buf = &buf[index];
+ if (index == 1)
+ xfer[index].delay_usecs = bdata->addr_delay_us;
+ else
+ xfer[index].delay_usecs = bdata->byte_delay_us;
+ spi_message_add_tail(&xfer[index], &msg);
+ }
+ if (bdata->block_delay_us)
+ xfer[index - 1].delay_usecs = bdata->block_delay_us;
+ }
+
+ retval = spi_sync(spi, &msg);
+ if (retval == 0) {
+ retval = length;
+ } else {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to complete SPI transfer, error = %d\n",
+ __func__, retval);
+ }
+
+ mutex_unlock(&rmi4_data->rmi4_io_ctrl_mutex);
+
+ return retval;
+}
+
+static struct synaptics_dsx_bus_access bus_access = {
+ .type = BUS_SPI,
+ .read = synaptics_rmi4_spi_read,
+ .write = synaptics_rmi4_spi_write,
+};
+
+static struct synaptics_dsx_hw_interface hw_if;
+
+static struct platform_device *synaptics_dsx_spi_device;
+
+static void synaptics_rmi4_spi_dev_release(struct device *dev)
+{
+ kfree(synaptics_dsx_spi_device);
+
+ return;
+}
+
+static int synaptics_rmi4_spi_probe(struct spi_device *spi)
+{
+ int retval;
+
+ if (spi->master->flags & SPI_MASTER_HALF_DUPLEX) {
+ dev_err(&spi->dev,
+ "%s: Full duplex not supported by host\n",
+ __func__);
+ return -EIO;
+ }
+
+ synaptics_dsx_spi_device = kzalloc(
+ sizeof(struct platform_device),
+ GFP_KERNEL);
+ if (!synaptics_dsx_spi_device) {
+ dev_err(&spi->dev,
+ "%s: Failed to allocate memory for synaptics_dsx_spi_device\n",
+ __func__);
+ return -ENOMEM;
+ }
+
+#ifdef CONFIG_OF
+ if (spi->dev.of_node) {
+ hw_if.board_data = devm_kzalloc(&spi->dev,
+ sizeof(struct synaptics_dsx_board_data),
+ GFP_KERNEL);
+ if (!hw_if.board_data) {
+ dev_err(&spi->dev,
+ "%s: Failed to allocate memory for board data\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->cap_button_map = devm_kzalloc(&spi->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->cap_button_map) {
+ dev_err(&spi->dev,
+ "%s: Failed to allocate memory for 0D button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ hw_if.board_data->vir_button_map = devm_kzalloc(&spi->dev,
+ sizeof(struct synaptics_dsx_button_map),
+ GFP_KERNEL);
+ if (!hw_if.board_data->vir_button_map) {
+ dev_err(&spi->dev,
+ "%s: Failed to allocate memory for virtual button map\n",
+ __func__);
+ return -ENOMEM;
+ }
+ parse_dt(&spi->dev, hw_if.board_data);
+ }
+#else
+ hw_if.board_data = spi->dev.platform_data;
+#endif
+
+ hw_if.bus_access = &bus_access;
+
+ spi->bits_per_word = 8;
+ spi->mode = SPI_MODE_3;
+
+ retval = spi_setup(spi);
+ if (retval < 0) {
+ dev_err(&spi->dev,
+ "%s: Failed to perform SPI setup\n",
+ __func__);
+ return retval;
+ }
+
+ synaptics_dsx_spi_device->name = PLATFORM_DRIVER_NAME;
+ synaptics_dsx_spi_device->id = 0;
+ synaptics_dsx_spi_device->num_resources = 0;
+ synaptics_dsx_spi_device->dev.parent = &spi->dev;
+ synaptics_dsx_spi_device->dev.platform_data = &hw_if;
+ synaptics_dsx_spi_device->dev.release = synaptics_rmi4_spi_dev_release;
+
+ retval = platform_device_register(synaptics_dsx_spi_device);
+ if (retval) {
+ dev_err(&spi->dev,
+ "%s: Failed to register platform device\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+static int synaptics_rmi4_spi_remove(struct spi_device *spi)
+{
+ platform_device_unregister(synaptics_dsx_spi_device);
+
+ return 0;
+}
+
+static const struct spi_device_id synaptics_rmi4_id_table[] = {
+ {SPI_DRIVER_NAME, 0},
+ {},
+};
+MODULE_DEVICE_TABLE(spi, synaptics_rmi4_id_table);
+
+#ifdef CONFIG_OF
+static struct of_device_id synaptics_rmi4_of_match_table[] = {
+ {
+ .compatible = "synaptics,dsx-spi",
+ },
+ {},
+};
+MODULE_DEVICE_TABLE(of, synaptics_rmi4_of_match_table);
+#else
+#define synaptics_rmi4_of_match_table NULL
+#endif
+
+static struct spi_driver synaptics_rmi4_spi_driver = {
+ .driver = {
+ .name = SPI_DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = synaptics_rmi4_of_match_table,
+ },
+ .probe = synaptics_rmi4_spi_probe,
+ .remove = synaptics_rmi4_spi_remove,
+ .id_table = synaptics_rmi4_id_table,
+};
+
+
+int synaptics_rmi4_bus_init(void)
+{
+ return spi_register_driver(&synaptics_rmi4_spi_driver);
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_init);
+
+void synaptics_rmi4_bus_exit(void)
+{
+ kfree(buf);
+
+ kfree(xfer);
+
+ spi_unregister_driver(&synaptics_rmi4_spi_driver);
+
+ return;
+}
+EXPORT_SYMBOL(synaptics_rmi4_bus_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX SPI Bus Support Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_test_reporting.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_test_reporting.c
new file mode 100644
index 0000000..606e737
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_test_reporting.c
@@ -0,0 +1,5356 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/ctype.h>
+#include <linux/hrtimer.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define SYSFS_FOLDER_NAME "f54"
+
+#define GET_REPORT_TIMEOUT_S 3
+#define CALIBRATION_TIMEOUT_S 10
+#define COMMAND_TIMEOUT_100MS 20
+
+#define NO_SLEEP_OFF (0 << 2)
+#define NO_SLEEP_ON (1 << 2)
+
+#define STATUS_IDLE 0
+#define STATUS_BUSY 1
+#define STATUS_ERROR 2
+
+#define REPORT_INDEX_OFFSET 1
+#define REPORT_DATA_OFFSET 3
+
+#define SENSOR_RX_MAPPING_OFFSET 1
+#define SENSOR_TX_MAPPING_OFFSET 2
+
+#define COMMAND_GET_REPORT 1
+#define COMMAND_FORCE_CAL 2
+#define COMMAND_FORCE_UPDATE 4
+
+#define CONTROL_NO_AUTO_CAL 1
+
+#define CONTROL_0_SIZE 1
+#define CONTROL_1_SIZE 1
+#define CONTROL_2_SIZE 2
+#define CONTROL_3_SIZE 1
+#define CONTROL_4_6_SIZE 3
+#define CONTROL_7_SIZE 1
+#define CONTROL_8_9_SIZE 3
+#define CONTROL_10_SIZE 1
+#define CONTROL_11_SIZE 2
+#define CONTROL_12_13_SIZE 2
+#define CONTROL_14_SIZE 1
+#define CONTROL_15_SIZE 1
+#define CONTROL_16_SIZE 1
+#define CONTROL_17_SIZE 1
+#define CONTROL_18_SIZE 1
+#define CONTROL_19_SIZE 1
+#define CONTROL_20_SIZE 1
+#define CONTROL_21_SIZE 2
+#define CONTROL_22_26_SIZE 7
+#define CONTROL_27_SIZE 1
+#define CONTROL_28_SIZE 2
+#define CONTROL_29_SIZE 1
+#define CONTROL_30_SIZE 1
+#define CONTROL_31_SIZE 1
+#define CONTROL_32_35_SIZE 8
+#define CONTROL_36_SIZE 1
+#define CONTROL_37_SIZE 1
+#define CONTROL_38_SIZE 1
+#define CONTROL_39_SIZE 1
+#define CONTROL_40_SIZE 1
+#define CONTROL_41_SIZE 1
+#define CONTROL_42_SIZE 2
+#define CONTROL_43_54_SIZE 13
+#define CONTROL_55_56_SIZE 2
+#define CONTROL_57_SIZE 1
+#define CONTROL_58_SIZE 1
+#define CONTROL_59_SIZE 2
+#define CONTROL_60_62_SIZE 3
+#define CONTROL_63_SIZE 1
+#define CONTROL_64_67_SIZE 4
+#define CONTROL_68_73_SIZE 8
+#define CONTROL_70_73_SIZE 6
+#define CONTROL_74_SIZE 2
+#define CONTROL_75_SIZE 1
+#define CONTROL_76_SIZE 1
+#define CONTROL_77_78_SIZE 2
+#define CONTROL_79_83_SIZE 5
+#define CONTROL_84_85_SIZE 2
+#define CONTROL_86_SIZE 1
+#define CONTROL_87_SIZE 1
+#define CONTROL_88_SIZE 1
+#define CONTROL_89_SIZE 1
+#define CONTROL_90_SIZE 1
+#define CONTROL_91_SIZE 1
+#define CONTROL_92_SIZE 1
+#define CONTROL_93_SIZE 1
+#define CONTROL_94_SIZE 1
+#define CONTROL_95_SIZE 1
+#define CONTROL_96_SIZE 1
+#define CONTROL_97_SIZE 1
+#define CONTROL_98_SIZE 1
+#define CONTROL_99_SIZE 1
+#define CONTROL_100_SIZE 1
+#define CONTROL_101_SIZE 1
+#define CONTROL_102_SIZE 1
+#define CONTROL_103_SIZE 1
+#define CONTROL_104_SIZE 1
+#define CONTROL_105_SIZE 1
+#define CONTROL_106_SIZE 1
+#define CONTROL_107_SIZE 1
+#define CONTROL_108_SIZE 1
+#define CONTROL_109_SIZE 1
+#define CONTROL_110_SIZE 1
+#define CONTROL_111_SIZE 1
+#define CONTROL_112_SIZE 1
+#define CONTROL_113_SIZE 1
+#define CONTROL_114_SIZE 1
+#define CONTROL_115_SIZE 1
+#define CONTROL_116_SIZE 1
+#define CONTROL_117_SIZE 1
+#define CONTROL_118_SIZE 1
+#define CONTROL_119_SIZE 1
+#define CONTROL_120_SIZE 1
+#define CONTROL_121_SIZE 1
+#define CONTROL_122_SIZE 1
+#define CONTROL_123_SIZE 1
+#define CONTROL_124_SIZE 1
+#define CONTROL_125_SIZE 1
+#define CONTROL_126_SIZE 1
+#define CONTROL_127_SIZE 1
+#define CONTROL_128_SIZE 1
+#define CONTROL_129_SIZE 1
+#define CONTROL_130_SIZE 1
+#define CONTROL_131_SIZE 1
+#define CONTROL_132_SIZE 1
+#define CONTROL_133_SIZE 1
+#define CONTROL_134_SIZE 1
+#define CONTROL_135_SIZE 1
+#define CONTROL_136_SIZE 1
+#define CONTROL_137_SIZE 1
+#define CONTROL_138_SIZE 1
+#define CONTROL_139_SIZE 1
+#define CONTROL_140_SIZE 1
+#define CONTROL_141_SIZE 1
+#define CONTROL_142_SIZE 1
+#define CONTROL_143_SIZE 1
+#define CONTROL_144_SIZE 1
+#define CONTROL_145_SIZE 1
+#define CONTROL_146_SIZE 1
+#define CONTROL_147_SIZE 1
+#define CONTROL_148_SIZE 1
+#define CONTROL_149_SIZE 1
+#define CONTROL_150_SIZE 1
+#define CONTROL_151_SIZE 1
+#define CONTROL_152_SIZE 1
+#define CONTROL_153_SIZE 1
+#define CONTROL_154_SIZE 1
+#define CONTROL_155_SIZE 1
+#define CONTROL_156_SIZE 1
+#define CONTROL_157_158_SIZE 2
+#define CONTROL_163_SIZE 1
+#define CONTROL_165_SIZE 1
+#define CONTROL_166_SIZE 1
+#define CONTROL_167_SIZE 1
+#define CONTROL_168_SIZE 1
+#define CONTROL_169_SIZE 1
+#define CONTROL_171_SIZE 1
+#define CONTROL_172_SIZE 1
+#define CONTROL_173_SIZE 1
+#define CONTROL_174_SIZE 1
+#define CONTROL_175_SIZE 1
+#define CONTROL_176_SIZE 1
+#define CONTROL_177_178_SIZE 2
+#define CONTROL_179_SIZE 1
+#define CONTROL_182_SIZE 1
+#define CONTROL_183_SIZE 1
+#define CONTROL_185_SIZE 1
+#define CONTROL_186_SIZE 1
+#define CONTROL_187_SIZE 1
+#define CONTROL_188_SIZE 1
+
+#define HIGH_RESISTANCE_DATA_SIZE 6
+#define FULL_RAW_CAP_MIN_MAX_DATA_SIZE 4
+#define TRX_OPEN_SHORT_DATA_SIZE 7
+
+#define concat(a, b) a##b
+
+#define attrify(propname) (&dev_attr_##propname.attr)
+
+#define show_prototype(propname)\
+static ssize_t concat(test_sysfs, _##propname##_show)(\
+ struct device *dev,\
+ struct device_attribute *attr,\
+ char *buf);\
+\
+static struct device_attribute dev_attr_##propname =\
+ __ATTR(propname, 0444,\
+ concat(test_sysfs, _##propname##_show),\
+ synaptics_rmi4_store_error);
+
+#define store_prototype(propname)\
+static ssize_t concat(test_sysfs, _##propname##_store)(\
+ struct device *dev,\
+ struct device_attribute *attr,\
+ const char *buf, size_t count);\
+\
+static struct device_attribute dev_attr_##propname =\
+ __ATTR(propname, 0220,\
+ synaptics_rmi4_show_error,\
+ concat(test_sysfs, _##propname##_store));
+
+#define show_store_prototype(propname)\
+static ssize_t concat(test_sysfs, _##propname##_show)(\
+ struct device *dev,\
+ struct device_attribute *attr,\
+ char *buf);\
+\
+static ssize_t concat(test_sysfs, _##propname##_store)(\
+ struct device *dev,\
+ struct device_attribute *attr,\
+ const char *buf, size_t count);\
+\
+static struct device_attribute dev_attr_##propname =\
+ __ATTR(propname, 0664,\
+ concat(test_sysfs, _##propname##_show),\
+ concat(test_sysfs, _##propname##_store));
+
+#define disable_cbc(ctrl_num)\
+do {\
+ retval = synaptics_rmi4_reg_read(rmi4_data,\
+ f54->control.ctrl_num->address,\
+ f54->control.ctrl_num->data,\
+ sizeof(f54->control.ctrl_num->data));\
+ if (retval < 0) {\
+ dev_err(rmi4_data->pdev->dev.parent,\
+ "%s: Failed to disable CBC (" #ctrl_num ")\n",\
+ __func__);\
+ return retval;\
+ } \
+ f54->control.ctrl_num->cbc_tx_carrier_selection = 0;\
+ retval = synaptics_rmi4_reg_write(rmi4_data,\
+ f54->control.ctrl_num->address,\
+ f54->control.ctrl_num->data,\
+ sizeof(f54->control.ctrl_num->data));\
+ if (retval < 0) {\
+ dev_err(rmi4_data->pdev->dev.parent,\
+ "%s: Failed to disable CBC (" #ctrl_num ")\n",\
+ __func__);\
+ return retval;\
+ } \
+} while (0)
+
+enum f54_report_types {
+ F54_8BIT_IMAGE = 1,
+ F54_16BIT_IMAGE = 2,
+ F54_RAW_16BIT_IMAGE = 3,
+ F54_HIGH_RESISTANCE = 4,
+ F54_TX_TO_TX_SHORTS = 5,
+ F54_RX_TO_RX_SHORTS_1 = 7,
+ F54_TRUE_BASELINE = 9,
+ F54_FULL_RAW_CAP_MIN_MAX = 13,
+ F54_RX_OPENS_1 = 14,
+ F54_TX_OPENS = 15,
+ F54_TX_TO_GND_SHORTS = 16,
+ F54_RX_TO_RX_SHORTS_2 = 17,
+ F54_RX_OPENS_2 = 18,
+ F54_FULL_RAW_CAP = 19,
+ F54_FULL_RAW_CAP_NO_RX_COUPLING = 20,
+ F54_SENSOR_SPEED = 22,
+ F54_ADC_RANGE = 23,
+ F54_TRX_OPENS = 24,
+ F54_TRX_TO_GND_SHORTS = 25,
+ F54_TRX_SHORTS = 26,
+ F54_ABS_RAW_CAP = 38,
+ F54_ABS_DELTA_CAP = 40,
+ F54_ABS_HYBRID_DELTA_CAP = 59,
+ F54_ABS_HYBRID_RAW_CAP = 63,
+ F54_AMP_FULL_RAW_CAP = 78,
+ F54_AMP_RAW_ADC = 83,
+ F54_FULL_RAW_CAP_TDDI = 92,
+ INVALID_REPORT_TYPE = -1,
+};
+
+enum f54_afe_cal {
+ F54_AFE_CAL,
+ F54_AFE_IS_CAL,
+};
+
+struct f54_query {
+ union {
+ struct {
+ /* query 0 */
+ unsigned char num_of_rx_electrodes;
+
+ /* query 1 */
+ unsigned char num_of_tx_electrodes;
+
+ /* query 2 */
+ unsigned char f54_query2_b0__1:2;
+ unsigned char has_baseline:1;
+ unsigned char has_image8:1;
+ unsigned char f54_query2_b4__5:2;
+ unsigned char has_image16:1;
+ unsigned char f54_query2_b7:1;
+
+ /* queries 3.0 and 3.1 */
+ unsigned short clock_rate;
+
+ /* query 4 */
+ unsigned char touch_controller_family;
+
+ /* query 5 */
+ unsigned char has_pixel_touch_threshold_adjustment:1;
+ unsigned char f54_query5_b1__7:7;
+
+ /* query 6 */
+ unsigned char has_sensor_assignment:1;
+ unsigned char has_interference_metric:1;
+ unsigned char has_sense_frequency_control:1;
+ unsigned char has_firmware_noise_mitigation:1;
+ unsigned char has_ctrl11:1;
+ unsigned char has_two_byte_report_rate:1;
+ unsigned char has_one_byte_report_rate:1;
+ unsigned char has_relaxation_control:1;
+
+ /* query 7 */
+ unsigned char curve_compensation_mode:2;
+ unsigned char f54_query7_b2__7:6;
+
+ /* query 8 */
+ unsigned char f54_query8_b0:1;
+ unsigned char has_iir_filter:1;
+ unsigned char has_cmn_removal:1;
+ unsigned char has_cmn_maximum:1;
+ unsigned char has_touch_hysteresis:1;
+ unsigned char has_edge_compensation:1;
+ unsigned char has_per_frequency_noise_control:1;
+ unsigned char has_enhanced_stretch:1;
+
+ /* query 9 */
+ unsigned char has_force_fast_relaxation:1;
+ unsigned char has_multi_metric_state_machine:1;
+ unsigned char has_signal_clarity:1;
+ unsigned char has_variance_metric:1;
+ unsigned char has_0d_relaxation_control:1;
+ unsigned char has_0d_acquisition_control:1;
+ unsigned char has_status:1;
+ unsigned char has_slew_metric:1;
+
+ /* query 10 */
+ unsigned char has_h_blank:1;
+ unsigned char has_v_blank:1;
+ unsigned char has_long_h_blank:1;
+ unsigned char has_startup_fast_relaxation:1;
+ unsigned char has_esd_control:1;
+ unsigned char has_noise_mitigation2:1;
+ unsigned char has_noise_state:1;
+ unsigned char has_energy_ratio_relaxation:1;
+
+ /* query 11 */
+ unsigned char has_excessive_noise_reporting:1;
+ unsigned char has_slew_option:1;
+ unsigned char has_two_overhead_bursts:1;
+ unsigned char has_query13:1;
+ unsigned char has_one_overhead_burst:1;
+ unsigned char f54_query11_b5:1;
+ unsigned char has_ctrl88:1;
+ unsigned char has_query15:1;
+
+ /* query 12 */
+ unsigned char number_of_sensing_frequencies:4;
+ unsigned char f54_query12_b4__7:4;
+ } __packed;
+ unsigned char data[14];
+ };
+};
+
+struct f54_query_13 {
+ union {
+ struct {
+ unsigned char has_ctrl86:1;
+ unsigned char has_ctrl87:1;
+ unsigned char has_ctrl87_sub0:1;
+ unsigned char has_ctrl87_sub1:1;
+ unsigned char has_ctrl87_sub2:1;
+ unsigned char has_cidim:1;
+ unsigned char has_noise_mitigation_enhancement:1;
+ unsigned char has_rail_im:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_15 {
+ union {
+ struct {
+ unsigned char has_ctrl90:1;
+ unsigned char has_transmit_strength:1;
+ unsigned char has_ctrl87_sub3:1;
+ unsigned char has_query16:1;
+ unsigned char has_query20:1;
+ unsigned char has_query21:1;
+ unsigned char has_query22:1;
+ unsigned char has_query25:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_16 {
+ union {
+ struct {
+ unsigned char has_query17:1;
+ unsigned char has_data17:1;
+ unsigned char has_ctrl92:1;
+ unsigned char has_ctrl93:1;
+ unsigned char has_ctrl94_query18:1;
+ unsigned char has_ctrl95_query19:1;
+ unsigned char has_ctrl99:1;
+ unsigned char has_ctrl100:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_21 {
+ union {
+ struct {
+ unsigned char has_abs_rx:1;
+ unsigned char has_abs_tx:1;
+ unsigned char has_ctrl91:1;
+ unsigned char has_ctrl96:1;
+ unsigned char has_ctrl97:1;
+ unsigned char has_ctrl98:1;
+ unsigned char has_data19:1;
+ unsigned char has_query24_data18:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_22 {
+ union {
+ struct {
+ unsigned char has_packed_image:1;
+ unsigned char has_ctrl101:1;
+ unsigned char has_dynamic_sense_display_ratio:1;
+ unsigned char has_query23:1;
+ unsigned char has_ctrl103_query26:1;
+ unsigned char has_ctrl104:1;
+ unsigned char has_ctrl105:1;
+ unsigned char has_query28:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_23 {
+ union {
+ struct {
+ unsigned char has_ctrl102:1;
+ unsigned char has_ctrl102_sub1:1;
+ unsigned char has_ctrl102_sub2:1;
+ unsigned char has_ctrl102_sub4:1;
+ unsigned char has_ctrl102_sub5:1;
+ unsigned char has_ctrl102_sub9:1;
+ unsigned char has_ctrl102_sub10:1;
+ unsigned char has_ctrl102_sub11:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_25 {
+ union {
+ struct {
+ unsigned char has_ctrl106:1;
+ unsigned char has_ctrl102_sub12:1;
+ unsigned char has_ctrl107:1;
+ unsigned char has_ctrl108:1;
+ unsigned char has_ctrl109:1;
+ unsigned char has_data20:1;
+ unsigned char f54_query25_b6:1;
+ unsigned char has_query27:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_27 {
+ union {
+ struct {
+ unsigned char has_ctrl110:1;
+ unsigned char has_data21:1;
+ unsigned char has_ctrl111:1;
+ unsigned char has_ctrl112:1;
+ unsigned char has_ctrl113:1;
+ unsigned char has_data22:1;
+ unsigned char has_ctrl114:1;
+ unsigned char has_query29:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_29 {
+ union {
+ struct {
+ unsigned char has_ctrl115:1;
+ unsigned char has_ground_ring_options:1;
+ unsigned char has_lost_bursts_tuning:1;
+ unsigned char has_aux_exvcom2_select:1;
+ unsigned char has_ctrl116:1;
+ unsigned char has_data23:1;
+ unsigned char has_ctrl117:1;
+ unsigned char has_query30:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_30 {
+ union {
+ struct {
+ unsigned char has_ctrl118:1;
+ unsigned char has_ctrl119:1;
+ unsigned char has_ctrl120:1;
+ unsigned char has_ctrl121:1;
+ unsigned char has_ctrl122_query31:1;
+ unsigned char has_ctrl123:1;
+ unsigned char has_ctrl124:1;
+ unsigned char has_query32:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_32 {
+ union {
+ struct {
+ unsigned char has_ctrl125:1;
+ unsigned char has_ctrl126:1;
+ unsigned char has_ctrl127:1;
+ unsigned char has_abs_charge_pump_disable:1;
+ unsigned char has_query33:1;
+ unsigned char has_data24:1;
+ unsigned char has_query34:1;
+ unsigned char has_query35:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_33 {
+ union {
+ struct {
+ unsigned char has_ctrl128:1;
+ unsigned char has_ctrl129:1;
+ unsigned char has_ctrl130:1;
+ unsigned char has_ctrl131:1;
+ unsigned char has_ctrl132:1;
+ unsigned char has_ctrl133:1;
+ unsigned char has_ctrl134:1;
+ unsigned char has_query36:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_35 {
+ union {
+ struct {
+ unsigned char has_data25:1;
+ unsigned char has_ctrl135:1;
+ unsigned char has_ctrl136:1;
+ unsigned char has_ctrl137:1;
+ unsigned char has_ctrl138:1;
+ unsigned char has_ctrl139:1;
+ unsigned char has_data26:1;
+ unsigned char has_ctrl140:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_36 {
+ union {
+ struct {
+ unsigned char has_ctrl141:1;
+ unsigned char has_ctrl142:1;
+ unsigned char has_query37:1;
+ unsigned char has_ctrl143:1;
+ unsigned char has_ctrl144:1;
+ unsigned char has_ctrl145:1;
+ unsigned char has_ctrl146:1;
+ unsigned char has_query38:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_38 {
+ union {
+ struct {
+ unsigned char has_ctrl147:1;
+ unsigned char has_ctrl148:1;
+ unsigned char has_ctrl149:1;
+ unsigned char has_ctrl150:1;
+ unsigned char has_ctrl151:1;
+ unsigned char has_ctrl152:1;
+ unsigned char has_ctrl153:1;
+ unsigned char has_query39:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_39 {
+ union {
+ struct {
+ unsigned char has_ctrl154:1;
+ unsigned char has_ctrl155:1;
+ unsigned char has_ctrl156:1;
+ unsigned char has_ctrl160:1;
+ unsigned char has_ctrl157_ctrl158:1;
+ unsigned char f54_query39_b5__6:2;
+ unsigned char has_query40:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_40 {
+ union {
+ struct {
+ unsigned char has_ctrl169:1;
+ unsigned char has_ctrl163_query41:1;
+ unsigned char f54_query40_b2:1;
+ unsigned char has_ctrl165_query42:1;
+ unsigned char has_ctrl166:1;
+ unsigned char has_ctrl167:1;
+ unsigned char has_ctrl168:1;
+ unsigned char has_query43:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_43 {
+ union {
+ struct {
+ unsigned char f54_query43_b0__1:2;
+ unsigned char has_ctrl171:1;
+ unsigned char has_ctrl172_query44_query45:1;
+ unsigned char has_ctrl173:1;
+ unsigned char has_ctrl174:1;
+ unsigned char has_ctrl175:1;
+ unsigned char has_query46:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_46 {
+ union {
+ struct {
+ unsigned char has_ctrl176:1;
+ unsigned char has_ctrl177_ctrl178:1;
+ unsigned char has_ctrl179:1;
+ unsigned char f54_query46_b3:1;
+ unsigned char has_data27:1;
+ unsigned char has_data28:1;
+ unsigned char f54_query46_b6:1;
+ unsigned char has_query47:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_47 {
+ union {
+ struct {
+ unsigned char f54_query47_b0:1;
+ unsigned char has_ctrl182:1;
+ unsigned char has_ctrl183:1;
+ unsigned char f54_query47_b3:1;
+ unsigned char has_ctrl185:1;
+ unsigned char has_ctrl186:1;
+ unsigned char has_ctrl187:1;
+ unsigned char has_query49:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_49 {
+ union {
+ struct {
+ unsigned char f54_query49_b0__1:2;
+ unsigned char has_ctrl188:1;
+ unsigned char has_data31:1;
+ unsigned char f54_query49_b4__6:3;
+ unsigned char has_query50:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_50 {
+ union {
+ struct {
+ unsigned char f54_query50_b0__6:7;
+ unsigned char has_query51:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_51 {
+ union {
+ struct {
+ unsigned char f54_query51_b0__4:5;
+ unsigned char has_query53_query54_ctrl198:1;
+ unsigned char has_ctrl199:1;
+ unsigned char has_query55:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_55 {
+ union {
+ struct {
+ unsigned char has_query56:1;
+ unsigned char has_data33_data34:1;
+ unsigned char has_alt_report_rate:1;
+ unsigned char has_ctrl200:1;
+ unsigned char has_ctrl201_ctrl202:1;
+ unsigned char has_ctrl203:1;
+ unsigned char has_ctrl204:1;
+ unsigned char has_query57:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_57 {
+ union {
+ struct {
+ unsigned char has_ctrl205:1;
+ unsigned char has_ctrl206:1;
+ unsigned char has_usb_bulk_read:1;
+ unsigned char has_ctrl207:1;
+ unsigned char has_ctrl208:1;
+ unsigned char has_ctrl209:1;
+ unsigned char has_ctrl210:1;
+ unsigned char has_query58:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_58 {
+ union {
+ struct {
+ unsigned char has_query59:1;
+ unsigned char has_query60:1;
+ unsigned char has_ctrl211:1;
+ unsigned char has_ctrl212:1;
+ unsigned char has_hybrid_abs_tx_axis_filtering:1;
+ unsigned char has_hybrid_abs_tx_interpolation:1;
+ unsigned char has_ctrl213:1;
+ unsigned char has_query61:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_61 {
+ union {
+ struct {
+ unsigned char has_ctrl214:1;
+ unsigned char has_ctrl215_query62_query63:1;
+ unsigned char f54_query_61_b2:1;
+ unsigned char has_ctrl216:1;
+ unsigned char has_ctrl217:1;
+ unsigned char has_misc_host_ctrl:1;
+ unsigned char hybrid_abs_buttons:1;
+ unsigned char has_query64:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_64 {
+ union {
+ struct {
+ unsigned char has_ctrl101_sub1:1;
+ unsigned char has_ctrl220:1;
+ unsigned char has_ctrl221:1;
+ unsigned char has_ctrl222:1;
+ unsigned char has_ctrl219_sub1:1;
+ unsigned char has_ctrl103_sub3:1;
+ unsigned char has_ctrl224_ctrl226_ctrl227:1;
+ unsigned char has_query65:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_65 {
+ union {
+ struct {
+ unsigned char f54_query_65_b0__1:2;
+ unsigned char has_ctrl101_sub2:1;
+ unsigned char f54_query_65_b3__4:2;
+ unsigned char has_query66_ctrl231:1;
+ unsigned char has_ctrl232:1;
+ unsigned char has_query67:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_67 {
+ union {
+ struct {
+ unsigned char has_abs_doze_spatial_filter_en:1;
+ unsigned char has_abs_doze_avg_filter_enhancement_en:1;
+ unsigned char has_single_display_pulse:1;
+ unsigned char f54_query_67_b3__4:2;
+ unsigned char has_ctrl235_ctrl236:1;
+ unsigned char f54_query_67_b6:1;
+ unsigned char has_query68:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_68 {
+ union {
+ struct {
+ unsigned char f54_query_68_b0:1;
+ unsigned char has_ctrl238:1;
+ unsigned char has_ctrl238_sub1:1;
+ unsigned char has_ctrl238_sub2:1;
+ unsigned char has_ctrl239:1;
+ unsigned char has_freq_filter_bw_ext:1;
+ unsigned char is_tddi_hic:1;
+ unsigned char has_query69:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_query_69 {
+ union {
+ struct {
+ unsigned char has_ctrl240_sub0:1;
+ unsigned char has_ctrl240_sub1_sub2:1;
+ unsigned char has_ctrl240_sub3:1;
+ unsigned char has_ctrl240_sub4:1;
+ unsigned char f54_query_69_b4__7:4;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f54_data_31 {
+ union {
+ struct {
+ unsigned char is_calibration_crc:1;
+ unsigned char calibration_crc:1;
+ unsigned char short_test_row_number:5;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_7 {
+ union {
+ struct {
+ unsigned char cbc_cap:3;
+ unsigned char cbc_polarity:1;
+ unsigned char cbc_tx_carrier_selection:1;
+ unsigned char f54_ctrl7_b5__7:3;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_41 {
+ union {
+ struct {
+ unsigned char no_signal_clarity:1;
+ unsigned char f54_ctrl41_b1__7:7;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_57 {
+ union {
+ struct {
+ unsigned char cbc_cap:3;
+ unsigned char cbc_polarity:1;
+ unsigned char cbc_tx_carrier_selection:1;
+ unsigned char f54_ctrl57_b5__7:3;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_86 {
+ union {
+ struct {
+ unsigned char enable_high_noise_state:1;
+ unsigned char dynamic_sense_display_ratio:2;
+ unsigned char f54_ctrl86_b3__7:5;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_88 {
+ union {
+ struct {
+ unsigned char tx_low_reference_polarity:1;
+ unsigned char tx_high_reference_polarity:1;
+ unsigned char abs_low_reference_polarity:1;
+ unsigned char abs_polarity:1;
+ unsigned char cbc_polarity:1;
+ unsigned char cbc_tx_carrier_selection:1;
+ unsigned char charge_pump_enable:1;
+ unsigned char cbc_abs_auto_servo:1;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_110 {
+ union {
+ struct {
+ unsigned char active_stylus_rx_feedback_cap;
+ unsigned char active_stylus_rx_feedback_cap_reference;
+ unsigned char active_stylus_low_reference;
+ unsigned char active_stylus_high_reference;
+ unsigned char active_stylus_gain_control;
+ unsigned char active_stylus_gain_control_reference;
+ unsigned char active_stylus_timing_mode;
+ unsigned char active_stylus_discovery_bursts;
+ unsigned char active_stylus_detection_bursts;
+ unsigned char active_stylus_discovery_noise_multiplier;
+ unsigned char active_stylus_detection_envelope_min;
+ unsigned char active_stylus_detection_envelope_max;
+ unsigned char active_stylus_lose_count;
+ } __packed;
+ struct {
+ unsigned char data[13];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_149 {
+ union {
+ struct {
+ unsigned char trans_cbc_global_cap_enable:1;
+ unsigned char f54_ctrl149_b1__7:7;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control_188 {
+ union {
+ struct {
+ unsigned char start_calibration:1;
+ unsigned char start_is_calibration:1;
+ unsigned char frequency:2;
+ unsigned char start_production_test:1;
+ unsigned char short_test_calibration:1;
+ unsigned char f54_ctrl188_b7:1;
+ } __packed;
+ struct {
+ unsigned char data[1];
+ unsigned short address;
+ } __packed;
+ };
+};
+
+struct f54_control {
+ struct f54_control_7 *reg_7;
+ struct f54_control_41 *reg_41;
+ struct f54_control_57 *reg_57;
+ struct f54_control_86 *reg_86;
+ struct f54_control_88 *reg_88;
+ struct f54_control_110 *reg_110;
+ struct f54_control_149 *reg_149;
+ struct f54_control_188 *reg_188;
+};
+
+struct synaptics_rmi4_f54_handle {
+ bool no_auto_cal;
+ bool skip_preparation;
+ unsigned char status;
+ unsigned char intr_mask;
+ unsigned char intr_reg_num;
+ unsigned char tx_assigned;
+ unsigned char rx_assigned;
+ unsigned char *report_data;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ unsigned short fifoindex;
+ unsigned int report_size;
+ unsigned int data_buffer_size;
+ unsigned int data_pos;
+ enum f54_report_types report_type;
+ struct f54_query query;
+ struct f54_query_13 query_13;
+ struct f54_query_15 query_15;
+ struct f54_query_16 query_16;
+ struct f54_query_21 query_21;
+ struct f54_query_22 query_22;
+ struct f54_query_23 query_23;
+ struct f54_query_25 query_25;
+ struct f54_query_27 query_27;
+ struct f54_query_29 query_29;
+ struct f54_query_30 query_30;
+ struct f54_query_32 query_32;
+ struct f54_query_33 query_33;
+ struct f54_query_35 query_35;
+ struct f54_query_36 query_36;
+ struct f54_query_38 query_38;
+ struct f54_query_39 query_39;
+ struct f54_query_40 query_40;
+ struct f54_query_43 query_43;
+ struct f54_query_46 query_46;
+ struct f54_query_47 query_47;
+ struct f54_query_49 query_49;
+ struct f54_query_50 query_50;
+ struct f54_query_51 query_51;
+ struct f54_query_55 query_55;
+ struct f54_query_57 query_57;
+ struct f54_query_58 query_58;
+ struct f54_query_61 query_61;
+ struct f54_query_64 query_64;
+ struct f54_query_65 query_65;
+ struct f54_query_67 query_67;
+ struct f54_query_68 query_68;
+ struct f54_query_69 query_69;
+ struct f54_data_31 data_31;
+ struct f54_control control;
+ struct mutex status_mutex;
+ struct kobject *sysfs_dir;
+ struct hrtimer watchdog;
+ struct work_struct timeout_work;
+ struct work_struct test_report_work;
+ struct workqueue_struct *test_report_workqueue;
+ struct synaptics_rmi4_data *rmi4_data;
+};
+
+struct f55_query {
+ union {
+ struct {
+ /* query 0 */
+ unsigned char num_of_rx_electrodes;
+
+ /* query 1 */
+ unsigned char num_of_tx_electrodes;
+
+ /* query 2 */
+ unsigned char has_sensor_assignment:1;
+ unsigned char has_edge_compensation:1;
+ unsigned char curve_compensation_mode:2;
+ unsigned char has_ctrl6:1;
+ unsigned char has_alternate_transmitter_assignment:1;
+ unsigned char has_single_layer_multi_touch:1;
+ unsigned char has_query5:1;
+ } __packed;
+ unsigned char data[3];
+ };
+};
+
+struct f55_query_3 {
+ union {
+ struct {
+ unsigned char has_ctrl8:1;
+ unsigned char has_ctrl9:1;
+ unsigned char has_oncell_pattern_support:1;
+ unsigned char has_data0:1;
+ unsigned char has_single_wide_pattern_support:1;
+ unsigned char has_mirrored_tx_pattern_support:1;
+ unsigned char has_discrete_pattern_support:1;
+ unsigned char has_query9:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_5 {
+ union {
+ struct {
+ unsigned char has_corner_compensation:1;
+ unsigned char has_ctrl12:1;
+ unsigned char has_trx_configuration:1;
+ unsigned char has_ctrl13:1;
+ unsigned char f55_query5_b4:1;
+ unsigned char has_ctrl14:1;
+ unsigned char has_basis_function:1;
+ unsigned char has_query17:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_17 {
+ union {
+ struct {
+ unsigned char f55_query17_b0:1;
+ unsigned char has_ctrl16:1;
+ unsigned char has_ctrl18_ctrl19:1;
+ unsigned char has_ctrl17:1;
+ unsigned char has_ctrl20:1;
+ unsigned char has_ctrl21:1;
+ unsigned char has_ctrl22:1;
+ unsigned char has_query18:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_18 {
+ union {
+ struct {
+ unsigned char has_ctrl23:1;
+ unsigned char has_ctrl24:1;
+ unsigned char has_query19:1;
+ unsigned char has_ctrl25:1;
+ unsigned char has_ctrl26:1;
+ unsigned char has_ctrl27_query20:1;
+ unsigned char has_ctrl28_query21:1;
+ unsigned char has_query22:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_22 {
+ union {
+ struct {
+ unsigned char has_ctrl29:1;
+ unsigned char has_query23:1;
+ unsigned char has_guard_disable:1;
+ unsigned char has_ctrl30:1;
+ unsigned char has_ctrl31:1;
+ unsigned char has_ctrl32:1;
+ unsigned char has_query24_through_query27:1;
+ unsigned char has_query28:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_23 {
+ union {
+ struct {
+ unsigned char amp_sensor_enabled:1;
+ unsigned char image_transposed:1;
+ unsigned char first_column_at_left_side:1;
+ unsigned char size_of_column2mux:5;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_28 {
+ union {
+ struct {
+ unsigned char f55_query28_b0__4:5;
+ unsigned char has_ctrl37:1;
+ unsigned char has_query29:1;
+ unsigned char has_query30:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_30 {
+ union {
+ struct {
+ unsigned char has_ctrl38:1;
+ unsigned char has_query31_query32:1;
+ unsigned char has_ctrl39:1;
+ unsigned char has_ctrl40:1;
+ unsigned char has_ctrl41:1;
+ unsigned char has_ctrl42:1;
+ unsigned char has_ctrl43_ctrl44:1;
+ unsigned char has_query33:1;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_query_33 {
+ union {
+ struct {
+ unsigned char has_extended_amp_pad:1;
+ unsigned char has_extended_amp_btn:1;
+ unsigned char has_ctrl45_ctrl46:1;
+ unsigned char f55_query33_b3:1;
+ unsigned char has_ctrl47_sub0_sub1:1;
+ unsigned char f55_query33_b5__7:3;
+ } __packed;
+ unsigned char data[1];
+ };
+};
+
+struct f55_control_43 {
+ union {
+ struct {
+ unsigned char swap_sensor_side:1;
+ unsigned char f55_ctrl43_b1__7:7;
+ unsigned char afe_l_mux_size:4;
+ unsigned char afe_r_mux_size:4;
+ } __packed;
+ unsigned char data[2];
+ };
+};
+
+struct synaptics_rmi4_f55_handle {
+ bool amp_sensor;
+ bool extended_amp;
+ bool has_force;
+ unsigned char size_of_column2mux;
+ unsigned char afe_mux_offset;
+ unsigned char force_tx_offset;
+ unsigned char force_rx_offset;
+ unsigned char *tx_assignment;
+ unsigned char *rx_assignment;
+ unsigned char *force_tx_assignment;
+ unsigned char *force_rx_assignment;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ struct f55_query query;
+ struct f55_query_3 query_3;
+ struct f55_query_5 query_5;
+ struct f55_query_17 query_17;
+ struct f55_query_18 query_18;
+ struct f55_query_22 query_22;
+ struct f55_query_23 query_23;
+ struct f55_query_28 query_28;
+ struct f55_query_30 query_30;
+ struct f55_query_33 query_33;
+};
+
+struct f21_query_2 {
+ union {
+ struct {
+ unsigned char size_of_query3;
+ struct {
+ unsigned char query0_is_present:1;
+ unsigned char query1_is_present:1;
+ unsigned char query2_is_present:1;
+ unsigned char query3_is_present:1;
+ unsigned char query4_is_present:1;
+ unsigned char query5_is_present:1;
+ unsigned char query6_is_present:1;
+ unsigned char query7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char query8_is_present:1;
+ unsigned char query9_is_present:1;
+ unsigned char query10_is_present:1;
+ unsigned char query11_is_present:1;
+ unsigned char query12_is_present:1;
+ unsigned char query13_is_present:1;
+ unsigned char query14_is_present:1;
+ unsigned char query15_is_present:1;
+ } __packed;
+ };
+ unsigned char data[3];
+ };
+};
+
+struct f21_query_5 {
+ union {
+ struct {
+ unsigned char size_of_query6;
+ struct {
+ unsigned char ctrl0_is_present:1;
+ unsigned char ctrl1_is_present:1;
+ unsigned char ctrl2_is_present:1;
+ unsigned char ctrl3_is_present:1;
+ unsigned char ctrl4_is_present:1;
+ unsigned char ctrl5_is_present:1;
+ unsigned char ctrl6_is_present:1;
+ unsigned char ctrl7_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl8_is_present:1;
+ unsigned char ctrl9_is_present:1;
+ unsigned char ctrl10_is_present:1;
+ unsigned char ctrl11_is_present:1;
+ unsigned char ctrl12_is_present:1;
+ unsigned char ctrl13_is_present:1;
+ unsigned char ctrl14_is_present:1;
+ unsigned char ctrl15_is_present:1;
+ } __packed;
+ struct {
+ unsigned char ctrl16_is_present:1;
+ unsigned char ctrl17_is_present:1;
+ unsigned char ctrl18_is_present:1;
+ unsigned char ctrl19_is_present:1;
+ unsigned char ctrl20_is_present:1;
+ unsigned char ctrl21_is_present:1;
+ unsigned char ctrl22_is_present:1;
+ unsigned char ctrl23_is_present:1;
+ } __packed;
+ };
+ unsigned char data[4];
+ };
+};
+
+struct f21_query_11 {
+ union {
+ struct {
+ unsigned char has_high_resolution_force:1;
+ unsigned char has_force_sensing_txrx_mapping:1;
+ unsigned char f21_query11_00_b2__7:6;
+ unsigned char f21_query11_00_reserved;
+ unsigned char max_number_of_force_sensors;
+ unsigned char max_number_of_force_txs;
+ unsigned char max_number_of_force_rxs;
+ unsigned char f21_query11_01_reserved;
+ } __packed;
+ unsigned char data[6];
+ };
+};
+
+struct synaptics_rmi4_f21_handle {
+ bool has_force;
+ unsigned char tx_assigned;
+ unsigned char rx_assigned;
+ unsigned char max_num_of_tx;
+ unsigned char max_num_of_rx;
+ unsigned char max_num_of_txrx;
+ unsigned char *force_txrx_assignment;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+};
+
+show_prototype(num_of_mapped_tx)
+show_prototype(num_of_mapped_rx)
+show_prototype(tx_mapping)
+show_prototype(rx_mapping)
+show_prototype(num_of_mapped_force_tx)
+show_prototype(num_of_mapped_force_rx)
+show_prototype(force_tx_mapping)
+show_prototype(force_rx_mapping)
+show_prototype(report_size)
+show_prototype(status)
+store_prototype(do_preparation)
+store_prototype(force_cal)
+store_prototype(get_report)
+store_prototype(resume_touch)
+store_prototype(do_afe_calibration)
+show_store_prototype(report_type)
+show_store_prototype(fifoindex)
+show_store_prototype(no_auto_cal)
+show_store_prototype(read_report)
+
+static struct attribute *attrs[] = {
+ attrify(num_of_mapped_tx),
+ attrify(num_of_mapped_rx),
+ attrify(tx_mapping),
+ attrify(rx_mapping),
+ attrify(num_of_mapped_force_tx),
+ attrify(num_of_mapped_force_rx),
+ attrify(force_tx_mapping),
+ attrify(force_rx_mapping),
+ attrify(report_size),
+ attrify(status),
+ attrify(do_preparation),
+ attrify(force_cal),
+ attrify(get_report),
+ attrify(resume_touch),
+ attrify(do_afe_calibration),
+ attrify(report_type),
+ attrify(fifoindex),
+ attrify(no_auto_cal),
+ attrify(read_report),
+ NULL,
+};
+
+static struct attribute_group attr_group = {
+ .attrs = attrs,
+};
+
+static ssize_t test_sysfs_data_read(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count);
+
+static struct bin_attribute test_report_data = {
+ .attr = {
+ .name = "report_data",
+ .mode = 0444,
+ },
+ .size = 0,
+ .read = test_sysfs_data_read,
+};
+
+static struct synaptics_rmi4_f54_handle *f54;
+static struct synaptics_rmi4_f55_handle *f55;
+static struct synaptics_rmi4_f21_handle *f21;
+
+DECLARE_COMPLETION(test_remove_complete);
+
+static bool test_report_type_valid(enum f54_report_types report_type)
+{
+ switch (report_type) {
+ case F54_8BIT_IMAGE:
+ case F54_16BIT_IMAGE:
+ case F54_RAW_16BIT_IMAGE:
+ case F54_HIGH_RESISTANCE:
+ case F54_TX_TO_TX_SHORTS:
+ case F54_RX_TO_RX_SHORTS_1:
+ case F54_TRUE_BASELINE:
+ case F54_FULL_RAW_CAP_MIN_MAX:
+ case F54_RX_OPENS_1:
+ case F54_TX_OPENS:
+ case F54_TX_TO_GND_SHORTS:
+ case F54_RX_TO_RX_SHORTS_2:
+ case F54_RX_OPENS_2:
+ case F54_FULL_RAW_CAP:
+ case F54_FULL_RAW_CAP_NO_RX_COUPLING:
+ case F54_SENSOR_SPEED:
+ case F54_ADC_RANGE:
+ case F54_TRX_OPENS:
+ case F54_TRX_TO_GND_SHORTS:
+ case F54_TRX_SHORTS:
+ case F54_ABS_RAW_CAP:
+ case F54_ABS_DELTA_CAP:
+ case F54_ABS_HYBRID_DELTA_CAP:
+ case F54_ABS_HYBRID_RAW_CAP:
+ case F54_AMP_FULL_RAW_CAP:
+ case F54_AMP_RAW_ADC:
+ case F54_FULL_RAW_CAP_TDDI:
+ return true;
+ break;
+ default:
+ f54->report_type = INVALID_REPORT_TYPE;
+ f54->report_size = 0;
+ return false;
+ }
+}
+
+static void test_set_report_size(void)
+{
+ int retval;
+ unsigned char tx = f54->tx_assigned;
+ unsigned char rx = f54->rx_assigned;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ switch (f54->report_type) {
+ case F54_8BIT_IMAGE:
+ f54->report_size = tx * rx;
+ break;
+ case F54_16BIT_IMAGE:
+ case F54_RAW_16BIT_IMAGE:
+ case F54_TRUE_BASELINE:
+ case F54_FULL_RAW_CAP:
+ case F54_FULL_RAW_CAP_NO_RX_COUPLING:
+ case F54_SENSOR_SPEED:
+ case F54_AMP_FULL_RAW_CAP:
+ case F54_AMP_RAW_ADC:
+ case F54_FULL_RAW_CAP_TDDI:
+ f54->report_size = 2 * tx * rx;
+ break;
+ case F54_HIGH_RESISTANCE:
+ f54->report_size = HIGH_RESISTANCE_DATA_SIZE;
+ break;
+ case F54_TX_TO_TX_SHORTS:
+ case F54_TX_OPENS:
+ case F54_TX_TO_GND_SHORTS:
+ f54->report_size = (tx + 7) / 8;
+ break;
+ case F54_RX_TO_RX_SHORTS_1:
+ case F54_RX_OPENS_1:
+ if (rx < tx)
+ f54->report_size = 2 * rx * rx;
+ else
+ f54->report_size = 2 * tx * rx;
+ break;
+ case F54_FULL_RAW_CAP_MIN_MAX:
+ f54->report_size = FULL_RAW_CAP_MIN_MAX_DATA_SIZE;
+ break;
+ case F54_RX_TO_RX_SHORTS_2:
+ case F54_RX_OPENS_2:
+ if (rx <= tx)
+ f54->report_size = 0;
+ else
+ f54->report_size = 2 * rx * (rx - tx);
+ break;
+ case F54_ADC_RANGE:
+ if (f54->query.has_signal_clarity) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_41->address,
+ f54->control.reg_41->data,
+ sizeof(f54->control.reg_41->data));
+ if (retval < 0) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read control reg_41\n",
+ __func__);
+ f54->report_size = 0;
+ break;
+ }
+ if (!f54->control.reg_41->no_signal_clarity) {
+ if (tx % 4)
+ tx += 4 - (tx % 4);
+ }
+ }
+ f54->report_size = 2 * tx * rx;
+ break;
+ case F54_TRX_OPENS:
+ case F54_TRX_TO_GND_SHORTS:
+ case F54_TRX_SHORTS:
+ f54->report_size = TRX_OPEN_SHORT_DATA_SIZE;
+ break;
+ case F54_ABS_RAW_CAP:
+ case F54_ABS_DELTA_CAP:
+ case F54_ABS_HYBRID_DELTA_CAP:
+ case F54_ABS_HYBRID_RAW_CAP:
+ tx += f21->tx_assigned;
+ rx += f21->rx_assigned;
+ f54->report_size = 4 * (tx + rx);
+ break;
+ default:
+ f54->report_size = 0;
+ }
+
+ return;
+}
+
+static int test_set_interrupt(bool set)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char zero = 0x00;
+ unsigned char *intr_mask;
+ unsigned short f01_ctrl_reg;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ intr_mask = rmi4_data->intr_mask;
+ f01_ctrl_reg = rmi4_data->f01_ctrl_base_addr + 1 + f54->intr_reg_num;
+
+ if (!set) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f01_ctrl_reg,
+ &zero,
+ sizeof(zero));
+ if (retval < 0)
+ return retval;
+ }
+
+ for (ii = 0; ii < rmi4_data->num_of_intr_regs; ii++) {
+ if (intr_mask[ii] != 0x00) {
+ f01_ctrl_reg = rmi4_data->f01_ctrl_base_addr + 1 + ii;
+ if (set) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f01_ctrl_reg,
+ &zero,
+ sizeof(zero));
+ if (retval < 0)
+ return retval;
+ } else {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f01_ctrl_reg,
+ &(intr_mask[ii]),
+ sizeof(intr_mask[ii]));
+ if (retval < 0)
+ return retval;
+ }
+ }
+ }
+
+ f01_ctrl_reg = rmi4_data->f01_ctrl_base_addr + 1 + f54->intr_reg_num;
+
+ if (set) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f01_ctrl_reg,
+ &f54->intr_mask,
+ 1);
+ if (retval < 0)
+ return retval;
+ }
+
+ return 0;
+}
+
+static int test_wait_for_command_completion(void)
+{
+ int retval;
+ unsigned char value;
+ unsigned char timeout_count;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ timeout_count = 0;
+ do {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->command_base_addr,
+ &value,
+ sizeof(value));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read command register\n",
+ __func__);
+ return retval;
+ }
+
+ if (value == 0x00)
+ break;
+
+ msleep(100);
+ timeout_count++;
+ } while (timeout_count < COMMAND_TIMEOUT_100MS);
+
+ if (timeout_count == COMMAND_TIMEOUT_100MS) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for command completion\n",
+ __func__);
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int test_do_command(unsigned char command)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->command_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write command\n",
+ __func__);
+ return retval;
+ }
+
+ retval = test_wait_for_command_completion();
+ if (retval < 0)
+ return retval;
+
+ return 0;
+}
+
+static int test_do_preparation(void)
+{
+ int retval;
+ unsigned char value;
+ unsigned char zero = 0x00;
+ unsigned char device_ctrl;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set no sleep\n",
+ __func__);
+ return retval;
+ }
+
+ device_ctrl |= NO_SLEEP_ON;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set no sleep\n",
+ __func__);
+ return retval;
+ }
+
+ if (f54->skip_preparation)
+ return 0;
+
+ switch (f54->report_type) {
+ case F54_16BIT_IMAGE:
+ case F54_RAW_16BIT_IMAGE:
+ case F54_SENSOR_SPEED:
+ case F54_ADC_RANGE:
+ case F54_ABS_RAW_CAP:
+ case F54_ABS_DELTA_CAP:
+ case F54_ABS_HYBRID_DELTA_CAP:
+ case F54_ABS_HYBRID_RAW_CAP:
+ case F54_FULL_RAW_CAP_TDDI:
+ break;
+ case F54_AMP_RAW_ADC:
+ if (f54->query_49.has_ctrl188) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set start production test\n",
+ __func__);
+ return retval;
+ }
+ f54->control.reg_188->start_production_test = 1;
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set start production test\n",
+ __func__);
+ return retval;
+ }
+ }
+ break;
+ default:
+ if (f54->query.touch_controller_family == 1)
+ disable_cbc(reg_7);
+ else if (f54->query.has_ctrl88)
+ disable_cbc(reg_88);
+
+ if (f54->query.has_0d_acquisition_control)
+ disable_cbc(reg_57);
+
+ if ((f54->query.has_query15) &&
+ (f54->query_15.has_query25) &&
+ (f54->query_25.has_query27) &&
+ (f54->query_27.has_query29) &&
+ (f54->query_29.has_query30) &&
+ (f54->query_30.has_query32) &&
+ (f54->query_32.has_query33) &&
+ (f54->query_33.has_query36) &&
+ (f54->query_36.has_query38) &&
+ (f54->query_38.has_ctrl149)) {
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control.reg_149->address,
+ &zero,
+ sizeof(f54->control.reg_149->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to disable global CBC\n",
+ __func__);
+ return retval;
+ }
+ }
+
+ if (f54->query.has_signal_clarity) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_41->address,
+ &value,
+ sizeof(f54->control.reg_41->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to disable signal clarity\n",
+ __func__);
+ return retval;
+ }
+ value |= 0x01;
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control.reg_41->address,
+ &value,
+ sizeof(f54->control.reg_41->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to disable signal clarity\n",
+ __func__);
+ return retval;
+ }
+ }
+
+ retval = test_do_command(COMMAND_FORCE_UPDATE);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do force update\n",
+ __func__);
+ return retval;
+ }
+
+ retval = test_do_command(COMMAND_FORCE_CAL);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do force cal\n",
+ __func__);
+ return retval;
+ }
+ }
+
+ return 0;
+}
+
+static int test_do_afe_calibration(enum f54_afe_cal mode)
+{
+ int retval;
+ unsigned char timeout = CALIBRATION_TIMEOUT_S;
+ unsigned char timeout_count = 0;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to start calibration\n",
+ __func__);
+ return retval;
+ }
+
+ if (mode == F54_AFE_CAL)
+ f54->control.reg_188->start_calibration = 1;
+ else if (mode == F54_AFE_IS_CAL)
+ f54->control.reg_188->start_is_calibration = 1;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to start calibration\n",
+ __func__);
+ return retval;
+ }
+
+ do {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to complete calibration\n",
+ __func__);
+ return retval;
+ }
+
+ if (mode == F54_AFE_CAL) {
+ if (!f54->control.reg_188->start_calibration)
+ break;
+ } else if (mode == F54_AFE_IS_CAL) {
+ if (!f54->control.reg_188->start_is_calibration)
+ break;
+ }
+
+ if (timeout_count == timeout) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Timed out waiting for calibration completion\n",
+ __func__);
+ return -EBUSY;
+ }
+
+ timeout_count++;
+ msleep(1000);
+ } while (true);
+
+ /* check CRC */
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->data_31.address,
+ f54->data_31.data,
+ sizeof(f54->data_31.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read calibration CRC\n",
+ __func__);
+ return retval;
+ }
+
+ if (mode == F54_AFE_CAL) {
+ if (f54->data_31.calibration_crc == 0)
+ return 0;
+ } else if (mode == F54_AFE_IS_CAL) {
+ if (f54->data_31.is_calibration_crc == 0)
+ return 0;
+ }
+
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read calibration CRC\n",
+ __func__);
+
+ return -EINVAL;
+}
+
+static int test_check_for_idle_status(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ switch (f54->status) {
+ case STATUS_IDLE:
+ retval = 0;
+ break;
+ case STATUS_BUSY:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Status busy\n",
+ __func__);
+ retval = -EINVAL;
+ break;
+ case STATUS_ERROR:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Status error\n",
+ __func__);
+ retval = -EINVAL;
+ break;
+ default:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid status (%d)\n",
+ __func__, f54->status);
+ retval = -EINVAL;
+ }
+
+ return retval;
+}
+
+static void test_timeout_work(struct work_struct *work)
+{
+ int retval;
+ unsigned char command;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ mutex_lock(&f54->status_mutex);
+
+ if (f54->status == STATUS_BUSY) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->command_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read command register\n",
+ __func__);
+ } else if (command & COMMAND_GET_REPORT) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Report type not supported by FW\n",
+ __func__);
+ } else {
+ queue_work(f54->test_report_workqueue,
+ &f54->test_report_work);
+ goto exit;
+ }
+ f54->status = STATUS_ERROR;
+ f54->report_size = 0;
+ }
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return;
+}
+
+static enum hrtimer_restart test_get_report_timeout(struct hrtimer *timer)
+{
+ schedule_work(&(f54->timeout_work));
+
+ return HRTIMER_NORESTART;
+}
+
+static ssize_t test_sysfs_num_of_mapped_tx_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->tx_assigned);
+}
+
+static ssize_t test_sysfs_num_of_mapped_rx_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->rx_assigned);
+}
+
+static ssize_t test_sysfs_tx_mapping_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int cnt;
+ int count = 0;
+ unsigned char ii;
+ unsigned char tx_num;
+ unsigned char tx_electrodes;
+
+ if (!f55)
+ return -EINVAL;
+
+ tx_electrodes = f55->query.num_of_tx_electrodes;
+
+ for (ii = 0; ii < tx_electrodes; ii++) {
+ tx_num = f55->tx_assignment[ii];
+ if (tx_num == 0xff)
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ else
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ", tx_num);
+ buf += cnt;
+ count += cnt;
+ }
+
+ snprintf(buf, PAGE_SIZE - count, "\n");
+ count++;
+
+ return count;
+}
+
+static ssize_t test_sysfs_rx_mapping_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int cnt;
+ int count = 0;
+ unsigned char ii;
+ unsigned char rx_num;
+ unsigned char rx_electrodes;
+
+ if (!f55)
+ return -EINVAL;
+
+ rx_electrodes = f55->query.num_of_rx_electrodes;
+
+ for (ii = 0; ii < rx_electrodes; ii++) {
+ rx_num = f55->rx_assignment[ii];
+ if (rx_num == 0xff)
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ else
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ", rx_num);
+ buf += cnt;
+ count += cnt;
+ }
+
+ snprintf(buf, PAGE_SIZE - count, "\n");
+ count++;
+
+ return count;
+}
+
+static ssize_t test_sysfs_num_of_mapped_force_tx_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f21->tx_assigned);
+}
+
+static ssize_t test_sysfs_num_of_mapped_force_rx_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f21->rx_assigned);
+}
+
+static ssize_t test_sysfs_force_tx_mapping_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int cnt;
+ int count = 0;
+ unsigned char ii;
+ unsigned char tx_num;
+ unsigned char tx_electrodes;
+
+ if ((!f55 || !f55->has_force) && (!f21 || !f21->has_force))
+ return -EINVAL;
+
+ if (f55->has_force) {
+ tx_electrodes = f55->query.num_of_tx_electrodes;
+
+ for (ii = 0; ii < tx_electrodes; ii++) {
+ tx_num = f55->force_tx_assignment[ii];
+ if (tx_num == 0xff) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ } else {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ",
+ tx_num);
+ }
+ buf += cnt;
+ count += cnt;
+ }
+ } else if (f21->has_force) {
+ tx_electrodes = f21->max_num_of_tx;
+
+ for (ii = 0; ii < tx_electrodes; ii++) {
+ tx_num = f21->force_txrx_assignment[ii];
+ if (tx_num == 0xff) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ } else {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ",
+ tx_num);
+ }
+ buf += cnt;
+ count += cnt;
+ }
+ }
+
+ snprintf(buf, PAGE_SIZE - count, "\n");
+ count++;
+
+ return count;
+}
+
+static ssize_t test_sysfs_force_rx_mapping_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int cnt;
+ int count = 0;
+ unsigned char ii;
+ unsigned char offset;
+ unsigned char rx_num;
+ unsigned char rx_electrodes;
+
+ if ((!f55 || !f55->has_force) && (!f21 || !f21->has_force))
+ return -EINVAL;
+
+ if (f55->has_force) {
+ rx_electrodes = f55->query.num_of_rx_electrodes;
+
+ for (ii = 0; ii < rx_electrodes; ii++) {
+ rx_num = f55->force_rx_assignment[ii];
+ if (rx_num == 0xff)
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ else
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ",
+ rx_num);
+ buf += cnt;
+ count += cnt;
+ }
+ } else if (f21->has_force) {
+ offset = f21->max_num_of_tx;
+ rx_electrodes = f21->max_num_of_rx;
+
+ for (ii = offset; ii < (rx_electrodes + offset); ii++) {
+ rx_num = f21->force_txrx_assignment[ii];
+ if (rx_num == 0xff)
+ cnt = snprintf(buf, PAGE_SIZE - count, "xx ");
+ else
+ cnt = snprintf(buf, PAGE_SIZE - count, "%02u ",
+ rx_num);
+ buf += cnt;
+ count += cnt;
+ }
+ }
+
+ snprintf(buf, PAGE_SIZE - count, "\n");
+ count++;
+
+ return count;
+}
+
+static ssize_t test_sysfs_report_size_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->report_size);
+}
+
+static ssize_t test_sysfs_status_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = snprintf(buf, PAGE_SIZE, "%u\n", f54->status);
+
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_do_preparation_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (setting != 1)
+ return -EINVAL;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = test_check_for_idle_status();
+ if (retval < 0)
+ goto exit;
+
+ retval = test_do_preparation();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do preparation\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_force_cal_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (setting != 1)
+ return -EINVAL;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = test_check_for_idle_status();
+ if (retval < 0)
+ goto exit;
+
+ retval = test_do_command(COMMAND_FORCE_CAL);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to do force cal\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_get_report_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char command;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (setting != 1)
+ return -EINVAL;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = test_check_for_idle_status();
+ if (retval < 0)
+ goto exit;
+
+ if (!test_report_type_valid(f54->report_type)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Invalid report type\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ test_set_interrupt(true);
+
+ command = (unsigned char)COMMAND_GET_REPORT;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->command_base_addr,
+ &command,
+ sizeof(command));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write get report command\n",
+ __func__);
+ goto exit;
+ }
+
+ f54->status = STATUS_BUSY;
+ f54->report_size = 0;
+ f54->data_pos = 0;
+
+ hrtimer_start(&f54->watchdog,
+ ktime_set(GET_REPORT_TIMEOUT_S, 0),
+ HRTIMER_MODE_REL);
+
+ retval = count;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_resume_touch_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char device_ctrl;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (setting != 1)
+ return -EINVAL;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to restore no sleep setting\n",
+ __func__);
+ return retval;
+ }
+
+ device_ctrl = device_ctrl & ~NO_SLEEP_ON;
+ device_ctrl |= rmi4_data->no_sleep_setting;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ rmi4_data->f01_ctrl_base_addr,
+ &device_ctrl,
+ sizeof(device_ctrl));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to restore no sleep setting\n",
+ __func__);
+ return retval;
+ }
+
+ test_set_interrupt(false);
+
+ if (f54->skip_preparation)
+ return count;
+
+ switch (f54->report_type) {
+ case F54_16BIT_IMAGE:
+ case F54_RAW_16BIT_IMAGE:
+ case F54_SENSOR_SPEED:
+ case F54_ADC_RANGE:
+ case F54_ABS_RAW_CAP:
+ case F54_ABS_DELTA_CAP:
+ case F54_ABS_HYBRID_DELTA_CAP:
+ case F54_ABS_HYBRID_RAW_CAP:
+ case F54_FULL_RAW_CAP_TDDI:
+ break;
+ case F54_AMP_RAW_ADC:
+ if (f54->query_49.has_ctrl188) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set start production test\n",
+ __func__);
+ return retval;
+ }
+ f54->control.reg_188->start_production_test = 0;
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control.reg_188->address,
+ f54->control.reg_188->data,
+ sizeof(f54->control.reg_188->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set start production test\n",
+ __func__);
+ return retval;
+ }
+ }
+ break;
+ default:
+ rmi4_data->reset_device(rmi4_data, false);
+ }
+
+ return count;
+}
+
+static ssize_t test_sysfs_do_afe_calibration_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (!f54->query_49.has_ctrl188) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: F54_ANALOG_Ctrl188 not found\n",
+ __func__);
+ return -EINVAL;
+ }
+
+ if (setting == 0 || setting == 1)
+ retval = test_do_afe_calibration((enum f54_afe_cal)setting);
+ else
+ return -EINVAL;
+
+ if (retval)
+ return retval;
+ else
+ return count;
+}
+
+static ssize_t test_sysfs_report_type_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->report_type);
+}
+
+static ssize_t test_sysfs_report_type_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char data;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = test_check_for_idle_status();
+ if (retval < 0)
+ goto exit;
+
+ if (!test_report_type_valid((enum f54_report_types)setting)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Report type not supported by driver\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ f54->report_type = (enum f54_report_types)setting;
+ data = (unsigned char)setting;
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->data_base_addr,
+ &data,
+ sizeof(data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write report type\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = count;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_fifoindex_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ int retval;
+ unsigned char data[2];
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->data_base_addr + REPORT_INDEX_OFFSET,
+ data,
+ sizeof(data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read report index\n",
+ __func__);
+ return retval;
+ }
+
+ batohs(&f54->fifoindex, data);
+
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->fifoindex);
+}
+
+static ssize_t test_sysfs_fifoindex_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char data[2];
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ f54->fifoindex = setting;
+
+ hstoba(data, (unsigned short)setting);
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->data_base_addr + REPORT_INDEX_OFFSET,
+ data,
+ sizeof(data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write report index\n",
+ __func__);
+ return retval;
+ }
+
+ return count;
+}
+
+static ssize_t test_sysfs_no_auto_cal_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ return snprintf(buf, PAGE_SIZE, "%u\n", f54->no_auto_cal);
+}
+
+static ssize_t test_sysfs_no_auto_cal_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char data;
+ unsigned long setting;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = sstrtoul(buf, 10, &setting);
+ if (retval)
+ return retval;
+
+ if (setting > 1)
+ return -EINVAL;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control_base_addr,
+ &data,
+ sizeof(data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read no auto cal setting\n",
+ __func__);
+ return retval;
+ }
+
+ if (setting)
+ data |= CONTROL_NO_AUTO_CAL;
+ else
+ data &= ~CONTROL_NO_AUTO_CAL;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->control_base_addr,
+ &data,
+ sizeof(data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write no auto cal setting\n",
+ __func__);
+ return retval;
+ }
+
+ f54->no_auto_cal = (setting == 1);
+
+ return count;
+}
+
+static ssize_t test_sysfs_read_report_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ unsigned int ii;
+ unsigned int jj;
+ int cnt;
+ int count = 0;
+ int tx_num = f54->tx_assigned;
+ int rx_num = f54->rx_assigned;
+ char *report_data_8;
+ short *report_data_16;
+ int *report_data_32;
+ unsigned short *report_data_u16;
+ unsigned int *report_data_u32;
+
+ switch (f54->report_type) {
+ case F54_8BIT_IMAGE:
+ report_data_8 = (char *)f54->report_data;
+ for (ii = 0; ii < f54->report_size; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%03d: %d\n",
+ ii, *report_data_8);
+ report_data_8++;
+ buf += cnt;
+ count += cnt;
+ }
+ break;
+ case F54_AMP_RAW_ADC:
+ report_data_u16 = (unsigned short *)f54->report_data;
+ cnt = snprintf(buf, PAGE_SIZE - count, "tx = %d\nrx = %d\n",
+ tx_num, rx_num);
+ buf += cnt;
+ count += cnt;
+
+ for (ii = 0; ii < tx_num; ii++) {
+ for (jj = 0; jj < (rx_num - 1); jj++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%-4d ",
+ *report_data_u16);
+ report_data_u16++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "%-4d\n",
+ *report_data_u16);
+ report_data_u16++;
+ buf += cnt;
+ count += cnt;
+ }
+ break;
+ case F54_16BIT_IMAGE:
+ case F54_RAW_16BIT_IMAGE:
+ case F54_TRUE_BASELINE:
+ case F54_FULL_RAW_CAP:
+ case F54_FULL_RAW_CAP_NO_RX_COUPLING:
+ case F54_SENSOR_SPEED:
+ case F54_AMP_FULL_RAW_CAP:
+ case F54_FULL_RAW_CAP_TDDI:
+ report_data_16 = (short *)f54->report_data;
+ cnt = snprintf(buf, PAGE_SIZE - count, "tx = %d\nrx = %d\n",
+ tx_num, rx_num);
+ buf += cnt;
+ count += cnt;
+
+ for (ii = 0; ii < tx_num; ii++) {
+ for (jj = 0; jj < (rx_num - 1); jj++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%-4d ",
+ *report_data_16);
+ report_data_16++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "%-4d\n",
+ *report_data_16);
+ report_data_16++;
+ buf += cnt;
+ count += cnt;
+ }
+ break;
+ case F54_HIGH_RESISTANCE:
+ case F54_FULL_RAW_CAP_MIN_MAX:
+ report_data_16 = (short *)f54->report_data;
+ for (ii = 0; ii < f54->report_size; ii += 2) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%03d: %d\n",
+ ii / 2, *report_data_16);
+ report_data_16++;
+ buf += cnt;
+ count += cnt;
+ }
+ break;
+ case F54_ABS_RAW_CAP:
+ case F54_ABS_HYBRID_RAW_CAP:
+ tx_num += f21->tx_assigned;
+ rx_num += f21->rx_assigned;
+ report_data_u32 = (unsigned int *)f54->report_data;
+ cnt = snprintf(buf, PAGE_SIZE - count, "rx ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < rx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %2d", ii);
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, " ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < rx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %5u",
+ *report_data_u32);
+ report_data_u32++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, "tx ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < tx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %2d", ii);
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, " ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < tx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %5u",
+ *report_data_u32);
+ report_data_u32++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+ break;
+ case F54_ABS_DELTA_CAP:
+ case F54_ABS_HYBRID_DELTA_CAP:
+ tx_num += f21->tx_assigned;
+ rx_num += f21->rx_assigned;
+ report_data_32 = (int *)f54->report_data;
+ cnt = snprintf(buf, PAGE_SIZE - count, "rx ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < rx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %2d", ii);
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, " ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < rx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %5d",
+ *report_data_32);
+ report_data_32++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, "tx ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < tx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %2d", ii);
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+
+ cnt = snprintf(buf, PAGE_SIZE - count, " ");
+ buf += cnt;
+ count += cnt;
+ for (ii = 0; ii < tx_num; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, " %5d",
+ *report_data_32);
+ report_data_32++;
+ buf += cnt;
+ count += cnt;
+ }
+ cnt = snprintf(buf, PAGE_SIZE - count, "\n");
+ buf += cnt;
+ count += cnt;
+ break;
+ default:
+ for (ii = 0; ii < f54->report_size; ii++) {
+ cnt = snprintf(buf, PAGE_SIZE - count, "%03d: 0x%02x\n",
+ ii, f54->report_data[ii]);
+ buf += cnt;
+ count += cnt;
+ }
+ }
+
+ snprintf(buf, PAGE_SIZE - count, "\n");
+ count++;
+
+ return count;
+}
+
+static ssize_t test_sysfs_read_report_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned char timeout = GET_REPORT_TIMEOUT_S * 10;
+ unsigned char timeout_count;
+ const char cmd[] = {'1', 0};
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = test_sysfs_report_type_store(dev, attr, buf, count);
+ if (retval < 0)
+ goto exit;
+
+ retval = test_sysfs_do_preparation_store(dev, attr, cmd, 1);
+ if (retval < 0)
+ goto exit;
+
+ retval = test_sysfs_get_report_store(dev, attr, cmd, 1);
+ if (retval < 0)
+ goto exit;
+
+ timeout_count = 0;
+ do {
+ if (f54->status != STATUS_BUSY)
+ break;
+ msleep(100);
+ timeout_count++;
+ } while (timeout_count < timeout);
+
+ if ((f54->status != STATUS_IDLE) || (f54->report_size == 0)) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read report\n",
+ __func__);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ retval = test_sysfs_resume_touch_store(dev, attr, cmd, 1);
+ if (retval < 0)
+ goto exit;
+
+ return count;
+
+exit:
+ rmi4_data->reset_device(rmi4_data, false);
+
+ return retval;
+}
+
+static ssize_t test_sysfs_data_read(struct file *data_file,
+ struct kobject *kobj, struct bin_attribute *attributes,
+ char *buf, loff_t pos, size_t count)
+{
+ int retval;
+ unsigned int read_size;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ mutex_lock(&f54->status_mutex);
+
+ retval = test_check_for_idle_status();
+ if (retval < 0)
+ goto exit;
+
+ if (!f54->report_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Report type %d data not available\n",
+ __func__, f54->report_type);
+ retval = -EINVAL;
+ goto exit;
+ }
+
+ if ((f54->data_pos + count) > f54->report_size)
+ read_size = f54->report_size - f54->data_pos;
+ else
+ read_size = min_t(unsigned int, count, f54->report_size);
+
+ retval = secure_memcpy(buf, count, f54->report_data + f54->data_pos,
+ f54->data_buffer_size - f54->data_pos, read_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to copy report data\n",
+ __func__);
+ goto exit;
+ }
+ f54->data_pos += read_size;
+ retval = read_size;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ return retval;
+}
+
+static void test_report_work(struct work_struct *work)
+{
+ int retval;
+ unsigned char report_index[2];
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ mutex_lock(&f54->status_mutex);
+
+ if (f54->status != STATUS_BUSY) {
+ retval = f54->status;
+ goto exit;
+ }
+
+ retval = test_wait_for_command_completion();
+ if (retval < 0) {
+ retval = STATUS_ERROR;
+ goto exit;
+ }
+
+ test_set_report_size();
+ if (f54->report_size == 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Report data size = 0\n",
+ __func__);
+ retval = STATUS_ERROR;
+ goto exit;
+ }
+
+ if (f54->data_buffer_size < f54->report_size) {
+ if (f54->data_buffer_size)
+ kfree(f54->report_data);
+ f54->report_data = kzalloc(f54->report_size, GFP_KERNEL);
+ if (!f54->report_data) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for data buffer\n",
+ __func__);
+ f54->data_buffer_size = 0;
+ retval = STATUS_ERROR;
+ goto exit;
+ }
+ f54->data_buffer_size = f54->report_size;
+ }
+
+ report_index[0] = 0;
+ report_index[1] = 0;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ f54->data_base_addr + REPORT_INDEX_OFFSET,
+ report_index,
+ sizeof(report_index));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to write report data index\n",
+ __func__);
+ retval = STATUS_ERROR;
+ goto exit;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->data_base_addr + REPORT_DATA_OFFSET,
+ f54->report_data,
+ f54->report_size);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read report data\n",
+ __func__);
+ retval = STATUS_ERROR;
+ goto exit;
+ }
+
+ retval = STATUS_IDLE;
+
+exit:
+ mutex_unlock(&f54->status_mutex);
+
+ if (retval == STATUS_ERROR)
+ f54->report_size = 0;
+
+ f54->status = retval;
+
+ return;
+}
+
+static void test_remove_sysfs(void)
+{
+ sysfs_remove_group(f54->sysfs_dir, &attr_group);
+ sysfs_remove_bin_file(f54->sysfs_dir, &test_report_data);
+ kobject_put(f54->sysfs_dir);
+
+ return;
+}
+
+static int test_set_sysfs(void)
+{
+ int retval;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ f54->sysfs_dir = kobject_create_and_add(SYSFS_FOLDER_NAME,
+ &rmi4_data->input_dev->dev.kobj);
+ if (!f54->sysfs_dir) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs directory\n",
+ __func__);
+ goto exit_directory;
+ }
+
+ retval = sysfs_create_bin_file(f54->sysfs_dir, &test_report_data);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs bin file\n",
+ __func__);
+ goto exit_bin_file;
+ }
+
+ retval = sysfs_create_group(f54->sysfs_dir, &attr_group);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ goto exit_attributes;
+ }
+
+ return 0;
+
+exit_attributes:
+ sysfs_remove_group(f54->sysfs_dir, &attr_group);
+ sysfs_remove_bin_file(f54->sysfs_dir, &test_report_data);
+
+exit_bin_file:
+ kobject_put(f54->sysfs_dir);
+
+exit_directory:
+ return -ENODEV;
+}
+
+static void test_free_control_mem(void)
+{
+ struct f54_control control = f54->control;
+
+ kfree(control.reg_7);
+ kfree(control.reg_41);
+ kfree(control.reg_57);
+ kfree(control.reg_86);
+ kfree(control.reg_88);
+ kfree(control.reg_110);
+ kfree(control.reg_149);
+ kfree(control.reg_188);
+
+ return;
+}
+
+static void test_set_data(void)
+{
+ unsigned short reg_addr;
+
+ reg_addr = f54->data_base_addr + REPORT_DATA_OFFSET + 1;
+
+ /* data 4 */
+ if (f54->query.has_sense_frequency_control)
+ reg_addr++;
+
+ /* data 5 reserved */
+
+ /* data 6 */
+ if (f54->query.has_interference_metric)
+ reg_addr += 2;
+
+ /* data 7 */
+ if (f54->query.has_one_byte_report_rate |
+ f54->query.has_two_byte_report_rate)
+ reg_addr++;
+ if (f54->query.has_two_byte_report_rate)
+ reg_addr++;
+
+ /* data 8 */
+ if (f54->query.has_variance_metric)
+ reg_addr += 2;
+
+ /* data 9 */
+ if (f54->query.has_multi_metric_state_machine)
+ reg_addr += 2;
+
+ /* data 10 */
+ if (f54->query.has_multi_metric_state_machine |
+ f54->query.has_noise_state)
+ reg_addr++;
+
+ /* data 11 */
+ if (f54->query.has_status)
+ reg_addr++;
+
+ /* data 12 */
+ if (f54->query.has_slew_metric)
+ reg_addr += 2;
+
+ /* data 13 */
+ if (f54->query.has_multi_metric_state_machine)
+ reg_addr += 2;
+
+ /* data 14 */
+ if (f54->query_13.has_cidim)
+ reg_addr++;
+
+ /* data 15 */
+ if (f54->query_13.has_rail_im)
+ reg_addr++;
+
+ /* data 16 */
+ if (f54->query_13.has_noise_mitigation_enhancement)
+ reg_addr++;
+
+ /* data 17 */
+ if (f54->query_16.has_data17)
+ reg_addr++;
+
+ /* data 18 */
+ if (f54->query_21.has_query24_data18)
+ reg_addr++;
+
+ /* data 19 */
+ if (f54->query_21.has_data19)
+ reg_addr++;
+
+ /* data_20 */
+ if (f54->query_25.has_ctrl109)
+ reg_addr++;
+
+ /* data 21 */
+ if (f54->query_27.has_data21)
+ reg_addr++;
+
+ /* data 22 */
+ if (f54->query_27.has_data22)
+ reg_addr++;
+
+ /* data 23 */
+ if (f54->query_29.has_data23)
+ reg_addr++;
+
+ /* data 24 */
+ if (f54->query_32.has_data24)
+ reg_addr++;
+
+ /* data 25 */
+ if (f54->query_35.has_data25)
+ reg_addr++;
+
+ /* data 26 */
+ if (f54->query_35.has_data26)
+ reg_addr++;
+
+ /* data 27 */
+ if (f54->query_46.has_data27)
+ reg_addr++;
+
+ /* data 28 */
+ if (f54->query_46.has_data28)
+ reg_addr++;
+
+ /* data 29 30 reserved */
+
+ /* data 31 */
+ if (f54->query_49.has_data31) {
+ f54->data_31.address = reg_addr;
+ reg_addr++;
+ }
+
+ return;
+}
+
+static int test_set_controls(void)
+{
+ int retval;
+ unsigned char length;
+ unsigned char num_of_sensing_freqs;
+ unsigned short reg_addr = f54->control_base_addr;
+ struct f54_control *control = &f54->control;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ num_of_sensing_freqs = f54->query.number_of_sensing_frequencies;
+
+ /* control 0 */
+ reg_addr += CONTROL_0_SIZE;
+
+ /* control 1 */
+ if ((f54->query.touch_controller_family == 0) ||
+ (f54->query.touch_controller_family == 1))
+ reg_addr += CONTROL_1_SIZE;
+
+ /* control 2 */
+ reg_addr += CONTROL_2_SIZE;
+
+ /* control 3 */
+ if (f54->query.has_pixel_touch_threshold_adjustment)
+ reg_addr += CONTROL_3_SIZE;
+
+ /* controls 4 5 6 */
+ if ((f54->query.touch_controller_family == 0) ||
+ (f54->query.touch_controller_family == 1))
+ reg_addr += CONTROL_4_6_SIZE;
+
+ /* control 7 */
+ if (f54->query.touch_controller_family == 1) {
+ control->reg_7 = kzalloc(sizeof(*(control->reg_7)),
+ GFP_KERNEL);
+ if (!control->reg_7)
+ goto exit_no_mem;
+ control->reg_7->address = reg_addr;
+ reg_addr += CONTROL_7_SIZE;
+ }
+
+ /* controls 8 9 */
+ if ((f54->query.touch_controller_family == 0) ||
+ (f54->query.touch_controller_family == 1))
+ reg_addr += CONTROL_8_9_SIZE;
+
+ /* control 10 */
+ if (f54->query.has_interference_metric)
+ reg_addr += CONTROL_10_SIZE;
+
+ /* control 11 */
+ if (f54->query.has_ctrl11)
+ reg_addr += CONTROL_11_SIZE;
+
+ /* controls 12 13 */
+ if (f54->query.has_relaxation_control)
+ reg_addr += CONTROL_12_13_SIZE;
+
+ /* controls 14 15 16 */
+ if (f54->query.has_sensor_assignment) {
+ reg_addr += CONTROL_14_SIZE;
+ reg_addr += CONTROL_15_SIZE * f54->query.num_of_rx_electrodes;
+ reg_addr += CONTROL_16_SIZE * f54->query.num_of_tx_electrodes;
+ }
+
+ /* controls 17 18 19 */
+ if (f54->query.has_sense_frequency_control) {
+ reg_addr += CONTROL_17_SIZE * num_of_sensing_freqs;
+ reg_addr += CONTROL_18_SIZE * num_of_sensing_freqs;
+ reg_addr += CONTROL_19_SIZE * num_of_sensing_freqs;
+ }
+
+ /* control 20 */
+ reg_addr += CONTROL_20_SIZE;
+
+ /* control 21 */
+ if (f54->query.has_sense_frequency_control)
+ reg_addr += CONTROL_21_SIZE;
+
+ /* controls 22 23 24 25 26 */
+ if (f54->query.has_firmware_noise_mitigation)
+ reg_addr += CONTROL_22_26_SIZE;
+
+ /* control 27 */
+ if (f54->query.has_iir_filter)
+ reg_addr += CONTROL_27_SIZE;
+
+ /* control 28 */
+ if (f54->query.has_firmware_noise_mitigation)
+ reg_addr += CONTROL_28_SIZE;
+
+ /* control 29 */
+ if (f54->query.has_cmn_removal)
+ reg_addr += CONTROL_29_SIZE;
+
+ /* control 30 */
+ if (f54->query.has_cmn_maximum)
+ reg_addr += CONTROL_30_SIZE;
+
+ /* control 31 */
+ if (f54->query.has_touch_hysteresis)
+ reg_addr += CONTROL_31_SIZE;
+
+ /* controls 32 33 34 35 */
+ if (f54->query.has_edge_compensation)
+ reg_addr += CONTROL_32_35_SIZE;
+
+ /* control 36 */
+ if ((f54->query.curve_compensation_mode == 1) ||
+ (f54->query.curve_compensation_mode == 2)) {
+ if (f54->query.curve_compensation_mode == 1) {
+ length = max(f54->query.num_of_rx_electrodes,
+ f54->query.num_of_tx_electrodes);
+ } else if (f54->query.curve_compensation_mode == 2) {
+ length = f54->query.num_of_rx_electrodes;
+ }
+ reg_addr += CONTROL_36_SIZE * length;
+ }
+
+ /* control 37 */
+ if (f54->query.curve_compensation_mode == 2)
+ reg_addr += CONTROL_37_SIZE * f54->query.num_of_tx_electrodes;
+
+ /* controls 38 39 40 */
+ if (f54->query.has_per_frequency_noise_control) {
+ reg_addr += CONTROL_38_SIZE * num_of_sensing_freqs;
+ reg_addr += CONTROL_39_SIZE * num_of_sensing_freqs;
+ reg_addr += CONTROL_40_SIZE * num_of_sensing_freqs;
+ }
+
+ /* control 41 */
+ if (f54->query.has_signal_clarity) {
+ control->reg_41 = kzalloc(sizeof(*(control->reg_41)),
+ GFP_KERNEL);
+ if (!control->reg_41)
+ goto exit_no_mem;
+ control->reg_41->address = reg_addr;
+ reg_addr += CONTROL_41_SIZE;
+ }
+
+ /* control 42 */
+ if (f54->query.has_variance_metric)
+ reg_addr += CONTROL_42_SIZE;
+
+ /* controls 43 44 45 46 47 48 49 50 51 52 53 54 */
+ if (f54->query.has_multi_metric_state_machine)
+ reg_addr += CONTROL_43_54_SIZE;
+
+ /* controls 55 56 */
+ if (f54->query.has_0d_relaxation_control)
+ reg_addr += CONTROL_55_56_SIZE;
+
+ /* control 57 */
+ if (f54->query.has_0d_acquisition_control) {
+ control->reg_57 = kzalloc(sizeof(*(control->reg_57)),
+ GFP_KERNEL);
+ if (!control->reg_57)
+ goto exit_no_mem;
+ control->reg_57->address = reg_addr;
+ reg_addr += CONTROL_57_SIZE;
+ }
+
+ /* control 58 */
+ if (f54->query.has_0d_acquisition_control)
+ reg_addr += CONTROL_58_SIZE;
+
+ /* control 59 */
+ if (f54->query.has_h_blank)
+ reg_addr += CONTROL_59_SIZE;
+
+ /* controls 60 61 62 */
+ if ((f54->query.has_h_blank) ||
+ (f54->query.has_v_blank) ||
+ (f54->query.has_long_h_blank))
+ reg_addr += CONTROL_60_62_SIZE;
+
+ /* control 63 */
+ if ((f54->query.has_h_blank) ||
+ (f54->query.has_v_blank) ||
+ (f54->query.has_long_h_blank) ||
+ (f54->query.has_slew_metric) ||
+ (f54->query.has_slew_option) ||
+ (f54->query.has_noise_mitigation2))
+ reg_addr += CONTROL_63_SIZE;
+
+ /* controls 64 65 66 67 */
+ if (f54->query.has_h_blank)
+ reg_addr += CONTROL_64_67_SIZE * 7;
+ else if ((f54->query.has_v_blank) ||
+ (f54->query.has_long_h_blank))
+ reg_addr += CONTROL_64_67_SIZE;
+
+ /* controls 68 69 70 71 72 73 */
+ if ((f54->query.has_h_blank) ||
+ (f54->query.has_v_blank) ||
+ (f54->query.has_long_h_blank)) {
+ if (f54->query_68.is_tddi_hic)
+ reg_addr += CONTROL_70_73_SIZE;
+ else
+ reg_addr += CONTROL_68_73_SIZE;
+ }
+
+ /* control 74 */
+ if (f54->query.has_slew_metric)
+ reg_addr += CONTROL_74_SIZE;
+
+ /* control 75 */
+ if (f54->query.has_enhanced_stretch)
+ reg_addr += CONTROL_75_SIZE * num_of_sensing_freqs;
+
+ /* control 76 */
+ if (f54->query.has_startup_fast_relaxation)
+ reg_addr += CONTROL_76_SIZE;
+
+ /* controls 77 78 */
+ if (f54->query.has_esd_control)
+ reg_addr += CONTROL_77_78_SIZE;
+
+ /* controls 79 80 81 82 83 */
+ if (f54->query.has_noise_mitigation2)
+ reg_addr += CONTROL_79_83_SIZE;
+
+ /* controls 84 85 */
+ if (f54->query.has_energy_ratio_relaxation)
+ reg_addr += CONTROL_84_85_SIZE;
+
+ /* control 86 */
+ if (f54->query_13.has_ctrl86) {
+ control->reg_86 = kzalloc(sizeof(*(control->reg_86)),
+ GFP_KERNEL);
+ if (!control->reg_86)
+ goto exit_no_mem;
+ control->reg_86->address = reg_addr;
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->control.reg_86->address,
+ f54->control.reg_86->data,
+ sizeof(f54->control.reg_86->data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read sense display ratio\n",
+ __func__);
+ return retval;
+ }
+ reg_addr += CONTROL_86_SIZE;
+ }
+
+ /* control 87 */
+ if (f54->query_13.has_ctrl87)
+ reg_addr += CONTROL_87_SIZE;
+
+ /* control 88 */
+ if (f54->query.has_ctrl88) {
+ control->reg_88 = kzalloc(sizeof(*(control->reg_88)),
+ GFP_KERNEL);
+ if (!control->reg_88)
+ goto exit_no_mem;
+ control->reg_88->address = reg_addr;
+ reg_addr += CONTROL_88_SIZE;
+ }
+
+ /* control 89 */
+ if (f54->query_13.has_cidim ||
+ f54->query_13.has_noise_mitigation_enhancement ||
+ f54->query_13.has_rail_im)
+ reg_addr += CONTROL_89_SIZE;
+
+ /* control 90 */
+ if (f54->query_15.has_ctrl90)
+ reg_addr += CONTROL_90_SIZE;
+
+ /* control 91 */
+ if (f54->query_21.has_ctrl91)
+ reg_addr += CONTROL_91_SIZE;
+
+ /* control 92 */
+ if (f54->query_16.has_ctrl92)
+ reg_addr += CONTROL_92_SIZE;
+
+ /* control 93 */
+ if (f54->query_16.has_ctrl93)
+ reg_addr += CONTROL_93_SIZE;
+
+ /* control 94 */
+ if (f54->query_16.has_ctrl94_query18)
+ reg_addr += CONTROL_94_SIZE;
+
+ /* control 95 */
+ if (f54->query_16.has_ctrl95_query19)
+ reg_addr += CONTROL_95_SIZE;
+
+ /* control 96 */
+ if (f54->query_21.has_ctrl96)
+ reg_addr += CONTROL_96_SIZE;
+
+ /* control 97 */
+ if (f54->query_21.has_ctrl97)
+ reg_addr += CONTROL_97_SIZE;
+
+ /* control 98 */
+ if (f54->query_21.has_ctrl98)
+ reg_addr += CONTROL_98_SIZE;
+
+ /* control 99 */
+ if (f54->query.touch_controller_family == 2)
+ reg_addr += CONTROL_99_SIZE;
+
+ /* control 100 */
+ if (f54->query_16.has_ctrl100)
+ reg_addr += CONTROL_100_SIZE;
+
+ /* control 101 */
+ if (f54->query_22.has_ctrl101)
+ reg_addr += CONTROL_101_SIZE;
+
+ /* control 102 */
+ if (f54->query_23.has_ctrl102)
+ reg_addr += CONTROL_102_SIZE;
+
+ /* control 103 */
+ if (f54->query_22.has_ctrl103_query26) {
+ f54->skip_preparation = true;
+ reg_addr += CONTROL_103_SIZE;
+ }
+
+ /* control 104 */
+ if (f54->query_22.has_ctrl104)
+ reg_addr += CONTROL_104_SIZE;
+
+ /* control 105 */
+ if (f54->query_22.has_ctrl105)
+ reg_addr += CONTROL_105_SIZE;
+
+ /* control 106 */
+ if (f54->query_25.has_ctrl106)
+ reg_addr += CONTROL_106_SIZE;
+
+ /* control 107 */
+ if (f54->query_25.has_ctrl107)
+ reg_addr += CONTROL_107_SIZE;
+
+ /* control 108 */
+ if (f54->query_25.has_ctrl108)
+ reg_addr += CONTROL_108_SIZE;
+
+ /* control 109 */
+ if (f54->query_25.has_ctrl109)
+ reg_addr += CONTROL_109_SIZE;
+
+ /* control 110 */
+ if (f54->query_27.has_ctrl110) {
+ control->reg_110 = kzalloc(sizeof(*(control->reg_110)),
+ GFP_KERNEL);
+ if (!control->reg_110)
+ goto exit_no_mem;
+ control->reg_110->address = reg_addr;
+ reg_addr += CONTROL_110_SIZE;
+ }
+
+ /* control 111 */
+ if (f54->query_27.has_ctrl111)
+ reg_addr += CONTROL_111_SIZE;
+
+ /* control 112 */
+ if (f54->query_27.has_ctrl112)
+ reg_addr += CONTROL_112_SIZE;
+
+ /* control 113 */
+ if (f54->query_27.has_ctrl113)
+ reg_addr += CONTROL_113_SIZE;
+
+ /* control 114 */
+ if (f54->query_27.has_ctrl114)
+ reg_addr += CONTROL_114_SIZE;
+
+ /* control 115 */
+ if (f54->query_29.has_ctrl115)
+ reg_addr += CONTROL_115_SIZE;
+
+ /* control 116 */
+ if (f54->query_29.has_ctrl116)
+ reg_addr += CONTROL_116_SIZE;
+
+ /* control 117 */
+ if (f54->query_29.has_ctrl117)
+ reg_addr += CONTROL_117_SIZE;
+
+ /* control 118 */
+ if (f54->query_30.has_ctrl118)
+ reg_addr += CONTROL_118_SIZE;
+
+ /* control 119 */
+ if (f54->query_30.has_ctrl119)
+ reg_addr += CONTROL_119_SIZE;
+
+ /* control 120 */
+ if (f54->query_30.has_ctrl120)
+ reg_addr += CONTROL_120_SIZE;
+
+ /* control 121 */
+ if (f54->query_30.has_ctrl121)
+ reg_addr += CONTROL_121_SIZE;
+
+ /* control 122 */
+ if (f54->query_30.has_ctrl122_query31)
+ reg_addr += CONTROL_122_SIZE;
+
+ /* control 123 */
+ if (f54->query_30.has_ctrl123)
+ reg_addr += CONTROL_123_SIZE;
+
+ /* control 124 */
+ if (f54->query_30.has_ctrl124)
+ reg_addr += CONTROL_124_SIZE;
+
+ /* control 125 */
+ if (f54->query_32.has_ctrl125)
+ reg_addr += CONTROL_125_SIZE;
+
+ /* control 126 */
+ if (f54->query_32.has_ctrl126)
+ reg_addr += CONTROL_126_SIZE;
+
+ /* control 127 */
+ if (f54->query_32.has_ctrl127)
+ reg_addr += CONTROL_127_SIZE;
+
+ /* control 128 */
+ if (f54->query_33.has_ctrl128)
+ reg_addr += CONTROL_128_SIZE;
+
+ /* control 129 */
+ if (f54->query_33.has_ctrl129)
+ reg_addr += CONTROL_129_SIZE;
+
+ /* control 130 */
+ if (f54->query_33.has_ctrl130)
+ reg_addr += CONTROL_130_SIZE;
+
+ /* control 131 */
+ if (f54->query_33.has_ctrl131)
+ reg_addr += CONTROL_131_SIZE;
+
+ /* control 132 */
+ if (f54->query_33.has_ctrl132)
+ reg_addr += CONTROL_132_SIZE;
+
+ /* control 133 */
+ if (f54->query_33.has_ctrl133)
+ reg_addr += CONTROL_133_SIZE;
+
+ /* control 134 */
+ if (f54->query_33.has_ctrl134)
+ reg_addr += CONTROL_134_SIZE;
+
+ /* control 135 */
+ if (f54->query_35.has_ctrl135)
+ reg_addr += CONTROL_135_SIZE;
+
+ /* control 136 */
+ if (f54->query_35.has_ctrl136)
+ reg_addr += CONTROL_136_SIZE;
+
+ /* control 137 */
+ if (f54->query_35.has_ctrl137)
+ reg_addr += CONTROL_137_SIZE;
+
+ /* control 138 */
+ if (f54->query_35.has_ctrl138)
+ reg_addr += CONTROL_138_SIZE;
+
+ /* control 139 */
+ if (f54->query_35.has_ctrl139)
+ reg_addr += CONTROL_139_SIZE;
+
+ /* control 140 */
+ if (f54->query_35.has_ctrl140)
+ reg_addr += CONTROL_140_SIZE;
+
+ /* control 141 */
+ if (f54->query_36.has_ctrl141)
+ reg_addr += CONTROL_141_SIZE;
+
+ /* control 142 */
+ if (f54->query_36.has_ctrl142)
+ reg_addr += CONTROL_142_SIZE;
+
+ /* control 143 */
+ if (f54->query_36.has_ctrl143)
+ reg_addr += CONTROL_143_SIZE;
+
+ /* control 144 */
+ if (f54->query_36.has_ctrl144)
+ reg_addr += CONTROL_144_SIZE;
+
+ /* control 145 */
+ if (f54->query_36.has_ctrl145)
+ reg_addr += CONTROL_145_SIZE;
+
+ /* control 146 */
+ if (f54->query_36.has_ctrl146)
+ reg_addr += CONTROL_146_SIZE;
+
+ /* control 147 */
+ if (f54->query_38.has_ctrl147)
+ reg_addr += CONTROL_147_SIZE;
+
+ /* control 148 */
+ if (f54->query_38.has_ctrl148)
+ reg_addr += CONTROL_148_SIZE;
+
+ /* control 149 */
+ if (f54->query_38.has_ctrl149) {
+ control->reg_149 = kzalloc(sizeof(*(control->reg_149)),
+ GFP_KERNEL);
+ if (!control->reg_149)
+ goto exit_no_mem;
+ control->reg_149->address = reg_addr;
+ reg_addr += CONTROL_149_SIZE;
+ }
+
+ /* control 150 */
+ if (f54->query_38.has_ctrl150)
+ reg_addr += CONTROL_150_SIZE;
+
+ /* control 151 */
+ if (f54->query_38.has_ctrl151)
+ reg_addr += CONTROL_151_SIZE;
+
+ /* control 152 */
+ if (f54->query_38.has_ctrl152)
+ reg_addr += CONTROL_152_SIZE;
+
+ /* control 153 */
+ if (f54->query_38.has_ctrl153)
+ reg_addr += CONTROL_153_SIZE;
+
+ /* control 154 */
+ if (f54->query_39.has_ctrl154)
+ reg_addr += CONTROL_154_SIZE;
+
+ /* control 155 */
+ if (f54->query_39.has_ctrl155)
+ reg_addr += CONTROL_155_SIZE;
+
+ /* control 156 */
+ if (f54->query_39.has_ctrl156)
+ reg_addr += CONTROL_156_SIZE;
+
+ /* controls 157 158 */
+ if (f54->query_39.has_ctrl157_ctrl158)
+ reg_addr += CONTROL_157_158_SIZE;
+
+ /* controls 159 to 162 reserved */
+
+ /* control 163 */
+ if (f54->query_40.has_ctrl163_query41)
+ reg_addr += CONTROL_163_SIZE;
+
+ /* control 164 reserved */
+
+ /* control 165 */
+ if (f54->query_40.has_ctrl165_query42)
+ reg_addr += CONTROL_165_SIZE;
+
+ /* control 166 */
+ if (f54->query_40.has_ctrl166)
+ reg_addr += CONTROL_166_SIZE;
+
+ /* control 167 */
+ if (f54->query_40.has_ctrl167)
+ reg_addr += CONTROL_167_SIZE;
+
+ /* control 168 */
+ if (f54->query_40.has_ctrl168)
+ reg_addr += CONTROL_168_SIZE;
+
+ /* control 169 */
+ if (f54->query_40.has_ctrl169)
+ reg_addr += CONTROL_169_SIZE;
+
+ /* control 170 reserved */
+
+ /* control 171 */
+ if (f54->query_43.has_ctrl171)
+ reg_addr += CONTROL_171_SIZE;
+
+ /* control 172 */
+ if (f54->query_43.has_ctrl172_query44_query45)
+ reg_addr += CONTROL_172_SIZE;
+
+ /* control 173 */
+ if (f54->query_43.has_ctrl173)
+ reg_addr += CONTROL_173_SIZE;
+
+ /* control 174 */
+ if (f54->query_43.has_ctrl174)
+ reg_addr += CONTROL_174_SIZE;
+
+ /* control 175 */
+ if (f54->query_43.has_ctrl175)
+ reg_addr += CONTROL_175_SIZE;
+
+ /* control 176 */
+ if (f54->query_46.has_ctrl176)
+ reg_addr += CONTROL_176_SIZE;
+
+ /* controls 177 178 */
+ if (f54->query_46.has_ctrl177_ctrl178)
+ reg_addr += CONTROL_177_178_SIZE;
+
+ /* control 179 */
+ if (f54->query_46.has_ctrl179)
+ reg_addr += CONTROL_179_SIZE;
+
+ /* controls 180 to 181 reserved */
+
+ /* control 182 */
+ if (f54->query_47.has_ctrl182)
+ reg_addr += CONTROL_182_SIZE;
+
+ /* control 183 */
+ if (f54->query_47.has_ctrl183)
+ reg_addr += CONTROL_183_SIZE;
+
+ /* control 184 reserved */
+
+ /* control 185 */
+ if (f54->query_47.has_ctrl185)
+ reg_addr += CONTROL_185_SIZE;
+
+ /* control 186 */
+ if (f54->query_47.has_ctrl186)
+ reg_addr += CONTROL_186_SIZE;
+
+ /* control 187 */
+ if (f54->query_47.has_ctrl187)
+ reg_addr += CONTROL_187_SIZE;
+
+ /* control 188 */
+ if (f54->query_49.has_ctrl188) {
+ control->reg_188 = kzalloc(sizeof(*(control->reg_188)),
+ GFP_KERNEL);
+ if (!control->reg_188)
+ goto exit_no_mem;
+ control->reg_188->address = reg_addr;
+ reg_addr += CONTROL_188_SIZE;
+ }
+
+ return 0;
+
+exit_no_mem:
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for control registers\n",
+ __func__);
+ return -ENOMEM;
+}
+
+static int test_set_queries(void)
+{
+ int retval;
+ unsigned char offset;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr,
+ f54->query.data,
+ sizeof(f54->query.data));
+ if (retval < 0)
+ return retval;
+
+ offset = sizeof(f54->query.data);
+
+ /* query 12 */
+ if (f54->query.has_sense_frequency_control == 0)
+ offset -= 1;
+
+ /* query 13 */
+ if (f54->query.has_query13) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_13.data,
+ sizeof(f54->query_13.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 14 */
+ if (f54->query_13.has_ctrl87)
+ offset += 1;
+
+ /* query 15 */
+ if (f54->query.has_query15) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_15.data,
+ sizeof(f54->query_15.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 16 */
+ if (f54->query_15.has_query16) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_16.data,
+ sizeof(f54->query_16.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 17 */
+ if (f54->query_16.has_query17)
+ offset += 1;
+
+ /* query 18 */
+ if (f54->query_16.has_ctrl94_query18)
+ offset += 1;
+
+ /* query 19 */
+ if (f54->query_16.has_ctrl95_query19)
+ offset += 1;
+
+ /* query 20 */
+ if (f54->query_15.has_query20)
+ offset += 1;
+
+ /* query 21 */
+ if (f54->query_15.has_query21) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_21.data,
+ sizeof(f54->query_21.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 22 */
+ if (f54->query_15.has_query22) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_22.data,
+ sizeof(f54->query_22.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 23 */
+ if (f54->query_22.has_query23) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_23.data,
+ sizeof(f54->query_23.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 24 */
+ if (f54->query_21.has_query24_data18)
+ offset += 1;
+
+ /* query 25 */
+ if (f54->query_15.has_query25) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_25.data,
+ sizeof(f54->query_25.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 26 */
+ if (f54->query_22.has_ctrl103_query26)
+ offset += 1;
+
+ /* query 27 */
+ if (f54->query_25.has_query27) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_27.data,
+ sizeof(f54->query_27.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 28 */
+ if (f54->query_22.has_query28)
+ offset += 1;
+
+ /* query 29 */
+ if (f54->query_27.has_query29) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_29.data,
+ sizeof(f54->query_29.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 30 */
+ if (f54->query_29.has_query30) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_30.data,
+ sizeof(f54->query_30.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 31 */
+ if (f54->query_30.has_ctrl122_query31)
+ offset += 1;
+
+ /* query 32 */
+ if (f54->query_30.has_query32) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_32.data,
+ sizeof(f54->query_32.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 33 */
+ if (f54->query_32.has_query33) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_33.data,
+ sizeof(f54->query_33.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 34 */
+ if (f54->query_32.has_query34)
+ offset += 1;
+
+ /* query 35 */
+ if (f54->query_32.has_query35) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_35.data,
+ sizeof(f54->query_35.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 36 */
+ if (f54->query_33.has_query36) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_36.data,
+ sizeof(f54->query_36.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 37 */
+ if (f54->query_36.has_query37)
+ offset += 1;
+
+ /* query 38 */
+ if (f54->query_36.has_query38) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_38.data,
+ sizeof(f54->query_38.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 39 */
+ if (f54->query_38.has_query39) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_39.data,
+ sizeof(f54->query_39.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 40 */
+ if (f54->query_39.has_query40) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_40.data,
+ sizeof(f54->query_40.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 41 */
+ if (f54->query_40.has_ctrl163_query41)
+ offset += 1;
+
+ /* query 42 */
+ if (f54->query_40.has_ctrl165_query42)
+ offset += 1;
+
+ /* query 43 */
+ if (f54->query_40.has_query43) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_43.data,
+ sizeof(f54->query_43.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ if (f54->query_43.has_ctrl172_query44_query45)
+ offset += 2;
+
+ /* query 46 */
+ if (f54->query_43.has_query46) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_46.data,
+ sizeof(f54->query_46.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 47 */
+ if (f54->query_46.has_query47) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_47.data,
+ sizeof(f54->query_47.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 48 reserved */
+
+ /* query 49 */
+ if (f54->query_47.has_query49) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_49.data,
+ sizeof(f54->query_49.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 50 */
+ if (f54->query_49.has_query50) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_50.data,
+ sizeof(f54->query_50.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 51 */
+ if (f54->query_50.has_query51) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_51.data,
+ sizeof(f54->query_51.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 53 54 */
+ if (f54->query_51.has_query53_query54_ctrl198)
+ offset += 2;
+
+ /* query 55 */
+ if (f54->query_51.has_query55) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_55.data,
+ sizeof(f54->query_55.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 56 */
+ if (f54->query_55.has_query56)
+ offset += 1;
+
+ /* query 57 */
+ if (f54->query_55.has_query57) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_57.data,
+ sizeof(f54->query_57.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 58 */
+ if (f54->query_57.has_query58) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_58.data,
+ sizeof(f54->query_58.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 59 */
+ if (f54->query_58.has_query59)
+ offset += 1;
+
+ /* query 60 */
+ if (f54->query_58.has_query60)
+ offset += 1;
+
+ /* query 61 */
+ if (f54->query_58.has_query61) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_61.data,
+ sizeof(f54->query_61.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 62 63 */
+ if (f54->query_61.has_ctrl215_query62_query63)
+ offset += 2;
+
+ /* query 64 */
+ if (f54->query_61.has_query64) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_64.data,
+ sizeof(f54->query_64.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 65 */
+ if (f54->query_64.has_query65) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_65.data,
+ sizeof(f54->query_65.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 66 */
+ if (f54->query_65.has_query66_ctrl231)
+ offset += 1;
+
+ /* query 67 */
+ if (f54->query_65.has_query67) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_67.data,
+ sizeof(f54->query_67.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 68 */
+ if (f54->query_67.has_query68) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_68.data,
+ sizeof(f54->query_68.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 68 */
+ if (f54->query_68.has_query69) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f54->query_base_addr + offset,
+ f54->query_69.data,
+ sizeof(f54->query_69.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ return 0;
+}
+
+static void test_f54_set_regs(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned int intr_count,
+ unsigned char page)
+{
+ unsigned char ii;
+ unsigned char intr_offset;
+
+ f54->query_base_addr = fd->query_base_addr | (page << 8);
+ f54->control_base_addr = fd->ctrl_base_addr | (page << 8);
+ f54->data_base_addr = fd->data_base_addr | (page << 8);
+ f54->command_base_addr = fd->cmd_base_addr | (page << 8);
+
+ f54->intr_reg_num = (intr_count + 7) / 8;
+ if (f54->intr_reg_num != 0)
+ f54->intr_reg_num -= 1;
+
+ f54->intr_mask = 0;
+ intr_offset = intr_count % 8;
+ for (ii = intr_offset;
+ ii < (fd->intr_src_count + intr_offset);
+ ii++) {
+ f54->intr_mask |= 1 << ii;
+ }
+
+ return;
+}
+
+static int test_f55_set_controls(void)
+{
+ unsigned char offset = 0;
+
+ /* controls 0 1 2 */
+ if (f55->query.has_sensor_assignment)
+ offset += 3;
+
+ /* control 3 */
+ if (f55->query.has_edge_compensation)
+ offset++;
+
+ /* control 4 */
+ if (f55->query.curve_compensation_mode == 0x1 ||
+ f55->query.curve_compensation_mode == 0x2)
+ offset++;
+
+ /* control 5 */
+ if (f55->query.curve_compensation_mode == 0x2)
+ offset++;
+
+ /* control 6 */
+ if (f55->query.has_ctrl6)
+ offset++;
+
+ /* control 7 */
+ if (f55->query.has_alternate_transmitter_assignment)
+ offset++;
+
+ /* control 8 */
+ if (f55->query_3.has_ctrl8)
+ offset++;
+
+ /* control 9 */
+ if (f55->query_3.has_ctrl9)
+ offset++;
+
+ /* control 10 */
+ if (f55->query_5.has_corner_compensation)
+ offset++;
+
+ /* control 11 */
+ if (f55->query.curve_compensation_mode == 0x3)
+ offset++;
+
+ /* control 12 */
+ if (f55->query_5.has_ctrl12)
+ offset++;
+
+ /* control 13 */
+ if (f55->query_5.has_ctrl13)
+ offset++;
+
+ /* control 14 */
+ if (f55->query_5.has_ctrl14)
+ offset++;
+
+ /* control 15 */
+ if (f55->query_5.has_basis_function)
+ offset++;
+
+ /* control 16 */
+ if (f55->query_17.has_ctrl16)
+ offset++;
+
+ /* control 17 */
+ if (f55->query_17.has_ctrl17)
+ offset++;
+
+ /* controls 18 19 */
+ if (f55->query_17.has_ctrl18_ctrl19)
+ offset += 2;
+
+ /* control 20 */
+ if (f55->query_17.has_ctrl20)
+ offset++;
+
+ /* control 21 */
+ if (f55->query_17.has_ctrl21)
+ offset++;
+
+ /* control 22 */
+ if (f55->query_17.has_ctrl22)
+ offset++;
+
+ /* control 23 */
+ if (f55->query_18.has_ctrl23)
+ offset++;
+
+ /* control 24 */
+ if (f55->query_18.has_ctrl24)
+ offset++;
+
+ /* control 25 */
+ if (f55->query_18.has_ctrl25)
+ offset++;
+
+ /* control 26 */
+ if (f55->query_18.has_ctrl26)
+ offset++;
+
+ /* control 27 */
+ if (f55->query_18.has_ctrl27_query20)
+ offset++;
+
+ /* control 28 */
+ if (f55->query_18.has_ctrl28_query21)
+ offset++;
+
+ /* control 29 */
+ if (f55->query_22.has_ctrl29)
+ offset++;
+
+ /* control 30 */
+ if (f55->query_22.has_ctrl30)
+ offset++;
+
+ /* control 31 */
+ if (f55->query_22.has_ctrl31)
+ offset++;
+
+ /* control 32 */
+ if (f55->query_22.has_ctrl32)
+ offset++;
+
+ /* controls 33 34 35 36 reserved */
+
+ /* control 37 */
+ if (f55->query_28.has_ctrl37)
+ offset++;
+
+ /* control 38 */
+ if (f55->query_30.has_ctrl38)
+ offset++;
+
+ /* control 39 */
+ if (f55->query_30.has_ctrl39)
+ offset++;
+
+ /* control 40 */
+ if (f55->query_30.has_ctrl40)
+ offset++;
+
+ /* control 41 */
+ if (f55->query_30.has_ctrl41)
+ offset++;
+
+ /* control 42 */
+ if (f55->query_30.has_ctrl42)
+ offset++;
+
+ /* controls 43 44 */
+ if (f55->query_30.has_ctrl43_ctrl44) {
+ f55->afe_mux_offset = offset;
+ offset += 2;
+ }
+
+ /* controls 45 46 */
+ if (f55->query_33.has_ctrl45_ctrl46) {
+ f55->has_force = true;
+ f55->force_tx_offset = offset;
+ f55->force_rx_offset = offset + 1;
+ offset += 2;
+ }
+
+ return 0;
+}
+
+static int test_f55_set_queries(void)
+{
+ int retval;
+ unsigned char offset;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr,
+ f55->query.data,
+ sizeof(f55->query.data));
+ if (retval < 0)
+ return retval;
+
+ offset = sizeof(f55->query.data);
+
+ /* query 3 */
+ if (f55->query.has_single_layer_multi_touch) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_3.data,
+ sizeof(f55->query_3.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 4 */
+ if (f55->query_3.has_ctrl9)
+ offset += 1;
+
+ /* query 5 */
+ if (f55->query.has_query5) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_5.data,
+ sizeof(f55->query_5.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* queries 6 7 */
+ if (f55->query.curve_compensation_mode == 0x3)
+ offset += 2;
+
+ /* query 8 */
+ if (f55->query_3.has_ctrl8)
+ offset += 1;
+
+ /* query 9 */
+ if (f55->query_3.has_query9)
+ offset += 1;
+
+ /* queries 10 11 12 13 14 15 16 */
+ if (f55->query_5.has_basis_function)
+ offset += 7;
+
+ /* query 17 */
+ if (f55->query_5.has_query17) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_17.data,
+ sizeof(f55->query_17.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 18 */
+ if (f55->query_17.has_query18) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_18.data,
+ sizeof(f55->query_18.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 19 */
+ if (f55->query_18.has_query19)
+ offset += 1;
+
+ /* query 20 */
+ if (f55->query_18.has_ctrl27_query20)
+ offset += 1;
+
+ /* query 21 */
+ if (f55->query_18.has_ctrl28_query21)
+ offset += 1;
+
+ /* query 22 */
+ if (f55->query_18.has_query22) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_22.data,
+ sizeof(f55->query_22.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 23 */
+ if (f55->query_22.has_query23) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_23.data,
+ sizeof(f55->query_23.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+
+ f55->amp_sensor = f55->query_23.amp_sensor_enabled;
+ f55->size_of_column2mux = f55->query_23.size_of_column2mux;
+ }
+
+ /* queries 24 25 26 27 reserved */
+
+ /* query 28 */
+ if (f55->query_22.has_query28) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_28.data,
+ sizeof(f55->query_28.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* query 29 */
+ if (f55->query_28.has_query29)
+ offset += 1;
+
+ /* query 30 */
+ if (f55->query_28.has_query30) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_30.data,
+ sizeof(f55->query_30.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+ }
+
+ /* queries 31 32 */
+ if (f55->query_30.has_query31_query32)
+ offset += 2;
+
+ /* query 33 */
+ if (f55->query_30.has_query33) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->query_base_addr + offset,
+ f55->query_33.data,
+ sizeof(f55->query_33.data));
+ if (retval < 0)
+ return retval;
+ offset += 1;
+
+ f55->extended_amp = f55->query_33.has_extended_amp_pad;
+ }
+
+ return 0;
+}
+
+static void test_f55_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char rx_electrodes;
+ unsigned char tx_electrodes;
+ struct f55_control_43 ctrl_43;
+
+ retval = test_f55_set_queries();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 query registers\n",
+ __func__);
+ return;
+ }
+
+ if (!f55->query.has_sensor_assignment)
+ return;
+
+ retval = test_f55_set_controls();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set up F55 control registers\n",
+ __func__);
+ return;
+ }
+
+ tx_electrodes = f55->query.num_of_tx_electrodes;
+ rx_electrodes = f55->query.num_of_rx_electrodes;
+
+ f55->tx_assignment = kzalloc(tx_electrodes, GFP_KERNEL);
+ f55->rx_assignment = kzalloc(rx_electrodes, GFP_KERNEL);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->control_base_addr + SENSOR_TX_MAPPING_OFFSET,
+ f55->tx_assignment,
+ tx_electrodes);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 tx assignment\n",
+ __func__);
+ return;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->control_base_addr + SENSOR_RX_MAPPING_OFFSET,
+ f55->rx_assignment,
+ rx_electrodes);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 rx assignment\n",
+ __func__);
+ return;
+ }
+
+ f54->tx_assigned = 0;
+ for (ii = 0; ii < tx_electrodes; ii++) {
+ if (f55->tx_assignment[ii] != 0xff)
+ f54->tx_assigned++;
+ }
+
+ f54->rx_assigned = 0;
+ for (ii = 0; ii < rx_electrodes; ii++) {
+ if (f55->rx_assignment[ii] != 0xff)
+ f54->rx_assigned++;
+ }
+
+ if (f55->amp_sensor) {
+ f54->tx_assigned = f55->size_of_column2mux;
+ f54->rx_assigned /= 2;
+ }
+
+ if (f55->extended_amp) {
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->control_base_addr + f55->afe_mux_offset,
+ ctrl_43.data,
+ sizeof(ctrl_43.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 AFE mux sizes\n",
+ __func__);
+ return;
+ }
+
+ f54->tx_assigned = ctrl_43.afe_l_mux_size +
+ ctrl_43.afe_r_mux_size;
+ }
+
+ /* force mapping */
+ if (f55->has_force) {
+ f55->force_tx_assignment = kzalloc(tx_electrodes, GFP_KERNEL);
+ f55->force_rx_assignment = kzalloc(rx_electrodes, GFP_KERNEL);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->control_base_addr + f55->force_tx_offset,
+ f55->force_tx_assignment,
+ tx_electrodes);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 force tx assignment\n",
+ __func__);
+ return;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f55->control_base_addr + f55->force_rx_offset,
+ f55->force_rx_assignment,
+ rx_electrodes);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F55 force rx assignment\n",
+ __func__);
+ return;
+ }
+
+ for (ii = 0; ii < tx_electrodes; ii++) {
+ if (f55->force_tx_assignment[ii] != 0xff)
+ f54->tx_assigned++;
+ }
+
+ for (ii = 0; ii < rx_electrodes; ii++) {
+ if (f55->force_rx_assignment[ii] != 0xff)
+ f54->rx_assigned++;
+ }
+ }
+
+ return;
+}
+
+static void test_f55_set_regs(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned char page)
+{
+ f55 = kzalloc(sizeof(*f55), GFP_KERNEL);
+ if (!f55) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for F55\n",
+ __func__);
+ return;
+ }
+
+ f55->query_base_addr = fd->query_base_addr | (page << 8);
+ f55->control_base_addr = fd->ctrl_base_addr | (page << 8);
+ f55->data_base_addr = fd->data_base_addr | (page << 8);
+ f55->command_base_addr = fd->cmd_base_addr | (page << 8);
+
+ return;
+}
+
+static void test_f21_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char size_of_query2;
+ unsigned char size_of_query5;
+ unsigned char query_11_offset;
+ unsigned char ctrl_4_offset;
+ struct f21_query_2 *query_2 = NULL;
+ struct f21_query_5 *query_5 = NULL;
+ struct f21_query_11 *query_11 = NULL;
+
+ query_2 = kzalloc(sizeof(*query_2), GFP_KERNEL);
+ if (!query_2) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query_2\n",
+ __func__);
+ goto exit;
+ }
+
+ query_5 = kzalloc(sizeof(*query_5), GFP_KERNEL);
+ if (!query_5) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query_5\n",
+ __func__);
+ goto exit;
+ }
+
+ query_11 = kzalloc(sizeof(*query_11), GFP_KERNEL);
+ if (!query_11) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for query_11\n",
+ __func__);
+ goto exit;
+ }
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->query_base_addr + 1,
+ &size_of_query2,
+ sizeof(size_of_query2));
+ if (retval < 0)
+ goto exit;
+
+ if (size_of_query2 > sizeof(query_2->data))
+ size_of_query2 = sizeof(query_2->data);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->query_base_addr + 2,
+ query_2->data,
+ size_of_query2);
+ if (retval < 0)
+ goto exit;
+
+ if (!query_2->query11_is_present) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No F21 force capabilities\n",
+ __func__);
+ goto exit;
+ }
+
+ query_11_offset = query_2->query0_is_present +
+ query_2->query1_is_present +
+ query_2->query2_is_present +
+ query_2->query3_is_present +
+ query_2->query4_is_present +
+ query_2->query5_is_present +
+ query_2->query6_is_present +
+ query_2->query7_is_present +
+ query_2->query8_is_present +
+ query_2->query9_is_present +
+ query_2->query10_is_present;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->query_base_addr + 11,
+ query_11->data,
+ sizeof(query_11->data));
+ if (retval < 0)
+ goto exit;
+
+ if (!query_11->has_force_sensing_txrx_mapping) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: No F21 force mapping\n",
+ __func__);
+ goto exit;
+ }
+
+ f21->max_num_of_tx = query_11->max_number_of_force_txs;
+ f21->max_num_of_rx = query_11->max_number_of_force_rxs;
+ f21->max_num_of_txrx = f21->max_num_of_tx + f21->max_num_of_rx;
+
+ f21->force_txrx_assignment = kzalloc(f21->max_num_of_txrx, GFP_KERNEL);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->query_base_addr + 4,
+ &size_of_query5,
+ sizeof(size_of_query5));
+ if (retval < 0)
+ goto exit;
+
+ if (size_of_query5 > sizeof(query_5->data))
+ size_of_query5 = sizeof(query_5->data);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->query_base_addr + 5,
+ query_5->data,
+ size_of_query5);
+ if (retval < 0)
+ goto exit;
+
+ ctrl_4_offset = query_5->ctrl0_is_present +
+ query_5->ctrl1_is_present +
+ query_5->ctrl2_is_present +
+ query_5->ctrl3_is_present;
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ f21->control_base_addr + ctrl_4_offset,
+ f21->force_txrx_assignment,
+ f21->max_num_of_txrx);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F21 force txrx assignment\n",
+ __func__);
+ goto exit;
+ }
+
+ f21->has_force = true;
+
+ for (ii = 0; ii < f21->max_num_of_tx; ii++) {
+ if (f21->force_txrx_assignment[ii] != 0xff)
+ f21->tx_assigned++;
+ }
+
+ for (ii = f21->max_num_of_tx; ii < f21->max_num_of_txrx; ii++) {
+ if (f21->force_txrx_assignment[ii] != 0xff)
+ f21->rx_assigned++;
+ }
+
+exit:
+ kfree(query_2);
+ kfree(query_5);
+ kfree(query_11);
+
+ return;
+}
+
+static void test_f21_set_regs(struct synaptics_rmi4_data *rmi4_data,
+ struct synaptics_rmi4_fn_desc *fd,
+ unsigned char page)
+{
+ f21 = kzalloc(sizeof(*f21), GFP_KERNEL);
+ if (!f21) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for F21\n",
+ __func__);
+ return;
+ }
+
+ f21->query_base_addr = fd->query_base_addr | (page << 8);
+ f21->control_base_addr = fd->ctrl_base_addr | (page << 8);
+ f21->data_base_addr = fd->data_base_addr | (page << 8);
+ f21->command_base_addr = fd->cmd_base_addr | (page << 8);
+
+ return;
+}
+
+static int test_scan_pdt(void)
+{
+ int retval;
+ unsigned char intr_count = 0;
+ unsigned char page;
+ unsigned short addr;
+ bool f54found = false;
+ bool f55found = false;
+ struct synaptics_rmi4_fn_desc rmi_fd;
+ struct synaptics_rmi4_data *rmi4_data = f54->rmi4_data;
+
+ for (page = 0; page < PAGES_TO_SERVICE; page++) {
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ addr |= (page << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (retval < 0)
+ return retval;
+
+ addr &= ~(MASK_8BIT << 8);
+
+ if (!rmi_fd.fn_number)
+ break;
+
+ switch (rmi_fd.fn_number) {
+ case SYNAPTICS_RMI4_F54:
+ test_f54_set_regs(rmi4_data,
+ &rmi_fd, intr_count, page);
+ f54found = true;
+ break;
+ case SYNAPTICS_RMI4_F55:
+ test_f55_set_regs(rmi4_data,
+ &rmi_fd, page);
+ f55found = true;
+ break;
+ case SYNAPTICS_RMI4_F21:
+ test_f21_set_regs(rmi4_data,
+ &rmi_fd, page);
+ break;
+ default:
+ break;
+ }
+
+ if (f54found && f55found)
+ goto pdt_done;
+
+ intr_count += rmi_fd.intr_src_count;
+ }
+ }
+
+ if (!f54found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F54\n",
+ __func__);
+ return -EINVAL;
+ }
+
+pdt_done:
+ return 0;
+}
+
+static void synaptics_rmi4_test_attn(struct synaptics_rmi4_data *rmi4_data,
+ unsigned char intr_mask)
+{
+ if (!f54)
+ return;
+
+ if (f54->intr_mask & intr_mask)
+ queue_work(f54->test_report_workqueue, &f54->test_report_work);
+
+ return;
+}
+
+static int synaptics_rmi4_test_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+
+ if (f54) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ f54 = kzalloc(sizeof(*f54), GFP_KERNEL);
+ if (!f54) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for F54\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ f54->rmi4_data = rmi4_data;
+
+ f55 = NULL;
+
+ f21 = NULL;
+
+ retval = test_scan_pdt();
+ if (retval < 0)
+ goto exit_free_mem;
+
+ retval = test_set_queries();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F54 query registers\n",
+ __func__);
+ goto exit_free_mem;
+ }
+
+ f54->tx_assigned = f54->query.num_of_tx_electrodes;
+ f54->rx_assigned = f54->query.num_of_rx_electrodes;
+
+ retval = test_set_controls();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set up F54 control registers\n",
+ __func__);
+ goto exit_free_control;
+ }
+
+ test_set_data();
+
+ if (f55)
+ test_f55_init(rmi4_data);
+
+ if (f21)
+ test_f21_init(rmi4_data);
+
+ if (rmi4_data->external_afe_buttons)
+ f54->tx_assigned++;
+
+ retval = test_set_sysfs();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs entries\n",
+ __func__);
+ goto exit_sysfs;
+ }
+
+ f54->test_report_workqueue =
+ create_singlethread_workqueue("test_report_workqueue");
+ INIT_WORK(&f54->test_report_work, test_report_work);
+
+ hrtimer_init(&f54->watchdog, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ f54->watchdog.function = test_get_report_timeout;
+ INIT_WORK(&f54->timeout_work, test_timeout_work);
+
+ mutex_init(&f54->status_mutex);
+ f54->status = STATUS_IDLE;
+
+ return 0;
+
+exit_sysfs:
+ if (f21)
+ kfree(f21->force_txrx_assignment);
+
+ if (f55) {
+ kfree(f55->tx_assignment);
+ kfree(f55->rx_assignment);
+ kfree(f55->force_tx_assignment);
+ kfree(f55->force_rx_assignment);
+ }
+
+exit_free_control:
+ test_free_control_mem();
+
+exit_free_mem:
+ kfree(f21);
+ f21 = NULL;
+ kfree(f55);
+ f55 = NULL;
+ kfree(f54);
+ f54 = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_test_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!f54)
+ goto exit;
+
+ hrtimer_cancel(&f54->watchdog);
+
+ cancel_work_sync(&f54->test_report_work);
+ flush_workqueue(f54->test_report_workqueue);
+ destroy_workqueue(f54->test_report_workqueue);
+
+ test_remove_sysfs();
+
+ if (f21)
+ kfree(f21->force_txrx_assignment);
+
+ if (f55) {
+ kfree(f55->tx_assignment);
+ kfree(f55->rx_assignment);
+ kfree(f55->force_tx_assignment);
+ kfree(f55->force_rx_assignment);
+ }
+
+ test_free_control_mem();
+
+ if (f54->data_buffer_size)
+ kfree(f54->report_data);
+
+ kfree(f21);
+ f21 = NULL;
+
+ kfree(f55);
+ f55 = NULL;
+
+ kfree(f54);
+ f54 = NULL;
+
+exit:
+ complete(&test_remove_complete);
+
+ return;
+}
+
+static void synaptics_rmi4_test_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+
+ if (!f54) {
+ synaptics_rmi4_test_init(rmi4_data);
+ return;
+ }
+
+ if (f21)
+ kfree(f21->force_txrx_assignment);
+
+ if (f55) {
+ kfree(f55->tx_assignment);
+ kfree(f55->rx_assignment);
+ kfree(f55->force_tx_assignment);
+ kfree(f55->force_rx_assignment);
+ }
+
+ test_free_control_mem();
+
+ kfree(f55);
+ f55 = NULL;
+
+ kfree(f21);
+ f21 = NULL;
+
+ retval = test_scan_pdt();
+ if (retval < 0)
+ goto exit_free_mem;
+
+ retval = test_set_queries();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to read F54 query registers\n",
+ __func__);
+ goto exit_free_mem;
+ }
+
+ f54->tx_assigned = f54->query.num_of_tx_electrodes;
+ f54->rx_assigned = f54->query.num_of_rx_electrodes;
+
+ retval = test_set_controls();
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to set up F54 control registers\n",
+ __func__);
+ goto exit_free_control;
+ }
+
+ test_set_data();
+
+ if (f55)
+ test_f55_init(rmi4_data);
+
+ if (f21)
+ test_f21_init(rmi4_data);
+
+ if (rmi4_data->external_afe_buttons)
+ f54->tx_assigned++;
+
+ f54->status = STATUS_IDLE;
+
+ return;
+
+exit_free_control:
+ test_free_control_mem();
+
+exit_free_mem:
+ hrtimer_cancel(&f54->watchdog);
+
+ cancel_work_sync(&f54->test_report_work);
+ flush_workqueue(f54->test_report_workqueue);
+ destroy_workqueue(f54->test_report_workqueue);
+
+ test_remove_sysfs();
+
+ if (f54->data_buffer_size)
+ kfree(f54->report_data);
+
+ kfree(f21);
+ f21 = NULL;
+
+ kfree(f55);
+ f55 = NULL;
+
+ kfree(f54);
+ f54 = NULL;
+
+ return;
+}
+
+static struct synaptics_rmi4_exp_fn test_module = {
+ .fn_type = RMI_TEST_REPORTING,
+ .init = synaptics_rmi4_test_init,
+ .remove = synaptics_rmi4_test_remove,
+ .reset = synaptics_rmi4_test_reset,
+ .reinit = NULL,
+ .early_suspend = NULL,
+ .suspend = NULL,
+ .resume = NULL,
+ .late_resume = NULL,
+ .attn = synaptics_rmi4_test_attn,
+};
+
+static int __init rmi4_test_module_init(void)
+{
+ synaptics_rmi4_new_function(&test_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_test_module_exit(void)
+{
+ synaptics_rmi4_new_function(&test_module, false);
+
+ wait_for_completion(&test_remove_complete);
+
+ return;
+}
+
+module_init(rmi4_test_module_init);
+module_exit(rmi4_test_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX Test Reporting Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_video.c b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_video.c
new file mode 100644
index 0000000..b9ae0ac
--- /dev/null
+++ b/drivers/input/touchscreen/synaptics_dsx/synaptics_dsx_video.c
@@ -0,0 +1,416 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/input.h>
+#include <linux/platform_device.h>
+#include <linux/input/synaptics_dsx.h>
+#include "synaptics_dsx_core.h"
+
+#define SYSFS_FOLDER_NAME "video"
+
+/*
+*#define RMI_DCS_SUSPEND_RESUME
+*/
+
+static ssize_t video_sysfs_dcs_write_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static ssize_t video_sysfs_param_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count);
+
+static int video_send_dcs_command(unsigned char command_opcode);
+
+struct f38_command {
+ union {
+ struct {
+ unsigned char command_opcode;
+ unsigned char register_access:1;
+ unsigned char gamma_page:1;
+ unsigned char f38_control1_b2__7:6;
+ unsigned char parameter_field_1;
+ unsigned char parameter_field_2;
+ unsigned char parameter_field_3;
+ unsigned char parameter_field_4;
+ unsigned char send_to_dcs:1;
+ unsigned char f38_command6_b1__7:7;
+ } __packed;
+ unsigned char data[7];
+ };
+};
+
+struct synaptics_rmi4_video_handle {
+ unsigned char param;
+ unsigned short query_base_addr;
+ unsigned short control_base_addr;
+ unsigned short data_base_addr;
+ unsigned short command_base_addr;
+ struct synaptics_rmi4_data *rmi4_data;
+ struct kobject *sysfs_dir;
+};
+
+#ifdef RMI_DCS_SUSPEND_RESUME
+struct dcs_command {
+ unsigned char command;
+ unsigned int wait_time;
+};
+
+static struct dcs_command suspend_sequence[] = {
+ {
+ .command = 0x28,
+ .wait_time = 200,
+ },
+ {
+ .command = 0x10,
+ .wait_time = 200,
+ },
+};
+
+static struct dcs_command resume_sequence[] = {
+ {
+ .command = 0x11,
+ .wait_time = 200,
+ },
+ {
+ .command = 0x29,
+ .wait_time = 200,
+ },
+};
+#endif
+
+static struct device_attribute attrs[] = {
+ __ATTR(dcs_write, 0220,
+ synaptics_rmi4_show_error,
+ video_sysfs_dcs_write_store),
+ __ATTR(param, 0220,
+ synaptics_rmi4_show_error,
+ video_sysfs_param_store),
+};
+
+static struct synaptics_rmi4_video_handle *video;
+
+DECLARE_COMPLETION(video_remove_complete);
+
+static ssize_t video_sysfs_dcs_write_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ int retval;
+ unsigned int input;
+
+ if (kstrtouint(buf, 16, &input) != 1)
+ return -EINVAL;
+
+ retval = video_send_dcs_command((unsigned char)input);
+ if (retval < 0)
+ return retval;
+
+ return count;
+}
+
+static ssize_t video_sysfs_param_store(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ unsigned int input;
+
+ if (kstrtouint(buf, 16, &input) != 1)
+ return -EINVAL;
+
+ video->param = (unsigned char)input;
+
+ return count;
+}
+
+static int video_send_dcs_command(unsigned char command_opcode)
+{
+ int retval;
+ struct f38_command command;
+ struct synaptics_rmi4_data *rmi4_data = video->rmi4_data;
+
+ memset(&command, 0x00, sizeof(command));
+
+ command.command_opcode = command_opcode;
+ command.parameter_field_1 = video->param;
+ command.send_to_dcs = 1;
+
+ video->param = 0;
+
+ retval = synaptics_rmi4_reg_write(rmi4_data,
+ video->command_base_addr,
+ command.data,
+ sizeof(command.data));
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to send DCS command\n",
+ __func__);
+ return retval;
+ }
+
+ return 0;
+}
+
+static int video_scan_pdt(void)
+{
+ int retval;
+ unsigned char page;
+ unsigned short addr;
+ bool f38_found = false;
+ struct synaptics_rmi4_fn_desc rmi_fd;
+ struct synaptics_rmi4_data *rmi4_data = video->rmi4_data;
+
+ for (page = 0; page < PAGES_TO_SERVICE; page++) {
+ for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
+ addr |= (page << 8);
+
+ retval = synaptics_rmi4_reg_read(rmi4_data,
+ addr,
+ (unsigned char *)&rmi_fd,
+ sizeof(rmi_fd));
+ if (retval < 0)
+ return retval;
+
+ addr &= ~(MASK_8BIT << 8);
+
+ if (!rmi_fd.fn_number)
+ break;
+
+ if (rmi_fd.fn_number == SYNAPTICS_RMI4_F38) {
+ f38_found = true;
+ goto f38_found;
+ }
+ }
+ }
+
+ if (!f38_found) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to find F38\n",
+ __func__);
+ return -EINVAL;
+ }
+
+f38_found:
+ video->query_base_addr = rmi_fd.query_base_addr | (page << 8);
+ video->control_base_addr = rmi_fd.ctrl_base_addr | (page << 8);
+ video->data_base_addr = rmi_fd.data_base_addr | (page << 8);
+ video->command_base_addr = rmi_fd.cmd_base_addr | (page << 8);
+
+ return 0;
+}
+
+static int synaptics_rmi4_video_init(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char attr_count;
+
+ if (video) {
+ dev_dbg(rmi4_data->pdev->dev.parent,
+ "%s: Handle already exists\n",
+ __func__);
+ return 0;
+ }
+
+ video = kzalloc(sizeof(*video), GFP_KERNEL);
+ if (!video) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to alloc mem for video\n",
+ __func__);
+ retval = -ENOMEM;
+ goto exit;
+ }
+
+ video->rmi4_data = rmi4_data;
+
+ retval = video_scan_pdt();
+ if (retval < 0) {
+ retval = 0;
+ goto exit_scan_pdt;
+ }
+
+ video->sysfs_dir = kobject_create_and_add(SYSFS_FOLDER_NAME,
+ &rmi4_data->input_dev->dev.kobj);
+ if (!video->sysfs_dir) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs directory\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_sysfs_dir;
+ }
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
+ retval = sysfs_create_file(video->sysfs_dir,
+ &attrs[attr_count].attr);
+ if (retval < 0) {
+ dev_err(rmi4_data->pdev->dev.parent,
+ "%s: Failed to create sysfs attributes\n",
+ __func__);
+ retval = -ENODEV;
+ goto exit_sysfs_attrs;
+ }
+ }
+
+ return 0;
+
+exit_sysfs_attrs:
+ for (attr_count--; attr_count >= 0; attr_count--)
+ sysfs_remove_file(video->sysfs_dir, &attrs[attr_count].attr);
+
+ kobject_put(video->sysfs_dir);
+
+exit_sysfs_dir:
+exit_scan_pdt:
+ kfree(video);
+ video = NULL;
+
+exit:
+ return retval;
+}
+
+static void synaptics_rmi4_video_remove(struct synaptics_rmi4_data *rmi4_data)
+{
+ unsigned char attr_count;
+
+ if (!video)
+ goto exit;
+
+ for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++)
+ sysfs_remove_file(video->sysfs_dir, &attrs[attr_count].attr);
+
+ kobject_put(video->sysfs_dir);
+
+ kfree(video);
+ video = NULL;
+
+exit:
+ complete(&video_remove_complete);
+
+ return;
+}
+
+static void synaptics_rmi4_video_reset(struct synaptics_rmi4_data *rmi4_data)
+{
+ if (!video)
+ synaptics_rmi4_video_init(rmi4_data);
+
+ return;
+}
+
+#ifdef RMI_DCS_SUSPEND_RESUME
+static void synaptics_rmi4_video_suspend(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char command;
+ unsigned char num_of_cmds;
+
+ if (!video)
+ return;
+
+ num_of_cmds = ARRAY_SIZE(suspend_sequence);
+
+ for (ii = 0; ii < num_of_cmds; ii++) {
+ command = suspend_sequence[ii].command;
+ retval = video_send_dcs_command(command);
+ if (retval < 0)
+ return;
+ msleep(suspend_sequence[ii].wait_time);
+ }
+
+ return;
+}
+
+static void synaptics_rmi4_video_resume(struct synaptics_rmi4_data *rmi4_data)
+{
+ int retval;
+ unsigned char ii;
+ unsigned char command;
+ unsigned char num_of_cmds;
+
+ if (!video)
+ return;
+
+ num_of_cmds = ARRAY_SIZE(resume_sequence);
+
+ for (ii = 0; ii < num_of_cmds; ii++) {
+ command = resume_sequence[ii].command;
+ retval = video_send_dcs_command(command);
+ if (retval < 0)
+ return;
+ msleep(resume_sequence[ii].wait_time);
+ }
+
+ return;
+}
+#endif
+
+static struct synaptics_rmi4_exp_fn video_module = {
+ .fn_type = RMI_VIDEO,
+ .init = synaptics_rmi4_video_init,
+ .remove = synaptics_rmi4_video_remove,
+ .reset = synaptics_rmi4_video_reset,
+ .reinit = NULL,
+ .early_suspend = NULL,
+#ifdef RMI_DCS_SUSPEND_RESUME
+ .suspend = synaptics_rmi4_video_suspend,
+ .resume = synaptics_rmi4_video_resume,
+#else
+ .suspend = NULL,
+ .resume = NULL,
+#endif
+ .late_resume = NULL,
+ .attn = NULL,
+};
+
+static int __init rmi4_video_module_init(void)
+{
+ synaptics_rmi4_new_function(&video_module, true);
+
+ return 0;
+}
+
+static void __exit rmi4_video_module_exit(void)
+{
+ synaptics_rmi4_new_function(&video_module, false);
+
+ wait_for_completion(&video_remove_complete);
+
+ return;
+}
+
+module_init(rmi4_video_module_init);
+module_exit(rmi4_video_module_exit);
+
+MODULE_AUTHOR("Synaptics, Inc.");
+MODULE_DESCRIPTION("Synaptics DSX Video Module");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 28ef920..d8d9011 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -55,11 +55,10 @@
#include <linux/remote_spinlock.h>
#include <linux/ktime.h>
#include <trace/events/iommu.h>
-#include <soc/qcom/msm_tz_smmu.h>
-#include <soc/qcom/scm.h>
#include <linux/notifier.h>
#include <linux/amba/bus.h>
+#include <soc/qcom/msm_tz_smmu.h>
#include "io-pgtable.h"
@@ -2736,6 +2735,39 @@
}
}
+#ifdef CONFIG_MSM_TZ_SMMU
+static struct arm_smmu_device *arm_smmu_get_by_addr(void __iomem *addr)
+{
+ struct arm_smmu_device *smmu;
+ unsigned long flags;
+
+ spin_lock_irqsave(&arm_smmu_devices_lock, flags);
+ list_for_each_entry(smmu, &arm_smmu_devices, list) {
+ unsigned long base = (unsigned long)smmu->base;
+ unsigned long mask = ~(smmu->size - 1);
+
+ if ((base & mask) == ((unsigned long)addr & mask)) {
+ spin_unlock_irqrestore(&arm_smmu_devices_lock, flags);
+ return smmu;
+ }
+ }
+ spin_unlock_irqrestore(&arm_smmu_devices_lock, flags);
+ return NULL;
+}
+
+bool arm_smmu_skip_write(void __iomem *addr)
+{
+ struct arm_smmu_device *smmu;
+
+ smmu = arm_smmu_get_by_addr(addr);
+ if (smmu &&
+ ((unsigned long)addr & (smmu->size - 1)) >= (smmu->size >> 1))
+ return false;
+ else
+ return true;
+}
+#endif
+
static struct arm_smmu_device *arm_smmu_get_by_list(struct device_node *np)
{
struct arm_smmu_device *smmu;
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index b8f30cd..26e03ba 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -706,6 +706,14 @@
module provides haptic feedback for user actions such as a long press
on the touch screen.
+config LEDS_QPNP_VIBRATOR_LDO
+ tristate "Vibrator-LDO support for QPNP PMIC"
+ depends on LEDS_CLASS && MFD_SPMI_PMIC
+ help
+ This option enables device driver support for the vibrator-ldo
+ peripheral found on Qualcomm Technologies, Inc. QPNP PMICs.
+ The vibrator-ldo peripheral is capable of driving ERM vibrators.
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index ba9bb8d..5514391 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -76,6 +76,7 @@
obj-$(CONFIG_LEDS_QPNP_FLASH_V2) += leds-qpnp-flash-v2.o
obj-$(CONFIG_LEDS_QPNP_WLED) += leds-qpnp-wled.o
obj-$(CONFIG_LEDS_QPNP_HAPTICS) += leds-qpnp-haptics.o
+obj-$(CONFIG_LEDS_QPNP_VIBRATOR_LDO) += leds-qpnp-vibrator-ldo.o
# LED SPI Drivers
obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o
diff --git a/drivers/leds/leds-qpnp-vibrator-ldo.c b/drivers/leds/leds-qpnp-vibrator-ldo.c
new file mode 100644
index 0000000..6a14324
--- /dev/null
+++ b/drivers/leds/leds-qpnp-vibrator-ldo.c
@@ -0,0 +1,550 @@
+/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/errno.h>
+#include <linux/hrtimer.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <linux/workqueue.h>
+
+/* Vibrator-LDO register definitions */
+#define QPNP_VIB_LDO_REG_STATUS1 0x08
+#define QPNP_VIB_LDO_VREG_READY BIT(7)
+
+#define QPNP_VIB_LDO_REG_VSET_LB 0x40
+
+#define QPNP_VIB_LDO_REG_EN_CTL 0x46
+#define QPNP_VIB_LDO_EN BIT(7)
+
+/* Vibrator-LDO voltage settings */
+#define QPNP_VIB_LDO_VMIN_UV 1504000
+#define QPNP_VIB_LDO_VMAX_UV 3544000
+#define QPNP_VIB_LDO_VOLT_STEP_UV 8000
+
+/*
+ * Define vibration periods: default(5sec), min(50ms), max(15sec) and
+ * overdrive(30ms).
+ */
+#define QPNP_VIB_MIN_PLAY_MS 50
+#define QPNP_VIB_PLAY_MS 5000
+#define QPNP_VIB_MAX_PLAY_MS 15000
+#define QPNP_VIB_OVERDRIVE_PLAY_MS 30
+
+struct vib_ldo_chip {
+ struct led_classdev cdev;
+ struct regmap *regmap;
+ struct mutex lock;
+ struct hrtimer stop_timer;
+ struct hrtimer overdrive_timer;
+ struct work_struct vib_work;
+ struct work_struct overdrive_work;
+
+ u16 base;
+ int vmax_uV;
+ int overdrive_volt_uV;
+ int ldo_uV;
+ int state;
+ u64 vib_play_ms;
+ bool vib_enabled;
+ bool disable_overdrive;
+};
+
+static int qpnp_vib_ldo_set_voltage(struct vib_ldo_chip *chip, int new_uV)
+{
+ unsigned int val;
+ u32 vlevel;
+ u8 reg[2];
+ int ret;
+
+ if (chip->ldo_uV == new_uV)
+ return 0;
+
+ vlevel = roundup(new_uV, QPNP_VIB_LDO_VOLT_STEP_UV) / 1000;
+ reg[0] = vlevel & 0xff;
+ reg[1] = (vlevel & 0xff00) >> 8;
+ ret = regmap_bulk_write(chip->regmap,
+ chip->base + QPNP_VIB_LDO_REG_VSET_LB, reg, 2);
+ if (ret < 0) {
+ pr_err("regmap write failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ if (chip->vib_enabled) {
+ ret = regmap_read_poll_timeout(chip->regmap,
+ chip->base + QPNP_VIB_LDO_REG_STATUS1,
+ val, val & QPNP_VIB_LDO_VREG_READY,
+ 100, 1000);
+ if (ret < 0) {
+ pr_err("Vibrator LDO vreg_ready timeout, status=0x%02x, ret=%d\n",
+ val, ret);
+ return ret;
+ }
+ }
+
+ chip->ldo_uV = new_uV;
+ return ret;
+}
+
+static inline int qpnp_vib_ldo_enable(struct vib_ldo_chip *chip, bool enable)
+{
+ unsigned int val;
+ int ret;
+
+ if (chip->vib_enabled == enable)
+ return 0;
+
+ ret = regmap_update_bits(chip->regmap,
+ chip->base + QPNP_VIB_LDO_REG_EN_CTL,
+ QPNP_VIB_LDO_EN,
+ enable ? QPNP_VIB_LDO_EN : 0);
+ if (ret < 0) {
+ pr_err("Program Vibrator LDO %s is failed, ret=%d\n",
+ enable ? "enable" : "disable", ret);
+ return ret;
+ }
+
+ if (enable) {
+ ret = regmap_read_poll_timeout(chip->regmap,
+ chip->base + QPNP_VIB_LDO_REG_STATUS1,
+ val, val & QPNP_VIB_LDO_VREG_READY,
+ 100, 1000);
+ if (ret < 0) {
+ pr_err("Vibrator LDO vreg_ready timeout, status=0x%02x, ret=%d\n",
+ val, ret);
+ return ret;
+ }
+ }
+
+ chip->vib_enabled = enable;
+
+ return ret;
+}
+
+static int qpnp_vibrator_play_on(struct vib_ldo_chip *chip)
+{
+ int volt_uV;
+ int ret;
+
+ volt_uV = chip->vmax_uV;
+ if (!chip->disable_overdrive)
+ volt_uV = chip->overdrive_volt_uV ? chip->overdrive_volt_uV
+ : min(chip->vmax_uV * 2, QPNP_VIB_LDO_VMAX_UV);
+
+ ret = qpnp_vib_ldo_set_voltage(chip, volt_uV);
+ if (ret < 0) {
+ pr_err("set voltage = %duV failed, ret=%d\n", volt_uV, ret);
+ return ret;
+ }
+ pr_debug("voltage set to %d uV\n", volt_uV);
+
+ ret = qpnp_vib_ldo_enable(chip, true);
+ if (ret < 0) {
+ pr_err("vibration enable failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ if (!chip->disable_overdrive)
+ hrtimer_start(&chip->overdrive_timer,
+ ms_to_ktime(QPNP_VIB_OVERDRIVE_PLAY_MS),
+ HRTIMER_MODE_REL);
+
+ return ret;
+}
+
+static void qpnp_vib_work(struct work_struct *work)
+{
+ struct vib_ldo_chip *chip = container_of(work, struct vib_ldo_chip,
+ vib_work);
+ int ret = 0;
+
+ if (chip->state) {
+ if (!chip->vib_enabled)
+ ret = qpnp_vibrator_play_on(chip);
+
+ if (ret == 0)
+ hrtimer_start(&chip->stop_timer,
+ ms_to_ktime(chip->vib_play_ms),
+ HRTIMER_MODE_REL);
+ } else {
+ if (!chip->disable_overdrive) {
+ hrtimer_cancel(&chip->overdrive_timer);
+ cancel_work_sync(&chip->overdrive_work);
+ }
+ qpnp_vib_ldo_enable(chip, false);
+ }
+}
+
+static enum hrtimer_restart vib_stop_timer(struct hrtimer *timer)
+{
+ struct vib_ldo_chip *chip = container_of(timer, struct vib_ldo_chip,
+ stop_timer);
+
+ chip->state = 0;
+ schedule_work(&chip->vib_work);
+ return HRTIMER_NORESTART;
+}
+
+static void qpnp_vib_overdrive_work(struct work_struct *work)
+{
+ struct vib_ldo_chip *chip = container_of(work, struct vib_ldo_chip,
+ overdrive_work);
+ int ret;
+
+ mutex_lock(&chip->lock);
+
+ /* LDO voltage update not required if Vibration disabled */
+ if (!chip->vib_enabled)
+ goto unlock;
+
+ ret = qpnp_vib_ldo_set_voltage(chip, chip->vmax_uV);
+ if (ret < 0) {
+ pr_err("set vibration voltage = %duV failed, ret=%d\n",
+ chip->vmax_uV, ret);
+ qpnp_vib_ldo_enable(chip, false);
+ goto unlock;
+ }
+ pr_debug("voltage set to %d\n", chip->vmax_uV);
+
+unlock:
+ mutex_unlock(&chip->lock);
+}
+
+static enum hrtimer_restart vib_overdrive_timer(struct hrtimer *timer)
+{
+ struct vib_ldo_chip *chip = container_of(timer, struct vib_ldo_chip,
+ overdrive_timer);
+ schedule_work(&chip->overdrive_work);
+ pr_debug("overdrive timer expired\n");
+ return HRTIMER_NORESTART;
+}
+
+static ssize_t qpnp_vib_show_state(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", chip->vib_enabled);
+}
+
+static ssize_t qpnp_vib_store_state(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ /* At present, nothing to do with setting state */
+ return count;
+}
+
+static ssize_t qpnp_vib_show_duration(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+ ktime_t time_rem;
+ s64 time_ms = 0;
+
+ if (hrtimer_active(&chip->stop_timer)) {
+ time_rem = hrtimer_get_remaining(&chip->stop_timer);
+ time_ms = ktime_to_ms(time_rem);
+ }
+
+ return snprintf(buf, PAGE_SIZE, "%lld\n", time_ms);
+}
+
+static ssize_t qpnp_vib_store_duration(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+ u32 val;
+ int ret;
+
+ ret = kstrtouint(buf, 0, &val);
+ if (ret < 0)
+ return ret;
+
+ /* setting 0 on duration is NOP for now */
+ if (val <= 0)
+ return count;
+
+ if (val < QPNP_VIB_MIN_PLAY_MS)
+ val = QPNP_VIB_MIN_PLAY_MS;
+
+ if (val > QPNP_VIB_MAX_PLAY_MS)
+ val = QPNP_VIB_MAX_PLAY_MS;
+
+ mutex_lock(&chip->lock);
+ chip->vib_play_ms = val;
+ mutex_unlock(&chip->lock);
+
+ return count;
+}
+
+static ssize_t qpnp_vib_show_activate(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ /* For now nothing to show */
+ return snprintf(buf, PAGE_SIZE, "%d\n", 0);
+}
+
+static ssize_t qpnp_vib_store_activate(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+ u32 val;
+ int ret;
+
+ ret = kstrtouint(buf, 0, &val);
+ if (ret < 0)
+ return ret;
+
+ if (val != 0 && val != 1)
+ return count;
+
+ mutex_lock(&chip->lock);
+ hrtimer_cancel(&chip->stop_timer);
+ chip->state = val;
+ pr_debug("state = %d, time = %llums\n", chip->state, chip->vib_play_ms);
+ mutex_unlock(&chip->lock);
+ schedule_work(&chip->vib_work);
+
+ return count;
+}
+
+static ssize_t qpnp_vib_show_vmax(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", chip->vmax_uV / 1000);
+}
+
+static ssize_t qpnp_vib_store_vmax(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct led_classdev *cdev = dev_get_drvdata(dev);
+ struct vib_ldo_chip *chip = container_of(cdev, struct vib_ldo_chip,
+ cdev);
+ int data, ret;
+
+ ret = kstrtoint(buf, 10, &data);
+ if (ret < 0)
+ return ret;
+
+ data = data * 1000; /* Convert to microvolts */
+
+ /* check against vibrator ldo min/max voltage limits */
+ data = min(data, QPNP_VIB_LDO_VMAX_UV);
+ data = max(data, QPNP_VIB_LDO_VMIN_UV);
+
+ mutex_lock(&chip->lock);
+ chip->vmax_uV = data;
+ mutex_unlock(&chip->lock);
+ return ret;
+}
+
+static struct device_attribute qpnp_vib_attrs[] = {
+ __ATTR(state, 0664, qpnp_vib_show_state, qpnp_vib_store_state),
+ __ATTR(duration, 0664, qpnp_vib_show_duration, qpnp_vib_store_duration),
+ __ATTR(activate, 0664, qpnp_vib_show_activate, qpnp_vib_store_activate),
+ __ATTR(vmax_mv, 0664, qpnp_vib_show_vmax, qpnp_vib_store_vmax),
+};
+
+static int qpnp_vib_parse_dt(struct device *dev, struct vib_ldo_chip *chip)
+{
+ int ret;
+
+ ret = of_property_read_u32(dev->of_node, "qcom,vib-ldo-volt-uv",
+ &chip->vmax_uV);
+ if (ret < 0) {
+ pr_err("qcom,vib-ldo-volt-uv property read failed, ret=%d\n",
+ ret);
+ return ret;
+ }
+
+ chip->disable_overdrive = of_property_read_bool(dev->of_node,
+ "qcom,disable-overdrive");
+
+ if (of_find_property(dev->of_node, "qcom,vib-overdrive-volt-uv",
+ NULL)) {
+ ret = of_property_read_u32(dev->of_node,
+ "qcom,vib-overdrive-volt-uv",
+ &chip->overdrive_volt_uV);
+ if (ret < 0) {
+ pr_err("qcom,vib-overdrive-volt-uv property read failed, ret=%d\n",
+ ret);
+ return ret;
+ }
+
+ /* check against vibrator ldo min/max voltage limits */
+ chip->overdrive_volt_uV = min(chip->overdrive_volt_uV,
+ QPNP_VIB_LDO_VMAX_UV);
+ chip->overdrive_volt_uV = max(chip->overdrive_volt_uV,
+ QPNP_VIB_LDO_VMIN_UV);
+ }
+
+ return ret;
+}
+
+/* Dummy functions for brightness */
+static enum led_brightness qpnp_vib_brightness_get(struct led_classdev *cdev)
+{
+ return 0;
+}
+
+static void qpnp_vib_brightness_set(struct led_classdev *cdev,
+ enum led_brightness level)
+{
+}
+
+static int qpnp_vibrator_ldo_suspend(struct device *dev)
+{
+ struct vib_ldo_chip *chip = dev_get_drvdata(dev);
+
+ mutex_lock(&chip->lock);
+ if (!chip->disable_overdrive) {
+ hrtimer_cancel(&chip->overdrive_timer);
+ cancel_work_sync(&chip->overdrive_work);
+ }
+ hrtimer_cancel(&chip->stop_timer);
+ cancel_work_sync(&chip->vib_work);
+ mutex_unlock(&chip->lock);
+
+ return 0;
+}
+static SIMPLE_DEV_PM_OPS(qpnp_vibrator_ldo_pm_ops, qpnp_vibrator_ldo_suspend,
+ NULL);
+
+static int qpnp_vibrator_ldo_probe(struct platform_device *pdev)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ struct vib_ldo_chip *chip;
+ int i, ret;
+ u32 base;
+
+ ret = of_property_read_u32(of_node, "reg", &base);
+ if (ret < 0) {
+ pr_err("reg property reading failed, ret=%d\n", ret);
+ return ret;
+ }
+
+ chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+ if (!chip)
+ return -ENOMEM;
+
+ chip->regmap = dev_get_regmap(pdev->dev.parent, NULL);
+ if (!chip->regmap) {
+ pr_err("couldn't get parent's regmap\n");
+ return -EINVAL;
+ }
+
+ ret = qpnp_vib_parse_dt(&pdev->dev, chip);
+ if (ret < 0) {
+ pr_err("couldn't parse device tree, ret=%d\n", ret);
+ return ret;
+ }
+
+ chip->base = (uint16_t)base;
+ chip->vib_play_ms = QPNP_VIB_PLAY_MS;
+ mutex_init(&chip->lock);
+ INIT_WORK(&chip->vib_work, qpnp_vib_work);
+ INIT_WORK(&chip->overdrive_work, qpnp_vib_overdrive_work);
+
+ hrtimer_init(&chip->stop_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ chip->stop_timer.function = vib_stop_timer;
+ hrtimer_init(&chip->overdrive_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ chip->overdrive_timer.function = vib_overdrive_timer;
+ dev_set_drvdata(&pdev->dev, chip);
+
+ chip->cdev.name = "vibrator";
+ chip->cdev.brightness_get = qpnp_vib_brightness_get;
+ chip->cdev.brightness_set = qpnp_vib_brightness_set;
+ chip->cdev.max_brightness = 100;
+ ret = devm_led_classdev_register(&pdev->dev, &chip->cdev);
+ if (ret < 0) {
+ pr_err("Error in registering led class device, ret=%d\n", ret);
+ goto fail;
+ }
+
+ for (i = 0; i < ARRAY_SIZE(qpnp_vib_attrs); i++) {
+ ret = sysfs_create_file(&chip->cdev.dev->kobj,
+ &qpnp_vib_attrs[i].attr);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "Error in creating sysfs file, ret=%d\n",
+ ret);
+ goto sysfs_fail;
+ }
+ }
+
+ pr_info("Vibrator LDO successfully registered: uV = %d, overdrive = %s\n",
+ chip->vmax_uV,
+ chip->disable_overdrive ? "disabled" : "enabled");
+ return 0;
+
+sysfs_fail:
+ for (--i; i >= 0; i--)
+ sysfs_remove_file(&chip->cdev.dev->kobj,
+ &qpnp_vib_attrs[i].attr);
+fail:
+ mutex_destroy(&chip->lock);
+ dev_set_drvdata(&pdev->dev, NULL);
+ return ret;
+}
+
+static int qpnp_vibrator_ldo_remove(struct platform_device *pdev)
+{
+ struct vib_ldo_chip *chip = dev_get_drvdata(&pdev->dev);
+
+ if (!chip->disable_overdrive) {
+ hrtimer_cancel(&chip->overdrive_timer);
+ cancel_work_sync(&chip->overdrive_work);
+ }
+ hrtimer_cancel(&chip->stop_timer);
+ cancel_work_sync(&chip->vib_work);
+ mutex_destroy(&chip->lock);
+ dev_set_drvdata(&pdev->dev, NULL);
+
+ return 0;
+}
+
+static const struct of_device_id vibrator_ldo_match_table[] = {
+ { .compatible = "qcom,qpnp-vibrator-ldo" },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, vibrator_ldo_match_table);
+
+static struct platform_driver qpnp_vibrator_ldo_driver = {
+ .driver = {
+ .name = "qcom,qpnp-vibrator-ldo",
+ .of_match_table = vibrator_ldo_match_table,
+ .pm = &qpnp_vibrator_ldo_pm_ops,
+ },
+ .probe = qpnp_vibrator_ldo_probe,
+ .remove = qpnp_vibrator_ldo_remove,
+};
+module_platform_driver(qpnp_vibrator_ldo_driver);
+
+MODULE_DESCRIPTION("QCOM QPNP Vibrator-LDO driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/media/platform/msm/vidc/msm_smem.c b/drivers/media/platform/msm/vidc/msm_smem.c
index 5198bc3..6936354 100644
--- a/drivers/media/platform/msm/vidc/msm_smem.c
+++ b/drivers/media/platform/msm/vidc/msm_smem.c
@@ -28,6 +28,7 @@
void *clnt;
struct msm_vidc_platform_resources *res;
enum session_type session_type;
+ bool tme_encode_mode;
};
static int msm_ion_get_device_address(struct smem_client *smem_client,
@@ -771,6 +772,13 @@
return client;
}
+void msm_smem_set_tme_encode_mode(struct smem_client *client, bool enable)
+{
+ if (!client)
+ return;
+ client->tme_encode_mode = enable;
+}
+
int msm_smem_alloc(struct smem_client *client, size_t size,
u32 align, u32 flags, enum hal_buffer buffer_type,
int map_kernel, struct msm_smem *smem)
@@ -863,7 +871,8 @@
if (is_secure && client->session_type == MSM_VIDC_ENCODER) {
if (buffer_type == HAL_BUFFER_INPUT)
buffer_type = HAL_BUFFER_OUTPUT;
- else if (buffer_type == HAL_BUFFER_OUTPUT)
+ else if (buffer_type == HAL_BUFFER_OUTPUT &&
+ !client->tme_encode_mode)
buffer_type = HAL_BUFFER_INPUT;
}
diff --git a/drivers/media/platform/msm/vidc/msm_venc.c b/drivers/media/platform/msm/vidc/msm_venc.c
index dd749d6..a80990c 100644
--- a/drivers/media/platform/msm/vidc/msm_venc.c
+++ b/drivers/media/platform/msm/vidc/msm_venc.c
@@ -2691,6 +2691,11 @@
memcpy(&inst->fmts[fmt->type], fmt,
sizeof(struct msm_vidc_format));
+ if (get_hal_codec(inst->fmts[CAPTURE_PORT].fourcc) ==
+ HAL_VIDEO_CODEC_TME) {
+ msm_smem_set_tme_encode_mode(inst->mem_client, true);
+ }
+
rc = msm_comm_try_state(inst, MSM_VIDC_OPEN_DONE);
if (rc) {
dprintk(VIDC_ERR, "Failed to open instance\n");
diff --git a/drivers/media/platform/msm/vidc/msm_vidc_internal.h b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
index 98b5714..5b8fb0f 100644
--- a/drivers/media/platform/msm/vidc/msm_vidc_internal.h
+++ b/drivers/media/platform/msm/vidc/msm_vidc_internal.h
@@ -457,6 +457,7 @@
void msm_comm_handle_thermal_event(void);
void *msm_smem_new_client(enum smem_type mtype,
void *platform_resources, enum session_type stype);
+void msm_smem_set_tme_encode_mode(struct smem_client *client, bool enable);
int msm_smem_alloc(struct smem_client *client,
size_t size, u32 align, u32 flags, enum hal_buffer buffer_type,
int map_kernel, struct msm_smem *smem);
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c
index 3e0ba75..2958473 100644
--- a/drivers/mmc/core/host.c
+++ b/drivers/mmc/core/host.c
@@ -50,9 +50,28 @@
kfree(host);
}
+static int mmc_host_prepare(struct device *dev)
+{
+ /*
+ * Since mmc_host is a virtual device, we don't have to do anything.
+ * If we return a positive value, the pm framework will consider that
+ * the runtime suspend and system suspend of this device is same and
+ * will set direct_complete flag as true. We don't want this as the
+ * mmc_host always has positive disable_depth and setting the flag
+ * will not speed up the suspend process.
+ * So return 0.
+ */
+ return 0;
+}
+
+static const struct dev_pm_ops mmc_pm_ops = {
+ .prepare = mmc_host_prepare,
+};
+
static struct class mmc_host_class = {
.name = "mmc_host",
.dev_release = mmc_host_classdev_release,
+ .pm = &mmc_pm_ops,
};
int mmc_register_host_class(void)
diff --git a/drivers/pci/host/pci-msm.c b/drivers/pci/host/pci-msm.c
index fd5c515..eb05f5ef 100644
--- a/drivers/pci/host/pci-msm.c
+++ b/drivers/pci/host/pci-msm.c
@@ -5444,7 +5444,8 @@
static void msm_pcie_config_l1ss(struct msm_pcie_dev_t *dev,
struct pci_dev *pdev, bool enable)
{
- bool l1_1_cap_support, l1_2_cap_support;
+ bool l1_1_pcipm_support, l1_2_pcipm_support;
+ bool l1_1_aspm_support, l1_2_aspm_support;
u32 val, val2;
u32 l1ss_cap_id_offset, l1ss_cap_offset, l1ss_ctl1_offset;
u32 devctl2_offset = pdev->pcie_cap + PCI_EXP_DEVCTL2;
@@ -5461,11 +5462,14 @@
l1ss_ctl1_offset = l1ss_cap_id_offset + PCI_L1SS_CTL1;
pci_read_config_dword(pdev, l1ss_cap_offset, &val);
- l1_1_cap_support = !!(val & (PCI_L1SS_CAP_ASPM_L1_1));
- l1_2_cap_support = !!(val & (PCI_L1SS_CAP_ASPM_L1_2));
- if (!l1_1_cap_support && !l1_2_cap_support) {
+ l1_1_pcipm_support = !!(val & (PCI_L1SS_CAP_PCIPM_L1_1));
+ l1_2_pcipm_support = !!(val & (PCI_L1SS_CAP_PCIPM_L1_2));
+ l1_1_aspm_support = !!(val & (PCI_L1SS_CAP_ASPM_L1_1));
+ l1_2_aspm_support = !!(val & (PCI_L1SS_CAP_ASPM_L1_2));
+ if (!l1_1_pcipm_support && !l1_2_pcipm_support &&
+ !l1_1_aspm_support && !l1_2_aspm_support) {
PCIE_DBG(dev,
- "PCIe: RC%d: PCI device does not support L1.1 and L1.2\n",
+ "PCIe: RC%d: PCI device does not support any L1ss\n",
dev->rc_idx);
return;
}
@@ -5484,14 +5488,18 @@
msm_pcie_config_clear_set_dword(pdev, devctl2_offset, 0,
PCI_EXP_DEVCTL2_LTR_EN);
msm_pcie_config_clear_set_dword(pdev, l1ss_ctl1_offset, 0,
- (l1_1_cap_support ? PCI_L1SS_CTL1_ASPM_L1_1 : 0) |
- (l1_2_cap_support ? PCI_L1SS_CTL1_ASPM_L1_2 : 0));
+ (l1_1_pcipm_support ? PCI_L1SS_CTL1_PCIPM_L1_1 : 0) |
+ (l1_2_pcipm_support ? PCI_L1SS_CTL1_PCIPM_L1_2 : 0) |
+ (l1_1_aspm_support ? PCI_L1SS_CTL1_ASPM_L1_1 : 0) |
+ (l1_2_aspm_support ? PCI_L1SS_CTL1_ASPM_L1_2 : 0));
} else {
msm_pcie_config_clear_set_dword(pdev, devctl2_offset,
PCI_EXP_DEVCTL2_LTR_EN, 0);
msm_pcie_config_clear_set_dword(pdev, l1ss_ctl1_offset,
- (l1_1_cap_support ? PCI_L1SS_CTL1_ASPM_L1_1 : 0) |
- (l1_2_cap_support ? PCI_L1SS_CTL1_ASPM_L1_2 : 0), 0);
+ (l1_1_pcipm_support ? PCI_L1SS_CTL1_PCIPM_L1_1 : 0) |
+ (l1_2_pcipm_support ? PCI_L1SS_CTL1_PCIPM_L1_2 : 0) |
+ (l1_1_aspm_support ? PCI_L1SS_CTL1_ASPM_L1_1 : 0) |
+ (l1_2_aspm_support ? PCI_L1SS_CTL1_ASPM_L1_2 : 0), 0);
}
pci_read_config_dword(pdev, l1ss_ctl1_offset, &val);
@@ -5588,7 +5596,9 @@
pci_read_config_dword(child_pdev,
l1ss_cap_id_offset + PCI_L1SS_CTL1, &val);
child_l1ss_enable = !!(val &
- (PCI_L1SS_CTL1_ASPM_L1_1 |
+ (PCI_L1SS_CTL1_PCIPM_L1_1 |
+ PCI_L1SS_CTL1_PCIPM_L1_2 |
+ PCI_L1SS_CTL1_ASPM_L1_1 |
PCI_L1SS_CTL1_ASPM_L1_2));
if (child_l1ss_enable)
break;
diff --git a/drivers/platform/msm/gsi/gsi.c b/drivers/platform/msm/gsi/gsi.c
index 6727da6..dc445a0 100644
--- a/drivers/platform/msm/gsi/gsi.c
+++ b/drivers/platform/msm/gsi/gsi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -27,6 +27,7 @@
#define GSI_RESET_WA_MIN_SLEEP 1000
#define GSI_RESET_WA_MAX_SLEEP 2000
+#define GSI_CHNL_STATE_MAX_RETRYCNT 10
static const struct of_device_id msm_gsi_match[] = {
{ .compatible = "qcom,msm_gsi", },
{ },
@@ -2076,6 +2077,7 @@
uint32_t val;
struct gsi_chan_ctx *ctx;
bool reset_done = false;
+ uint32_t retry_cnt = 0;
if (!gsi_ctx) {
pr_err("%s:%d gsi context not allocated\n", __func__, __LINE__);
@@ -2112,9 +2114,19 @@
return -GSI_STATUS_TIMED_OUT;
}
+revrfy_chnlstate:
if (ctx->state != GSI_CHAN_STATE_ALLOCATED) {
GSIERR("chan_hdl=%lu unexpected state=%u\n", chan_hdl,
ctx->state);
+ /* GSI register update state not sync with gsi channel
+ * context state not sync, need to wait for 1ms to sync.
+ */
+ retry_cnt++;
+ if (retry_cnt <= GSI_CHNL_STATE_MAX_RETRYCNT) {
+ usleep_range(GSI_RESET_WA_MIN_SLEEP,
+ GSI_RESET_WA_MAX_SLEEP);
+ goto revrfy_chnlstate;
+ }
BUG();
}
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa_debugfs.c b/drivers/platform/msm/ipa/ipa_v2/ipa_debugfs.c
index a297f24..37614cc 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa_debugfs.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa_debugfs.c
@@ -580,6 +580,15 @@
if (attrib->attrib_mask & IPA_FLT_MAC_ETHER_TYPE)
pr_err("ether_type:%x ", attrib->ether_type);
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE)
+ pr_err("l2tp inner ip type: %d ", attrib->type);
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ addr[0] = htonl(attrib->u.v4.dst_addr);
+ mask[0] = htonl(attrib->u.v4.dst_addr_mask);
+ pr_err("dst_addr:%pI4 dst_addr_mask:%pI4 ", addr, mask);
+ }
+
pr_err("\n");
return 0;
}
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa_dp.c b/drivers/platform/msm/ipa/ipa_v2/ipa_dp.c
index 3cb86d0..9f71d7b 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa_dp.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa_dp.c
@@ -2903,10 +2903,12 @@
struct ipa_ep_context *ep;
unsigned int src_pipe;
u32 metadata;
+ u8 ucp;
status = (struct ipa_hw_pkt_status *)rx_skb->data;
src_pipe = status->endp_src_idx;
metadata = status->metadata;
+ ucp = status->ucp;
ep = &ipa_ctx->ep[src_pipe];
if (unlikely(src_pipe >= ipa_ctx->ipa_num_pipes ||
!ep->valid ||
@@ -2930,8 +2932,10 @@
* ------------------------------------------
*/
*(u16 *)rx_skb->cb = ((metadata >> 16) & 0xFFFF);
+ *(u8 *)(rx_skb->cb + 4) = ucp;
IPADBG_LOW("meta_data: 0x%x cb: 0x%x\n",
metadata, *(u32 *)rx_skb->cb);
+ IPADBG_LOW("ucp: %d\n", *(u8 *)(rx_skb->cb + 4));
ep->client_notify(ep->priv, IPA_RECEIVE, (unsigned long)(rx_skb));
}
diff --git a/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
index 72b2e96..8a3fbd4 100644
--- a/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
+++ b/drivers/platform/msm/ipa/ipa_v2/ipa_utils.c
@@ -1407,6 +1407,37 @@
ihl_ofst_meq32++;
}
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE) {
+ if (ipa_ihl_ofst_meq32[ihl_ofst_meq32] == -1) {
+ IPAERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ihl_ofst_meq32[ihl_ofst_meq32];
+ /* 22 => offset of IP type after v6 header */
+ *buf = ipa_write_8(22, *buf);
+ *buf = ipa_write_32(0xF0000000, *buf);
+ if (attrib->type == 0x40)
+ *buf = ipa_write_32(0x40000000, *buf);
+ else
+ *buf = ipa_write_32(0x60000000, *buf);
+ *buf = ipa_pad_to_32(*buf);
+ ihl_ofst_meq32++;
+ }
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ if (ipa_ihl_ofst_meq32[ihl_ofst_meq32] == -1) {
+ IPAERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ihl_ofst_meq32[ihl_ofst_meq32];
+ /* 38 => offset of inner IPv4 addr */
+ *buf = ipa_write_8(38, *buf);
+ *buf = ipa_write_32(attrib->u.v4.dst_addr_mask, *buf);
+ *buf = ipa_write_32(attrib->u.v4.dst_addr, *buf);
+ *buf = ipa_pad_to_32(*buf);
+ ihl_ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_SRC_PORT) {
if (ipa_ihl_ofst_rng16[ihl_ofst_rng16] == -1) {
IPAERR("ran out of ihl_rng16 eq\n");
@@ -2006,6 +2037,36 @@
ihl_ofst_meq32++;
}
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE) {
+ if (ipa_ihl_ofst_meq32[ihl_ofst_meq32] == -1) {
+ IPAERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ihl_ofst_meq32[ihl_ofst_meq32];
+ /* 22 => offset of inner IP type after v6 header */
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].offset = 22;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].mask =
+ 0xF0000000;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].value =
+ (u32)attrib->type << 24;
+ ihl_ofst_meq32++;
+ }
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ if (ipa_ihl_ofst_meq32[ihl_ofst_meq32] == -1) {
+ IPAERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= ipa_ihl_ofst_meq32[ihl_ofst_meq32];
+ /* 38 => offset of inner IPv4 addr */
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].offset = 38;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].mask =
+ attrib->u.v4.dst_addr_mask;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].value =
+ attrib->u.v4.dst_addr;
+ ihl_ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_SRC_PORT) {
if (ipa_ihl_ofst_rng16[ihl_ofst_rng16] == -1) {
IPAERR_RL("ran out of ihl_rng16 eq\n");
diff --git a/drivers/platform/msm/ipa/ipa_v2/rmnet_ipa.c b/drivers/platform/msm/ipa/ipa_v2/rmnet_ipa.c
index d91d7eb..9f0cec9 100644
--- a/drivers/platform/msm/ipa/ipa_v2/rmnet_ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v2/rmnet_ipa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2868,7 +2868,7 @@
if (reset) {
req->reset_stats_valid = true;
req->reset_stats = true;
- IPAWANERR("reset the pipe stats\n");
+ IPAWANDBG("reset the pipe stats\n");
} else {
/* print tethered-client enum */
IPAWANDBG_LOW("Tethered-client enum(%d)\n", data->ipa_client);
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa.c b/drivers/platform/msm/ipa/ipa_v3/ipa.c
index 8e8aaef..ae24675 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -3486,7 +3486,7 @@
} else {
WARN_ON(1);
}
- IPADBG("curr %d idx %d\n", ipa3_ctx->curr_ipa_clk_rate, idx);
+ IPADBG_LOW("curr %d idx %d\n", ipa3_ctx->curr_ipa_clk_rate, idx);
return idx;
}
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c
index 5da83e5..e88ab27 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_debugfs.c
@@ -527,6 +527,15 @@
if (attrib->attrib_mask & IPA_FLT_TCP_SYN_L2TP)
pr_err("tcp syn l2tp ");
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE)
+ pr_err("l2tp inner ip type: %d ", attrib->type);
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ addr[0] = htonl(attrib->u.v4.dst_addr);
+ mask[0] = htonl(attrib->u.v4.dst_addr_mask);
+ pr_err("dst_addr:%pI4 dst_addr_mask:%pI4 ", addr, mask);
+ }
+
pr_err("\n");
return 0;
}
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
index a812891..3aaae8d 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_dp.c
@@ -2570,10 +2570,12 @@
struct ipa3_ep_context *ep;
unsigned int src_pipe;
u32 metadata;
+ u8 ucp;
ipahal_pkt_status_parse(rx_skb->data, &status);
src_pipe = status.endp_src_idx;
metadata = status.metadata;
+ ucp = status.ucp;
ep = &ipa3_ctx->ep[src_pipe];
if (unlikely(src_pipe >= ipa3_ctx->ipa_num_pipes ||
!ep->valid ||
@@ -2596,8 +2598,10 @@
* ------------------------------------------
*/
*(u16 *)rx_skb->cb = ((metadata >> 16) & 0xFFFF);
+ *(u8 *)(rx_skb->cb + 4) = ucp;
IPADBG_LOW("meta_data: 0x%x cb: 0x%x\n",
metadata, *(u32 *)rx_skb->cb);
+ IPADBG_LOW("ucp: %d\n", *(u8 *)(rx_skb->cb + 4));
ep->client_notify(ep->priv, IPA_RECEIVE, (unsigned long)(rx_skb));
}
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
index a677046..1254fe3 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_fltrt.c
@@ -1233,6 +1233,39 @@
ihl_ofst_meq32 += 2;
}
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE) {
+ if (IPA_IS_RAN_OUT_OF_EQ(ipa3_0_ihl_ofst_meq32,
+ ihl_ofst_meq32)) {
+ IPAHAL_ERR("ran out of ihl_meq32 eq\n");
+ goto err;
+ }
+ *en_rule |= IPA_GET_RULE_EQ_BIT_PTRN(
+ ipa3_0_ihl_ofst_meq32[ihl_ofst_meq32]);
+ /* 22 => offset of IP type after v6 header */
+ extra = ipa_write_8(22, extra);
+ rest = ipa_write_32(0xF0000000, rest);
+ if (attrib->type == 0x40)
+ rest = ipa_write_32(0x40000000, rest);
+ else
+ rest = ipa_write_32(0x60000000, rest);
+ ihl_ofst_meq32++;
+ }
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ if (IPA_IS_RAN_OUT_OF_EQ(ipa3_0_ihl_ofst_meq32,
+ ihl_ofst_meq32)) {
+ IPAHAL_ERR("ran out of ihl_meq32 eq\n");
+ goto err;
+ }
+ *en_rule |= IPA_GET_RULE_EQ_BIT_PTRN(
+ ipa3_0_ihl_ofst_meq32[ihl_ofst_meq32]);
+ /* 38 => offset of inner IPv4 addr */
+ extra = ipa_write_8(38, extra);
+ rest = ipa_write_32(attrib->u.v4.dst_addr_mask, rest);
+ rest = ipa_write_32(attrib->u.v4.dst_addr, rest);
+ ihl_ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_META_DATA) {
*en_rule |= IPA_GET_RULE_EQ_BIT_PTRN(IPA_METADATA_COMPARE);
rest = ipa_write_32(attrib->meta_data_mask, rest);
@@ -2269,6 +2302,40 @@
ihl_ofst_meq32 += 2;
}
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IP_TYPE) {
+ if (IPA_IS_RAN_OUT_OF_EQ(ipa3_0_ihl_ofst_meq32,
+ ihl_ofst_meq32)) {
+ IPAHAL_ERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= IPA_GET_RULE_EQ_BIT_PTRN(
+ ipa3_0_ihl_ofst_meq32[ihl_ofst_meq32]);
+ /* 22 => offset of inner IP type after v6 header */
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].offset = 22;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].mask =
+ 0xF0000000;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].value =
+ (u32)attrib->type << 24;
+ ihl_ofst_meq32++;
+ }
+
+ if (attrib->attrib_mask & IPA_FLT_L2TP_INNER_IPV4_DST_ADDR) {
+ if (IPA_IS_RAN_OUT_OF_EQ(ipa3_0_ihl_ofst_meq32,
+ ihl_ofst_meq32)) {
+ IPAHAL_ERR("ran out of ihl_meq32 eq\n");
+ return -EPERM;
+ }
+ *en_rule |= IPA_GET_RULE_EQ_BIT_PTRN(
+ ipa3_0_ihl_ofst_meq32[ihl_ofst_meq32]);
+ /* 38 => offset of inner IPv4 addr */
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].offset = 38;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].mask =
+ attrib->u.v4.dst_addr_mask;
+ eq_atrb->ihl_offset_meq_32[ihl_ofst_meq32].value =
+ attrib->u.v4.dst_addr;
+ ihl_ofst_meq32++;
+ }
+
if (attrib->attrib_mask & IPA_FLT_MAC_ETHER_TYPE) {
if (IPA_IS_RAN_OUT_OF_EQ(ipa3_0_ofst_meq32, ofst_meq32)) {
IPAHAL_ERR_RL("ran out of meq32 eq\n");
diff --git a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
index 98a8594..5b0834a 100644
--- a/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
+++ b/drivers/platform/msm/ipa/ipa_v3/rmnet_ipa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -3170,7 +3170,7 @@
if (reset) {
req->reset_stats_valid = true;
req->reset_stats = true;
- IPAWANERR("reset the pipe stats\n");
+ IPAWANDBG("reset the pipe stats\n");
} else {
/* print tethered-client enum */
IPAWANDBG("Tethered-client enum(%d)\n", data->ipa_client);
diff --git a/drivers/platform/msm/ipa/test/ipa_test_mhi.c b/drivers/platform/msm/ipa/test/ipa_test_mhi.c
index 195799e..212557c 100644
--- a/drivers/platform/msm/ipa/test/ipa_test_mhi.c
+++ b/drivers/platform/msm/ipa/test/ipa_test_mhi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1304,6 +1304,7 @@
u32 next_wp_ofst;
int i;
u32 num_of_ed_to_queue;
+ u32 avail_ev;
IPA_UT_LOG("Entry\n");
@@ -1341,6 +1342,8 @@
wp_ofst = (u32)(p_events[event_ring_index].wp -
p_events[event_ring_index].rbase);
+ rp_ofst = (u32)(p_events[event_ring_index].rp -
+ p_events[event_ring_index].rbase);
if (p_events[event_ring_index].rlen & 0xFFFFFFFF00000000) {
IPA_UT_LOG("invalid ev rlen %llu\n",
@@ -1348,23 +1351,48 @@
return -EFAULT;
}
- next_wp_ofst = (wp_ofst + num_of_ed_to_queue *
- sizeof(struct ipa_mhi_event_ring_element)) %
- (u32)p_events[event_ring_index].rlen;
+ if (wp_ofst > rp_ofst) {
+ avail_ev = (wp_ofst - rp_ofst) /
+ sizeof(struct ipa_mhi_event_ring_element);
+ } else {
+ avail_ev = (u32)p_events[event_ring_index].rlen -
+ (rp_ofst - wp_ofst);
+ avail_ev /= sizeof(struct ipa_mhi_event_ring_element);
+ }
- /* set next WP */
- p_events[event_ring_index].wp =
- (u32)p_events[event_ring_index].rbase + next_wp_ofst;
+ IPA_UT_LOG("wp_ofst=0x%x rp_ofst=0x%x rlen=%llu avail_ev=%u\n",
+ wp_ofst, rp_ofst, p_events[event_ring_index].rlen, avail_ev);
- /* write value to event ring doorbell */
- IPA_UT_LOG("DB to event 0x%llx: base %pa ofst 0x%x\n",
- p_events[event_ring_index].wp,
- &(gsi_ctx->per.phys_addr), GSI_EE_n_EV_CH_k_DOORBELL_0_OFFS(
+ if (num_of_ed_to_queue > ((u32)p_events[event_ring_index].rlen /
+ sizeof(struct ipa_mhi_event_ring_element))) {
+ IPA_UT_LOG("event ring too small for %u credits\n",
+ num_of_ed_to_queue);
+ return -EFAULT;
+ }
+
+ if (num_of_ed_to_queue > avail_ev) {
+ IPA_UT_LOG("Need to add event credits (needed=%u)\n",
+ num_of_ed_to_queue - avail_ev);
+
+ next_wp_ofst = (wp_ofst + (num_of_ed_to_queue - avail_ev) *
+ sizeof(struct ipa_mhi_event_ring_element)) %
+ (u32)p_events[event_ring_index].rlen;
+
+ /* set next WP */
+ p_events[event_ring_index].wp =
+ (u32)p_events[event_ring_index].rbase + next_wp_ofst;
+
+ /* write value to event ring doorbell */
+ IPA_UT_LOG("DB to event 0x%llx: base %pa ofst 0x%x\n",
+ p_events[event_ring_index].wp,
+ &(gsi_ctx->per.phys_addr),
+ GSI_EE_n_EV_CH_k_DOORBELL_0_OFFS(
event_ring_index + ipa3_ctx->mhi_evid_limits[0], 0));
- iowrite32(p_events[event_ring_index].wp,
- test_mhi_ctx->gsi_mmio +
- GSI_EE_n_EV_CH_k_DOORBELL_0_OFFS(
+ iowrite32(p_events[event_ring_index].wp,
+ test_mhi_ctx->gsi_mmio +
+ GSI_EE_n_EV_CH_k_DOORBELL_0_OFFS(
event_ring_index + ipa3_ctx->mhi_evid_limits[0], 0));
+ }
for (i = 0; i < buf_array_size; i++) {
/* calculate virtual pointer for current WP and RP */
diff --git a/drivers/power/supply/qcom/qpnp-smb2.c b/drivers/power/supply/qcom/qpnp-smb2.c
index d6ff6fc..74e80cd 100644
--- a/drivers/power/supply/qcom/qpnp-smb2.c
+++ b/drivers/power/supply/qcom/qpnp-smb2.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1573,20 +1573,12 @@
BATT_PROFILE_VOTER, true, chg->batt_profile_fv_uv);
vote(chg->dc_icl_votable,
DEFAULT_VOTER, true, chip->dt.dc_icl_ua);
- vote(chg->hvdcp_disable_votable_indirect, PD_INACTIVE_VOTER,
- true, 0);
- vote(chg->hvdcp_disable_votable_indirect, VBUS_CC_SHORT_VOTER,
- true, 0);
vote(chg->hvdcp_disable_votable_indirect, DEFAULT_VOTER,
chip->dt.hvdcp_disable, 0);
vote(chg->pd_disallowed_votable_indirect, CC_DETACHED_VOTER,
true, 0);
vote(chg->pd_disallowed_votable_indirect, HVDCP_TIMEOUT_VOTER,
true, 0);
- vote(chg->pd_disallowed_votable_indirect, MICRO_USB_VOTER,
- (chg->connector_type == POWER_SUPPLY_CONNECTOR_MICRO_USB), 0);
- vote(chg->hvdcp_enable_votable, MICRO_USB_VOTER,
- (chg->connector_type == POWER_SUPPLY_CONNECTOR_MICRO_USB), 0);
/*
* AICL configuration:
@@ -1636,6 +1628,16 @@
return rc;
}
+ /* Connector types based votes */
+ vote(chg->hvdcp_disable_votable_indirect, PD_INACTIVE_VOTER,
+ (chg->connector_type == POWER_SUPPLY_CONNECTOR_TYPEC), 0);
+ vote(chg->hvdcp_disable_votable_indirect, VBUS_CC_SHORT_VOTER,
+ (chg->connector_type == POWER_SUPPLY_CONNECTOR_TYPEC), 0);
+ vote(chg->pd_disallowed_votable_indirect, MICRO_USB_VOTER,
+ (chg->connector_type == POWER_SUPPLY_CONNECTOR_MICRO_USB), 0);
+ vote(chg->hvdcp_enable_votable, MICRO_USB_VOTER,
+ (chg->connector_type == POWER_SUPPLY_CONNECTOR_MICRO_USB), 0);
+
/* configure VCONN for software control */
rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
VCONN_EN_SRC_BIT | VCONN_EN_VALUE_BIT,
diff --git a/drivers/power/supply/qcom/smb-lib.c b/drivers/power/supply/qcom/smb-lib.c
index 4656e35..496a276 100644
--- a/drivers/power/supply/qcom/smb-lib.c
+++ b/drivers/power/supply/qcom/smb-lib.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2079,9 +2079,6 @@
return -EINVAL;
chg->system_temp_level = val->intval;
- /* disable parallel charge in case of system temp level */
- vote(chg->pl_disable_votable, THERMAL_DAEMON_VOTER,
- chg->system_temp_level ? true : false, 0);
if (chg->system_temp_level == chg->thermal_levels)
return vote(chg->chg_disable_votable,
diff --git a/drivers/power/supply/qcom/smb1355-charger.c b/drivers/power/supply/qcom/smb1355-charger.c
index 833a8da..f1e4e56 100644
--- a/drivers/power/supply/qcom/smb1355-charger.c
+++ b/drivers/power/supply/qcom/smb1355-charger.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -94,6 +94,9 @@
#define MISC_RT_STS_REG (MISC_BASE + 0x10)
#define HARD_ILIMIT_RT_STS_BIT BIT(5)
+#define BANDGAP_ENABLE_REG (MISC_BASE + 0x42)
+#define BANDGAP_ENABLE_CMD_BIT BIT(0)
+
#define BARK_BITE_WDOG_PET_REG (MISC_BASE + 0x43)
#define BARK_BITE_WDOG_PET_BIT BIT(0)
@@ -150,6 +153,8 @@
((mode == POWER_SUPPLY_PL_USBIN_USBIN) \
|| (mode == POWER_SUPPLY_PL_USBIN_USBIN_EXT))
+#define PARALLEL_ENABLE_VOTER "PARALLEL_ENABLE_VOTER"
+
struct smb_chg_param {
const char *name;
u16 reg;
@@ -224,6 +229,8 @@
bool exit_die_temp;
struct delayed_work die_temp_work;
bool disabled;
+
+ struct votable *irq_disable_votable;
};
static bool is_secure(struct smb1355 *chip, int addr)
@@ -449,7 +456,7 @@
if (of_property_read_bool(node, "qcom,stacked-batfet"))
chip->dt.pl_batfet_mode = POWER_SUPPLY_PL_STACKED_BATFET;
- return rc;
+ return 0;
}
/*****************************
@@ -662,6 +669,18 @@
schedule_delayed_work(&chip->die_temp_work, 0);
}
+ if (chip->irq_disable_votable)
+ vote(chip->irq_disable_votable, PARALLEL_ENABLE_VOTER,
+ disable, 0);
+
+ rc = smb1355_masked_write(chip, BANDGAP_ENABLE_REG,
+ BANDGAP_ENABLE_CMD_BIT,
+ disable ? 0 : BANDGAP_ENABLE_CMD_BIT);
+ if (rc < 0) {
+ pr_err("Couldn't configure bandgap enable rc=%d\n", rc);
+ return rc;
+ }
+
chip->disabled = disable;
return 0;
@@ -1084,6 +1103,7 @@
return rc;
}
+ smb1355_irqs[irq_index].irq = irq;
if (smb1355_irqs[irq_index].wake)
enable_irq_wake(irq);
@@ -1112,6 +1132,23 @@
return rc;
}
+static int smb1355_irq_disable_callback(struct votable *votable, void *data,
+ int disable, const char *client)
+
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(smb1355_irqs); i++) {
+ if (smb1355_irqs[i].irq) {
+ if (disable)
+ disable_irq(smb1355_irqs[i].irq);
+ else
+ enable_irq(smb1355_irqs[i].irq);
+ }
+ }
+
+ return 0;
+}
/*********
* PROBE *
@@ -1187,6 +1224,13 @@
goto cleanup;
}
+ chip->irq_disable_votable = create_votable("SMB1355_IRQ_DISABLE",
+ VOTE_SET_ANY, smb1355_irq_disable_callback, chip);
+ if (IS_ERR(chip->irq_disable_votable)) {
+ rc = PTR_ERR(chip->irq_disable_votable);
+ goto cleanup;
+ }
+
pr_info("%s probed successfully pl_mode=%s batfet_mode=%s\n",
chip->name,
IS_USBIN(chip->dt.pl_mode) ? "USBIN-USBIN" : "USBMID-USBMID",
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index ee1b322..1bd67e6 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -888,6 +888,16 @@
This driver provides support for the voltage regulators on the
WM8994 CODEC.
+config REGULATOR_CPR
+ bool "RBCPR regulator driver for APC"
+ depends on OF
+ help
+ Compile in RBCPR (RapidBridge Core Power Reduction) driver to support
+ corner vote for APC power rail. The driver takes PTE process voltage
+ suggestions in efuse as initial settings. It converts corner vote
+ to voltage value before writing to a voltage regulator API, such as
+ that provided by spm-regulator driver.
+
config REGULATOR_CPR3
bool "CPR3 regulator core support"
help
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index b2bfba8..c75e399 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -116,6 +116,7 @@
obj-$(CONFIG_REGULATOR_RPM_SMD) += rpm-smd-regulator.o
obj-$(CONFIG_REGULATOR_SPM) += spm-regulator.o
+obj-$(CONFIG_REGULATOR_CPR) += cpr-regulator.o
obj-$(CONFIG_REGULATOR_CPR3) += cpr3-regulator.o cpr3-util.o
obj-$(CONFIG_REGULATOR_CPR3_HMSS) += cpr3-hmss-regulator.o
obj-$(CONFIG_REGULATOR_CPR3_MMSS) += cpr3-mmss-regulator.o
diff --git a/drivers/regulator/cpr-regulator.c b/drivers/regulator/cpr-regulator.c
new file mode 100644
index 0000000..9c47e82
--- /dev/null
+++ b/drivers/regulator/cpr-regulator.c
@@ -0,0 +1,6408 @@
+/*
+ * Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
+#include <linux/module.h>
+#include <linux/cpu.h>
+#include <linux/cpu_pm.h>
+#include <linux/cpumask.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/bitops.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_opp.h>
+#include <linux/interrupt.h>
+#include <linux/debugfs.h>
+#include <linux/sort.h>
+#include <linux/uaccess.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/of_regulator.h>
+#include <linux/regulator/cpr-regulator.h>
+#include <linux/msm_thermal.h>
+#include <linux/msm_tsens.h>
+#include <soc/qcom/scm.h>
+
+/* Register Offsets for RB-CPR and Bit Definitions */
+
+/* RBCPR Version Register */
+#define REG_RBCPR_VERSION 0
+#define RBCPR_VER_2 0x02
+
+/* RBCPR Gate Count and Target Registers */
+#define REG_RBCPR_GCNT_TARGET(n) (0x60 + 4 * n)
+
+#define RBCPR_GCNT_TARGET_GCNT_BITS 10
+#define RBCPR_GCNT_TARGET_GCNT_SHIFT 12
+#define RBCPR_GCNT_TARGET_GCNT_MASK ((1<<RBCPR_GCNT_TARGET_GCNT_BITS)-1)
+
+/* RBCPR Sensor Mask and Bypass Registers */
+#define REG_RBCPR_SENSOR_MASK0 0x20
+#define RBCPR_SENSOR_MASK0_SENSOR(n) (~BIT(n))
+#define REG_RBCPR_SENSOR_BYPASS0 0x30
+
+/* RBCPR Timer Control */
+#define REG_RBCPR_TIMER_INTERVAL 0x44
+#define REG_RBIF_TIMER_ADJUST 0x4C
+
+#define RBIF_TIMER_ADJ_CONS_UP_BITS 4
+#define RBIF_TIMER_ADJ_CONS_UP_MASK ((1<<RBIF_TIMER_ADJ_CONS_UP_BITS)-1)
+#define RBIF_TIMER_ADJ_CONS_DOWN_BITS 4
+#define RBIF_TIMER_ADJ_CONS_DOWN_MASK ((1<<RBIF_TIMER_ADJ_CONS_DOWN_BITS)-1)
+#define RBIF_TIMER_ADJ_CONS_DOWN_SHIFT 4
+#define RBIF_TIMER_ADJ_CLAMP_INT_BITS 8
+#define RBIF_TIMER_ADJ_CLAMP_INT_MASK ((1<<RBIF_TIMER_ADJ_CLAMP_INT_BITS)-1)
+#define RBIF_TIMER_ADJ_CLAMP_INT_SHIFT 8
+
+/* RBCPR Config Register */
+#define REG_RBIF_LIMIT 0x48
+#define REG_RBCPR_STEP_QUOT 0x80
+#define REG_RBIF_SW_VLEVEL 0x94
+
+#define RBIF_LIMIT_CEILING_BITS 6
+#define RBIF_LIMIT_CEILING_MASK ((1<<RBIF_LIMIT_CEILING_BITS)-1)
+#define RBIF_LIMIT_CEILING_SHIFT 6
+#define RBIF_LIMIT_FLOOR_BITS 6
+#define RBIF_LIMIT_FLOOR_MASK ((1<<RBIF_LIMIT_FLOOR_BITS)-1)
+
+#define RBIF_LIMIT_CEILING_DEFAULT RBIF_LIMIT_CEILING_MASK
+#define RBIF_LIMIT_FLOOR_DEFAULT 0
+#define RBIF_SW_VLEVEL_DEFAULT 0x20
+
+#define RBCPR_STEP_QUOT_STEPQUOT_BITS 8
+#define RBCPR_STEP_QUOT_STEPQUOT_MASK ((1<<RBCPR_STEP_QUOT_STEPQUOT_BITS)-1)
+#define RBCPR_STEP_QUOT_IDLE_CLK_BITS 4
+#define RBCPR_STEP_QUOT_IDLE_CLK_MASK ((1<<RBCPR_STEP_QUOT_IDLE_CLK_BITS)-1)
+#define RBCPR_STEP_QUOT_IDLE_CLK_SHIFT 8
+
+/* RBCPR Control Register */
+#define REG_RBCPR_CTL 0x90
+
+#define RBCPR_CTL_LOOP_EN BIT(0)
+#define RBCPR_CTL_TIMER_EN BIT(3)
+#define RBCPR_CTL_SW_AUTO_CONT_ACK_EN BIT(5)
+#define RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN BIT(6)
+#define RBCPR_CTL_COUNT_MODE BIT(10)
+#define RBCPR_CTL_UP_THRESHOLD_BITS 4
+#define RBCPR_CTL_UP_THRESHOLD_MASK ((1<<RBCPR_CTL_UP_THRESHOLD_BITS)-1)
+#define RBCPR_CTL_UP_THRESHOLD_SHIFT 24
+#define RBCPR_CTL_DN_THRESHOLD_BITS 4
+#define RBCPR_CTL_DN_THRESHOLD_MASK ((1<<RBCPR_CTL_DN_THRESHOLD_BITS)-1)
+#define RBCPR_CTL_DN_THRESHOLD_SHIFT 28
+
+/* RBCPR Ack/Nack Response */
+#define REG_RBIF_CONT_ACK_CMD 0x98
+#define REG_RBIF_CONT_NACK_CMD 0x9C
+
+/* RBCPR Result status Registers */
+#define REG_RBCPR_RESULT_0 0xA0
+#define REG_RBCPR_RESULT_1 0xA4
+
+#define RBCPR_RESULT_1_SEL_FAST_BITS 3
+#define RBCPR_RESULT_1_SEL_FAST(val) (val & \
+ ((1<<RBCPR_RESULT_1_SEL_FAST_BITS) - 1))
+
+#define RBCPR_RESULT0_BUSY_SHIFT 19
+#define RBCPR_RESULT0_BUSY_MASK BIT(RBCPR_RESULT0_BUSY_SHIFT)
+#define RBCPR_RESULT0_ERROR_LT0_SHIFT 18
+#define RBCPR_RESULT0_ERROR_SHIFT 6
+#define RBCPR_RESULT0_ERROR_BITS 12
+#define RBCPR_RESULT0_ERROR_MASK ((1<<RBCPR_RESULT0_ERROR_BITS)-1)
+#define RBCPR_RESULT0_ERROR_STEPS_SHIFT 2
+#define RBCPR_RESULT0_ERROR_STEPS_BITS 4
+#define RBCPR_RESULT0_ERROR_STEPS_MASK ((1<<RBCPR_RESULT0_ERROR_STEPS_BITS)-1)
+#define RBCPR_RESULT0_STEP_UP_SHIFT 1
+
+/* RBCPR Interrupt Control Register */
+#define REG_RBIF_IRQ_EN(n) (0x100 + 4 * n)
+#define REG_RBIF_IRQ_CLEAR 0x110
+#define REG_RBIF_IRQ_STATUS 0x114
+
+#define CPR_INT_DONE BIT(0)
+#define CPR_INT_MIN BIT(1)
+#define CPR_INT_DOWN BIT(2)
+#define CPR_INT_MID BIT(3)
+#define CPR_INT_UP BIT(4)
+#define CPR_INT_MAX BIT(5)
+#define CPR_INT_CLAMP BIT(6)
+#define CPR_INT_ALL (CPR_INT_DONE | CPR_INT_MIN | CPR_INT_DOWN | \
+ CPR_INT_MID | CPR_INT_UP | CPR_INT_MAX | CPR_INT_CLAMP)
+#define CPR_INT_DEFAULT (CPR_INT_UP | CPR_INT_DOWN)
+
+#define CPR_NUM_RING_OSC 8
+
+/* RBCPR Debug Resgister */
+#define REG_RBCPR_DEBUG1 0x120
+#define RBCPR_DEBUG1_QUOT_FAST_BITS 12
+#define RBCPR_DEBUG1_QUOT_SLOW_BITS 12
+#define RBCPR_DEBUG1_QUOT_SLOW_SHIFT 12
+
+#define RBCPR_DEBUG1_QUOT_FAST(val) (val & \
+ ((1<<RBCPR_DEBUG1_QUOT_FAST_BITS)-1))
+
+#define RBCPR_DEBUG1_QUOT_SLOW(val) ((val>>RBCPR_DEBUG1_QUOT_SLOW_SHIFT) & \
+ ((1<<RBCPR_DEBUG1_QUOT_SLOW_BITS)-1))
+
+/* RBCPR Aging Resgister */
+#define REG_RBCPR_HTOL_AGE 0x160
+#define RBCPR_HTOL_AGE_PAGE BIT(1)
+#define RBCPR_AGE_DATA_STATUS BIT(2)
+
+/* RBCPR Clock Control Register */
+#define RBCPR_CLK_SEL_MASK BIT(0)
+#define RBCPR_CLK_SEL_19P2_MHZ 0
+#define RBCPR_CLK_SEL_AHB_CLK BIT(0)
+
+/* CPR eFuse parameters */
+#define CPR_FUSE_TARGET_QUOT_BITS 12
+#define CPR_FUSE_TARGET_QUOT_BITS_MASK ((1<<CPR_FUSE_TARGET_QUOT_BITS)-1)
+#define CPR_FUSE_RO_SEL_BITS 3
+#define CPR_FUSE_RO_SEL_BITS_MASK ((1<<CPR_FUSE_RO_SEL_BITS)-1)
+
+#define CPR_FUSE_MIN_QUOT_DIFF 50
+
+#define BYTES_PER_FUSE_ROW 8
+
+#define SPEED_BIN_NONE UINT_MAX
+
+#define FUSE_REVISION_UNKNOWN (-1)
+#define FUSE_MAP_NO_MATCH (-1)
+#define FUSE_PARAM_MATCH_ANY 0xFFFFFFFF
+
+#define FLAGS_IGNORE_1ST_IRQ_STATUS BIT(0)
+#define FLAGS_SET_MIN_VOLTAGE BIT(1)
+#define FLAGS_UPLIFT_QUOT_VOLT BIT(2)
+
+/*
+ * The number of individual aging measurements to perform which are then
+ * averaged together in order to determine the final aging adjustment value.
+ */
+#define CPR_AGING_MEASUREMENT_ITERATIONS 16
+
+/*
+ * Aging measurements for the aged and unaged ring oscillators take place a few
+ * microseconds apart. If the vdd-supply voltage fluctuates between the two
+ * measurements, then the difference between them will be incorrect. The
+ * difference could end up too high or too low. This constant defines the
+ * number of lowest and highest measurements to ignore when averaging.
+ */
+#define CPR_AGING_MEASUREMENT_FILTER 3
+
+#define CPR_REGULATOR_DRIVER_NAME "qcom,cpr-regulator"
+
+/**
+ * enum vdd_mx_vmin_method - Method to determine vmin for vdd-mx
+ * %VDD_MX_VMIN_APC: Equal to APC voltage
+ * %VDD_MX_VMIN_APC_CORNER_CEILING: Equal to PVS corner ceiling voltage
+ * %VDD_MX_VMIN_APC_SLOW_CORNER_CEILING:
+ * Equal to slow speed corner ceiling
+ * %VDD_MX_VMIN_MX_VMAX: Equal to specified vdd-mx-vmax voltage
+ * %VDD_MX_VMIN_APC_CORNER_MAP: Equal to the APC corner mapped MX
+ * voltage
+ */
+enum vdd_mx_vmin_method {
+ VDD_MX_VMIN_APC,
+ VDD_MX_VMIN_APC_CORNER_CEILING,
+ VDD_MX_VMIN_APC_SLOW_CORNER_CEILING,
+ VDD_MX_VMIN_MX_VMAX,
+ VDD_MX_VMIN_APC_FUSE_CORNER_MAP,
+ VDD_MX_VMIN_APC_CORNER_MAP,
+};
+
+#define CPR_CORNER_MIN 1
+#define CPR_FUSE_CORNER_MIN 1
+/*
+ * This is an arbitrary upper limit which is used in a sanity check in order to
+ * avoid excessive memory allocation due to bad device tree data.
+ */
+#define CPR_FUSE_CORNER_LIMIT 100
+
+struct quot_adjust_info {
+ int speed_bin;
+ int virtual_corner;
+ int quot_adjust;
+};
+
+struct cpr_quot_scale {
+ u32 offset;
+ u32 multiplier;
+};
+
+struct cpr_aging_sensor_info {
+ u32 sensor_id;
+ int initial_quot_diff;
+ int current_quot_diff;
+};
+
+struct cpr_aging_info {
+ struct cpr_aging_sensor_info *sensor_info;
+ int num_aging_sensors;
+ int aging_corner;
+ u32 aging_ro_kv;
+ u32 *aging_derate;
+ u32 aging_sensor_bypass;
+ u32 max_aging_margin;
+ u32 aging_ref_voltage;
+ u32 cpr_ro_kv[CPR_NUM_RING_OSC];
+ int *voltage_adjust;
+
+ bool cpr_aging_error;
+ bool cpr_aging_done;
+};
+
+static const char * const vdd_apc_name[] = {"vdd-apc-optional-prim",
+ "vdd-apc-optional-sec",
+ "vdd-apc"};
+
+enum voltage_change_dir {
+ NO_CHANGE,
+ DOWN,
+ UP,
+};
+
+struct cpr_regulator {
+ struct list_head list;
+ struct regulator_desc rdesc;
+ struct regulator_dev *rdev;
+ bool vreg_enabled;
+ int corner;
+ int ceiling_max;
+ struct dentry *debugfs;
+ struct device *dev;
+
+ /* eFuse parameters */
+ phys_addr_t efuse_addr;
+ void __iomem *efuse_base;
+ u64 *remapped_row;
+ u32 remapped_row_base;
+ int num_remapped_rows;
+
+ /* Process voltage parameters */
+ u32 *pvs_corner_v;
+ /* Process voltage variables */
+ u32 pvs_bin;
+ u32 speed_bin;
+ u32 pvs_version;
+
+ /* APC voltage regulator */
+ struct regulator *vdd_apc;
+
+ /* Dependency parameters */
+ struct regulator *vdd_mx;
+ int vdd_mx_vmax;
+ int vdd_mx_vmin_method;
+ int vdd_mx_vmin;
+ int *vdd_mx_corner_map;
+
+ struct regulator *rpm_apc_vreg;
+ int *rpm_apc_corner_map;
+
+ /* mem-acc regulator */
+ struct regulator *mem_acc_vreg;
+
+ /* thermal monitor */
+ int tsens_id;
+ int cpr_disable_temp_threshold;
+ int cpr_enable_temp_threshold;
+ bool cpr_disable_on_temperature;
+ bool cpr_thermal_disable;
+ struct threshold_info tsens_threshold_config;
+
+ /* CPR parameters */
+ u32 num_fuse_corners;
+ u64 cpr_fuse_bits;
+ bool cpr_fuse_disable;
+ bool cpr_fuse_local;
+ bool cpr_fuse_redundant;
+ int cpr_fuse_revision;
+ int cpr_fuse_map_count;
+ int cpr_fuse_map_match;
+ int *cpr_fuse_target_quot;
+ int *cpr_fuse_ro_sel;
+ int *fuse_quot_offset;
+ int gcnt;
+
+ unsigned int cpr_irq;
+ void __iomem *rbcpr_base;
+ phys_addr_t rbcpr_clk_addr;
+ struct mutex cpr_mutex;
+
+ int *cpr_max_ceiling;
+ int *ceiling_volt;
+ int *floor_volt;
+ int *fuse_ceiling_volt;
+ int *fuse_floor_volt;
+ int *last_volt;
+ int *open_loop_volt;
+ int step_volt;
+
+ int *save_ctl;
+ int *save_irq;
+
+ int *vsens_corner_map;
+ /* vsens status */
+ bool vsens_enabled;
+ /* vsens regulators */
+ struct regulator *vdd_vsens_corner;
+ struct regulator *vdd_vsens_voltage;
+
+ /* Config parameters */
+ bool enable;
+ u32 ref_clk_khz;
+ u32 timer_delay_us;
+ u32 timer_cons_up;
+ u32 timer_cons_down;
+ u32 irq_line;
+ u32 *step_quotient;
+ u32 up_threshold;
+ u32 down_threshold;
+ u32 idle_clocks;
+ u32 gcnt_time_us;
+ u32 clamp_timer_interval;
+ u32 vdd_apc_step_up_limit;
+ u32 vdd_apc_step_down_limit;
+ u32 flags;
+ int *corner_map;
+ u32 num_corners;
+ int *quot_adjust;
+ int *mem_acc_corner_map;
+
+ int num_adj_cpus;
+ int online_cpus;
+ int *adj_cpus;
+ int **adj_cpus_save_ctl;
+ int **adj_cpus_save_irq;
+ int **adj_cpus_last_volt;
+ int **adj_cpus_quot_adjust;
+ int **adj_cpus_open_loop_volt;
+ bool adj_cpus_open_loop_volt_as_ceiling;
+ struct notifier_block cpu_notifier;
+ cpumask_t cpu_mask;
+ bool cpr_disabled_in_pc;
+ struct notifier_block pm_notifier;
+
+ bool is_cpr_suspended;
+ bool skip_voltage_change_during_suspend;
+
+ struct cpr_aging_info *aging_info;
+
+ struct notifier_block panic_notifier;
+};
+
+#define CPR_DEBUG_MASK_IRQ BIT(0)
+#define CPR_DEBUG_MASK_API BIT(1)
+
+static int cpr_debug_enable;
+#if defined(CONFIG_DEBUG_FS)
+static struct dentry *cpr_debugfs_base;
+#endif
+
+static DEFINE_MUTEX(cpr_regulator_list_mutex);
+static LIST_HEAD(cpr_regulator_list);
+
+module_param_named(debug_enable, cpr_debug_enable, int, S_IRUGO | S_IWUSR);
+#define cpr_debug(cpr_vreg, message, ...) \
+ do { \
+ if (cpr_debug_enable & CPR_DEBUG_MASK_API) \
+ pr_info("%s: " message, (cpr_vreg)->rdesc.name, \
+ ##__VA_ARGS__); \
+ } while (0)
+#define cpr_debug_irq(cpr_vreg, message, ...) \
+ do { \
+ if (cpr_debug_enable & CPR_DEBUG_MASK_IRQ) \
+ pr_info("%s: " message, (cpr_vreg)->rdesc.name, \
+ ##__VA_ARGS__); \
+ else \
+ pr_debug("%s: " message, (cpr_vreg)->rdesc.name, \
+ ##__VA_ARGS__); \
+ } while (0)
+#define cpr_info(cpr_vreg, message, ...) \
+ pr_info("%s: " message, (cpr_vreg)->rdesc.name, ##__VA_ARGS__)
+#define cpr_err(cpr_vreg, message, ...) \
+ pr_err("%s: " message, (cpr_vreg)->rdesc.name, ##__VA_ARGS__)
+
+static u64 cpr_read_remapped_efuse_row(struct cpr_regulator *cpr_vreg,
+ u32 row_num)
+{
+ if (row_num - cpr_vreg->remapped_row_base
+ >= cpr_vreg->num_remapped_rows) {
+ cpr_err(cpr_vreg, "invalid row=%u, max remapped row=%u\n",
+ row_num, cpr_vreg->remapped_row_base
+ + cpr_vreg->num_remapped_rows - 1);
+ return 0;
+ }
+
+ return cpr_vreg->remapped_row[row_num - cpr_vreg->remapped_row_base];
+}
+
+static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num,
+ bool use_tz_api)
+{
+ int rc;
+ u64 efuse_bits;
+ struct scm_desc desc = {0};
+ struct cpr_read_req {
+ u32 row_address;
+ int addr_type;
+ } req;
+
+ struct cpr_read_rsp {
+ u32 row_data[2];
+ u32 status;
+ } rsp;
+
+ if (cpr_vreg->remapped_row && row_num >= cpr_vreg->remapped_row_base)
+ return cpr_read_remapped_efuse_row(cpr_vreg, row_num);
+
+ if (!use_tz_api) {
+ efuse_bits = readq_relaxed(cpr_vreg->efuse_base
+ + row_num * BYTES_PER_FUSE_ROW);
+ return efuse_bits;
+ }
+
+ desc.args[0] = req.row_address = cpr_vreg->efuse_addr +
+ row_num * BYTES_PER_FUSE_ROW;
+ desc.args[1] = req.addr_type = 0;
+ desc.arginfo = SCM_ARGS(2);
+ efuse_bits = 0;
+
+ if (!is_scm_armv8()) {
+ rc = scm_call(SCM_SVC_FUSE, SCM_FUSE_READ,
+ &req, sizeof(req), &rsp, sizeof(rsp));
+ } else {
+ rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ),
+ &desc);
+ rsp.row_data[0] = desc.ret[0];
+ rsp.row_data[1] = desc.ret[1];
+ rsp.status = desc.ret[2];
+ }
+
+ if (rc) {
+ cpr_err(cpr_vreg, "read row %d failed, err code = %d",
+ row_num, rc);
+ } else {
+ efuse_bits = ((u64)(rsp.row_data[1]) << 32) +
+ (u64)rsp.row_data[0];
+ }
+
+ return efuse_bits;
+}
+
+/**
+ * cpr_read_efuse_param() - read a parameter from one or two eFuse rows
+ * @cpr_vreg: Pointer to cpr_regulator struct for this regulator.
+ * @row_start: Fuse row number to start reading from.
+ * @bit_start: The LSB of the parameter to read from the fuse.
+ * @bit_len: The length of the parameter in bits.
+ * @use_tz_api: Flag to indicate if an SCM call should be used to read the fuse.
+ *
+ * This function reads a parameter of specified offset and bit size out of one
+ * or two consecutive eFuse rows. This allows for the reading of parameters
+ * that happen to be split between two eFuse rows.
+ *
+ * Returns the fuse parameter on success or 0 on failure.
+ */
+static u64 cpr_read_efuse_param(struct cpr_regulator *cpr_vreg, int row_start,
+ int bit_start, int bit_len, bool use_tz_api)
+{
+ u64 fuse[2];
+ u64 param = 0;
+ int bits_first, bits_second;
+
+ if (bit_start < 0) {
+ cpr_err(cpr_vreg, "Invalid LSB = %d specified\n", bit_start);
+ return 0;
+ }
+
+ if (bit_len < 0 || bit_len > 64) {
+ cpr_err(cpr_vreg, "Invalid bit length = %d specified\n",
+ bit_len);
+ return 0;
+ }
+
+ /* Allow bit indexing to start beyond the end of the start row. */
+ if (bit_start >= 64) {
+ row_start += bit_start >> 6; /* equivalent to bit_start / 64 */
+ bit_start &= 0x3F;
+ }
+
+ fuse[0] = cpr_read_efuse_row(cpr_vreg, row_start, use_tz_api);
+
+ if (bit_start == 0 && bit_len == 64) {
+ param = fuse[0];
+ } else if (bit_start + bit_len <= 64) {
+ param = (fuse[0] >> bit_start) & ((1ULL << bit_len) - 1);
+ } else {
+ fuse[1] = cpr_read_efuse_row(cpr_vreg, row_start + 1,
+ use_tz_api);
+ bits_first = 64 - bit_start;
+ bits_second = bit_len - bits_first;
+ param = (fuse[0] >> bit_start) & ((1ULL << bits_first) - 1);
+ param |= (fuse[1] & ((1ULL << bits_second) - 1)) << bits_first;
+ }
+
+ return param;
+}
+
+static bool cpr_is_allowed(struct cpr_regulator *cpr_vreg)
+{
+ if (cpr_vreg->cpr_fuse_disable || !cpr_vreg->enable ||
+ cpr_vreg->cpr_thermal_disable)
+ return false;
+ else
+ return true;
+}
+
+static void cpr_write(struct cpr_regulator *cpr_vreg, u32 offset, u32 value)
+{
+ writel_relaxed(value, cpr_vreg->rbcpr_base + offset);
+}
+
+static u32 cpr_read(struct cpr_regulator *cpr_vreg, u32 offset)
+{
+ return readl_relaxed(cpr_vreg->rbcpr_base + offset);
+}
+
+static void cpr_masked_write(struct cpr_regulator *cpr_vreg, u32 offset,
+ u32 mask, u32 value)
+{
+ u32 reg_val;
+
+ reg_val = readl_relaxed(cpr_vreg->rbcpr_base + offset);
+ reg_val &= ~mask;
+ reg_val |= value & mask;
+ writel_relaxed(reg_val, cpr_vreg->rbcpr_base + offset);
+}
+
+static void cpr_irq_clr(struct cpr_regulator *cpr_vreg)
+{
+ cpr_write(cpr_vreg, REG_RBIF_IRQ_CLEAR, CPR_INT_ALL);
+}
+
+static void cpr_irq_clr_nack(struct cpr_regulator *cpr_vreg)
+{
+ cpr_irq_clr(cpr_vreg);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_NACK_CMD, 1);
+}
+
+static void cpr_irq_clr_ack(struct cpr_regulator *cpr_vreg)
+{
+ cpr_irq_clr(cpr_vreg);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_ACK_CMD, 1);
+}
+
+static void cpr_irq_set(struct cpr_regulator *cpr_vreg, u32 int_bits)
+{
+ cpr_write(cpr_vreg, REG_RBIF_IRQ_EN(cpr_vreg->irq_line), int_bits);
+}
+
+static void cpr_ctl_modify(struct cpr_regulator *cpr_vreg, u32 mask, u32 value)
+{
+ cpr_masked_write(cpr_vreg, REG_RBCPR_CTL, mask, value);
+}
+
+static void cpr_ctl_enable(struct cpr_regulator *cpr_vreg, int corner)
+{
+ u32 val;
+
+ if (cpr_vreg->is_cpr_suspended)
+ return;
+
+ /* Program Consecutive Up & Down */
+ val = ((cpr_vreg->timer_cons_down & RBIF_TIMER_ADJ_CONS_DOWN_MASK)
+ << RBIF_TIMER_ADJ_CONS_DOWN_SHIFT) |
+ (cpr_vreg->timer_cons_up & RBIF_TIMER_ADJ_CONS_UP_MASK);
+ cpr_masked_write(cpr_vreg, REG_RBIF_TIMER_ADJUST,
+ RBIF_TIMER_ADJ_CONS_UP_MASK |
+ RBIF_TIMER_ADJ_CONS_DOWN_MASK, val);
+ cpr_masked_write(cpr_vreg, REG_RBCPR_CTL,
+ RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN |
+ RBCPR_CTL_SW_AUTO_CONT_ACK_EN,
+ cpr_vreg->save_ctl[corner]);
+ cpr_irq_set(cpr_vreg, cpr_vreg->save_irq[corner]);
+
+ if (cpr_is_allowed(cpr_vreg) && cpr_vreg->vreg_enabled &&
+ (cpr_vreg->ceiling_volt[corner] >
+ cpr_vreg->floor_volt[corner]))
+ val = RBCPR_CTL_LOOP_EN;
+ else
+ val = 0;
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_LOOP_EN, val);
+}
+
+static void cpr_ctl_disable(struct cpr_regulator *cpr_vreg)
+{
+ if (cpr_vreg->is_cpr_suspended)
+ return;
+
+ cpr_irq_set(cpr_vreg, 0);
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN |
+ RBCPR_CTL_SW_AUTO_CONT_ACK_EN, 0);
+ cpr_masked_write(cpr_vreg, REG_RBIF_TIMER_ADJUST,
+ RBIF_TIMER_ADJ_CONS_UP_MASK |
+ RBIF_TIMER_ADJ_CONS_DOWN_MASK, 0);
+ cpr_irq_clr(cpr_vreg);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_ACK_CMD, 1);
+ cpr_write(cpr_vreg, REG_RBIF_CONT_NACK_CMD, 1);
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_LOOP_EN, 0);
+}
+
+static bool cpr_ctl_is_enabled(struct cpr_regulator *cpr_vreg)
+{
+ u32 reg_val;
+
+ reg_val = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+ return reg_val & RBCPR_CTL_LOOP_EN;
+}
+
+static bool cpr_ctl_is_busy(struct cpr_regulator *cpr_vreg)
+{
+ u32 reg_val;
+
+ reg_val = cpr_read(cpr_vreg, REG_RBCPR_RESULT_0);
+ return reg_val & RBCPR_RESULT0_BUSY_MASK;
+}
+
+static void cpr_corner_save(struct cpr_regulator *cpr_vreg, int corner)
+{
+ cpr_vreg->save_ctl[corner] = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+ cpr_vreg->save_irq[corner] =
+ cpr_read(cpr_vreg, REG_RBIF_IRQ_EN(cpr_vreg->irq_line));
+}
+
+static void cpr_corner_restore(struct cpr_regulator *cpr_vreg, int corner)
+{
+ u32 gcnt, ctl, irq, ro_sel, step_quot;
+ int fuse_corner = cpr_vreg->corner_map[corner];
+ int i;
+
+ ro_sel = cpr_vreg->cpr_fuse_ro_sel[fuse_corner];
+ gcnt = cpr_vreg->gcnt | (cpr_vreg->cpr_fuse_target_quot[fuse_corner] -
+ cpr_vreg->quot_adjust[corner]);
+
+ /* Program the step quotient and idle clocks */
+ step_quot = ((cpr_vreg->idle_clocks & RBCPR_STEP_QUOT_IDLE_CLK_MASK)
+ << RBCPR_STEP_QUOT_IDLE_CLK_SHIFT) |
+ (cpr_vreg->step_quotient[fuse_corner]
+ & RBCPR_STEP_QUOT_STEPQUOT_MASK);
+ cpr_write(cpr_vreg, REG_RBCPR_STEP_QUOT, step_quot);
+
+ /* Clear the target quotient value and gate count of all ROs */
+ for (i = 0; i < CPR_NUM_RING_OSC; i++)
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(i), 0);
+
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(ro_sel), gcnt);
+ ctl = cpr_vreg->save_ctl[corner];
+ cpr_write(cpr_vreg, REG_RBCPR_CTL, ctl);
+ irq = cpr_vreg->save_irq[corner];
+ cpr_irq_set(cpr_vreg, irq);
+ cpr_debug(cpr_vreg, "gcnt = 0x%08x, ctl = 0x%08x, irq = 0x%08x\n",
+ gcnt, ctl, irq);
+}
+
+static void cpr_corner_switch(struct cpr_regulator *cpr_vreg, int corner)
+{
+ if (cpr_vreg->corner == corner)
+ return;
+
+ cpr_corner_restore(cpr_vreg, corner);
+}
+
+static int cpr_apc_set(struct cpr_regulator *cpr_vreg, u32 new_volt)
+{
+ int max_volt, rc;
+
+ max_volt = cpr_vreg->ceiling_max;
+ rc = regulator_set_voltage(cpr_vreg->vdd_apc, new_volt, max_volt);
+ if (rc)
+ cpr_err(cpr_vreg, "set: vdd_apc = %d uV: rc=%d\n",
+ new_volt, rc);
+ return rc;
+}
+
+static int cpr_mx_get(struct cpr_regulator *cpr_vreg, int corner, int apc_volt)
+{
+ int vdd_mx;
+ int fuse_corner = cpr_vreg->corner_map[corner];
+ int highest_fuse_corner = cpr_vreg->num_fuse_corners;
+
+ switch (cpr_vreg->vdd_mx_vmin_method) {
+ case VDD_MX_VMIN_APC:
+ vdd_mx = apc_volt;
+ break;
+ case VDD_MX_VMIN_APC_CORNER_CEILING:
+ vdd_mx = cpr_vreg->fuse_ceiling_volt[fuse_corner];
+ break;
+ case VDD_MX_VMIN_APC_SLOW_CORNER_CEILING:
+ vdd_mx = cpr_vreg->fuse_ceiling_volt[highest_fuse_corner];
+ break;
+ case VDD_MX_VMIN_MX_VMAX:
+ vdd_mx = cpr_vreg->vdd_mx_vmax;
+ break;
+ case VDD_MX_VMIN_APC_FUSE_CORNER_MAP:
+ vdd_mx = cpr_vreg->vdd_mx_corner_map[fuse_corner];
+ break;
+ case VDD_MX_VMIN_APC_CORNER_MAP:
+ vdd_mx = cpr_vreg->vdd_mx_corner_map[corner];
+ break;
+ default:
+ vdd_mx = 0;
+ break;
+ }
+
+ return vdd_mx;
+}
+
+static int cpr_mx_set(struct cpr_regulator *cpr_vreg, int corner,
+ int vdd_mx_vmin)
+{
+ int rc;
+ int fuse_corner = cpr_vreg->corner_map[corner];
+
+ rc = regulator_set_voltage(cpr_vreg->vdd_mx, vdd_mx_vmin,
+ cpr_vreg->vdd_mx_vmax);
+ cpr_debug(cpr_vreg, "[corner:%d, fuse_corner:%d] %d uV\n", corner,
+ fuse_corner, vdd_mx_vmin);
+
+ if (!rc) {
+ cpr_vreg->vdd_mx_vmin = vdd_mx_vmin;
+ } else {
+ cpr_err(cpr_vreg, "set: vdd_mx [corner:%d, fuse_corner:%d] = %d uV failed: rc=%d\n",
+ corner, fuse_corner, vdd_mx_vmin, rc);
+ }
+ return rc;
+}
+
+static int cpr_scale_voltage(struct cpr_regulator *cpr_vreg, int corner,
+ int new_apc_volt, enum voltage_change_dir dir)
+{
+ int rc = 0, vdd_mx_vmin = 0;
+ int mem_acc_corner = cpr_vreg->mem_acc_corner_map[corner];
+ int fuse_corner = cpr_vreg->corner_map[corner];
+ int apc_corner, vsens_corner;
+
+ /* Determine the vdd_mx voltage */
+ if (dir != NO_CHANGE && cpr_vreg->vdd_mx != NULL)
+ vdd_mx_vmin = cpr_mx_get(cpr_vreg, corner, new_apc_volt);
+
+
+ if (cpr_vreg->vdd_vsens_voltage && cpr_vreg->vsens_enabled) {
+ rc = regulator_disable(cpr_vreg->vdd_vsens_voltage);
+ if (!rc)
+ cpr_vreg->vsens_enabled = false;
+ }
+
+ if (dir == DOWN) {
+ if (!rc && cpr_vreg->mem_acc_vreg)
+ rc = regulator_set_voltage(cpr_vreg->mem_acc_vreg,
+ mem_acc_corner, mem_acc_corner);
+ if (!rc && cpr_vreg->rpm_apc_vreg) {
+ apc_corner = cpr_vreg->rpm_apc_corner_map[corner];
+ rc = regulator_set_voltage(cpr_vreg->rpm_apc_vreg,
+ apc_corner, apc_corner);
+ if (rc)
+ cpr_err(cpr_vreg, "apc_corner voting failed rc=%d\n",
+ rc);
+ }
+ }
+
+ if (!rc && vdd_mx_vmin && dir == UP) {
+ if (vdd_mx_vmin != cpr_vreg->vdd_mx_vmin)
+ rc = cpr_mx_set(cpr_vreg, corner, vdd_mx_vmin);
+ }
+
+ if (!rc)
+ rc = cpr_apc_set(cpr_vreg, new_apc_volt);
+
+ if (dir == UP) {
+ if (!rc && cpr_vreg->mem_acc_vreg)
+ rc = regulator_set_voltage(cpr_vreg->mem_acc_vreg,
+ mem_acc_corner, mem_acc_corner);
+ if (!rc && cpr_vreg->rpm_apc_vreg) {
+ apc_corner = cpr_vreg->rpm_apc_corner_map[corner];
+ rc = regulator_set_voltage(cpr_vreg->rpm_apc_vreg,
+ apc_corner, apc_corner);
+ if (rc)
+ cpr_err(cpr_vreg, "apc_corner voting failed rc=%d\n",
+ rc);
+ }
+ }
+
+ if (!rc && vdd_mx_vmin && dir == DOWN) {
+ if (vdd_mx_vmin != cpr_vreg->vdd_mx_vmin)
+ rc = cpr_mx_set(cpr_vreg, corner, vdd_mx_vmin);
+ }
+
+ if (!rc && cpr_vreg->vdd_vsens_corner) {
+ vsens_corner = cpr_vreg->vsens_corner_map[fuse_corner];
+ rc = regulator_set_voltage(cpr_vreg->vdd_vsens_corner,
+ vsens_corner, vsens_corner);
+ }
+ if (!rc && cpr_vreg->vdd_vsens_voltage) {
+ rc = regulator_set_voltage(cpr_vreg->vdd_vsens_voltage,
+ cpr_vreg->floor_volt[corner],
+ cpr_vreg->ceiling_volt[corner]);
+ if (!rc && !cpr_vreg->vsens_enabled) {
+ rc = regulator_enable(cpr_vreg->vdd_vsens_voltage);
+ if (!rc)
+ cpr_vreg->vsens_enabled = true;
+ }
+ }
+
+ return rc;
+}
+
+static void cpr_scale(struct cpr_regulator *cpr_vreg,
+ enum voltage_change_dir dir)
+{
+ u32 reg_val, error_steps, reg_mask;
+ int last_volt, new_volt, corner, fuse_corner;
+ u32 gcnt, quot;
+
+ corner = cpr_vreg->corner;
+ fuse_corner = cpr_vreg->corner_map[corner];
+
+ reg_val = cpr_read(cpr_vreg, REG_RBCPR_RESULT_0);
+
+ error_steps = (reg_val >> RBCPR_RESULT0_ERROR_STEPS_SHIFT)
+ & RBCPR_RESULT0_ERROR_STEPS_MASK;
+ last_volt = cpr_vreg->last_volt[corner];
+
+ cpr_debug_irq(cpr_vreg,
+ "last_volt[corner:%d, fuse_corner:%d] = %d uV\n",
+ corner, fuse_corner, last_volt);
+
+ gcnt = cpr_read(cpr_vreg, REG_RBCPR_GCNT_TARGET
+ (cpr_vreg->cpr_fuse_ro_sel[fuse_corner]));
+ quot = gcnt & ((1 << RBCPR_GCNT_TARGET_GCNT_SHIFT) - 1);
+
+ if (dir == UP) {
+ if (cpr_vreg->clamp_timer_interval
+ && error_steps < cpr_vreg->up_threshold) {
+ /*
+ * Handle the case where another measurement started
+ * after the interrupt was triggered due to a core
+ * exiting from power collapse.
+ */
+ error_steps = max(cpr_vreg->up_threshold,
+ cpr_vreg->vdd_apc_step_up_limit);
+ }
+ cpr_debug_irq(cpr_vreg,
+ "Up: cpr status = 0x%08x (error_steps=%d)\n",
+ reg_val, error_steps);
+
+ if (last_volt >= cpr_vreg->ceiling_volt[corner]) {
+ cpr_debug_irq(cpr_vreg,
+ "[corn:%d, fuse_corn:%d] @ ceiling: %d >= %d: NACK\n",
+ corner, fuse_corner, last_volt,
+ cpr_vreg->ceiling_volt[corner]);
+ cpr_irq_clr_nack(cpr_vreg);
+
+ cpr_debug_irq(cpr_vreg, "gcnt = 0x%08x (quot = %d)\n",
+ gcnt, quot);
+
+ /* Maximize the UP threshold */
+ reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK <<
+ RBCPR_CTL_UP_THRESHOLD_SHIFT;
+ reg_val = reg_mask;
+ cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+
+ /* Disable UP interrupt */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT & ~CPR_INT_UP);
+
+ return;
+ }
+
+ if (error_steps > cpr_vreg->vdd_apc_step_up_limit) {
+ cpr_debug_irq(cpr_vreg,
+ "%d is over up-limit(%d): Clamp\n",
+ error_steps,
+ cpr_vreg->vdd_apc_step_up_limit);
+ error_steps = cpr_vreg->vdd_apc_step_up_limit;
+ }
+
+ /* Calculate new voltage */
+ new_volt = last_volt + (error_steps * cpr_vreg->step_volt);
+ if (new_volt > cpr_vreg->ceiling_volt[corner]) {
+ cpr_debug_irq(cpr_vreg,
+ "new_volt(%d) >= ceiling(%d): Clamp\n",
+ new_volt,
+ cpr_vreg->ceiling_volt[corner]);
+
+ new_volt = cpr_vreg->ceiling_volt[corner];
+ }
+
+ if (cpr_scale_voltage(cpr_vreg, corner, new_volt, dir)) {
+ cpr_irq_clr_nack(cpr_vreg);
+ return;
+ }
+ cpr_vreg->last_volt[corner] = new_volt;
+
+ /* Disable auto nack down */
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = 0;
+
+ cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+
+ /* Re-enable default interrupts */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT);
+
+ /* Ack */
+ cpr_irq_clr_ack(cpr_vreg);
+
+ cpr_debug_irq(cpr_vreg,
+ "UP: -> new_volt[corner:%d, fuse_corner:%d] = %d uV\n",
+ corner, fuse_corner, new_volt);
+ } else if (dir == DOWN) {
+ if (cpr_vreg->clamp_timer_interval
+ && error_steps < cpr_vreg->down_threshold) {
+ /*
+ * Handle the case where another measurement started
+ * after the interrupt was triggered due to a core
+ * exiting from power collapse.
+ */
+ error_steps = max(cpr_vreg->down_threshold,
+ cpr_vreg->vdd_apc_step_down_limit);
+ }
+ cpr_debug_irq(cpr_vreg,
+ "Down: cpr status = 0x%08x (error_steps=%d)\n",
+ reg_val, error_steps);
+
+ if (last_volt <= cpr_vreg->floor_volt[corner]) {
+ cpr_debug_irq(cpr_vreg,
+ "[corn:%d, fuse_corner:%d] @ floor: %d <= %d: NACK\n",
+ corner, fuse_corner, last_volt,
+ cpr_vreg->floor_volt[corner]);
+ cpr_irq_clr_nack(cpr_vreg);
+
+ cpr_debug_irq(cpr_vreg, "gcnt = 0x%08x (quot = %d)\n",
+ gcnt, quot);
+
+ /* Enable auto nack down */
+ reg_mask = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+ reg_val = RBCPR_CTL_SW_AUTO_CONT_NACK_DN_EN;
+
+ cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+
+ /* Disable DOWN interrupt */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT & ~CPR_INT_DOWN);
+
+ return;
+ }
+
+ if (error_steps > cpr_vreg->vdd_apc_step_down_limit) {
+ cpr_debug_irq(cpr_vreg,
+ "%d is over down-limit(%d): Clamp\n",
+ error_steps,
+ cpr_vreg->vdd_apc_step_down_limit);
+ error_steps = cpr_vreg->vdd_apc_step_down_limit;
+ }
+
+ /* Calculte new voltage */
+ new_volt = last_volt - (error_steps * cpr_vreg->step_volt);
+ if (new_volt < cpr_vreg->floor_volt[corner]) {
+ cpr_debug_irq(cpr_vreg,
+ "new_volt(%d) < floor(%d): Clamp\n",
+ new_volt,
+ cpr_vreg->floor_volt[corner]);
+ new_volt = cpr_vreg->floor_volt[corner];
+ }
+
+ if (cpr_scale_voltage(cpr_vreg, corner, new_volt, dir)) {
+ cpr_irq_clr_nack(cpr_vreg);
+ return;
+ }
+ cpr_vreg->last_volt[corner] = new_volt;
+
+ /* Restore default threshold for UP */
+ reg_mask = RBCPR_CTL_UP_THRESHOLD_MASK <<
+ RBCPR_CTL_UP_THRESHOLD_SHIFT;
+ reg_val = cpr_vreg->up_threshold <<
+ RBCPR_CTL_UP_THRESHOLD_SHIFT;
+ cpr_ctl_modify(cpr_vreg, reg_mask, reg_val);
+
+ /* Re-enable default interrupts */
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT);
+
+ /* Ack */
+ cpr_irq_clr_ack(cpr_vreg);
+
+ cpr_debug_irq(cpr_vreg,
+ "DOWN: -> new_volt[corner:%d, fuse_corner:%d] = %d uV\n",
+ corner, fuse_corner, new_volt);
+ }
+}
+
+static irqreturn_t cpr_irq_handler(int irq, void *dev)
+{
+ struct cpr_regulator *cpr_vreg = dev;
+ u32 reg_val;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ reg_val = cpr_read(cpr_vreg, REG_RBIF_IRQ_STATUS);
+ if (cpr_vreg->flags & FLAGS_IGNORE_1ST_IRQ_STATUS)
+ reg_val = cpr_read(cpr_vreg, REG_RBIF_IRQ_STATUS);
+
+ cpr_debug_irq(cpr_vreg, "IRQ_STATUS = 0x%02X\n", reg_val);
+
+ if (!cpr_ctl_is_enabled(cpr_vreg)) {
+ cpr_debug_irq(cpr_vreg, "CPR is disabled\n");
+ goto _exit;
+ } else if (cpr_ctl_is_busy(cpr_vreg)
+ && !cpr_vreg->clamp_timer_interval) {
+ cpr_debug_irq(cpr_vreg, "CPR measurement is not ready\n");
+ goto _exit;
+ } else if (!cpr_is_allowed(cpr_vreg)) {
+ reg_val = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+ cpr_err(cpr_vreg, "Interrupt broken? RBCPR_CTL = 0x%02X\n",
+ reg_val);
+ goto _exit;
+ }
+
+ /* Following sequence of handling is as per each IRQ's priority */
+ if (reg_val & CPR_INT_UP) {
+ cpr_scale(cpr_vreg, UP);
+ } else if (reg_val & CPR_INT_DOWN) {
+ cpr_scale(cpr_vreg, DOWN);
+ } else if (reg_val & CPR_INT_MIN) {
+ cpr_irq_clr_nack(cpr_vreg);
+ } else if (reg_val & CPR_INT_MAX) {
+ cpr_irq_clr_nack(cpr_vreg);
+ } else if (reg_val & CPR_INT_MID) {
+ /* RBCPR_CTL_SW_AUTO_CONT_ACK_EN is enabled */
+ cpr_debug_irq(cpr_vreg, "IRQ occurred for Mid Flag\n");
+ } else {
+ cpr_debug_irq(cpr_vreg,
+ "IRQ occurred for unknown flag (0x%08x)\n", reg_val);
+ }
+
+ /* Save register values for the corner */
+ cpr_corner_save(cpr_vreg, cpr_vreg->corner);
+
+_exit:
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+ return IRQ_HANDLED;
+}
+
+/**
+ * cmp_int() - int comparison function to be passed into the sort() function
+ * which leads to ascending sorting
+ * @a: First int value
+ * @b: Second int value
+ *
+ * Return: >0 if a > b, 0 if a == b, <0 if a < b
+ */
+static int cmp_int(const void *a, const void *b)
+{
+ return *(int *)a - *(int *)b;
+}
+
+static int cpr_get_aging_quot_delta(struct cpr_regulator *cpr_vreg,
+ struct cpr_aging_sensor_info *aging_sensor_info)
+{
+ int quot_min, quot_max, is_aging_measurement, aging_measurement_count;
+ int quot_min_scaled, quot_max_scaled, quot_delta_scaled_sum;
+ int retries, rc = 0, sel_fast = 0, i, quot_delta_scaled;
+ u32 val, gcnt_ref, gcnt;
+ int *quot_delta_results, filtered_count;
+
+
+ quot_delta_results = kcalloc(CPR_AGING_MEASUREMENT_ITERATIONS,
+ sizeof(*quot_delta_results), GFP_ATOMIC);
+ if (!quot_delta_results)
+ return -ENOMEM;
+
+ /* Clear the target quotient value and gate count of all ROs */
+ for (i = 0; i < CPR_NUM_RING_OSC; i++)
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(i), 0);
+
+ /* Program GCNT0/1 for getting aging data */
+ gcnt_ref = (cpr_vreg->ref_clk_khz * cpr_vreg->gcnt_time_us) / 1000;
+ gcnt = gcnt_ref * 3 / 2;
+ val = (gcnt & RBCPR_GCNT_TARGET_GCNT_MASK) <<
+ RBCPR_GCNT_TARGET_GCNT_SHIFT;
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(0), val);
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(1), val);
+
+ val = cpr_read(cpr_vreg, REG_RBCPR_GCNT_TARGET(0));
+ cpr_debug(cpr_vreg, "RBCPR_GCNT_TARGET0 = 0x%08x\n", val);
+
+ val = cpr_read(cpr_vreg, REG_RBCPR_GCNT_TARGET(1));
+ cpr_debug(cpr_vreg, "RBCPR_GCNT_TARGET1 = 0x%08x\n", val);
+
+ /* Program TIMER_INTERVAL to zero */
+ cpr_write(cpr_vreg, REG_RBCPR_TIMER_INTERVAL, 0);
+
+ /* Bypass sensors in collapsible domain */
+ if (cpr_vreg->aging_info->aging_sensor_bypass)
+ cpr_write(cpr_vreg, REG_RBCPR_SENSOR_BYPASS0,
+ (cpr_vreg->aging_info->aging_sensor_bypass &
+ RBCPR_SENSOR_MASK0_SENSOR(aging_sensor_info->sensor_id)));
+
+ /* Mask other sensors */
+ cpr_write(cpr_vreg, REG_RBCPR_SENSOR_MASK0,
+ RBCPR_SENSOR_MASK0_SENSOR(aging_sensor_info->sensor_id));
+ val = cpr_read(cpr_vreg, REG_RBCPR_SENSOR_MASK0);
+ cpr_debug(cpr_vreg, "RBCPR_SENSOR_MASK0 = 0x%08x\n", val);
+
+ /* Enable cpr controller */
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_LOOP_EN, RBCPR_CTL_LOOP_EN);
+
+ /* Make sure cpr starts measurement with toggling busy bit */
+ mb();
+
+ /* Wait and Ignore the first measurement. Time-out after 5ms */
+ retries = 50;
+ while (retries-- && cpr_ctl_is_busy(cpr_vreg))
+ udelay(100);
+
+ if (retries < 0) {
+ cpr_err(cpr_vreg, "Aging calibration failed\n");
+ rc = -EBUSY;
+ goto _exit;
+ }
+
+ /* Set age page mode */
+ cpr_write(cpr_vreg, REG_RBCPR_HTOL_AGE, RBCPR_HTOL_AGE_PAGE);
+
+ aging_measurement_count = 0;
+ quot_delta_scaled_sum = 0;
+
+ for (i = 0; i < CPR_AGING_MEASUREMENT_ITERATIONS; i++) {
+ /* Send cont nack */
+ cpr_write(cpr_vreg, REG_RBIF_CONT_NACK_CMD, 1);
+
+ /*
+ * Make sure cpr starts next measurement with
+ * toggling busy bit
+ */
+ mb();
+
+ /*
+ * Wait for controller to finish measurement
+ * and time-out after 5ms
+ */
+ retries = 50;
+ while (retries-- && cpr_ctl_is_busy(cpr_vreg))
+ udelay(100);
+
+ if (retries < 0) {
+ cpr_err(cpr_vreg, "Aging calibration failed\n");
+ rc = -EBUSY;
+ goto _exit;
+ }
+
+ /* Check for PAGE_IS_AGE flag in status register */
+ val = cpr_read(cpr_vreg, REG_RBCPR_HTOL_AGE);
+ is_aging_measurement = val & RBCPR_AGE_DATA_STATUS;
+
+ val = cpr_read(cpr_vreg, REG_RBCPR_RESULT_1);
+ sel_fast = RBCPR_RESULT_1_SEL_FAST(val);
+ cpr_debug(cpr_vreg, "RBCPR_RESULT_1 = 0x%08x\n", val);
+
+ val = cpr_read(cpr_vreg, REG_RBCPR_DEBUG1);
+ cpr_debug(cpr_vreg, "RBCPR_DEBUG1 = 0x%08x\n", val);
+
+ if (sel_fast == 1) {
+ quot_min = RBCPR_DEBUG1_QUOT_FAST(val);
+ quot_max = RBCPR_DEBUG1_QUOT_SLOW(val);
+ } else {
+ quot_min = RBCPR_DEBUG1_QUOT_SLOW(val);
+ quot_max = RBCPR_DEBUG1_QUOT_FAST(val);
+ }
+
+ /*
+ * Scale the quotients so that they are equivalent to the fused
+ * values. This accounts for the difference in measurement
+ * interval times.
+ */
+
+ quot_min_scaled = quot_min * (gcnt_ref + 1) / (gcnt + 1);
+ quot_max_scaled = quot_max * (gcnt_ref + 1) / (gcnt + 1);
+
+ quot_delta_scaled = 0;
+ if (is_aging_measurement) {
+ quot_delta_scaled = quot_min_scaled - quot_max_scaled;
+ quot_delta_results[aging_measurement_count++] =
+ quot_delta_scaled;
+ }
+
+ cpr_debug(cpr_vreg,
+ "Age sensor[%d]: measurement[%d]: page_is_age=%u quot_min = %d, quot_max = %d quot_min_scaled = %d, quot_max_scaled = %d quot_delta_scaled = %d\n",
+ aging_sensor_info->sensor_id, i, is_aging_measurement,
+ quot_min, quot_max, quot_min_scaled, quot_max_scaled,
+ quot_delta_scaled);
+ }
+
+ filtered_count
+ = aging_measurement_count - CPR_AGING_MEASUREMENT_FILTER * 2;
+ if (filtered_count > 0) {
+ sort(quot_delta_results, aging_measurement_count,
+ sizeof(*quot_delta_results), cmp_int, NULL);
+
+ quot_delta_scaled_sum = 0;
+ for (i = 0; i < filtered_count; i++)
+ quot_delta_scaled_sum
+ += quot_delta_results[i
+ + CPR_AGING_MEASUREMENT_FILTER];
+
+ aging_sensor_info->current_quot_diff
+ = quot_delta_scaled_sum / filtered_count;
+ cpr_debug(cpr_vreg,
+ "Age sensor[%d]: average aging quotient delta = %d (count = %d)\n",
+ aging_sensor_info->sensor_id,
+ aging_sensor_info->current_quot_diff, filtered_count);
+ } else {
+ cpr_err(cpr_vreg, "%d aging measurements completed after %d iterations\n",
+ aging_measurement_count,
+ CPR_AGING_MEASUREMENT_ITERATIONS);
+ rc = -EBUSY;
+ }
+
+_exit:
+ /* Clear age page bit */
+ cpr_write(cpr_vreg, REG_RBCPR_HTOL_AGE, 0x0);
+
+ /* Disable the CPR controller after aging procedure */
+ cpr_ctl_modify(cpr_vreg, RBCPR_CTL_LOOP_EN, 0x0);
+
+ /* Clear the sensor bypass */
+ if (cpr_vreg->aging_info->aging_sensor_bypass)
+ cpr_write(cpr_vreg, REG_RBCPR_SENSOR_BYPASS0, 0x0);
+
+ /* Unmask all sensors */
+ cpr_write(cpr_vreg, REG_RBCPR_SENSOR_MASK0, 0x0);
+
+ /* Clear gcnt0/1 registers */
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(0), 0x0);
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(1), 0x0);
+
+ /* Program the delay count for the timer */
+ val = (cpr_vreg->ref_clk_khz * cpr_vreg->timer_delay_us) / 1000;
+ cpr_write(cpr_vreg, REG_RBCPR_TIMER_INTERVAL, val);
+
+ kfree(quot_delta_results);
+
+ return rc;
+}
+
+static void cpr_de_aging_adjustment(void *data)
+{
+ struct cpr_regulator *cpr_vreg = (struct cpr_regulator *)data;
+ struct cpr_aging_info *aging_info = cpr_vreg->aging_info;
+ struct cpr_aging_sensor_info *aging_sensor_info;
+ int i, num_aging_sensors, retries, rc = 0;
+ int max_quot_diff = 0, ro_sel = 0;
+ u32 voltage_adjust, aging_voltage_adjust = 0;
+
+ aging_sensor_info = aging_info->sensor_info;
+ num_aging_sensors = aging_info->num_aging_sensors;
+
+ for (i = 0; i < num_aging_sensors; i++, aging_sensor_info++) {
+ retries = 2;
+ while (retries--) {
+ rc = cpr_get_aging_quot_delta(cpr_vreg,
+ aging_sensor_info);
+ if (!rc)
+ break;
+ }
+ if (rc && retries < 0) {
+ cpr_err(cpr_vreg, "error in age calibration: rc = %d\n",
+ rc);
+ aging_info->cpr_aging_error = true;
+ return;
+ }
+
+ max_quot_diff = max(max_quot_diff,
+ (aging_sensor_info->current_quot_diff -
+ aging_sensor_info->initial_quot_diff));
+ }
+
+ cpr_debug(cpr_vreg, "Max aging quot delta = %d\n",
+ max_quot_diff);
+ aging_voltage_adjust = DIV_ROUND_UP(max_quot_diff * 1000000,
+ aging_info->aging_ro_kv);
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ /* Remove initial max aging adjustment */
+ ro_sel = cpr_vreg->cpr_fuse_ro_sel[i];
+ cpr_vreg->cpr_fuse_target_quot[i] -=
+ (aging_info->cpr_ro_kv[ro_sel]
+ * aging_info->max_aging_margin) / 1000000;
+ aging_info->voltage_adjust[i] = 0;
+
+ if (aging_voltage_adjust > 0) {
+ /* Add required aging adjustment */
+ voltage_adjust = (aging_voltage_adjust
+ * aging_info->aging_derate[i]) / 1000;
+ voltage_adjust = min(voltage_adjust,
+ aging_info->max_aging_margin);
+ cpr_vreg->cpr_fuse_target_quot[i] +=
+ (aging_info->cpr_ro_kv[ro_sel]
+ * voltage_adjust) / 1000000;
+ aging_info->voltage_adjust[i] = voltage_adjust;
+ }
+ }
+}
+
+static int cpr_regulator_is_enabled(struct regulator_dev *rdev)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+
+ return cpr_vreg->vreg_enabled;
+}
+
+static int cpr_regulator_enable(struct regulator_dev *rdev)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+ int rc = 0;
+
+ /* Enable dependency power before vdd_apc */
+ if (cpr_vreg->vdd_mx) {
+ rc = regulator_enable(cpr_vreg->vdd_mx);
+ if (rc) {
+ cpr_err(cpr_vreg, "regulator_enable: vdd_mx: rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+
+ rc = regulator_enable(cpr_vreg->vdd_apc);
+ if (rc) {
+ cpr_err(cpr_vreg, "regulator_enable: vdd_apc: rc=%d\n", rc);
+ return rc;
+ }
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+ cpr_vreg->vreg_enabled = true;
+ if (cpr_is_allowed(cpr_vreg) && cpr_vreg->corner) {
+ cpr_irq_clr(cpr_vreg);
+ cpr_corner_restore(cpr_vreg, cpr_vreg->corner);
+ cpr_ctl_enable(cpr_vreg, cpr_vreg->corner);
+ }
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ return rc;
+}
+
+static int cpr_regulator_disable(struct regulator_dev *rdev)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+ int rc;
+
+ rc = regulator_disable(cpr_vreg->vdd_apc);
+ if (!rc) {
+ if (cpr_vreg->vdd_mx)
+ rc = regulator_disable(cpr_vreg->vdd_mx);
+
+ if (rc) {
+ cpr_err(cpr_vreg, "regulator_disable: vdd_mx: rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+ cpr_vreg->vreg_enabled = false;
+ if (cpr_is_allowed(cpr_vreg))
+ cpr_ctl_disable(cpr_vreg);
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+ } else {
+ cpr_err(cpr_vreg, "regulator_disable: vdd_apc: rc=%d\n", rc);
+ }
+
+ return rc;
+}
+
+static int cpr_calculate_de_aging_margin(struct cpr_regulator *cpr_vreg)
+{
+ struct cpr_aging_info *aging_info = cpr_vreg->aging_info;
+ enum voltage_change_dir change_dir = NO_CHANGE;
+ u32 save_ctl, save_irq;
+ cpumask_t tmp_mask;
+ int rc = 0, i;
+
+ save_ctl = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+ save_irq = cpr_read(cpr_vreg, REG_RBIF_IRQ_EN(cpr_vreg->irq_line));
+
+ /* Disable interrupt and CPR */
+ cpr_irq_set(cpr_vreg, 0);
+ cpr_write(cpr_vreg, REG_RBCPR_CTL, 0);
+
+ if (aging_info->aging_corner > cpr_vreg->corner)
+ change_dir = UP;
+ else if (aging_info->aging_corner < cpr_vreg->corner)
+ change_dir = DOWN;
+
+ /* set selected reference voltage for de-aging */
+ rc = cpr_scale_voltage(cpr_vreg,
+ aging_info->aging_corner,
+ aging_info->aging_ref_voltage,
+ change_dir);
+ if (rc) {
+ cpr_err(cpr_vreg, "Unable to set aging reference voltage, rc = %d\n",
+ rc);
+ return rc;
+ }
+
+ /* Force PWM mode */
+ rc = regulator_set_mode(cpr_vreg->vdd_apc, REGULATOR_MODE_NORMAL);
+ if (rc) {
+ cpr_err(cpr_vreg, "unable to configure vdd-supply for mode=%u, rc=%d\n",
+ REGULATOR_MODE_NORMAL, rc);
+ return rc;
+ }
+
+ get_online_cpus();
+ cpumask_and(&tmp_mask, &cpr_vreg->cpu_mask, cpu_online_mask);
+ if (!cpumask_empty(&tmp_mask)) {
+ smp_call_function_any(&tmp_mask,
+ cpr_de_aging_adjustment,
+ cpr_vreg, true);
+ aging_info->cpr_aging_done = true;
+ if (!aging_info->cpr_aging_error)
+ for (i = CPR_FUSE_CORNER_MIN;
+ i <= cpr_vreg->num_fuse_corners; i++)
+ cpr_info(cpr_vreg, "Corner[%d]: age adjusted target quot = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+
+ put_online_cpus();
+
+ /* Set to initial mode */
+ rc = regulator_set_mode(cpr_vreg->vdd_apc, REGULATOR_MODE_IDLE);
+ if (rc) {
+ cpr_err(cpr_vreg, "unable to configure vdd-supply for mode=%u, rc=%d\n",
+ REGULATOR_MODE_IDLE, rc);
+ return rc;
+ }
+
+ /* Clear interrupts */
+ cpr_irq_clr(cpr_vreg);
+
+ /* Restore register values */
+ cpr_irq_set(cpr_vreg, save_irq);
+ cpr_write(cpr_vreg, REG_RBCPR_CTL, save_ctl);
+
+ return rc;
+}
+
+/* Note that cpr_vreg->cpr_mutex must be held by the caller. */
+static int cpr_regulator_set_voltage(struct regulator_dev *rdev,
+ int corner, bool reset_quot)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+ struct cpr_aging_info *aging_info = cpr_vreg->aging_info;
+ int rc;
+ int new_volt;
+ enum voltage_change_dir change_dir = NO_CHANGE;
+ int fuse_corner = cpr_vreg->corner_map[corner];
+
+ if (cpr_is_allowed(cpr_vreg)) {
+ cpr_ctl_disable(cpr_vreg);
+ new_volt = cpr_vreg->last_volt[corner];
+ } else {
+ new_volt = cpr_vreg->open_loop_volt[corner];
+ }
+
+ cpr_debug(cpr_vreg, "[corner:%d, fuse_corner:%d] = %d uV\n",
+ corner, fuse_corner, new_volt);
+
+ if (corner > cpr_vreg->corner)
+ change_dir = UP;
+ else if (corner < cpr_vreg->corner)
+ change_dir = DOWN;
+
+ /* Read age sensor data and apply de-aging adjustments */
+ if (cpr_vreg->vreg_enabled && aging_info && !aging_info->cpr_aging_done
+ && (corner <= aging_info->aging_corner)) {
+ rc = cpr_calculate_de_aging_margin(cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "failed in de-aging calibration: rc=%d\n",
+ rc);
+ } else {
+ change_dir = NO_CHANGE;
+ if (corner > aging_info->aging_corner)
+ change_dir = UP;
+ else if (corner < aging_info->aging_corner)
+ change_dir = DOWN;
+ }
+ reset_quot = true;
+ }
+
+ rc = cpr_scale_voltage(cpr_vreg, corner, new_volt, change_dir);
+ if (rc)
+ return rc;
+
+ if (cpr_is_allowed(cpr_vreg) && cpr_vreg->vreg_enabled) {
+ cpr_irq_clr(cpr_vreg);
+ if (reset_quot)
+ cpr_corner_restore(cpr_vreg, corner);
+ else
+ cpr_corner_switch(cpr_vreg, corner);
+ cpr_ctl_enable(cpr_vreg, corner);
+ }
+
+ cpr_vreg->corner = corner;
+
+ return rc;
+}
+
+static int cpr_regulator_set_voltage_op(struct regulator_dev *rdev,
+ int corner, int corner_max, unsigned *selector)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+ int rc;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+ rc = cpr_regulator_set_voltage(rdev, corner, false);
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ return rc;
+}
+
+static int cpr_regulator_get_voltage(struct regulator_dev *rdev)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+
+ return cpr_vreg->corner;
+}
+
+/**
+ * cpr_regulator_list_corner_voltage() - return the ceiling voltage mapped to
+ * the specified voltage corner
+ * @rdev: Regulator device pointer for the cpr-regulator
+ * @corner: Voltage corner
+ *
+ * This function is passed as a callback function into the regulator ops that
+ * are registered for each cpr-regulator device.
+ *
+ * Return: voltage value in microvolts or -EINVAL if the corner is out of range
+ */
+static int cpr_regulator_list_corner_voltage(struct regulator_dev *rdev,
+ int corner)
+{
+ struct cpr_regulator *cpr_vreg = rdev_get_drvdata(rdev);
+
+ if (corner >= CPR_CORNER_MIN && corner <= cpr_vreg->num_corners)
+ return cpr_vreg->ceiling_volt[corner];
+ else
+ return -EINVAL;
+}
+
+static struct regulator_ops cpr_corner_ops = {
+ .enable = cpr_regulator_enable,
+ .disable = cpr_regulator_disable,
+ .is_enabled = cpr_regulator_is_enabled,
+ .set_voltage = cpr_regulator_set_voltage_op,
+ .get_voltage = cpr_regulator_get_voltage,
+ .list_corner_voltage = cpr_regulator_list_corner_voltage,
+};
+
+#ifdef CONFIG_PM
+static int cpr_suspend(struct cpr_regulator *cpr_vreg)
+{
+ cpr_debug(cpr_vreg, "suspend\n");
+
+ cpr_ctl_disable(cpr_vreg);
+
+ cpr_irq_clr(cpr_vreg);
+
+ return 0;
+}
+
+static int cpr_resume(struct cpr_regulator *cpr_vreg)
+
+{
+ cpr_debug(cpr_vreg, "resume\n");
+
+ cpr_irq_clr(cpr_vreg);
+
+ cpr_ctl_enable(cpr_vreg, cpr_vreg->corner);
+
+ return 0;
+}
+
+static int cpr_regulator_suspend(struct platform_device *pdev,
+ pm_message_t state)
+{
+ struct cpr_regulator *cpr_vreg = platform_get_drvdata(pdev);
+ int rc = 0;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ if (cpr_is_allowed(cpr_vreg))
+ rc = cpr_suspend(cpr_vreg);
+
+ cpr_vreg->is_cpr_suspended = true;
+
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ return rc;
+}
+
+static int cpr_regulator_resume(struct platform_device *pdev)
+{
+ struct cpr_regulator *cpr_vreg = platform_get_drvdata(pdev);
+ int rc = 0;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ cpr_vreg->is_cpr_suspended = false;
+
+ if (cpr_is_allowed(cpr_vreg))
+ rc = cpr_resume(cpr_vreg);
+
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ return rc;
+}
+#else
+#define cpr_regulator_suspend NULL
+#define cpr_regulator_resume NULL
+#endif
+
+static int cpr_config(struct cpr_regulator *cpr_vreg, struct device *dev)
+{
+ int i;
+ u32 val, gcnt, reg;
+ void __iomem *rbcpr_clk;
+ int size;
+
+ if (cpr_vreg->rbcpr_clk_addr) {
+ /* Use 19.2 MHz clock for CPR. */
+ rbcpr_clk = ioremap(cpr_vreg->rbcpr_clk_addr, 4);
+ if (!rbcpr_clk) {
+ cpr_err(cpr_vreg, "Unable to map rbcpr_clk\n");
+ return -EINVAL;
+ }
+ reg = readl_relaxed(rbcpr_clk);
+ reg &= ~RBCPR_CLK_SEL_MASK;
+ reg |= RBCPR_CLK_SEL_19P2_MHZ & RBCPR_CLK_SEL_MASK;
+ writel_relaxed(reg, rbcpr_clk);
+ iounmap(rbcpr_clk);
+ }
+
+ /* Disable interrupt and CPR */
+ cpr_write(cpr_vreg, REG_RBIF_IRQ_EN(cpr_vreg->irq_line), 0);
+ cpr_write(cpr_vreg, REG_RBCPR_CTL, 0);
+
+ /* Program the default HW Ceiling, Floor and vlevel */
+ val = ((RBIF_LIMIT_CEILING_DEFAULT & RBIF_LIMIT_CEILING_MASK)
+ << RBIF_LIMIT_CEILING_SHIFT)
+ | (RBIF_LIMIT_FLOOR_DEFAULT & RBIF_LIMIT_FLOOR_MASK);
+ cpr_write(cpr_vreg, REG_RBIF_LIMIT, val);
+ cpr_write(cpr_vreg, REG_RBIF_SW_VLEVEL, RBIF_SW_VLEVEL_DEFAULT);
+
+ /* Clear the target quotient value and gate count of all ROs */
+ for (i = 0; i < CPR_NUM_RING_OSC; i++)
+ cpr_write(cpr_vreg, REG_RBCPR_GCNT_TARGET(i), 0);
+
+ /* Init and save gcnt */
+ gcnt = (cpr_vreg->ref_clk_khz * cpr_vreg->gcnt_time_us) / 1000;
+ gcnt = (gcnt & RBCPR_GCNT_TARGET_GCNT_MASK) <<
+ RBCPR_GCNT_TARGET_GCNT_SHIFT;
+ cpr_vreg->gcnt = gcnt;
+
+ /* Program the delay count for the timer */
+ val = (cpr_vreg->ref_clk_khz * cpr_vreg->timer_delay_us) / 1000;
+ cpr_write(cpr_vreg, REG_RBCPR_TIMER_INTERVAL, val);
+ cpr_info(cpr_vreg, "Timer count: 0x%0x (for %d us)\n", val,
+ cpr_vreg->timer_delay_us);
+
+ /* Program Consecutive Up & Down */
+ val = ((cpr_vreg->timer_cons_down & RBIF_TIMER_ADJ_CONS_DOWN_MASK)
+ << RBIF_TIMER_ADJ_CONS_DOWN_SHIFT) |
+ (cpr_vreg->timer_cons_up & RBIF_TIMER_ADJ_CONS_UP_MASK) |
+ ((cpr_vreg->clamp_timer_interval & RBIF_TIMER_ADJ_CLAMP_INT_MASK)
+ << RBIF_TIMER_ADJ_CLAMP_INT_SHIFT);
+ cpr_write(cpr_vreg, REG_RBIF_TIMER_ADJUST, val);
+
+ /* Program the control register */
+ cpr_vreg->up_threshold &= RBCPR_CTL_UP_THRESHOLD_MASK;
+ cpr_vreg->down_threshold &= RBCPR_CTL_DN_THRESHOLD_MASK;
+ val = (cpr_vreg->up_threshold << RBCPR_CTL_UP_THRESHOLD_SHIFT)
+ | (cpr_vreg->down_threshold << RBCPR_CTL_DN_THRESHOLD_SHIFT);
+ val |= RBCPR_CTL_TIMER_EN | RBCPR_CTL_COUNT_MODE;
+ val |= RBCPR_CTL_SW_AUTO_CONT_ACK_EN;
+ cpr_write(cpr_vreg, REG_RBCPR_CTL, val);
+
+ cpr_irq_set(cpr_vreg, CPR_INT_DEFAULT);
+
+ val = cpr_read(cpr_vreg, REG_RBCPR_VERSION);
+ if (val <= RBCPR_VER_2)
+ cpr_vreg->flags |= FLAGS_IGNORE_1ST_IRQ_STATUS;
+
+ size = cpr_vreg->num_corners + 1;
+ cpr_vreg->save_ctl = devm_kzalloc(dev, sizeof(int) * size, GFP_KERNEL);
+ cpr_vreg->save_irq = devm_kzalloc(dev, sizeof(int) * size, GFP_KERNEL);
+ if (!cpr_vreg->save_ctl || !cpr_vreg->save_irq)
+ return -ENOMEM;
+
+ for (i = 1; i < size; i++)
+ cpr_corner_save(cpr_vreg, i);
+
+ return 0;
+}
+
+static int cpr_fuse_is_setting_expected(struct cpr_regulator *cpr_vreg,
+ u32 sel_array[5])
+{
+ u64 fuse_bits;
+ u32 ret;
+
+ fuse_bits = cpr_read_efuse_row(cpr_vreg, sel_array[0], sel_array[4]);
+ ret = (fuse_bits >> sel_array[1]) & ((1 << sel_array[2]) - 1);
+ if (ret == sel_array[3])
+ ret = 1;
+ else
+ ret = 0;
+
+ cpr_info(cpr_vreg, "[row:%d] = 0x%llx @%d:%d == %d ?: %s\n",
+ sel_array[0], fuse_bits,
+ sel_array[1], sel_array[2],
+ sel_array[3],
+ (ret == 1) ? "yes" : "no");
+ return ret;
+}
+
+static int cpr_voltage_uplift_wa_inc_volt(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ u32 uplift_voltage;
+ u32 uplift_max_volt = 0;
+ int highest_fuse_corner = cpr_vreg->num_fuse_corners;
+ int rc;
+
+ rc = of_property_read_u32(of_node,
+ "qcom,cpr-uplift-voltage", &uplift_voltage);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr-uplift-voltage is missing, rc = %d", rc);
+ return rc;
+ }
+ rc = of_property_read_u32(of_node,
+ "qcom,cpr-uplift-max-volt", &uplift_max_volt);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr-uplift-max-volt is missing, rc = %d",
+ rc);
+ return rc;
+ }
+
+ cpr_vreg->pvs_corner_v[highest_fuse_corner] += uplift_voltage;
+ if (cpr_vreg->pvs_corner_v[highest_fuse_corner] > uplift_max_volt)
+ cpr_vreg->pvs_corner_v[highest_fuse_corner] = uplift_max_volt;
+
+ return rc;
+}
+
+static int cpr_adjust_init_voltages(struct device_node *of_node,
+ struct cpr_regulator *cpr_vreg)
+{
+ int tuple_count, tuple_match, i;
+ u32 index;
+ u32 volt_adjust = 0;
+ int len = 0;
+ int rc = 0;
+
+ if (!of_find_property(of_node, "qcom,cpr-init-voltage-adjustment",
+ &len)) {
+ /* No initial voltage adjustment needed. */
+ return 0;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /*
+ * No matching index to use for initial voltage
+ * adjustment.
+ */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_fuse_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "qcom,cpr-init-voltage-adjustment length=%d is invalid\n",
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ index = tuple_match * cpr_vreg->num_fuse_corners
+ + i - CPR_FUSE_CORNER_MIN;
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-init-voltage-adjustment", index,
+ &volt_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-init-voltage-adjustment index %u, rc=%d\n",
+ index, rc);
+ return rc;
+ }
+
+ if (volt_adjust) {
+ cpr_vreg->pvs_corner_v[i] += volt_adjust;
+ cpr_info(cpr_vreg, "adjusted initial voltage[%d]: %d -> %d uV\n",
+ i, cpr_vreg->pvs_corner_v[i] - volt_adjust,
+ cpr_vreg->pvs_corner_v[i]);
+ }
+ }
+
+ return rc;
+}
+
+/*
+ * Property qcom,cpr-fuse-init-voltage specifies the fuse position of the
+ * initial voltage for each fuse corner. MSB of the fuse value is a sign
+ * bit, and the remaining bits define the steps of the offset. Each step has
+ * units of microvolts defined in the qcom,cpr-fuse-init-voltage-step property.
+ * The initial voltages can be calculated using the formula:
+ * pvs_corner_v[corner] = ceiling_volt[corner] + (sign * steps * step_size_uv)
+ */
+static int cpr_pvs_per_corner_init(struct device_node *of_node,
+ struct cpr_regulator *cpr_vreg)
+{
+ u64 efuse_bits;
+ int i, size, sign, steps, step_size_uv, rc;
+ u32 *fuse_sel, *tmp, *ref_uv;
+ struct property *prop;
+ char *init_volt_str;
+
+ init_volt_str = cpr_vreg->cpr_fuse_redundant
+ ? "qcom,cpr-fuse-redun-init-voltage"
+ : "qcom,cpr-fuse-init-voltage";
+
+ prop = of_find_property(of_node, init_volt_str, NULL);
+ if (!prop) {
+ cpr_err(cpr_vreg, "%s is missing\n", init_volt_str);
+ return -EINVAL;
+ }
+ size = prop->length / sizeof(u32);
+ if (size != cpr_vreg->num_fuse_corners * 4) {
+ cpr_err(cpr_vreg,
+ "fuse position for init voltages is invalid\n");
+ return -EINVAL;
+ }
+ fuse_sel = kzalloc(sizeof(u32) * size, GFP_KERNEL);
+ if (!fuse_sel) {
+ cpr_err(cpr_vreg, "memory alloc failed.\n");
+ return -ENOMEM;
+ }
+ rc = of_property_read_u32_array(of_node, init_volt_str,
+ fuse_sel, size);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "read cpr-fuse-init-voltage failed, rc = %d\n", rc);
+ kfree(fuse_sel);
+ return rc;
+ }
+ rc = of_property_read_u32(of_node, "qcom,cpr-init-voltage-step",
+ &step_size_uv);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "read cpr-init-voltage-step failed, rc = %d\n", rc);
+ kfree(fuse_sel);
+ return rc;
+ }
+
+ ref_uv = kzalloc((cpr_vreg->num_fuse_corners + 1) * sizeof(*ref_uv),
+ GFP_KERNEL);
+ if (!ref_uv) {
+ cpr_err(cpr_vreg,
+ "Could not allocate memory for reference voltages\n");
+ kfree(fuse_sel);
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-init-voltage-ref",
+ &ref_uv[CPR_FUSE_CORNER_MIN], cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "read qcom,cpr-init-voltage-ref failed, rc = %d\n", rc);
+ kfree(fuse_sel);
+ kfree(ref_uv);
+ return rc;
+ }
+
+ tmp = fuse_sel;
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ efuse_bits = cpr_read_efuse_param(cpr_vreg, fuse_sel[0],
+ fuse_sel[1], fuse_sel[2], fuse_sel[3]);
+ sign = (efuse_bits & (1 << (fuse_sel[2] - 1))) ? -1 : 1;
+ steps = efuse_bits & ((1 << (fuse_sel[2] - 1)) - 1);
+ cpr_vreg->pvs_corner_v[i] =
+ ref_uv[i] + sign * steps * step_size_uv;
+ cpr_vreg->pvs_corner_v[i] = DIV_ROUND_UP(
+ cpr_vreg->pvs_corner_v[i],
+ cpr_vreg->step_volt) *
+ cpr_vreg->step_volt;
+ cpr_debug(cpr_vreg, "corner %d: sign = %d, steps = %d, volt = %d uV\n",
+ i, sign, steps, cpr_vreg->pvs_corner_v[i]);
+ fuse_sel += 4;
+ }
+
+ rc = cpr_adjust_init_voltages(of_node, cpr_vreg);
+ if (rc)
+ goto done;
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ if (cpr_vreg->pvs_corner_v[i]
+ > cpr_vreg->fuse_ceiling_volt[i]) {
+ cpr_info(cpr_vreg, "Warning: initial voltage[%d] %d above ceiling %d\n",
+ i, cpr_vreg->pvs_corner_v[i],
+ cpr_vreg->fuse_ceiling_volt[i]);
+ cpr_vreg->pvs_corner_v[i]
+ = cpr_vreg->fuse_ceiling_volt[i];
+ } else if (cpr_vreg->pvs_corner_v[i] <
+ cpr_vreg->fuse_floor_volt[i]) {
+ cpr_info(cpr_vreg, "Warning: initial voltage[%d] %d below floor %d\n",
+ i, cpr_vreg->pvs_corner_v[i],
+ cpr_vreg->fuse_floor_volt[i]);
+ cpr_vreg->pvs_corner_v[i]
+ = cpr_vreg->fuse_floor_volt[i];
+ }
+ }
+
+done:
+ kfree(tmp);
+ kfree(ref_uv);
+
+ return rc;
+}
+
+/*
+ * A single PVS bin is stored in a fuse that's position is defined either
+ * in the qcom,pvs-fuse-redun property or in the qcom,pvs-fuse property.
+ * The fuse value defined in the qcom,pvs-fuse-redun-sel property is used
+ * to pick between the primary or redudant PVS fuse position.
+ * After the PVS bin value is read out successfully, it is used as the row
+ * index to get initial voltages for each fuse corner from the voltage table
+ * defined in the qcom,pvs-voltage-table property.
+ */
+static int cpr_pvs_single_bin_init(struct device_node *of_node,
+ struct cpr_regulator *cpr_vreg)
+{
+ u64 efuse_bits;
+ u32 pvs_fuse[4], pvs_fuse_redun_sel[5];
+ int rc, i, stripe_size;
+ bool redundant;
+ size_t pvs_bins;
+ u32 *tmp;
+
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun-sel",
+ pvs_fuse_redun_sel, 5);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "pvs-fuse-redun-sel missing: rc=%d\n", rc);
+ return rc;
+ }
+
+ redundant = cpr_fuse_is_setting_expected(cpr_vreg, pvs_fuse_redun_sel);
+ if (redundant) {
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse-redun",
+ pvs_fuse, 4);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "pvs-fuse-redun missing: rc=%d\n",
+ rc);
+ return rc;
+ }
+ } else {
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-fuse",
+ pvs_fuse, 4);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "pvs-fuse missing: rc=%d\n", rc);
+ return rc;
+ }
+ }
+
+ /* Construct PVS process # from the efuse bits */
+ efuse_bits = cpr_read_efuse_row(cpr_vreg, pvs_fuse[0], pvs_fuse[3]);
+ cpr_vreg->pvs_bin = (efuse_bits >> pvs_fuse[1]) &
+ ((1 << pvs_fuse[2]) - 1);
+ pvs_bins = 1 << pvs_fuse[2];
+ stripe_size = cpr_vreg->num_fuse_corners;
+ tmp = kzalloc(sizeof(u32) * pvs_bins * stripe_size, GFP_KERNEL);
+ if (!tmp) {
+ cpr_err(cpr_vreg, "memory alloc failed\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,pvs-voltage-table",
+ tmp, pvs_bins * stripe_size);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "pvs-voltage-table missing: rc=%d\n", rc);
+ kfree(tmp);
+ return rc;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++)
+ cpr_vreg->pvs_corner_v[i] = tmp[cpr_vreg->pvs_bin *
+ stripe_size + i - 1];
+ kfree(tmp);
+
+ rc = cpr_adjust_init_voltages(of_node, cpr_vreg);
+ if (rc)
+ return rc;
+
+ return 0;
+}
+
+/*
+ * The function reads VDD_MX dependency parameters from device node.
+ * Select the qcom,vdd-mx-corner-map length equal to either num_fuse_corners
+ * or num_corners based on selected vdd-mx-vmin-method.
+ */
+static int cpr_parse_vdd_mx_parameters(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ u32 corner_map_len;
+ int rc, len, size;
+
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmax",
+ &cpr_vreg->vdd_mx_vmax);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "vdd-mx-vmax missing: rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = of_property_read_u32(of_node, "qcom,vdd-mx-vmin-method",
+ &cpr_vreg->vdd_mx_vmin_method);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "vdd-mx-vmin-method missing: rc=%d\n",
+ rc);
+ return rc;
+ }
+ if (cpr_vreg->vdd_mx_vmin_method > VDD_MX_VMIN_APC_CORNER_MAP) {
+ cpr_err(cpr_vreg, "Invalid vdd-mx-vmin-method(%d)\n",
+ cpr_vreg->vdd_mx_vmin_method);
+ return -EINVAL;
+ }
+
+ switch (cpr_vreg->vdd_mx_vmin_method) {
+ case VDD_MX_VMIN_APC_FUSE_CORNER_MAP:
+ corner_map_len = cpr_vreg->num_fuse_corners;
+ break;
+ case VDD_MX_VMIN_APC_CORNER_MAP:
+ corner_map_len = cpr_vreg->num_corners;
+ break;
+ default:
+ cpr_vreg->vdd_mx_corner_map = NULL;
+ return 0;
+ }
+
+ if (!of_find_property(of_node, "qcom,vdd-mx-corner-map", &len)) {
+ cpr_err(cpr_vreg, "qcom,vdd-mx-corner-map missing");
+ return -EINVAL;
+ }
+
+ size = len / sizeof(u32);
+ if (size != corner_map_len) {
+ cpr_err(cpr_vreg,
+ "qcom,vdd-mx-corner-map length=%d is invalid: required:%u\n",
+ size, corner_map_len);
+ return -EINVAL;
+ }
+
+ cpr_vreg->vdd_mx_corner_map = devm_kzalloc(&pdev->dev,
+ (corner_map_len + 1) * sizeof(*cpr_vreg->vdd_mx_corner_map),
+ GFP_KERNEL);
+ if (!cpr_vreg->vdd_mx_corner_map) {
+ cpr_err(cpr_vreg,
+ "Can't allocate memory for cpr_vreg->vdd_mx_corner_map\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,vdd-mx-corner-map",
+ &cpr_vreg->vdd_mx_corner_map[1],
+ corner_map_len);
+ if (rc)
+ cpr_err(cpr_vreg,
+ "read qcom,vdd-mx-corner-map failed, rc = %d\n", rc);
+
+ return rc;
+}
+
+#define MAX_CHARS_PER_INT 10
+
+/*
+ * The initial voltage for each fuse corner may be determined by one of two
+ * possible styles of fuse. If qcom,cpr-fuse-init-voltage is present, then
+ * the initial voltages are encoded in a fuse for each fuse corner. If it is
+ * not present, then the initial voltages are all determined using a single
+ * PVS bin fuse value.
+ */
+static int cpr_pvs_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int highest_fuse_corner = cpr_vreg->num_fuse_corners;
+ int i, rc, pos;
+ size_t buflen;
+ char *buf;
+
+ rc = of_property_read_u32(of_node, "qcom,cpr-apc-volt-step",
+ &cpr_vreg->step_volt);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "read cpr-apc-volt-step failed, rc = %d\n",
+ rc);
+ return rc;
+ } else if (cpr_vreg->step_volt == 0) {
+ cpr_err(cpr_vreg, "apc voltage step size can't be set to 0.\n");
+ return -EINVAL;
+ }
+
+ if (of_find_property(of_node, "qcom,cpr-fuse-init-voltage", NULL)) {
+ rc = cpr_pvs_per_corner_init(of_node, cpr_vreg);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "get pvs per corner failed, rc = %d",
+ rc);
+ return rc;
+ }
+ } else {
+ rc = cpr_pvs_single_bin_init(of_node, cpr_vreg);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "get pvs from single bin failed, rc = %d", rc);
+ return rc;
+ }
+ }
+
+ if (cpr_vreg->flags & FLAGS_UPLIFT_QUOT_VOLT) {
+ rc = cpr_voltage_uplift_wa_inc_volt(cpr_vreg, of_node);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "pvs volt uplift wa apply failed: %d",
+ rc);
+ return rc;
+ }
+ }
+
+ /*
+ * Allow the highest fuse corner's PVS voltage to define the ceiling
+ * voltage for that corner in order to support SoC's in which variable
+ * ceiling values are required.
+ */
+ if (cpr_vreg->pvs_corner_v[highest_fuse_corner] >
+ cpr_vreg->fuse_ceiling_volt[highest_fuse_corner])
+ cpr_vreg->fuse_ceiling_volt[highest_fuse_corner] =
+ cpr_vreg->pvs_corner_v[highest_fuse_corner];
+
+ /*
+ * Restrict all fuse corner PVS voltages based upon per corner
+ * ceiling and floor voltages.
+ */
+ for (i = CPR_FUSE_CORNER_MIN; i <= highest_fuse_corner; i++)
+ if (cpr_vreg->pvs_corner_v[i] > cpr_vreg->fuse_ceiling_volt[i])
+ cpr_vreg->pvs_corner_v[i]
+ = cpr_vreg->fuse_ceiling_volt[i];
+ else if (cpr_vreg->pvs_corner_v[i]
+ < cpr_vreg->fuse_floor_volt[i])
+ cpr_vreg->pvs_corner_v[i]
+ = cpr_vreg->fuse_floor_volt[i];
+
+ cpr_vreg->ceiling_max
+ = cpr_vreg->fuse_ceiling_volt[highest_fuse_corner];
+
+ /*
+ * Log ceiling, floor, and inital voltages since they are critical for
+ * all CPR debugging.
+ */
+ buflen = cpr_vreg->num_fuse_corners * (MAX_CHARS_PER_INT + 2)
+ * sizeof(*buf);
+ buf = kzalloc(buflen, GFP_KERNEL);
+ if (buf == NULL) {
+ cpr_err(cpr_vreg, "Could not allocate memory for corner voltage logging\n");
+ return 0;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN, pos = 0; i <= highest_fuse_corner; i++)
+ pos += scnprintf(buf + pos, buflen - pos, "%u%s",
+ cpr_vreg->pvs_corner_v[i],
+ i < highest_fuse_corner ? " " : "");
+ cpr_info(cpr_vreg, "pvs voltage: [%s] uV\n", buf);
+
+ for (i = CPR_FUSE_CORNER_MIN, pos = 0; i <= highest_fuse_corner; i++)
+ pos += scnprintf(buf + pos, buflen - pos, "%d%s",
+ cpr_vreg->fuse_ceiling_volt[i],
+ i < highest_fuse_corner ? " " : "");
+ cpr_info(cpr_vreg, "ceiling voltage: [%s] uV\n", buf);
+
+ for (i = CPR_FUSE_CORNER_MIN, pos = 0; i <= highest_fuse_corner; i++)
+ pos += scnprintf(buf + pos, buflen - pos, "%d%s",
+ cpr_vreg->fuse_floor_volt[i],
+ i < highest_fuse_corner ? " " : "");
+ cpr_info(cpr_vreg, "floor voltage: [%s] uV\n", buf);
+
+ kfree(buf);
+ return 0;
+}
+
+#define CPR_PROP_READ_U32(cpr_vreg, of_node, cpr_property, cpr_config, rc) \
+do { \
+ if (!rc) { \
+ rc = of_property_read_u32(of_node, \
+ "qcom," cpr_property, \
+ cpr_config); \
+ if (rc) { \
+ cpr_err(cpr_vreg, "Missing " #cpr_property \
+ ": rc = %d\n", rc); \
+ } \
+ } \
+} while (0)
+
+static int cpr_apc_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int i, rc = 0;
+
+ for (i = 0; i < ARRAY_SIZE(vdd_apc_name); i++) {
+ cpr_vreg->vdd_apc = devm_regulator_get_optional(&pdev->dev,
+ vdd_apc_name[i]);
+ rc = PTR_RET(cpr_vreg->vdd_apc);
+ if (!IS_ERR_OR_NULL(cpr_vreg->vdd_apc))
+ break;
+ }
+
+ if (rc) {
+ if (rc != -EPROBE_DEFER)
+ cpr_err(cpr_vreg, "devm_regulator_get: rc=%d\n", rc);
+ return rc;
+ }
+
+ /* Check dependencies */
+ if (of_find_property(of_node, "vdd-mx-supply", NULL)) {
+ cpr_vreg->vdd_mx = devm_regulator_get(&pdev->dev, "vdd-mx");
+ if (IS_ERR_OR_NULL(cpr_vreg->vdd_mx)) {
+ rc = PTR_RET(cpr_vreg->vdd_mx);
+ if (rc != -EPROBE_DEFER)
+ cpr_err(cpr_vreg,
+ "devm_regulator_get: vdd-mx: rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+
+ return 0;
+}
+
+static void cpr_apc_exit(struct cpr_regulator *cpr_vreg)
+{
+ if (cpr_vreg->vreg_enabled) {
+ regulator_disable(cpr_vreg->vdd_apc);
+
+ if (cpr_vreg->vdd_mx)
+ regulator_disable(cpr_vreg->vdd_mx);
+ }
+}
+
+static int cpr_voltage_uplift_wa_inc_quot(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ u32 delta_quot[3];
+ int rc, i;
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-uplift-quotient", delta_quot, 3);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr-uplift-quotient is missing: %d", rc);
+ return rc;
+ }
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++)
+ cpr_vreg->cpr_fuse_target_quot[i] += delta_quot[i-1];
+ return rc;
+}
+
+static void cpr_parse_pvs_version_fuse(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ int rc;
+ u64 fuse_bits;
+ u32 fuse_sel[4];
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,pvs-version-fuse-sel", fuse_sel, 4);
+ if (!rc) {
+ fuse_bits = cpr_read_efuse_row(cpr_vreg,
+ fuse_sel[0], fuse_sel[3]);
+ cpr_vreg->pvs_version = (fuse_bits >> fuse_sel[1]) &
+ ((1 << fuse_sel[2]) - 1);
+ cpr_info(cpr_vreg, "[row: %d]: 0x%llx, pvs_version = %d\n",
+ fuse_sel[0], fuse_bits, cpr_vreg->pvs_version);
+ } else {
+ cpr_vreg->pvs_version = 0;
+ }
+}
+
+/**
+ * cpr_get_open_loop_voltage() - fill the open_loop_volt array with linearly
+ * interpolated open-loop CPR voltage values.
+ * @cpr_vreg: Handle to the cpr-regulator device
+ * @dev: Device pointer for the cpr-regulator device
+ * @corner_max: Array of length (cpr_vreg->num_fuse_corners + 1) which maps from
+ * fuse corners to the highest virtual corner corresponding to a
+ * given fuse corner
+ * @freq_map: Array of length (cpr_vreg->num_corners + 1) which maps from
+ * virtual corners to frequencies in Hz.
+ * @maps_valid: Boolean which indicates if the values in corner_max and freq_map
+ * are valid. If they are not valid, then the open_loop_volt
+ * values are not interpolated.
+ */
+static int cpr_get_open_loop_voltage(struct cpr_regulator *cpr_vreg,
+ struct device *dev, const u32 *corner_max, const u32 *freq_map,
+ bool maps_valid)
+{
+ int rc = 0;
+ int i, j;
+ u64 volt_high, volt_low, freq_high, freq_low, freq, temp, temp_limit;
+ u32 *max_factor = NULL;
+
+ cpr_vreg->open_loop_volt = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_corners + 1), GFP_KERNEL);
+ if (!cpr_vreg->open_loop_volt) {
+ cpr_err(cpr_vreg,
+ "Can't allocate memory for cpr_vreg->open_loop_volt\n");
+ return -ENOMEM;
+ }
+
+ /*
+ * Set open loop voltage to be equal to per-fuse-corner initial voltage
+ * by default. This ensures that the open loop voltage is valid for
+ * all virtual corners even if some virtual corner to frequency mappings
+ * are missing. It also ensures that the voltage is valid for the
+ * higher corners not utilized by a given speed-bin.
+ */
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++)
+ cpr_vreg->open_loop_volt[i]
+ = cpr_vreg->pvs_corner_v[cpr_vreg->corner_map[i]];
+
+ if (!maps_valid || !corner_max || !freq_map
+ || !of_find_property(dev->of_node,
+ "qcom,cpr-voltage-scaling-factor-max", NULL)) {
+ /* Not using interpolation */
+ return 0;
+ }
+
+ max_factor
+ = kzalloc(sizeof(*max_factor) * (cpr_vreg->num_fuse_corners + 1),
+ GFP_KERNEL);
+ if (!max_factor) {
+ cpr_err(cpr_vreg, "Could not allocate memory for max_factor array\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-voltage-scaling-factor-max",
+ &max_factor[CPR_FUSE_CORNER_MIN],
+ cpr_vreg->num_fuse_corners);
+ if (rc) {
+ cpr_debug(cpr_vreg, "failed to read qcom,cpr-voltage-scaling-factor-max; initial voltage interpolation not possible\n");
+ kfree(max_factor);
+ return 0;
+ }
+
+ for (j = CPR_FUSE_CORNER_MIN + 1; j <= cpr_vreg->num_fuse_corners;
+ j++) {
+ freq_high = freq_map[corner_max[j]];
+ freq_low = freq_map[corner_max[j - 1]];
+ volt_high = cpr_vreg->pvs_corner_v[j];
+ volt_low = cpr_vreg->pvs_corner_v[j - 1];
+ if (freq_high <= freq_low || volt_high <= volt_low)
+ continue;
+
+ for (i = corner_max[j - 1] + 1; i < corner_max[j]; i++) {
+ freq = freq_map[i];
+ if (freq_high <= freq)
+ continue;
+
+ temp = (freq_high - freq) * (volt_high - volt_low);
+ do_div(temp, (u32)(freq_high - freq_low));
+
+ /*
+ * max_factor[j] has units of uV/MHz while freq values
+ * have units of Hz. Divide by 1000000 to convert.
+ */
+ temp_limit = (freq_high - freq) * max_factor[j];
+ do_div(temp_limit, 1000000);
+
+ cpr_vreg->open_loop_volt[i]
+ = volt_high - min(temp, temp_limit);
+ cpr_vreg->open_loop_volt[i]
+ = DIV_ROUND_UP(cpr_vreg->open_loop_volt[i],
+ cpr_vreg->step_volt)
+ * cpr_vreg->step_volt;
+ }
+ }
+
+ kfree(max_factor);
+ return 0;
+}
+
+/*
+ * Limit the per-virtual-corner open-loop voltages using the per-virtual-corner
+ * ceiling and floor voltage values. This must be called only after the
+ * open_loop_volt, ceiling, and floor arrays have all been initialized.
+ */
+static int cpr_limit_open_loop_voltage(struct cpr_regulator *cpr_vreg)
+{
+ int i;
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ if (cpr_vreg->open_loop_volt[i] > cpr_vreg->ceiling_volt[i])
+ cpr_vreg->open_loop_volt[i] = cpr_vreg->ceiling_volt[i];
+ else if (cpr_vreg->open_loop_volt[i] < cpr_vreg->floor_volt[i])
+ cpr_vreg->open_loop_volt[i] = cpr_vreg->floor_volt[i];
+ }
+
+ return 0;
+}
+
+/*
+ * Fill an OPP table for the cpr-regulator device struct with pairs of
+ * <virtual voltage corner number, open loop voltage> tuples.
+ */
+static int cpr_populate_opp_table(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int i, rc = 0;
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ rc |= dev_pm_opp_add(dev, i, cpr_vreg->open_loop_volt[i]);
+ if (rc)
+ cpr_debug(cpr_vreg, "could not add OPP entry <%d, %d>, rc=%d\n",
+ i, cpr_vreg->open_loop_volt[i], rc);
+ }
+ if (rc)
+ cpr_err(cpr_vreg, "adding OPP entry failed - OPP may not be enabled, rc=%d\n",
+ rc);
+
+ return 0;
+}
+
+/*
+ * Conditionally reduce the per-virtual-corner ceiling voltages if certain
+ * device tree flags are present. This must be called only after the ceiling
+ * array has been initialized and the open_loop_volt array values have been
+ * initialized and limited to the existing floor to ceiling voltage range.
+ */
+static int cpr_reduce_ceiling_voltage(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ bool reduce_to_fuse_open_loop, reduce_to_interpolated_open_loop;
+ int i;
+
+ reduce_to_fuse_open_loop = of_property_read_bool(dev->of_node,
+ "qcom,cpr-init-voltage-as-ceiling");
+ reduce_to_interpolated_open_loop = of_property_read_bool(dev->of_node,
+ "qcom,cpr-scaled-init-voltage-as-ceiling");
+
+ if (!reduce_to_fuse_open_loop && !reduce_to_interpolated_open_loop)
+ return 0;
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ if (reduce_to_interpolated_open_loop &&
+ cpr_vreg->open_loop_volt[i] < cpr_vreg->ceiling_volt[i])
+ cpr_vreg->ceiling_volt[i] = cpr_vreg->open_loop_volt[i];
+ else if (reduce_to_fuse_open_loop &&
+ cpr_vreg->pvs_corner_v[cpr_vreg->corner_map[i]]
+ < cpr_vreg->ceiling_volt[i])
+ cpr_vreg->ceiling_volt[i]
+ = max((u32)cpr_vreg->floor_volt[i],
+ cpr_vreg->pvs_corner_v[cpr_vreg->corner_map[i]]);
+ cpr_debug(cpr_vreg, "lowered ceiling[%d] = %d uV\n",
+ i, cpr_vreg->ceiling_volt[i]);
+ }
+
+ return 0;
+}
+
+static int cpr_adjust_target_quot_offsets(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int tuple_count, tuple_match, i;
+ u32 index;
+ u32 quot_offset_adjust = 0;
+ int len = 0;
+ int rc = 0;
+ char *quot_offset_str;
+
+ quot_offset_str = "qcom,cpr-quot-offset-adjustment";
+ if (!of_find_property(of_node, quot_offset_str, &len)) {
+ /* No static quotient adjustment needed. */
+ return 0;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for quotient adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_fuse_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "%s length=%d is invalid\n", quot_offset_str,
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ index = tuple_match * cpr_vreg->num_fuse_corners
+ + i - CPR_FUSE_CORNER_MIN;
+ rc = of_property_read_u32_index(of_node, quot_offset_str, index,
+ "_offset_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ quot_offset_str, index, rc);
+ return rc;
+ }
+
+ if (quot_offset_adjust) {
+ cpr_vreg->fuse_quot_offset[i] += quot_offset_adjust;
+ cpr_info(cpr_vreg, "Corner[%d]: adjusted target quot = %d\n",
+ i, cpr_vreg->fuse_quot_offset[i]);
+ }
+ }
+
+ return rc;
+}
+
+static int cpr_get_fuse_quot_offset(struct cpr_regulator *cpr_vreg,
+ struct platform_device *pdev,
+ struct cpr_quot_scale *quot_scale)
+{
+ struct device *dev = &pdev->dev;
+ struct property *prop;
+ u32 *fuse_sel, *tmp, *offset_multiplier = NULL;
+ int rc = 0, i, size, len;
+ char *quot_offset_str;
+
+ quot_offset_str = cpr_vreg->cpr_fuse_redundant
+ ? "qcom,cpr-fuse-redun-quot-offset"
+ : "qcom,cpr-fuse-quot-offset";
+
+ prop = of_find_property(dev->of_node, quot_offset_str, NULL);
+ if (!prop) {
+ cpr_debug(cpr_vreg, "%s not present\n", quot_offset_str);
+ return 0;
+ } else {
+ size = prop->length / sizeof(u32);
+ if (size != cpr_vreg->num_fuse_corners * 4) {
+ cpr_err(cpr_vreg, "fuse position for quot offset is invalid\n");
+ return -EINVAL;
+ }
+ }
+
+ fuse_sel = kzalloc(sizeof(u32) * size, GFP_KERNEL);
+ if (!fuse_sel) {
+ cpr_err(cpr_vreg, "memory alloc failed.\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(dev->of_node, quot_offset_str,
+ fuse_sel, size);
+
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "read %s failed, rc = %d\n", quot_offset_str,
+ rc);
+ kfree(fuse_sel);
+ return rc;
+ }
+
+ cpr_vreg->fuse_quot_offset = devm_kzalloc(dev,
+ sizeof(u32) * (cpr_vreg->num_fuse_corners + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->fuse_quot_offset) {
+ cpr_err(cpr_vreg, "Can't allocate memory for cpr_vreg->fuse_quot_offset\n");
+ kfree(fuse_sel);
+ return -ENOMEM;
+ }
+
+ if (!of_find_property(dev->of_node,
+ "qcom,cpr-fuse-quot-offset-scale", &len)) {
+ cpr_debug(cpr_vreg, "qcom,cpr-fuse-quot-offset-scale not present\n");
+ } else {
+ if (len != cpr_vreg->num_fuse_corners * sizeof(u32)) {
+ cpr_err(cpr_vreg, "the size of qcom,cpr-fuse-quot-offset-scale is invalid\n");
+ kfree(fuse_sel);
+ return -EINVAL;
+ }
+
+ offset_multiplier = kzalloc(sizeof(*offset_multiplier)
+ * (cpr_vreg->num_fuse_corners + 1),
+ GFP_KERNEL);
+ if (!offset_multiplier) {
+ cpr_err(cpr_vreg, "memory alloc failed.\n");
+ kfree(fuse_sel);
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-fuse-quot-offset-scale",
+ &offset_multiplier[1],
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "read qcom,cpr-fuse-quot-offset-scale failed, rc = %d\n",
+ rc);
+ kfree(fuse_sel);
+ goto out;
+ }
+ }
+
+ tmp = fuse_sel;
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ cpr_vreg->fuse_quot_offset[i] = cpr_read_efuse_param(cpr_vreg,
+ fuse_sel[0], fuse_sel[1], fuse_sel[2],
+ fuse_sel[3]);
+ if (offset_multiplier)
+ cpr_vreg->fuse_quot_offset[i] *= offset_multiplier[i];
+ fuse_sel += 4;
+ }
+
+ rc = cpr_adjust_target_quot_offsets(pdev, cpr_vreg);
+ kfree(tmp);
+out:
+ kfree(offset_multiplier);
+ return rc;
+}
+
+/*
+ * Adjust the per-virtual-corner open loop voltage with an offset specfied by a
+ * device-tree property. This must be called after open-loop voltage scaling.
+ */
+static int cpr_virtual_corner_voltage_adjust(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ char *prop_name = "qcom,cpr-virtual-corner-init-voltage-adjustment";
+ int i, rc, tuple_count, tuple_match, index, len;
+ u32 voltage_adjust;
+
+ if (!of_find_property(dev->of_node, prop_name, &len)) {
+ cpr_debug(cpr_vreg, "%s not specified\n", prop_name);
+ return 0;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for voltage adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "%s length=%d is invalid\n", prop_name,
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ index = tuple_match * cpr_vreg->num_corners
+ + i - CPR_CORNER_MIN;
+ rc = of_property_read_u32_index(dev->of_node, prop_name,
+ index, &voltage_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ prop_name, index, rc);
+ return rc;
+ }
+
+ if (voltage_adjust) {
+ cpr_vreg->open_loop_volt[i] += (int)voltage_adjust;
+ cpr_info(cpr_vreg, "corner=%d adjusted open-loop voltage=%d\n",
+ i, cpr_vreg->open_loop_volt[i]);
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Adjust the per-virtual-corner quot with an offset specfied by a
+ * device-tree property. This must be called after the quot-scaling adjustments
+ * are completed.
+ */
+static int cpr_virtual_corner_quot_adjust(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ char *prop_name = "qcom,cpr-virtual-corner-quotient-adjustment";
+ int i, rc, tuple_count, tuple_match, index, len;
+ u32 quot_adjust;
+
+ if (!of_find_property(dev->of_node, prop_name, &len)) {
+ cpr_debug(cpr_vreg, "%s not specified\n", prop_name);
+ return 0;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for quotient adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "%s length=%d is invalid\n", prop_name,
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ index = tuple_match * cpr_vreg->num_corners
+ + i - CPR_CORNER_MIN;
+ rc = of_property_read_u32_index(dev->of_node, prop_name,
+ index, "_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ prop_name, index, rc);
+ return rc;
+ }
+
+ if (quot_adjust) {
+ cpr_vreg->quot_adjust[i] -= (int)quot_adjust;
+ cpr_info(cpr_vreg, "corner=%d adjusted quotient=%d\n",
+ i,
+ cpr_vreg->cpr_fuse_target_quot[cpr_vreg->corner_map[i]]
+ - cpr_vreg->quot_adjust[i]);
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * cpr_get_corner_quot_adjustment() -- get the quot_adjust for each corner.
+ *
+ * Get the virtual corner to fuse corner mapping and virtual corner to APC clock
+ * frequency mapping from device tree.
+ * Calculate the quotient adjustment scaling factor for those corners mapping to
+ * all fuse corners except for the lowest one using linear interpolation.
+ * Calculate the quotient adjustment for each of these virtual corners using the
+ * min of the calculated scaling factor and the constant max scaling factor
+ * defined for each fuse corner in device tree.
+ */
+static int cpr_get_corner_quot_adjustment(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int rc = 0;
+ int highest_fuse_corner = cpr_vreg->num_fuse_corners;
+ int i, j, size;
+ struct property *prop;
+ bool corners_mapped, match_found;
+ u32 *tmp, *freq_map = NULL;
+ u32 corner, freq_corner;
+ u32 *freq_max = NULL;
+ u32 *scaling = NULL;
+ u32 *max_factor = NULL;
+ u32 *corner_max = NULL;
+ bool maps_valid = false;
+
+ prop = of_find_property(dev->of_node, "qcom,cpr-corner-map", NULL);
+
+ if (prop) {
+ size = prop->length / sizeof(u32);
+ corners_mapped = true;
+ } else {
+ size = cpr_vreg->num_fuse_corners;
+ corners_mapped = false;
+ }
+
+ cpr_vreg->corner_map = devm_kzalloc(dev, sizeof(int) * (size + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->corner_map) {
+ cpr_err(cpr_vreg,
+ "Can't allocate memory for cpr_vreg->corner_map\n");
+ return -ENOMEM;
+ }
+ cpr_vreg->num_corners = size;
+
+ cpr_vreg->quot_adjust = devm_kzalloc(dev,
+ sizeof(u32) * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->quot_adjust) {
+ cpr_err(cpr_vreg,
+ "Can't allocate memory for cpr_vreg->quot_adjust\n");
+ return -ENOMEM;
+ }
+
+ if (!corners_mapped) {
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++)
+ cpr_vreg->corner_map[i] = i;
+ goto free_arrays;
+ } else {
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-corner-map", &cpr_vreg->corner_map[1], size);
+
+ if (rc) {
+ cpr_err(cpr_vreg,
+ "qcom,cpr-corner-map missing, rc = %d\n", rc);
+ return rc;
+ }
+
+ /*
+ * Verify that the virtual corner to fuse corner mapping is
+ * valid.
+ */
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ if (cpr_vreg->corner_map[i] > cpr_vreg->num_fuse_corners
+ || cpr_vreg->corner_map[i] < CPR_FUSE_CORNER_MIN) {
+ cpr_err(cpr_vreg, "qcom,cpr-corner-map contains an element %d which isn't in the allowed range [%d, %d]\n",
+ cpr_vreg->corner_map[i],
+ CPR_FUSE_CORNER_MIN,
+ cpr_vreg->num_fuse_corners);
+ return -EINVAL;
+ }
+ }
+ }
+
+ prop = of_find_property(dev->of_node,
+ "qcom,cpr-speed-bin-max-corners", NULL);
+ if (!prop) {
+ cpr_debug(cpr_vreg, "qcom,cpr-speed-bin-max-corner missing\n");
+ goto free_arrays;
+ }
+
+ size = prop->length / sizeof(u32);
+ tmp = kzalloc(size * sizeof(u32), GFP_KERNEL);
+ if (!tmp) {
+ cpr_err(cpr_vreg, "memory alloc failed\n");
+ return -ENOMEM;
+ }
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-speed-bin-max-corners", tmp, size);
+ if (rc < 0) {
+ kfree(tmp);
+ cpr_err(cpr_vreg,
+ "get cpr-speed-bin-max-corners failed, rc = %d\n", rc);
+ return rc;
+ }
+
+ corner_max = kzalloc((cpr_vreg->num_fuse_corners + 1)
+ * sizeof(*corner_max), GFP_KERNEL);
+ freq_max = kzalloc((cpr_vreg->num_fuse_corners + 1) * sizeof(*freq_max),
+ GFP_KERNEL);
+ if (corner_max == NULL || freq_max == NULL) {
+ cpr_err(cpr_vreg, "Could not allocate memory for quotient scaling arrays\n");
+ kfree(tmp);
+ rc = -ENOMEM;
+ goto free_arrays;
+ }
+
+ /*
+ * Get the maximum virtual corner for each fuse corner based upon the
+ * speed_bin and pvs_version values.
+ */
+ match_found = false;
+ for (i = 0; i < size; i += cpr_vreg->num_fuse_corners + 2) {
+ if (tmp[i] != cpr_vreg->speed_bin &&
+ tmp[i] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ if (tmp[i + 1] != cpr_vreg->pvs_version &&
+ tmp[i + 1] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ for (j = CPR_FUSE_CORNER_MIN;
+ j <= cpr_vreg->num_fuse_corners; j++)
+ corner_max[j] = tmp[i + 2 + j - CPR_FUSE_CORNER_MIN];
+ match_found = true;
+ break;
+ }
+ kfree(tmp);
+
+ if (!match_found) {
+ cpr_debug(cpr_vreg, "No quotient adjustment possible for speed bin=%u, pvs version=%u\n",
+ cpr_vreg->speed_bin, cpr_vreg->pvs_version);
+ goto free_arrays;
+ }
+
+ /* Verify that fuse corner to max virtual corner mapping is valid. */
+ for (i = CPR_FUSE_CORNER_MIN; i <= highest_fuse_corner; i++) {
+ if (corner_max[i] < CPR_CORNER_MIN
+ || corner_max[i] > cpr_vreg->num_corners) {
+ cpr_err(cpr_vreg, "Invalid corner=%d in qcom,cpr-speed-bin-max-corners\n",
+ corner_max[i]);
+ goto free_arrays;
+ }
+ }
+
+ /*
+ * Return success if the virtual corner values read from
+ * qcom,cpr-speed-bin-max-corners property are incorrect. This allows
+ * the driver to continue to run without quotient scaling.
+ */
+ for (i = CPR_FUSE_CORNER_MIN + 1; i <= highest_fuse_corner; i++) {
+ if (corner_max[i] <= corner_max[i - 1]) {
+ cpr_err(cpr_vreg, "fuse corner=%d (%u) should be larger than the fuse corner=%d (%u)\n",
+ i, corner_max[i], i - 1, corner_max[i - 1]);
+ goto free_arrays;
+ }
+ }
+
+ prop = of_find_property(dev->of_node,
+ "qcom,cpr-corner-frequency-map", NULL);
+ if (!prop) {
+ cpr_debug(cpr_vreg, "qcom,cpr-corner-frequency-map missing\n");
+ goto free_arrays;
+ }
+
+ size = prop->length / sizeof(u32);
+ tmp = kzalloc(sizeof(u32) * size, GFP_KERNEL);
+ if (!tmp) {
+ cpr_err(cpr_vreg, "memory alloc failed\n");
+ rc = -ENOMEM;
+ goto free_arrays;
+ }
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-corner-frequency-map", tmp, size);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "get cpr-corner-frequency-map failed, rc = %d\n", rc);
+ kfree(tmp);
+ goto free_arrays;
+ }
+ freq_map = kzalloc(sizeof(u32) * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ if (!freq_map) {
+ cpr_err(cpr_vreg, "memory alloc for freq_map failed!\n");
+ kfree(tmp);
+ rc = -ENOMEM;
+ goto free_arrays;
+ }
+ for (i = 0; i < size; i += 2) {
+ corner = tmp[i];
+ if ((corner < 1) || (corner > cpr_vreg->num_corners)) {
+ cpr_err(cpr_vreg,
+ "corner should be in 1~%d range: %d\n",
+ cpr_vreg->num_corners, corner);
+ continue;
+ }
+ freq_map[corner] = tmp[i + 1];
+ cpr_debug(cpr_vreg,
+ "Frequency at virtual corner %d is %d Hz.\n",
+ corner, freq_map[corner]);
+ }
+ kfree(tmp);
+
+ prop = of_find_property(dev->of_node,
+ "qcom,cpr-quot-adjust-scaling-factor-max", NULL);
+ if (!prop) {
+ cpr_debug(cpr_vreg, "qcom,cpr-quot-adjust-scaling-factor-max missing\n");
+ rc = 0;
+ goto free_arrays;
+ }
+
+ size = prop->length / sizeof(u32);
+ if ((size != 1) && (size != cpr_vreg->num_fuse_corners)) {
+ cpr_err(cpr_vreg, "The size of qcom,cpr-quot-adjust-scaling-factor-max should be 1 or %d\n",
+ cpr_vreg->num_fuse_corners);
+ rc = 0;
+ goto free_arrays;
+ }
+
+ max_factor = kzalloc(sizeof(u32) * (cpr_vreg->num_fuse_corners + 1),
+ GFP_KERNEL);
+ if (!max_factor) {
+ cpr_err(cpr_vreg, "Could not allocate memory for max_factor array\n");
+ rc = -ENOMEM;
+ goto free_arrays;
+ }
+ /*
+ * Leave max_factor[CPR_FUSE_CORNER_MIN ... highest_fuse_corner-1] = 0
+ * if cpr-quot-adjust-scaling-factor-max is a single value in order to
+ * maintain backward compatibility.
+ */
+ i = (size == cpr_vreg->num_fuse_corners) ? CPR_FUSE_CORNER_MIN
+ : highest_fuse_corner;
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-quot-adjust-scaling-factor-max",
+ &max_factor[i], size);
+ if (rc < 0) {
+ cpr_debug(cpr_vreg, "could not read qcom,cpr-quot-adjust-scaling-factor-max, rc=%d\n",
+ rc);
+ rc = 0;
+ goto free_arrays;
+ }
+
+ /*
+ * Get the quotient adjustment scaling factor, according to:
+ * scaling = min(1000 * (QUOT(corner_N) - QUOT(corner_N-1))
+ * / (freq(corner_N) - freq(corner_N-1)), max_factor)
+ *
+ * QUOT(corner_N): quotient read from fuse for fuse corner N
+ * QUOT(corner_N-1): quotient read from fuse for fuse corner (N - 1)
+ * freq(corner_N): max frequency in MHz supported by fuse corner N
+ * freq(corner_N-1): max frequency in MHz supported by fuse corner
+ * (N - 1)
+ */
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= highest_fuse_corner; i++)
+ freq_max[i] = freq_map[corner_max[i]];
+ for (i = CPR_FUSE_CORNER_MIN + 1; i <= highest_fuse_corner; i++) {
+ if (freq_max[i] <= freq_max[i - 1] || freq_max[i - 1] == 0) {
+ cpr_err(cpr_vreg, "fuse corner %d freq=%u should be larger than fuse corner %d freq=%u\n",
+ i, freq_max[i], i - 1, freq_max[i - 1]);
+ rc = -EINVAL;
+ goto free_arrays;
+ }
+ }
+ scaling = kzalloc((cpr_vreg->num_fuse_corners + 1) * sizeof(*scaling),
+ GFP_KERNEL);
+ if (!scaling) {
+ cpr_err(cpr_vreg, "Could not allocate memory for scaling array\n");
+ rc = -ENOMEM;
+ goto free_arrays;
+ }
+ /* Convert corner max frequencies from Hz to MHz. */
+ for (i = CPR_FUSE_CORNER_MIN; i <= highest_fuse_corner; i++)
+ freq_max[i] /= 1000000;
+
+ for (i = CPR_FUSE_CORNER_MIN + 1; i <= highest_fuse_corner; i++) {
+ if (cpr_vreg->fuse_quot_offset &&
+ (cpr_vreg->cpr_fuse_ro_sel[i] !=
+ cpr_vreg->cpr_fuse_ro_sel[i - 1])) {
+ scaling[i] = 1000 * cpr_vreg->fuse_quot_offset[i]
+ / (freq_max[i] - freq_max[i - 1]);
+ } else {
+ scaling[i] = 1000 * (cpr_vreg->cpr_fuse_target_quot[i]
+ - cpr_vreg->cpr_fuse_target_quot[i - 1])
+ / (freq_max[i] - freq_max[i - 1]);
+ if (cpr_vreg->cpr_fuse_target_quot[i]
+ < cpr_vreg->cpr_fuse_target_quot[i - 1])
+ scaling[i] = 0;
+ }
+ scaling[i] = min(scaling[i], max_factor[i]);
+ cpr_info(cpr_vreg, "fuse corner %d quotient adjustment scaling factor: %d.%03d\n",
+ i, scaling[i] / 1000, scaling[i] % 1000);
+ }
+
+ /*
+ * Walk through the virtual corners mapped to each fuse corner
+ * and calculate the quotient adjustment for each one using the
+ * following formula:
+ * quot_adjust = (freq_max - freq_corner) * scaling / 1000
+ *
+ * @freq_max: max frequency in MHz supported by the fuse corner
+ * @freq_corner: frequency in MHz corresponding to the virtual corner
+ */
+ for (j = CPR_FUSE_CORNER_MIN + 1; j <= highest_fuse_corner; j++) {
+ for (i = corner_max[j - 1] + 1; i < corner_max[j]; i++) {
+ freq_corner = freq_map[i] / 1000000; /* MHz */
+ if (freq_corner > 0) {
+ cpr_vreg->quot_adjust[i] = scaling[j] *
+ (freq_max[j] - freq_corner) / 1000;
+ }
+ }
+ }
+
+ rc = cpr_virtual_corner_quot_adjust(cpr_vreg, dev);
+ if (rc) {
+ cpr_err(cpr_vreg, "count not adjust virtual-corner quot rc=%d\n",
+ rc);
+ goto free_arrays;
+ }
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++)
+ cpr_info(cpr_vreg, "adjusted quotient[%d] = %d\n", i,
+ cpr_vreg->cpr_fuse_target_quot[cpr_vreg->corner_map[i]]
+ - cpr_vreg->quot_adjust[i]);
+
+ maps_valid = true;
+
+free_arrays:
+ if (!rc) {
+
+ rc = cpr_get_open_loop_voltage(cpr_vreg, dev, corner_max,
+ freq_map, maps_valid);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not fill open loop voltage array, rc=%d\n",
+ rc);
+ goto free_arrays_1;
+ }
+
+ rc = cpr_virtual_corner_voltage_adjust(cpr_vreg, dev);
+ if (rc)
+ cpr_err(cpr_vreg, "count not adjust virtual-corner voltage rc=%d\n",
+ rc);
+ }
+
+free_arrays_1:
+ kfree(max_factor);
+ kfree(scaling);
+ kfree(freq_map);
+ kfree(corner_max);
+ kfree(freq_max);
+ return rc;
+}
+
+/*
+ * Check if the redundant set of CPR fuses should be used in place of the
+ * primary set and configure the cpr_fuse_redundant element accordingly.
+ */
+static int cpr_check_redundant(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ u32 cpr_fuse_redun_sel[5];
+ int rc;
+
+ if (of_find_property(of_node, "qcom,cpr-fuse-redun-sel", NULL)) {
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-redun-sel", cpr_fuse_redun_sel, 5);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-redun-sel missing: rc=%d\n",
+ rc);
+ return rc;
+ }
+ cpr_vreg->cpr_fuse_redundant
+ = cpr_fuse_is_setting_expected(cpr_vreg,
+ cpr_fuse_redun_sel);
+ } else {
+ cpr_vreg->cpr_fuse_redundant = false;
+ }
+
+ if (cpr_vreg->cpr_fuse_redundant)
+ cpr_info(cpr_vreg, "using redundant fuse parameters\n");
+
+ return 0;
+}
+
+static int cpr_read_fuse_revision(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ u32 fuse_sel[4];
+ int rc;
+
+ if (of_find_property(of_node, "qcom,cpr-fuse-revision", NULL)) {
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-revision", fuse_sel, 4);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-revision read failed: rc=%d\n",
+ rc);
+ return rc;
+ }
+ cpr_vreg->cpr_fuse_revision
+ = cpr_read_efuse_param(cpr_vreg, fuse_sel[0],
+ fuse_sel[1], fuse_sel[2], fuse_sel[3]);
+ cpr_info(cpr_vreg, "fuse revision = %d\n",
+ cpr_vreg->cpr_fuse_revision);
+ } else {
+ cpr_vreg->cpr_fuse_revision = FUSE_REVISION_UNKNOWN;
+ }
+
+ return 0;
+}
+
+static int cpr_read_ro_select(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int rc = 0;
+ u32 cpr_fuse_row[2];
+ char *ro_sel_str;
+ int *bp_ro_sel;
+ int i;
+
+ bp_ro_sel
+ = kzalloc((cpr_vreg->num_fuse_corners + 1) * sizeof(*bp_ro_sel),
+ GFP_KERNEL);
+ if (!bp_ro_sel) {
+ cpr_err(cpr_vreg, "could not allocate memory for temp array\n");
+ return -ENOMEM;
+ }
+
+ if (cpr_vreg->cpr_fuse_redundant) {
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-redun-row",
+ cpr_fuse_row, 2);
+ ro_sel_str = "qcom,cpr-fuse-redun-ro-sel";
+ } else {
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-row",
+ cpr_fuse_row, 2);
+ ro_sel_str = "qcom,cpr-fuse-ro-sel";
+ }
+ if (rc)
+ goto error;
+
+ rc = of_property_read_u32_array(of_node, ro_sel_str,
+ &bp_ro_sel[CPR_FUSE_CORNER_MIN], cpr_vreg->num_fuse_corners);
+ if (rc) {
+ cpr_err(cpr_vreg, "%s read error, rc=%d\n", ro_sel_str, rc);
+ goto error;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++)
+ cpr_vreg->cpr_fuse_ro_sel[i]
+ = cpr_read_efuse_param(cpr_vreg, cpr_fuse_row[0],
+ bp_ro_sel[i], CPR_FUSE_RO_SEL_BITS,
+ cpr_fuse_row[1]);
+
+error:
+ kfree(bp_ro_sel);
+
+ return rc;
+}
+
+static int cpr_find_fuse_map_match(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int i, j, rc, tuple_size;
+ int len = 0;
+ u32 *tmp, val, ro;
+
+ /* Specify default no match case. */
+ cpr_vreg->cpr_fuse_map_match = FUSE_MAP_NO_MATCH;
+ cpr_vreg->cpr_fuse_map_count = 0;
+
+ if (!of_find_property(of_node, "qcom,cpr-fuse-version-map", &len)) {
+ /* No mapping present. */
+ return 0;
+ }
+
+ tuple_size = cpr_vreg->num_fuse_corners + 3;
+ cpr_vreg->cpr_fuse_map_count = len / (sizeof(u32) * tuple_size);
+
+ if (len == 0 || len % (sizeof(u32) * tuple_size)) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-version-map length=%d is invalid\n",
+ len);
+ return -EINVAL;
+ }
+
+ tmp = kzalloc(len, GFP_KERNEL);
+ if (!tmp) {
+ cpr_err(cpr_vreg, "could not allocate memory for temp array\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-version-map",
+ tmp, cpr_vreg->cpr_fuse_map_count * tuple_size);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-fuse-version-map, rc=%d\n",
+ rc);
+ goto done;
+ }
+
+ /*
+ * qcom,cpr-fuse-version-map tuple format:
+ * <speed_bin, pvs_version, cpr_fuse_revision, ro_sel[1], ...,
+ * ro_sel[n]> for n == number of fuse corners
+ */
+ for (i = 0; i < cpr_vreg->cpr_fuse_map_count; i++) {
+ if (tmp[i * tuple_size] != cpr_vreg->speed_bin
+ && tmp[i * tuple_size] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ if (tmp[i * tuple_size + 1] != cpr_vreg->pvs_version
+ && tmp[i * tuple_size + 1] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ if (tmp[i * tuple_size + 2] != cpr_vreg->cpr_fuse_revision
+ && tmp[i * tuple_size + 2] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ for (j = 0; j < cpr_vreg->num_fuse_corners; j++) {
+ val = tmp[i * tuple_size + 3 + j];
+ ro = cpr_vreg->cpr_fuse_ro_sel[j + CPR_FUSE_CORNER_MIN];
+ if (val != ro && val != FUSE_PARAM_MATCH_ANY)
+ break;
+ }
+ if (j == cpr_vreg->num_fuse_corners) {
+ cpr_vreg->cpr_fuse_map_match = i;
+ break;
+ }
+ }
+
+ if (cpr_vreg->cpr_fuse_map_match != FUSE_MAP_NO_MATCH)
+ cpr_debug(cpr_vreg, "qcom,cpr-fuse-version-map tuple match found: %d\n",
+ cpr_vreg->cpr_fuse_map_match);
+ else
+ cpr_debug(cpr_vreg, "qcom,cpr-fuse-version-map tuple match not found\n");
+
+done:
+ kfree(tmp);
+ return rc;
+}
+
+static int cpr_minimum_quot_difference_adjustment(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int tuple_count, tuple_match;
+ int rc, i, len = 0;
+ u32 index, adjust_quot = 0;
+ u32 *min_diff_quot;
+
+ if (!of_find_property(of_node, "qcom,cpr-fuse-min-quot-diff", NULL))
+ /* No conditional adjustment needed on revised quotients. */
+ return 0;
+
+ if (!of_find_property(of_node, "qcom,cpr-min-quot-diff-adjustment",
+ &len)) {
+ cpr_err(cpr_vreg, "qcom,cpr-min-quot-diff-adjustment not specified\n");
+ return -ENODEV;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH)
+ /* No matching index to use for quotient adjustment. */
+ return 0;
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_fuse_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "qcom,cpr-min-quot-diff-adjustment length=%d is invalid\n",
+ len);
+ return -EINVAL;
+ }
+
+ min_diff_quot = kzalloc(cpr_vreg->num_fuse_corners * sizeof(u32),
+ GFP_KERNEL);
+ if (!min_diff_quot) {
+ cpr_err(cpr_vreg, "memory alloc failed\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-min-quot-diff",
+ min_diff_quot,
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-min-quot-diff reading failed, rc = %d\n",
+ rc);
+ goto error;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN + 1;
+ i <= cpr_vreg->num_fuse_corners; i++) {
+ if ((cpr_vreg->cpr_fuse_target_quot[i]
+ - cpr_vreg->cpr_fuse_target_quot[i - 1])
+ <= (int)min_diff_quot[i - CPR_FUSE_CORNER_MIN]) {
+ index = tuple_match * cpr_vreg->num_fuse_corners
+ + i - CPR_FUSE_CORNER_MIN;
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-min-quot-diff-adjustment",
+ index, &adjust_quot);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-min-quot-diff-adjustment index %u, rc=%d\n",
+ index, rc);
+ goto error;
+ }
+
+ cpr_vreg->cpr_fuse_target_quot[i]
+ = cpr_vreg->cpr_fuse_target_quot[i - 1]
+ + adjust_quot;
+ cpr_info(cpr_vreg, "Corner[%d]: revised adjusted quotient = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ };
+ }
+
+error:
+ kfree(min_diff_quot);
+ return rc;
+}
+
+static int cpr_adjust_target_quots(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int tuple_count, tuple_match, i;
+ u32 index;
+ u32 quot_adjust = 0;
+ int len = 0;
+ int rc = 0;
+
+ if (!of_find_property(of_node, "qcom,cpr-quotient-adjustment", &len)) {
+ /* No static quotient adjustment needed. */
+ return 0;
+ }
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for quotient adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_fuse_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "qcom,cpr-quotient-adjustment length=%d is invalid\n",
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ index = tuple_match * cpr_vreg->num_fuse_corners
+ + i - CPR_FUSE_CORNER_MIN;
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-quotient-adjustment", index, "_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-quotient-adjustment index %u, rc=%d\n",
+ index, rc);
+ return rc;
+ }
+
+ if (quot_adjust) {
+ cpr_vreg->cpr_fuse_target_quot[i] += quot_adjust;
+ cpr_info(cpr_vreg, "Corner[%d]: adjusted target quot = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+ }
+
+ rc = cpr_minimum_quot_difference_adjustment(pdev, cpr_vreg);
+ if (rc)
+ cpr_err(cpr_vreg, "failed to apply minimum quot difference rc=%d\n",
+ rc);
+
+ return rc;
+}
+
+static int cpr_check_allowed(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ char *allow_str = "qcom,cpr-allowed";
+ int rc = 0, count;
+ int tuple_count, tuple_match;
+ u32 allow_status;
+
+ if (!of_find_property(of_node, allow_str, &count))
+ /* CPR is allowed for all fuse revisions. */
+ return 0;
+
+ count /= sizeof(u32);
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH)
+ /* No matching index to use for CPR allowed. */
+ return 0;
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (count != tuple_count) {
+ cpr_err(cpr_vreg, "%s count=%d is invalid\n", allow_str,
+ count);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(of_node, allow_str, tuple_match,
+ &allow_status);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ allow_str, tuple_match, rc);
+ return rc;
+ }
+
+ if (allow_status && !cpr_vreg->cpr_fuse_disable)
+ cpr_vreg->cpr_fuse_disable = false;
+ else
+ cpr_vreg->cpr_fuse_disable = true;
+
+ cpr_info(cpr_vreg, "CPR closed loop is %s for fuse revision %d\n",
+ cpr_vreg->cpr_fuse_disable ? "disabled" : "enabled",
+ cpr_vreg->cpr_fuse_revision);
+
+ return rc;
+}
+
+static int cpr_check_de_aging_allowed(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ struct device_node *of_node = dev->of_node;
+ char *allow_str = "qcom,cpr-de-aging-allowed";
+ int rc = 0, count;
+ int tuple_count, tuple_match;
+ u32 allow_status = 0;
+
+ if (!of_find_property(of_node, allow_str, &count)) {
+ /* CPR de-aging is not allowed for all fuse revisions. */
+ return allow_status;
+ }
+
+ count /= sizeof(u32);
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH)
+ /* No matching index to use for CPR de-aging allowed. */
+ return 0;
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (count != tuple_count) {
+ cpr_err(cpr_vreg, "%s count=%d is invalid\n", allow_str,
+ count);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_index(of_node, allow_str, tuple_match,
+ &allow_status);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ allow_str, tuple_match, rc);
+ return rc;
+ }
+
+ cpr_info(cpr_vreg, "CPR de-aging is %s for fuse revision %d\n",
+ allow_status ? "allowed" : "not allowed",
+ cpr_vreg->cpr_fuse_revision);
+
+ return allow_status;
+}
+
+static int cpr_aging_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ struct cpr_aging_info *aging_info;
+ struct cpr_aging_sensor_info *sensor_info;
+ int num_fuse_corners = cpr_vreg->num_fuse_corners;
+ int i, rc = 0, len = 0, num_aging_sensors, ro_sel, bits;
+ u32 *aging_sensor_id, *fuse_sel, *fuse_sel_orig;
+ u32 sensor = 0, non_collapsible_sensor_mask = 0;
+ u64 efuse_val;
+ struct property *prop;
+
+ if (!of_find_property(of_node, "qcom,cpr-aging-sensor-id", &len)) {
+ /* No CPR de-aging adjustments needed */
+ return 0;
+ }
+
+ if (len == 0) {
+ cpr_err(cpr_vreg, "qcom,cpr-aging-sensor-id property format is invalid\n");
+ return -EINVAL;
+ }
+ num_aging_sensors = len / sizeof(u32);
+ cpr_debug(cpr_vreg, "No of aging sensors = %d\n", num_aging_sensors);
+
+ if (cpumask_empty(&cpr_vreg->cpu_mask)) {
+ cpr_err(cpr_vreg, "qcom,cpr-cpus property missing\n");
+ return -EINVAL;
+ }
+
+ rc = cpr_check_de_aging_allowed(cpr_vreg, &pdev->dev);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr_check_de_aging_allowed failed: rc=%d\n",
+ rc);
+ return rc;
+ } else if (rc == 0) {
+ /* CPR de-aging is not allowed for the current fuse combo */
+ return 0;
+ }
+
+ aging_info = devm_kzalloc(&pdev->dev, sizeof(*aging_info),
+ GFP_KERNEL);
+ if (!aging_info)
+ return -ENOMEM;
+
+ cpr_vreg->aging_info = aging_info;
+ aging_info->num_aging_sensors = num_aging_sensors;
+
+ rc = of_property_read_u32(of_node, "qcom,cpr-aging-ref-corner",
+ &aging_info->aging_corner);
+ if (rc) {
+ cpr_err(cpr_vreg, "qcom,cpr-aging-ref-corner missing rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-aging-ref-voltage",
+ &aging_info->aging_ref_voltage, rc);
+ if (rc)
+ return rc;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-max-aging-margin",
+ &aging_info->max_aging_margin, rc);
+ if (rc)
+ return rc;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-aging-ro-scaling-factor",
+ &aging_info->aging_ro_kv, rc);
+ if (rc)
+ return rc;
+
+ /* Check for DIV by 0 error */
+ if (aging_info->aging_ro_kv == 0) {
+ cpr_err(cpr_vreg, "invalid cpr-aging-ro-scaling-factor value: %u\n",
+ aging_info->aging_ro_kv);
+ return -EINVAL;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-ro-scaling-factor",
+ aging_info->cpr_ro_kv, CPR_NUM_RING_OSC);
+ if (rc) {
+ cpr_err(cpr_vreg, "qcom,cpr-ro-scaling-factor property read failed, rc = %d\n",
+ rc);
+ return rc;
+ }
+
+ if (of_find_property(of_node, "qcom,cpr-non-collapsible-sensors",
+ &len)) {
+ len = len / sizeof(u32);
+ if (len <= 0 || len > 32) {
+ cpr_err(cpr_vreg, "qcom,cpr-non-collapsible-sensors has an incorrect size\n");
+ return -EINVAL;
+ }
+
+ for (i = 0; i < len; i++) {
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-non-collapsible-sensors",
+ i, &sensor);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-non-collapsible-sensors index %u, rc=%d\n",
+ i, rc);
+ return rc;
+ }
+
+ if (sensor > 31) {
+ cpr_err(cpr_vreg, "invalid non-collapsible sensor = %u\n",
+ sensor);
+ return -EINVAL;
+ }
+
+ non_collapsible_sensor_mask |= BIT(sensor);
+ }
+
+ /*
+ * Bypass the sensors in collapsible domain for
+ * de-aging measurements
+ */
+ aging_info->aging_sensor_bypass =
+ ~(non_collapsible_sensor_mask);
+ cpr_debug(cpr_vreg, "sensor bypass mask for aging = 0x%08x\n",
+ aging_info->aging_sensor_bypass);
+ }
+
+ prop = of_find_property(pdev->dev.of_node, "qcom,cpr-aging-derate",
+ NULL);
+ if ((!prop) ||
+ (prop->length != num_fuse_corners * sizeof(u32))) {
+ cpr_err(cpr_vreg, "qcom,cpr-aging-derate incorrectly configured\n");
+ return -EINVAL;
+ }
+
+ aging_sensor_id = kcalloc(num_aging_sensors, sizeof(*aging_sensor_id),
+ GFP_KERNEL);
+ fuse_sel = kcalloc(num_aging_sensors * 4, sizeof(*fuse_sel),
+ GFP_KERNEL);
+ aging_info->voltage_adjust = devm_kcalloc(&pdev->dev,
+ num_fuse_corners + 1,
+ sizeof(*aging_info->voltage_adjust),
+ GFP_KERNEL);
+ aging_info->sensor_info = devm_kcalloc(&pdev->dev, num_aging_sensors,
+ sizeof(*aging_info->sensor_info),
+ GFP_KERNEL);
+ aging_info->aging_derate = devm_kcalloc(&pdev->dev,
+ num_fuse_corners + 1,
+ sizeof(*aging_info->aging_derate),
+ GFP_KERNEL);
+
+ if (!aging_info->aging_derate || !aging_sensor_id
+ || !aging_info->sensor_info || !fuse_sel
+ || !aging_info->voltage_adjust)
+ goto err;
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-aging-sensor-id",
+ aging_sensor_id, num_aging_sensors);
+ if (rc) {
+ cpr_err(cpr_vreg, "qcom,cpr-aging-sensor-id property read failed, rc = %d\n",
+ rc);
+ goto err;
+ }
+
+ for (i = 0; i < num_aging_sensors; i++)
+ if (aging_sensor_id[i] < 0 || aging_sensor_id[i] > 31) {
+ cpr_err(cpr_vreg, "Invalid aging sensor id: %u\n",
+ aging_sensor_id[i]);
+ rc = -EINVAL;
+ goto err;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-aging-derate",
+ &aging_info->aging_derate[CPR_FUSE_CORNER_MIN],
+ num_fuse_corners);
+ if (rc) {
+ cpr_err(cpr_vreg, "qcom,cpr-aging-derate property read failed, rc = %d\n",
+ rc);
+ goto err;
+ }
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-aging-init-quot-diff",
+ fuse_sel, (num_aging_sensors * 4));
+ if (rc) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-aging-init-quot-diff read failed, rc = %d\n",
+ rc);
+ goto err;
+ }
+
+ fuse_sel_orig = fuse_sel;
+ sensor_info = aging_info->sensor_info;
+ for (i = 0; i < num_aging_sensors; i++, sensor_info++) {
+ sensor_info->sensor_id = aging_sensor_id[i];
+ efuse_val = cpr_read_efuse_param(cpr_vreg, fuse_sel[0],
+ fuse_sel[1], fuse_sel[2], fuse_sel[3]);
+ bits = fuse_sel[2];
+ sensor_info->initial_quot_diff = ((efuse_val & BIT(bits - 1)) ?
+ -1 : 1) * (efuse_val & (BIT(bits - 1) - 1));
+
+ cpr_debug(cpr_vreg, "Age sensor[%d] Initial quot diff = %d\n",
+ sensor_info->sensor_id,
+ sensor_info->initial_quot_diff);
+ fuse_sel += 4;
+ }
+
+ /*
+ * Add max aging margin here. This can be adjusted later in
+ * de-aging algorithm.
+ */
+ for (i = CPR_FUSE_CORNER_MIN; i <= num_fuse_corners; i++) {
+ ro_sel = cpr_vreg->cpr_fuse_ro_sel[i];
+ cpr_vreg->cpr_fuse_target_quot[i] +=
+ (aging_info->cpr_ro_kv[ro_sel]
+ * aging_info->max_aging_margin) / 1000000;
+ aging_info->voltage_adjust[i] = aging_info->max_aging_margin;
+ cpr_info(cpr_vreg, "Corner[%d]: age margin adjusted quotient = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+
+ kfree(fuse_sel_orig);
+err:
+ kfree(aging_sensor_id);
+ return rc;
+}
+
+static int cpr_cpu_map_init(struct cpr_regulator *cpr_vreg, struct device *dev)
+{
+ struct device_node *cpu_node;
+ int i, cpu;
+
+ if (!of_find_property(dev->of_node, "qcom,cpr-cpus",
+ &cpr_vreg->num_adj_cpus)) {
+ /* No adjustments based on online cores */
+ return 0;
+ }
+ cpr_vreg->num_adj_cpus /= sizeof(u32);
+
+ cpr_vreg->adj_cpus = devm_kcalloc(dev, cpr_vreg->num_adj_cpus,
+ sizeof(int), GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus)
+ return -ENOMEM;
+
+ for (i = 0; i < cpr_vreg->num_adj_cpus; i++) {
+ cpu_node = of_parse_phandle(dev->of_node, "qcom,cpr-cpus", i);
+ if (!cpu_node) {
+ cpr_err(cpr_vreg, "could not find CPU node %d\n", i);
+ return -EINVAL;
+ }
+ cpr_vreg->adj_cpus[i] = -1;
+ for_each_possible_cpu(cpu) {
+ if (of_get_cpu_node(cpu, NULL) == cpu_node) {
+ cpr_vreg->adj_cpus[i] = cpu;
+ cpumask_set_cpu(cpu, &cpr_vreg->cpu_mask);
+ break;
+ }
+ }
+ of_node_put(cpu_node);
+ }
+
+ return 0;
+}
+
+static int cpr_init_cpr_efuse(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int i, rc = 0;
+ bool scheme_fuse_valid = false;
+ bool disable_fuse_valid = false;
+ char *targ_quot_str;
+ u32 cpr_fuse_row[2];
+ u32 bp_cpr_disable, bp_scheme;
+ size_t len;
+ int *bp_target_quot;
+ u64 fuse_bits, fuse_bits_2;
+ u32 *target_quot_size;
+ struct cpr_quot_scale *quot_scale;
+
+ len = cpr_vreg->num_fuse_corners + 1;
+
+ bp_target_quot = kzalloc(len * sizeof(*bp_target_quot), GFP_KERNEL);
+ target_quot_size = kzalloc(len * sizeof(*target_quot_size), GFP_KERNEL);
+ quot_scale = kzalloc(len * sizeof(*quot_scale), GFP_KERNEL);
+
+ if (!bp_target_quot || !target_quot_size || !quot_scale) {
+ cpr_err(cpr_vreg,
+ "Could not allocate memory for fuse parsing arrays\n");
+ rc = -ENOMEM;
+ goto error;
+ }
+
+ if (cpr_vreg->cpr_fuse_redundant) {
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-redun-row",
+ cpr_fuse_row, 2);
+ targ_quot_str = "qcom,cpr-fuse-redun-target-quot";
+ } else {
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-fuse-row",
+ cpr_fuse_row, 2);
+ targ_quot_str = "qcom,cpr-fuse-target-quot";
+ }
+ if (rc)
+ goto error;
+
+ rc = of_property_read_u32_array(of_node, targ_quot_str,
+ &bp_target_quot[CPR_FUSE_CORNER_MIN],
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "missing %s: rc=%d\n", targ_quot_str, rc);
+ goto error;
+ }
+
+ if (of_find_property(of_node, "qcom,cpr-fuse-target-quot-size", NULL)) {
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-target-quot-size",
+ &target_quot_size[CPR_FUSE_CORNER_MIN],
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "error while reading qcom,cpr-fuse-target-quot-size: rc=%d\n",
+ rc);
+ goto error;
+ }
+ } else {
+ /*
+ * Default fuse quotient parameter size to match target register
+ * size.
+ */
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++)
+ target_quot_size[i] = CPR_FUSE_TARGET_QUOT_BITS;
+ }
+
+ if (of_find_property(of_node, "qcom,cpr-fuse-target-quot-scale",
+ NULL)) {
+ for (i = 0; i < cpr_vreg->num_fuse_corners; i++) {
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-fuse-target-quot-scale", i * 2,
+ "_scale[i + CPR_FUSE_CORNER_MIN].offset);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "error while reading qcom,cpr-fuse-target-quot-scale: rc=%d\n",
+ rc);
+ goto error;
+ }
+
+ rc = of_property_read_u32_index(of_node,
+ "qcom,cpr-fuse-target-quot-scale", i * 2 + 1,
+ "_scale[i + CPR_FUSE_CORNER_MIN].multiplier);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "error while reading qcom,cpr-fuse-target-quot-scale: rc=%d\n",
+ rc);
+ goto error;
+ }
+ }
+ } else {
+ /*
+ * In the default case, target quotients require no scaling so
+ * use offset = 0, multiplier = 1.
+ */
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++) {
+ quot_scale[i].offset = 0;
+ quot_scale[i].multiplier = 1;
+ }
+ }
+
+ /* Read the control bits of eFuse */
+ fuse_bits = cpr_read_efuse_row(cpr_vreg, cpr_fuse_row[0],
+ cpr_fuse_row[1]);
+ cpr_info(cpr_vreg, "[row:%d] = 0x%llx\n", cpr_fuse_row[0], fuse_bits);
+
+ if (cpr_vreg->cpr_fuse_redundant) {
+ if (of_find_property(of_node,
+ "qcom,cpr-fuse-redun-bp-cpr-disable", NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-redun-bp-cpr-disable",
+ &bp_cpr_disable, rc);
+ disable_fuse_valid = true;
+ if (of_find_property(of_node,
+ "qcom,cpr-fuse-redun-bp-scheme",
+ NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-redun-bp-scheme",
+ &bp_scheme, rc);
+ scheme_fuse_valid = true;
+ }
+ if (rc)
+ goto error;
+ fuse_bits_2 = fuse_bits;
+ } else {
+ u32 temp_row[2];
+
+ /* Use original fuse if no optional property */
+ if (of_find_property(of_node,
+ "qcom,cpr-fuse-bp-cpr-disable", NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-bp-cpr-disable",
+ &bp_cpr_disable, rc);
+ disable_fuse_valid = true;
+ }
+ if (of_find_property(of_node,
+ "qcom,cpr-fuse-bp-scheme",
+ NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-bp-scheme",
+ &bp_scheme, rc);
+ scheme_fuse_valid = true;
+ }
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-row",
+ temp_row, 2);
+ if (rc)
+ goto error;
+
+ fuse_bits_2 = cpr_read_efuse_row(cpr_vreg, temp_row[0],
+ temp_row[1]);
+ cpr_info(cpr_vreg, "[original row:%d] = 0x%llx\n",
+ temp_row[0], fuse_bits_2);
+ }
+ } else {
+ if (of_find_property(of_node, "qcom,cpr-fuse-bp-cpr-disable",
+ NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-bp-cpr-disable", &bp_cpr_disable, rc);
+ disable_fuse_valid = true;
+ }
+ if (of_find_property(of_node, "qcom,cpr-fuse-bp-scheme",
+ NULL)) {
+ CPR_PROP_READ_U32(cpr_vreg, of_node,
+ "cpr-fuse-bp-scheme", &bp_scheme, rc);
+ scheme_fuse_valid = true;
+ }
+ if (rc)
+ goto error;
+ fuse_bits_2 = fuse_bits;
+ }
+
+ if (disable_fuse_valid) {
+ cpr_vreg->cpr_fuse_disable =
+ (fuse_bits_2 >> bp_cpr_disable) & 0x01;
+ cpr_info(cpr_vreg, "CPR disable fuse = %d\n",
+ cpr_vreg->cpr_fuse_disable);
+ } else {
+ cpr_vreg->cpr_fuse_disable = false;
+ }
+
+ if (scheme_fuse_valid) {
+ cpr_vreg->cpr_fuse_local = (fuse_bits_2 >> bp_scheme) & 0x01;
+ cpr_info(cpr_vreg, "local = %d\n", cpr_vreg->cpr_fuse_local);
+ } else {
+ cpr_vreg->cpr_fuse_local = true;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ cpr_vreg->cpr_fuse_target_quot[i]
+ = cpr_read_efuse_param(cpr_vreg, cpr_fuse_row[0],
+ bp_target_quot[i], target_quot_size[i],
+ cpr_fuse_row[1]);
+ /* Unpack the target quotient by scaling. */
+ cpr_vreg->cpr_fuse_target_quot[i] *= quot_scale[i].multiplier;
+ cpr_vreg->cpr_fuse_target_quot[i] += quot_scale[i].offset;
+ cpr_info(cpr_vreg,
+ "Corner[%d]: ro_sel = %d, target quot = %d\n", i,
+ cpr_vreg->cpr_fuse_ro_sel[i],
+ cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+
+ rc = cpr_cpu_map_init(cpr_vreg, &pdev->dev);
+ if (rc) {
+ cpr_err(cpr_vreg, "CPR cpu map init failed: rc=%d\n", rc);
+ goto error;
+ }
+
+ rc = cpr_aging_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "CPR aging init failed: rc=%d\n", rc);
+ goto error;
+ }
+
+ rc = cpr_adjust_target_quots(pdev, cpr_vreg);
+ if (rc)
+ goto error;
+
+ for (i = CPR_FUSE_CORNER_MIN + 1;
+ i <= cpr_vreg->num_fuse_corners; i++) {
+ if (cpr_vreg->cpr_fuse_target_quot[i]
+ < cpr_vreg->cpr_fuse_target_quot[i - 1] &&
+ cpr_vreg->cpr_fuse_ro_sel[i] ==
+ cpr_vreg->cpr_fuse_ro_sel[i - 1]) {
+ cpr_vreg->cpr_fuse_disable = true;
+ cpr_err(cpr_vreg, "invalid quotient values; permanently disabling CPR\n");
+ }
+ }
+
+ if (cpr_vreg->flags & FLAGS_UPLIFT_QUOT_VOLT) {
+ cpr_voltage_uplift_wa_inc_quot(cpr_vreg, of_node);
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++) {
+ cpr_info(cpr_vreg,
+ "Corner[%d]: uplifted target quot = %d\n",
+ i, cpr_vreg->cpr_fuse_target_quot[i]);
+ }
+ }
+
+ /*
+ * Check whether the fuse-quot-offset is defined per fuse corner.
+ * If it is defined, use it (quot_offset) in the calculation
+ * below for obtaining scaling factor per fuse corner.
+ */
+ rc = cpr_get_fuse_quot_offset(cpr_vreg, pdev, quot_scale);
+ if (rc < 0)
+ goto error;
+
+ rc = cpr_get_corner_quot_adjustment(cpr_vreg, &pdev->dev);
+ if (rc)
+ goto error;
+
+ cpr_vreg->cpr_fuse_bits = fuse_bits;
+ if (!cpr_vreg->cpr_fuse_bits) {
+ cpr_vreg->cpr_fuse_disable = true;
+ cpr_err(cpr_vreg,
+ "cpr_fuse_bits == 0; permanently disabling CPR\n");
+ } else if (!cpr_vreg->fuse_quot_offset) {
+ /*
+ * Check if the target quotients for the highest two fuse
+ * corners are too close together.
+ */
+ int *quot = cpr_vreg->cpr_fuse_target_quot;
+ int highest_fuse_corner = cpr_vreg->num_fuse_corners;
+ u32 min_diff_quot;
+ bool valid_fuse = true;
+
+ min_diff_quot = CPR_FUSE_MIN_QUOT_DIFF;
+ of_property_read_u32(of_node, "qcom,cpr-quot-min-diff",
+ &min_diff_quot);
+
+ if (quot[highest_fuse_corner] > quot[highest_fuse_corner - 1]) {
+ if ((quot[highest_fuse_corner]
+ - quot[highest_fuse_corner - 1])
+ <= min_diff_quot)
+ valid_fuse = false;
+ } else {
+ valid_fuse = false;
+ }
+
+ if (!valid_fuse) {
+ cpr_vreg->cpr_fuse_disable = true;
+ cpr_err(cpr_vreg, "invalid quotient values; permanently disabling CPR\n");
+ }
+ }
+ rc = cpr_check_allowed(pdev, cpr_vreg);
+
+error:
+ kfree(bp_target_quot);
+ kfree(target_quot_size);
+ kfree(quot_scale);
+
+ return rc;
+}
+
+static int cpr_init_cpr_voltages(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int i;
+ int size = cpr_vreg->num_corners + 1;
+
+ cpr_vreg->last_volt = devm_kzalloc(dev, sizeof(int) * size, GFP_KERNEL);
+ if (!cpr_vreg->last_volt)
+ return -EINVAL;
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++)
+ cpr_vreg->last_volt[i] = cpr_vreg->open_loop_volt[i];
+
+ return 0;
+}
+
+/*
+ * This function fills the virtual_limit array with voltages read from the
+ * prop_name device tree property if a given tuple in the property matches
+ * the speedbin and PVS version fuses found on the chip. Otherwise,
+ * it fills the virtual_limit_array with corresponding values from the
+ * fuse_limit_array.
+ */
+static int cpr_fill_override_voltage(struct cpr_regulator *cpr_vreg,
+ struct device *dev, const char *prop_name, const char *label,
+ int *virtual_limit, int *fuse_limit)
+{
+ int rc = 0;
+ int i, j, size, pos;
+ struct property *prop;
+ bool match_found = false;
+ size_t buflen;
+ char *buf;
+ u32 *tmp;
+
+ prop = of_find_property(dev->of_node, prop_name, NULL);
+ if (!prop)
+ goto use_fuse_corner_limits;
+
+ size = prop->length / sizeof(u32);
+ if (size == 0 || size % (cpr_vreg->num_corners + 2)) {
+ cpr_err(cpr_vreg, "%s property format is invalid; reusing per-fuse-corner limits\n",
+ prop_name);
+ goto use_fuse_corner_limits;
+ }
+
+ tmp = kzalloc(size * sizeof(u32), GFP_KERNEL);
+ if (!tmp) {
+ cpr_err(cpr_vreg, "memory alloc failed\n");
+ return -ENOMEM;
+ }
+ rc = of_property_read_u32_array(dev->of_node, prop_name, tmp, size);
+ if (rc < 0) {
+ kfree(tmp);
+ cpr_err(cpr_vreg, "%s reading failed, rc = %d\n", prop_name,
+ rc);
+ return rc;
+ }
+
+ /*
+ * Get limit voltage for each virtual corner based upon the speed_bin
+ * and pvs_version values.
+ */
+ for (i = 0; i < size; i += cpr_vreg->num_corners + 2) {
+ if (tmp[i] != cpr_vreg->speed_bin &&
+ tmp[i] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ if (tmp[i + 1] != cpr_vreg->pvs_version &&
+ tmp[i + 1] != FUSE_PARAM_MATCH_ANY)
+ continue;
+ for (j = CPR_CORNER_MIN; j <= cpr_vreg->num_corners; j++)
+ virtual_limit[j] = tmp[i + 2 + j - CPR_FUSE_CORNER_MIN];
+ match_found = true;
+ break;
+ }
+ kfree(tmp);
+
+ if (!match_found)
+ goto use_fuse_corner_limits;
+
+ /*
+ * Log per-virtual-corner voltage limits since they are useful for
+ * baseline CPR debugging.
+ */
+ buflen = cpr_vreg->num_corners * (MAX_CHARS_PER_INT + 2) * sizeof(*buf);
+ buf = kzalloc(buflen, GFP_KERNEL);
+ if (buf == NULL) {
+ cpr_err(cpr_vreg, "Could not allocate memory for corner limit voltage logging\n");
+ return 0;
+ }
+
+ for (i = CPR_CORNER_MIN, pos = 0; i <= cpr_vreg->num_corners; i++)
+ pos += scnprintf(buf + pos, buflen - pos, "%d%s",
+ virtual_limit[i], i < cpr_vreg->num_corners ? " " : "");
+ cpr_info(cpr_vreg, "%s override voltage: [%s] uV\n", label, buf);
+ kfree(buf);
+
+ return rc;
+
+use_fuse_corner_limits:
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++)
+ virtual_limit[i] = fuse_limit[cpr_vreg->corner_map[i]];
+ return rc;
+}
+
+/*
+ * This function loads per-virtual-corner ceiling and floor voltages from device
+ * tree if their respective device tree properties are present. These limits
+ * override those found in the per-fuse-corner arrays fuse_ceiling_volt and
+ * fuse_floor_volt.
+ */
+static int cpr_init_ceiling_floor_override_voltages(
+ struct cpr_regulator *cpr_vreg, struct device *dev)
+{
+ int rc, i;
+ int size = cpr_vreg->num_corners + 1;
+
+ cpr_vreg->ceiling_volt = devm_kzalloc(dev, sizeof(int) * size,
+ GFP_KERNEL);
+ cpr_vreg->floor_volt = devm_kzalloc(dev, sizeof(int) * size,
+ GFP_KERNEL);
+ cpr_vreg->cpr_max_ceiling = devm_kzalloc(dev, sizeof(int) * size,
+ GFP_KERNEL);
+ if (!cpr_vreg->ceiling_volt || !cpr_vreg->floor_volt ||
+ !cpr_vreg->cpr_max_ceiling)
+ return -ENOMEM;
+
+ rc = cpr_fill_override_voltage(cpr_vreg, dev,
+ "qcom,cpr-voltage-ceiling-override", "ceiling",
+ cpr_vreg->ceiling_volt, cpr_vreg->fuse_ceiling_volt);
+ if (rc)
+ return rc;
+
+ rc = cpr_fill_override_voltage(cpr_vreg, dev,
+ "qcom,cpr-voltage-floor-override", "floor",
+ cpr_vreg->floor_volt, cpr_vreg->fuse_floor_volt);
+ if (rc)
+ return rc;
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ if (cpr_vreg->floor_volt[i] > cpr_vreg->ceiling_volt[i]) {
+ cpr_err(cpr_vreg, "virtual corner %d floor=%d uV > ceiling=%d uV\n",
+ i, cpr_vreg->floor_volt[i],
+ cpr_vreg->ceiling_volt[i]);
+ return -EINVAL;
+ }
+
+ if (cpr_vreg->ceiling_max < cpr_vreg->ceiling_volt[i])
+ cpr_vreg->ceiling_max = cpr_vreg->ceiling_volt[i];
+ cpr_vreg->cpr_max_ceiling[i] = cpr_vreg->ceiling_volt[i];
+ }
+
+ return rc;
+}
+
+/*
+ * This function computes the per-virtual-corner floor voltages from
+ * per-virtual-corner ceiling voltages with an offset specified by a
+ * device-tree property. This must be called after open-loop voltage
+ * scaling, floor_volt array loading and the ceiling voltage is
+ * conditionally reduced to the open-loop voltage. It selects the
+ * maximum value between the calculated floor voltage values and
+ * the floor_volt array values and stores them in the floor_volt array.
+ */
+static int cpr_init_floor_to_ceiling_range(
+ struct cpr_regulator *cpr_vreg, struct device *dev)
+{
+ int rc, i, tuple_count, tuple_match, len, pos;
+ u32 index, floor_volt_adjust = 0;
+ char *prop_str, *buf;
+ size_t buflen;
+
+ prop_str = "qcom,cpr-floor-to-ceiling-max-range";
+
+ if (!of_find_property(dev->of_node, prop_str, &len))
+ return 0;
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /*
+ * No matching index to use for floor-to-ceiling
+ * max range.
+ */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ if (len != cpr_vreg->num_corners * tuple_count * sizeof(u32)) {
+ cpr_err(cpr_vreg, "%s length=%d is invalid\n", prop_str, len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_CORNER_MIN; i <= cpr_vreg->num_corners; i++) {
+ index = tuple_match * cpr_vreg->num_corners
+ + i - CPR_CORNER_MIN;
+ rc = of_property_read_u32_index(dev->of_node, prop_str,
+ index, &floor_volt_adjust);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read %s index %u, rc=%d\n",
+ prop_str, index, rc);
+ return rc;
+ }
+
+ if ((int)floor_volt_adjust >= 0) {
+ cpr_vreg->floor_volt[i] = max(cpr_vreg->floor_volt[i],
+ (cpr_vreg->ceiling_volt[i]
+ - (int)floor_volt_adjust));
+ cpr_vreg->floor_volt[i]
+ = DIV_ROUND_UP(cpr_vreg->floor_volt[i],
+ cpr_vreg->step_volt) *
+ cpr_vreg->step_volt;
+ if (cpr_vreg->open_loop_volt[i]
+ < cpr_vreg->floor_volt[i])
+ cpr_vreg->open_loop_volt[i]
+ = cpr_vreg->floor_volt[i];
+ }
+ }
+
+ /*
+ * Log per-virtual-corner voltage limits resulted after considering the
+ * floor-to-ceiling max range since they are useful for baseline CPR
+ * debugging.
+ */
+ buflen = cpr_vreg->num_corners * (MAX_CHARS_PER_INT + 2) * sizeof(*buf);
+ buf = kzalloc(buflen, GFP_KERNEL);
+ if (buf == NULL) {
+ cpr_err(cpr_vreg, "Could not allocate memory for corner limit voltage logging\n");
+ return 0;
+ }
+
+ for (i = CPR_CORNER_MIN, pos = 0; i <= cpr_vreg->num_corners; i++)
+ pos += scnprintf(buf + pos, buflen - pos, "%d%s",
+ cpr_vreg->floor_volt[i],
+ i < cpr_vreg->num_corners ? " " : "");
+ cpr_info(cpr_vreg, "Final floor override voltages: [%s] uV\n", buf);
+ kfree(buf);
+
+ return 0;
+}
+
+static int cpr_init_step_quotient(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int len = 0;
+ u32 step_quot[CPR_NUM_RING_OSC];
+ int i, rc;
+
+ if (!of_find_property(of_node, "qcom,cpr-step-quotient", &len)) {
+ cpr_err(cpr_vreg, "qcom,cpr-step-quotient property missing\n");
+ return -EINVAL;
+ }
+
+ if (len == sizeof(u32)) {
+ /* Single step quotient used for all ring oscillators. */
+ rc = of_property_read_u32(of_node, "qcom,cpr-step-quotient",
+ step_quot);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-step-quotient, rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++)
+ cpr_vreg->step_quotient[i] = step_quot[0];
+ } else if (len == sizeof(u32) * CPR_NUM_RING_OSC) {
+ /* Unique step quotient used per ring oscillator. */
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-step-quotient", step_quot, CPR_NUM_RING_OSC);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,cpr-step-quotient, rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++)
+ cpr_vreg->step_quotient[i]
+ = step_quot[cpr_vreg->cpr_fuse_ro_sel[i]];
+ } else {
+ cpr_err(cpr_vreg, "qcom,cpr-step-quotient has invalid length=%d\n",
+ len);
+ return -EINVAL;
+ }
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++)
+ cpr_debug(cpr_vreg, "step_quotient[%d]=%u\n", i,
+ cpr_vreg->step_quotient[i]);
+
+ return 0;
+}
+
+static int cpr_init_cpr_parameters(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int rc = 0;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-ref-clk",
+ &cpr_vreg->ref_clk_khz, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-timer-delay",
+ &cpr_vreg->timer_delay_us, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-timer-cons-up",
+ &cpr_vreg->timer_cons_up, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-timer-cons-down",
+ &cpr_vreg->timer_cons_down, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-irq-line",
+ &cpr_vreg->irq_line, rc);
+ if (rc)
+ return rc;
+
+ rc = cpr_init_step_quotient(pdev, cpr_vreg);
+ if (rc)
+ return rc;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-up-threshold",
+ &cpr_vreg->up_threshold, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-down-threshold",
+ &cpr_vreg->down_threshold, rc);
+ if (rc)
+ return rc;
+ cpr_info(cpr_vreg, "up threshold = %u, down threshold = %u\n",
+ cpr_vreg->up_threshold, cpr_vreg->down_threshold);
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-idle-clocks",
+ &cpr_vreg->idle_clocks, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-gcnt-time",
+ &cpr_vreg->gcnt_time_us, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "vdd-apc-step-up-limit",
+ &cpr_vreg->vdd_apc_step_up_limit, rc);
+ if (rc)
+ return rc;
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "vdd-apc-step-down-limit",
+ &cpr_vreg->vdd_apc_step_down_limit, rc);
+ if (rc)
+ return rc;
+
+ rc = of_property_read_u32(of_node, "qcom,cpr-clamp-timer-interval",
+ &cpr_vreg->clamp_timer_interval);
+ if (rc && rc != -EINVAL) {
+ cpr_err(cpr_vreg,
+ "error reading qcom,cpr-clamp-timer-interval, rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ cpr_vreg->clamp_timer_interval = min(cpr_vreg->clamp_timer_interval,
+ (u32)RBIF_TIMER_ADJ_CLAMP_INT_MASK);
+
+ /* Init module parameter with the DT value */
+ cpr_vreg->enable = of_property_read_bool(of_node, "qcom,cpr-enable");
+ cpr_info(cpr_vreg, "CPR is %s by default.\n",
+ cpr_vreg->enable ? "enabled" : "disabled");
+
+ return 0;
+}
+
+static void cpr_regulator_switch_adj_cpus(struct cpr_regulator *cpr_vreg)
+{
+ cpr_vreg->last_volt = cpr_vreg->adj_cpus_last_volt
+ [cpr_vreg->online_cpus];
+ cpr_vreg->save_ctl = cpr_vreg->adj_cpus_save_ctl[cpr_vreg->online_cpus];
+ cpr_vreg->save_irq = cpr_vreg->adj_cpus_save_irq[cpr_vreg->online_cpus];
+
+ if (cpr_vreg->adj_cpus_quot_adjust)
+ cpr_vreg->quot_adjust = cpr_vreg->adj_cpus_quot_adjust
+ [cpr_vreg->online_cpus];
+ if (cpr_vreg->adj_cpus_open_loop_volt)
+ cpr_vreg->open_loop_volt
+ = cpr_vreg->adj_cpus_open_loop_volt
+ [cpr_vreg->online_cpus];
+ if (cpr_vreg->adj_cpus_open_loop_volt_as_ceiling)
+ cpr_vreg->ceiling_volt = cpr_vreg->open_loop_volt;
+}
+
+static void cpr_regulator_set_online_cpus(struct cpr_regulator *cpr_vreg)
+{
+ int i, j;
+
+ cpr_vreg->online_cpus = 0;
+ get_online_cpus();
+ for_each_online_cpu(i)
+ for (j = 0; j < cpr_vreg->num_adj_cpus; j++)
+ if (i == cpr_vreg->adj_cpus[j])
+ cpr_vreg->online_cpus++;
+ put_online_cpus();
+}
+
+static int cpr_regulator_cpu_callback(struct notifier_block *nb,
+ unsigned long action, void *data)
+{
+ struct cpr_regulator *cpr_vreg = container_of(nb, struct cpr_regulator,
+ cpu_notifier);
+ int cpu = (long)data;
+ int prev_online_cpus, rc, i;
+
+ action &= ~CPU_TASKS_FROZEN;
+
+ if (action != CPU_UP_PREPARE && action != CPU_UP_CANCELED
+ && action != CPU_DEAD)
+ return NOTIFY_OK;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ if (cpr_vreg->skip_voltage_change_during_suspend
+ && cpr_vreg->is_cpr_suspended) {
+ /* Do nothing during system suspend/resume */
+ goto done;
+ }
+
+ prev_online_cpus = cpr_vreg->online_cpus;
+ cpr_regulator_set_online_cpus(cpr_vreg);
+
+ if (action == CPU_UP_PREPARE)
+ for (i = 0; i < cpr_vreg->num_adj_cpus; i++)
+ if (cpu == cpr_vreg->adj_cpus[i]) {
+ cpr_vreg->online_cpus++;
+ break;
+ }
+
+ if (cpr_vreg->online_cpus == prev_online_cpus)
+ goto done;
+
+ cpr_debug(cpr_vreg, "adjusting corner %d quotient for %d cpus\n",
+ cpr_vreg->corner, cpr_vreg->online_cpus);
+
+ cpr_regulator_switch_adj_cpus(cpr_vreg);
+
+ if (cpr_vreg->corner) {
+ rc = cpr_regulator_set_voltage(cpr_vreg->rdev,
+ cpr_vreg->corner, true);
+ if (rc)
+ cpr_err(cpr_vreg, "could not update quotient, rc=%d\n",
+ rc);
+ }
+
+done:
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+ return NOTIFY_OK;
+}
+
+static void cpr_pm_disable(struct cpr_regulator *cpr_vreg, bool disable)
+{
+ u32 reg_val;
+
+ if (cpr_vreg->is_cpr_suspended)
+ return;
+
+ reg_val = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+
+ if (disable) {
+ /* Proceed only if CPR is enabled */
+ if (!(reg_val & RBCPR_CTL_LOOP_EN))
+ return;
+ cpr_ctl_disable(cpr_vreg);
+ cpr_vreg->cpr_disabled_in_pc = true;
+ } else {
+ /* Proceed only if CPR was disabled in PM_ENTER */
+ if (!cpr_vreg->cpr_disabled_in_pc)
+ return;
+ cpr_vreg->cpr_disabled_in_pc = false;
+ cpr_ctl_enable(cpr_vreg, cpr_vreg->corner);
+ }
+
+ /* Make sure register write is complete */
+ mb();
+}
+
+static int cpr_pm_callback(struct notifier_block *nb,
+ unsigned long action, void *data)
+{
+ struct cpr_regulator *cpr_vreg = container_of(nb,
+ struct cpr_regulator, pm_notifier);
+
+ if (action != CPU_PM_ENTER && action != CPU_PM_ENTER_FAILED &&
+ action != CPU_PM_EXIT)
+ return NOTIFY_OK;
+
+ switch (action) {
+ case CPU_PM_ENTER:
+ cpr_pm_disable(cpr_vreg, true);
+ break;
+ case CPU_PM_ENTER_FAILED:
+ case CPU_PM_EXIT:
+ cpr_pm_disable(cpr_vreg, false);
+ break;
+ }
+
+ return NOTIFY_OK;
+}
+
+static int cpr_parse_adj_cpus_init_voltage(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int rc, i, j, k, tuple_count, tuple_match, len, offset;
+ int *temp;
+
+ if (!of_find_property(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment",
+ NULL))
+ return 0;
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for voltage adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ len = (cpr_vreg->num_adj_cpus + 1) * tuple_count
+ * cpr_vreg->num_corners;
+
+ temp = kzalloc(sizeof(int) * len, GFP_KERNEL);
+ if (!temp) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ return -ENOMEM;
+ }
+
+ cpr_vreg->adj_cpus_open_loop_volt = devm_kzalloc(dev,
+ sizeof(int *) * (cpr_vreg->num_adj_cpus + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_open_loop_volt) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ rc = -ENOMEM;
+ goto done;
+ }
+
+ cpr_vreg->adj_cpus_open_loop_volt[0] = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_adj_cpus + 1)
+ * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_open_loop_volt[0]) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ rc = -ENOMEM;
+ goto done;
+ }
+ for (i = 1; i <= cpr_vreg->num_adj_cpus; i++)
+ cpr_vreg->adj_cpus_open_loop_volt[i] =
+ cpr_vreg->adj_cpus_open_loop_volt[0] +
+ i * (cpr_vreg->num_corners + 1);
+
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment",
+ temp, len);
+ if (rc) {
+ cpr_err(cpr_vreg, "failed to read qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment, rc=%d\n",
+ rc);
+ goto done;
+ }
+
+ cpr_debug(cpr_vreg, "Open loop voltage based on number of online CPUs:\n");
+ offset = tuple_match * cpr_vreg->num_corners *
+ (cpr_vreg->num_adj_cpus + 1);
+
+ for (i = 0; i <= cpr_vreg->num_adj_cpus; i++) {
+ for (j = CPR_CORNER_MIN; j <= cpr_vreg->num_corners; j++) {
+ k = j - 1 + offset;
+
+ cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ = cpr_vreg->open_loop_volt[j] + temp[k];
+ cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ = DIV_ROUND_UP(cpr_vreg->
+ adj_cpus_open_loop_volt[i][j],
+ cpr_vreg->step_volt) * cpr_vreg->step_volt;
+
+ if (cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ > cpr_vreg->ceiling_volt[j])
+ cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ = cpr_vreg->ceiling_volt[j];
+ if (cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ < cpr_vreg->floor_volt[j])
+ cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ = cpr_vreg->floor_volt[j];
+
+ cpr_debug(cpr_vreg, "cpus=%d, corner=%d, volt=%d\n",
+ i, j, cpr_vreg->adj_cpus_open_loop_volt[i][j]);
+ }
+ offset += cpr_vreg->num_corners;
+ }
+
+ cpr_vreg->adj_cpus_open_loop_volt_as_ceiling
+ = of_property_read_bool(dev->of_node,
+ "qcom,cpr-online-cpu-init-voltage-as-ceiling");
+done:
+ kfree(temp);
+ return rc;
+}
+
+static int cpr_parse_adj_cpus_target_quot(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int rc, i, j, k, tuple_count, tuple_match, len, offset;
+ int *temp;
+
+ if (!of_find_property(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-quotient-adjustment",
+ NULL))
+ return 0;
+
+ if (cpr_vreg->cpr_fuse_map_count) {
+ if (cpr_vreg->cpr_fuse_map_match == FUSE_MAP_NO_MATCH) {
+ /* No matching index to use for quotient adjustment. */
+ return 0;
+ }
+ tuple_count = cpr_vreg->cpr_fuse_map_count;
+ tuple_match = cpr_vreg->cpr_fuse_map_match;
+ } else {
+ tuple_count = 1;
+ tuple_match = 0;
+ }
+
+ len = (cpr_vreg->num_adj_cpus + 1) * tuple_count
+ * cpr_vreg->num_corners;
+
+ temp = kzalloc(sizeof(int) * len, GFP_KERNEL);
+ if (!temp) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ return -ENOMEM;
+ }
+
+ cpr_vreg->adj_cpus_quot_adjust = devm_kzalloc(dev,
+ sizeof(int *) * (cpr_vreg->num_adj_cpus + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_quot_adjust) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ rc = -ENOMEM;
+ goto done;
+ }
+
+ cpr_vreg->adj_cpus_quot_adjust[0] = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_adj_cpus + 1)
+ * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_quot_adjust[0]) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ rc = -ENOMEM;
+ goto done;
+ }
+ for (i = 1; i <= cpr_vreg->num_adj_cpus; i++)
+ cpr_vreg->adj_cpus_quot_adjust[i] =
+ cpr_vreg->adj_cpus_quot_adjust[0] +
+ i * (cpr_vreg->num_corners + 1);
+
+
+ rc = of_property_read_u32_array(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-quotient-adjustment",
+ temp, len);
+ if (rc) {
+ cpr_err(cpr_vreg, "failed to read qcom,cpr-online-cpu-virtual-corner-quotient-adjustment, rc=%d\n",
+ rc);
+ goto done;
+ }
+
+ cpr_debug(cpr_vreg, "Target quotients based on number of online CPUs:\n");
+ offset = tuple_match * cpr_vreg->num_corners *
+ (cpr_vreg->num_adj_cpus + 1);
+
+ for (i = 0; i <= cpr_vreg->num_adj_cpus; i++) {
+ for (j = CPR_CORNER_MIN; j <= cpr_vreg->num_corners; j++) {
+ k = j - 1 + offset;
+
+ cpr_vreg->adj_cpus_quot_adjust[i][j] =
+ cpr_vreg->quot_adjust[j] - temp[k];
+
+ cpr_debug(cpr_vreg, "cpus=%d, corner=%d, quot=%d\n",
+ i, j,
+ cpr_vreg->cpr_fuse_target_quot[
+ cpr_vreg->corner_map[j]]
+ - cpr_vreg->adj_cpus_quot_adjust[i][j]);
+ }
+ offset += cpr_vreg->num_corners;
+ }
+
+done:
+ kfree(temp);
+ return rc;
+}
+
+static int cpr_init_per_cpu_adjustments(struct cpr_regulator *cpr_vreg,
+ struct device *dev)
+{
+ int rc, i, j;
+
+ if (!of_find_property(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment",
+ NULL)
+ && !of_find_property(dev->of_node,
+ "qcom,cpr-online-cpu-virtual-corner-quotient-adjustment",
+ NULL)) {
+ /* No per-online CPU adjustment needed */
+ return 0;
+ }
+
+ if (!cpr_vreg->num_adj_cpus) {
+ cpr_err(cpr_vreg, "qcom,cpr-cpus property missing\n");
+ return -EINVAL;
+ }
+
+ rc = cpr_parse_adj_cpus_init_voltage(cpr_vreg, dev);
+ if (rc) {
+ cpr_err(cpr_vreg, "cpr_parse_adj_cpus_init_voltage failed: rc =%d\n",
+ rc);
+ return rc;
+ }
+
+ rc = cpr_parse_adj_cpus_target_quot(cpr_vreg, dev);
+ if (rc) {
+ cpr_err(cpr_vreg, "cpr_parse_adj_cpus_target_quot failed: rc =%d\n",
+ rc);
+ return rc;
+ }
+
+ cpr_vreg->adj_cpus_last_volt = devm_kzalloc(dev,
+ sizeof(int *) * (cpr_vreg->num_adj_cpus + 1),
+ GFP_KERNEL);
+ cpr_vreg->adj_cpus_save_ctl = devm_kzalloc(dev,
+ sizeof(int *) * (cpr_vreg->num_adj_cpus + 1),
+ GFP_KERNEL);
+ cpr_vreg->adj_cpus_save_irq = devm_kzalloc(dev,
+ sizeof(int *) * (cpr_vreg->num_adj_cpus + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_last_volt || !cpr_vreg->adj_cpus_save_ctl ||
+ !cpr_vreg->adj_cpus_save_irq) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ return -ENOMEM;
+ }
+
+ cpr_vreg->adj_cpus_last_volt[0] = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_adj_cpus + 1)
+ * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ cpr_vreg->adj_cpus_save_ctl[0] = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_adj_cpus + 1)
+ * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ cpr_vreg->adj_cpus_save_irq[0] = devm_kzalloc(dev,
+ sizeof(int) * (cpr_vreg->num_adj_cpus + 1)
+ * (cpr_vreg->num_corners + 1),
+ GFP_KERNEL);
+ if (!cpr_vreg->adj_cpus_last_volt[0] ||
+ !cpr_vreg->adj_cpus_save_ctl[0] ||
+ !cpr_vreg->adj_cpus_save_irq[0]) {
+ cpr_err(cpr_vreg, "Could not allocate memory\n");
+ return -ENOMEM;
+ }
+ for (i = 1; i <= cpr_vreg->num_adj_cpus; i++) {
+ j = i * (cpr_vreg->num_corners + 1);
+ cpr_vreg->adj_cpus_last_volt[i] =
+ cpr_vreg->adj_cpus_last_volt[0] + j;
+ cpr_vreg->adj_cpus_save_ctl[i] =
+ cpr_vreg->adj_cpus_save_ctl[0] + j;
+ cpr_vreg->adj_cpus_save_irq[i] =
+ cpr_vreg->adj_cpus_save_irq[0] + j;
+ }
+
+
+ for (i = 0; i <= cpr_vreg->num_adj_cpus; i++) {
+ for (j = CPR_CORNER_MIN; j <= cpr_vreg->num_corners; j++) {
+
+ cpr_vreg->adj_cpus_save_ctl[i][j] =
+ cpr_vreg->save_ctl[j];
+ cpr_vreg->adj_cpus_save_irq[i][j] =
+ cpr_vreg->save_irq[j];
+
+ cpr_vreg->adj_cpus_last_volt[i][j]
+ = cpr_vreg->adj_cpus_open_loop_volt
+ ? cpr_vreg->adj_cpus_open_loop_volt[i][j]
+ : cpr_vreg->open_loop_volt[j];
+ }
+ }
+
+ cpr_regulator_set_online_cpus(cpr_vreg);
+ cpr_debug(cpr_vreg, "%d cpus online\n", cpr_vreg->online_cpus);
+
+ devm_kfree(dev, cpr_vreg->last_volt);
+ devm_kfree(dev, cpr_vreg->save_ctl);
+ devm_kfree(dev, cpr_vreg->save_irq);
+ if (cpr_vreg->adj_cpus_quot_adjust)
+ devm_kfree(dev, cpr_vreg->quot_adjust);
+ if (cpr_vreg->adj_cpus_open_loop_volt)
+ devm_kfree(dev, cpr_vreg->open_loop_volt);
+ if (cpr_vreg->adj_cpus_open_loop_volt_as_ceiling)
+ devm_kfree(dev, cpr_vreg->ceiling_volt);
+
+ cpr_regulator_switch_adj_cpus(cpr_vreg);
+
+ cpr_vreg->skip_voltage_change_during_suspend
+ = of_property_read_bool(dev->of_node,
+ "qcom,cpr-skip-voltage-change-during-suspend");
+
+ cpr_vreg->cpu_notifier.notifier_call = cpr_regulator_cpu_callback;
+ register_hotcpu_notifier(&cpr_vreg->cpu_notifier);
+
+ return rc;
+}
+
+static int cpr_init_pm_notification(struct cpr_regulator *cpr_vreg)
+{
+ int rc;
+
+ /* enabled only for single-core designs */
+ if (cpr_vreg->num_adj_cpus != 1) {
+ pr_warn("qcom,cpr-cpus not defined or invalid %d\n",
+ cpr_vreg->num_adj_cpus);
+ return 0;
+ }
+
+ cpr_vreg->pm_notifier.notifier_call = cpr_pm_callback;
+ rc = cpu_pm_register_notifier(&cpr_vreg->pm_notifier);
+ if (rc)
+ cpr_err(cpr_vreg, "Unable to register pm notifier rc=%d\n", rc);
+
+ return rc;
+}
+
+static int cpr_rpm_apc_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ int rc, len = 0;
+ struct device_node *of_node = pdev->dev.of_node;
+
+ if (!of_find_property(of_node, "rpm-apc-supply", NULL))
+ return 0;
+
+ cpr_vreg->rpm_apc_vreg = devm_regulator_get(&pdev->dev, "rpm-apc");
+ if (IS_ERR_OR_NULL(cpr_vreg->rpm_apc_vreg)) {
+ rc = PTR_RET(cpr_vreg->rpm_apc_vreg);
+ if (rc != -EPROBE_DEFER)
+ cpr_err(cpr_vreg, "devm_regulator_get: rpm-apc: rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ if (!of_find_property(of_node, "qcom,rpm-apc-corner-map", &len)) {
+ cpr_err(cpr_vreg,
+ "qcom,rpm-apc-corner-map missing:\n");
+ return -EINVAL;
+ }
+ if (len != cpr_vreg->num_corners * sizeof(u32)) {
+ cpr_err(cpr_vreg,
+ "qcom,rpm-apc-corner-map length=%d is invalid: required:%d\n",
+ len, cpr_vreg->num_corners);
+ return -EINVAL;
+ }
+
+ cpr_vreg->rpm_apc_corner_map = devm_kzalloc(&pdev->dev,
+ (cpr_vreg->num_corners + 1) *
+ sizeof(*cpr_vreg->rpm_apc_corner_map), GFP_KERNEL);
+ if (!cpr_vreg->rpm_apc_corner_map) {
+ cpr_err(cpr_vreg, "Can't allocate memory for cpr_vreg->rpm_apc_corner_map\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,rpm-apc-corner-map",
+ &cpr_vreg->rpm_apc_corner_map[1], cpr_vreg->num_corners);
+ if (rc)
+ cpr_err(cpr_vreg, "read qcom,rpm-apc-corner-map failed, rc = %d\n",
+ rc);
+
+ return rc;
+}
+
+static int cpr_vsens_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ int rc = 0, len = 0;
+ struct device_node *of_node = pdev->dev.of_node;
+
+ if (of_find_property(of_node, "vdd-vsens-voltage-supply", NULL)) {
+ cpr_vreg->vdd_vsens_voltage = devm_regulator_get(&pdev->dev,
+ "vdd-vsens-voltage");
+ if (IS_ERR_OR_NULL(cpr_vreg->vdd_vsens_voltage)) {
+ rc = PTR_ERR(cpr_vreg->vdd_vsens_voltage);
+ cpr_vreg->vdd_vsens_voltage = NULL;
+ if (rc == -EPROBE_DEFER)
+ return rc;
+ /* device not found */
+ cpr_debug(cpr_vreg, "regulator_get: vdd-vsens-voltage: rc=%d\n",
+ rc);
+ return 0;
+ }
+ }
+
+ if (of_find_property(of_node, "vdd-vsens-corner-supply", NULL)) {
+ cpr_vreg->vdd_vsens_corner = devm_regulator_get(&pdev->dev,
+ "vdd-vsens-corner");
+ if (IS_ERR_OR_NULL(cpr_vreg->vdd_vsens_corner)) {
+ rc = PTR_ERR(cpr_vreg->vdd_vsens_corner);
+ cpr_vreg->vdd_vsens_corner = NULL;
+ if (rc == -EPROBE_DEFER)
+ return rc;
+ /* device not found */
+ cpr_debug(cpr_vreg, "regulator_get: vdd-vsens-corner: rc=%d\n",
+ rc);
+ return 0;
+ }
+
+ if (!of_find_property(of_node, "qcom,vsens-corner-map", &len)) {
+ cpr_err(cpr_vreg, "qcom,vsens-corner-map missing\n");
+ return -EINVAL;
+ }
+
+ if (len != cpr_vreg->num_fuse_corners * sizeof(u32)) {
+ cpr_err(cpr_vreg, "qcom,vsens-corner-map length=%d is invalid: required:%d\n",
+ len, cpr_vreg->num_fuse_corners);
+ return -EINVAL;
+ }
+
+ cpr_vreg->vsens_corner_map = devm_kcalloc(&pdev->dev,
+ (cpr_vreg->num_fuse_corners + 1),
+ sizeof(*cpr_vreg->vsens_corner_map), GFP_KERNEL);
+ if (!cpr_vreg->vsens_corner_map)
+ return -ENOMEM;
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,vsens-corner-map",
+ &cpr_vreg->vsens_corner_map[1],
+ cpr_vreg->num_fuse_corners);
+ if (rc)
+ cpr_err(cpr_vreg, "read qcom,vsens-corner-map failed, rc = %d\n",
+ rc);
+ }
+
+ return rc;
+}
+
+static int cpr_disable_on_temp(struct cpr_regulator *cpr_vreg, bool disable)
+{
+ int rc = 0;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ if (cpr_vreg->cpr_fuse_disable ||
+ (cpr_vreg->cpr_thermal_disable == disable))
+ goto out;
+
+ cpr_vreg->cpr_thermal_disable = disable;
+
+ if (cpr_vreg->enable && cpr_vreg->corner) {
+ if (disable) {
+ cpr_debug(cpr_vreg, "Disabling CPR - below temperature threshold [%d]\n",
+ cpr_vreg->cpr_disable_temp_threshold);
+ /* disable CPR and force open-loop */
+ cpr_ctl_disable(cpr_vreg);
+ rc = cpr_regulator_set_voltage(cpr_vreg->rdev,
+ cpr_vreg->corner, false);
+ if (rc < 0)
+ cpr_err(cpr_vreg, "Failed to set voltage, rc=%d\n",
+ rc);
+ } else {
+ /* enable CPR */
+ cpr_debug(cpr_vreg, "Enabling CPR - above temperature thresold [%d]\n",
+ cpr_vreg->cpr_enable_temp_threshold);
+ rc = cpr_regulator_set_voltage(cpr_vreg->rdev,
+ cpr_vreg->corner, true);
+ if (rc < 0)
+ cpr_err(cpr_vreg, "Failed to set voltage, rc=%d\n",
+ rc);
+ }
+ }
+out:
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+ return rc;
+}
+
+static void tsens_threshold_notify(struct therm_threshold *tsens_cb_data)
+{
+ struct threshold_info *info = tsens_cb_data->parent;
+ struct cpr_regulator *cpr_vreg = container_of(info,
+ struct cpr_regulator, tsens_threshold_config);
+ int rc = 0;
+
+ cpr_debug(cpr_vreg, "Triggered tsens-notification trip_type=%d for thermal_zone_id=%d\n",
+ tsens_cb_data->trip_triggered, tsens_cb_data->sensor_id);
+
+ switch (tsens_cb_data->trip_triggered) {
+ case THERMAL_TRIP_CONFIGURABLE_HI:
+ rc = cpr_disable_on_temp(cpr_vreg, false);
+ if (rc < 0)
+ cpr_err(cpr_vreg, "Failed to enable CPR, rc=%d\n", rc);
+ break;
+ case THERMAL_TRIP_CONFIGURABLE_LOW:
+ rc = cpr_disable_on_temp(cpr_vreg, true);
+ if (rc < 0)
+ cpr_err(cpr_vreg, "Failed to disable CPR, rc=%d\n", rc);
+ break;
+ default:
+ cpr_debug(cpr_vreg, "trip-type %d not supported\n",
+ tsens_cb_data->trip_triggered);
+ break;
+ }
+
+ if (tsens_cb_data->cur_state != tsens_cb_data->trip_triggered) {
+ rc = sensor_mgr_set_threshold(tsens_cb_data->sensor_id,
+ tsens_cb_data->threshold);
+ if (rc < 0)
+ cpr_err(cpr_vreg,
+ "Failed to set temp. threshold, rc=%d\n", rc);
+ else
+ tsens_cb_data->cur_state =
+ tsens_cb_data->trip_triggered;
+ }
+}
+
+static int cpr_check_tsens(struct cpr_regulator *cpr_vreg)
+{
+ int rc = 0;
+ struct tsens_device tsens_dev;
+ unsigned long temp = 0;
+ bool disable;
+
+ if (tsens_is_ready() > 0) {
+ tsens_dev.sensor_num = cpr_vreg->tsens_id;
+ rc = tsens_get_temp(&tsens_dev, &temp);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "Faled to read tsens, rc=%d\n", rc);
+ return rc;
+ }
+
+ disable = (int) temp <= cpr_vreg->cpr_disable_temp_threshold;
+ rc = cpr_disable_on_temp(cpr_vreg, disable);
+ if (rc)
+ cpr_err(cpr_vreg, "Failed to %s CPR, rc=%d\n",
+ disable ? "disable" : "enable", rc);
+ }
+
+ return rc;
+}
+
+static int cpr_thermal_init(struct cpr_regulator *cpr_vreg)
+{
+ int rc;
+ struct device_node *of_node = cpr_vreg->dev->of_node;
+
+ if (!of_find_property(of_node, "qcom,cpr-thermal-sensor-id", NULL))
+ return 0;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-thermal-sensor-id",
+ &cpr_vreg->tsens_id, rc);
+ if (rc < 0)
+ return rc;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-disable-temp-threshold",
+ &cpr_vreg->cpr_disable_temp_threshold, rc);
+ if (rc < 0)
+ return rc;
+
+ CPR_PROP_READ_U32(cpr_vreg, of_node, "cpr-enable-temp-threshold",
+ &cpr_vreg->cpr_enable_temp_threshold, rc);
+ if (rc < 0)
+ return rc;
+
+ if (cpr_vreg->cpr_disable_temp_threshold >=
+ cpr_vreg->cpr_enable_temp_threshold) {
+ cpr_err(cpr_vreg, "Invalid temperature threshold cpr_disable_temp[%d] >= cpr_enable_temp[%d]\n",
+ cpr_vreg->cpr_disable_temp_threshold,
+ cpr_vreg->cpr_enable_temp_threshold);
+ return -EINVAL;
+ }
+
+ cpr_vreg->cpr_disable_on_temperature = true;
+
+ return 0;
+}
+
+static int cpr_init_cpr(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct resource *res;
+ int rc = 0;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rbcpr_clk");
+ if (res && res->start)
+ cpr_vreg->rbcpr_clk_addr = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rbcpr");
+ if (!res || !res->start) {
+ cpr_err(cpr_vreg, "missing rbcpr address: res=%p\n", res);
+ return -EINVAL;
+ }
+ cpr_vreg->rbcpr_base = devm_ioremap(&pdev->dev, res->start,
+ resource_size(res));
+
+ /* Init CPR configuration parameters */
+ rc = cpr_init_cpr_parameters(pdev, cpr_vreg);
+ if (rc)
+ return rc;
+
+ rc = cpr_init_cpr_efuse(pdev, cpr_vreg);
+ if (rc)
+ return rc;
+
+ /* Load per corner ceiling and floor voltages if they exist. */
+ rc = cpr_init_ceiling_floor_override_voltages(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ /*
+ * Limit open loop voltages based upon per corner ceiling and floor
+ * voltages.
+ */
+ rc = cpr_limit_open_loop_voltage(cpr_vreg);
+ if (rc)
+ return rc;
+
+ /*
+ * Fill the OPP table for this device with virtual voltage corner to
+ * open-loop voltage pairs.
+ */
+ rc = cpr_populate_opp_table(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ /* Reduce the ceiling voltage if allowed. */
+ rc = cpr_reduce_ceiling_voltage(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ /* Load CPR floor to ceiling range if exist. */
+ rc = cpr_init_floor_to_ceiling_range(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ /* Init all voltage set points of APC regulator for CPR */
+ rc = cpr_init_cpr_voltages(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ /* Get and Init interrupt */
+ cpr_vreg->cpr_irq = platform_get_irq(pdev, 0);
+ if (!cpr_vreg->cpr_irq) {
+ cpr_err(cpr_vreg, "missing CPR IRQ\n");
+ return -EINVAL;
+ }
+
+ /* Configure CPR HW but keep it disabled */
+ rc = cpr_config(cpr_vreg, &pdev->dev);
+ if (rc)
+ return rc;
+
+ rc = request_threaded_irq(cpr_vreg->cpr_irq, NULL, cpr_irq_handler,
+ IRQF_ONESHOT | IRQF_TRIGGER_RISING, "cpr",
+ cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "CPR: request irq failed for IRQ %d\n",
+ cpr_vreg->cpr_irq);
+ return rc;
+ }
+
+ return 0;
+}
+
+/*
+ * Create a set of virtual fuse rows if optional device tree properties are
+ * present.
+ */
+static int cpr_remap_efuse_data(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ struct property *prop;
+ u64 fuse_param;
+ u32 *temp;
+ int size, rc, i, bits, in_row, in_bit, out_row, out_bit;
+
+ prop = of_find_property(of_node, "qcom,fuse-remap-source", NULL);
+ if (!prop) {
+ /* No fuse remapping needed. */
+ return 0;
+ }
+
+ size = prop->length / sizeof(u32);
+ if (size == 0 || size % 4) {
+ cpr_err(cpr_vreg, "qcom,fuse-remap-source has invalid size=%d\n",
+ size);
+ return -EINVAL;
+ }
+ size /= 4;
+
+ rc = of_property_read_u32(of_node, "qcom,fuse-remap-base-row",
+ &cpr_vreg->remapped_row_base);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,fuse-remap-base-row, rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ temp = kzalloc(sizeof(*temp) * size * 4, GFP_KERNEL);
+ if (!temp) {
+ cpr_err(cpr_vreg, "temp memory allocation failed\n");
+ return -ENOMEM;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,fuse-remap-source", temp,
+ size * 4);
+ if (rc) {
+ cpr_err(cpr_vreg, "could not read qcom,fuse-remap-source, rc=%d\n",
+ rc);
+ goto done;
+ }
+
+ /*
+ * Format of tuples in qcom,fuse-remap-source property:
+ * <row bit-offset bit-count fuse-read-method>
+ */
+ for (i = 0, bits = 0; i < size; i++)
+ bits += temp[i * 4 + 2];
+
+ cpr_vreg->num_remapped_rows = DIV_ROUND_UP(bits, 64);
+ cpr_vreg->remapped_row = devm_kzalloc(&pdev->dev,
+ sizeof(*cpr_vreg->remapped_row) * cpr_vreg->num_remapped_rows,
+ GFP_KERNEL);
+ if (!cpr_vreg->remapped_row) {
+ cpr_err(cpr_vreg, "remapped_row memory allocation failed\n");
+ rc = -ENOMEM;
+ goto done;
+ }
+
+ for (i = 0, out_row = 0, out_bit = 0; i < size; i++) {
+ in_row = temp[i * 4];
+ in_bit = temp[i * 4 + 1];
+ bits = temp[i * 4 + 2];
+
+ while (bits > 64) {
+ fuse_param = cpr_read_efuse_param(cpr_vreg, in_row,
+ in_bit, 64, temp[i * 4 + 3]);
+
+ cpr_vreg->remapped_row[out_row++]
+ |= fuse_param << out_bit;
+ if (out_bit > 0)
+ cpr_vreg->remapped_row[out_row]
+ |= fuse_param >> (64 - out_bit);
+
+ bits -= 64;
+ in_bit += 64;
+ }
+
+ fuse_param = cpr_read_efuse_param(cpr_vreg, in_row, in_bit,
+ bits, temp[i * 4 + 3]);
+
+ cpr_vreg->remapped_row[out_row] |= fuse_param << out_bit;
+ if (bits < 64 - out_bit) {
+ out_bit += bits;
+ } else {
+ out_row++;
+ if (out_bit > 0)
+ cpr_vreg->remapped_row[out_row]
+ |= fuse_param >> (64 - out_bit);
+ out_bit = bits - (64 - out_bit);
+ }
+ }
+
+done:
+ kfree(temp);
+ return rc;
+}
+
+static int cpr_efuse_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct resource *res;
+ int len;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "efuse_addr");
+ if (!res || !res->start) {
+ cpr_err(cpr_vreg, "efuse_addr missing: res=%p\n", res);
+ return -EINVAL;
+ }
+
+ cpr_vreg->efuse_addr = res->start;
+ len = res->end - res->start + 1;
+
+ cpr_info(cpr_vreg, "efuse_addr = %pa (len=0x%x)\n", &res->start, len);
+
+ cpr_vreg->efuse_base = ioremap(cpr_vreg->efuse_addr, len);
+ if (!cpr_vreg->efuse_base) {
+ cpr_err(cpr_vreg, "Unable to map efuse_addr %pa\n",
+ &cpr_vreg->efuse_addr);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static void cpr_efuse_free(struct cpr_regulator *cpr_vreg)
+{
+ iounmap(cpr_vreg->efuse_base);
+}
+
+static void cpr_parse_cond_min_volt_fuse(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ int rc;
+ u32 fuse_sel[5];
+ /*
+ * Restrict all pvs corner voltages to a minimum value of
+ * qcom,cpr-cond-min-voltage if the fuse defined in
+ * qcom,cpr-fuse-cond-min-volt-sel does not read back with
+ * the expected value.
+ */
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-cond-min-volt-sel", fuse_sel, 5);
+ if (!rc) {
+ if (!cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel))
+ cpr_vreg->flags |= FLAGS_SET_MIN_VOLTAGE;
+ }
+}
+
+static void cpr_parse_speed_bin_fuse(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ int rc;
+ u64 fuse_bits;
+ u32 fuse_sel[4];
+ u32 speed_bits;
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,speed-bin-fuse-sel", fuse_sel, 4);
+
+ if (!rc) {
+ fuse_bits = cpr_read_efuse_row(cpr_vreg,
+ fuse_sel[0], fuse_sel[3]);
+ speed_bits = (fuse_bits >> fuse_sel[1]) &
+ ((1 << fuse_sel[2]) - 1);
+ cpr_info(cpr_vreg, "[row: %d]: 0x%llx, speed_bits = %d\n",
+ fuse_sel[0], fuse_bits, speed_bits);
+ cpr_vreg->speed_bin = speed_bits;
+ } else {
+ cpr_vreg->speed_bin = SPEED_BIN_NONE;
+ }
+}
+
+static int cpr_voltage_uplift_enable_check(struct cpr_regulator *cpr_vreg,
+ struct device_node *of_node)
+{
+ int rc;
+ u32 fuse_sel[5];
+ u32 uplift_speed_bin;
+
+ rc = of_property_read_u32_array(of_node,
+ "qcom,cpr-fuse-uplift-sel", fuse_sel, 5);
+ if (!rc) {
+ rc = of_property_read_u32(of_node,
+ "qcom,cpr-uplift-speed-bin",
+ &uplift_speed_bin);
+ if (rc < 0) {
+ cpr_err(cpr_vreg,
+ "qcom,cpr-uplift-speed-bin missing\n");
+ return rc;
+ }
+ if (cpr_fuse_is_setting_expected(cpr_vreg, fuse_sel)
+ && (uplift_speed_bin == cpr_vreg->speed_bin)
+ && !(cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE)) {
+ cpr_vreg->flags |= FLAGS_UPLIFT_QUOT_VOLT;
+ }
+ }
+ return 0;
+}
+
+/*
+ * Read in the number of fuse corners and then allocate memory for arrays that
+ * are sized based upon the number of fuse corners.
+ */
+static int cpr_fuse_corner_array_alloc(struct device *dev,
+ struct cpr_regulator *cpr_vreg)
+{
+ int rc;
+ size_t len;
+
+ rc = of_property_read_u32(dev->of_node, "qcom,cpr-fuse-corners",
+ &cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "qcom,cpr-fuse-corners missing: rc=%d\n", rc);
+ return rc;
+ }
+
+ if (cpr_vreg->num_fuse_corners < CPR_FUSE_CORNER_MIN
+ || cpr_vreg->num_fuse_corners > CPR_FUSE_CORNER_LIMIT) {
+ cpr_err(cpr_vreg, "corner count=%d is invalid\n",
+ cpr_vreg->num_fuse_corners);
+ return -EINVAL;
+ }
+
+ /*
+ * The arrays sized based on the fuse corner count ignore element 0
+ * in order to simplify indexing throughout the driver since min_uV = 0
+ * cannot be passed into a set_voltage() callback.
+ */
+ len = cpr_vreg->num_fuse_corners + 1;
+
+ cpr_vreg->pvs_corner_v = devm_kzalloc(dev,
+ len * sizeof(*cpr_vreg->pvs_corner_v), GFP_KERNEL);
+ cpr_vreg->cpr_fuse_target_quot = devm_kzalloc(dev,
+ len * sizeof(*cpr_vreg->cpr_fuse_target_quot), GFP_KERNEL);
+ cpr_vreg->cpr_fuse_ro_sel = devm_kzalloc(dev,
+ len * sizeof(*cpr_vreg->cpr_fuse_ro_sel), GFP_KERNEL);
+ cpr_vreg->fuse_ceiling_volt = devm_kzalloc(dev,
+ len * (sizeof(*cpr_vreg->fuse_ceiling_volt)), GFP_KERNEL);
+ cpr_vreg->fuse_floor_volt = devm_kzalloc(dev,
+ len * (sizeof(*cpr_vreg->fuse_floor_volt)), GFP_KERNEL);
+ cpr_vreg->step_quotient = devm_kzalloc(dev,
+ len * sizeof(*cpr_vreg->step_quotient), GFP_KERNEL);
+
+ if (cpr_vreg->pvs_corner_v == NULL || cpr_vreg->cpr_fuse_ro_sel == NULL
+ || cpr_vreg->fuse_ceiling_volt == NULL
+ || cpr_vreg->fuse_floor_volt == NULL
+ || cpr_vreg->cpr_fuse_target_quot == NULL
+ || cpr_vreg->step_quotient == NULL) {
+ cpr_err(cpr_vreg, "Could not allocate memory for CPR arrays\n");
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+static int cpr_voltage_plan_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ struct device_node *of_node = pdev->dev.of_node;
+ int rc, i;
+ u32 min_uv = 0;
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-voltage-ceiling",
+ &cpr_vreg->fuse_ceiling_volt[CPR_FUSE_CORNER_MIN],
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr-voltage-ceiling missing: rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = of_property_read_u32_array(of_node, "qcom,cpr-voltage-floor",
+ &cpr_vreg->fuse_floor_volt[CPR_FUSE_CORNER_MIN],
+ cpr_vreg->num_fuse_corners);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "cpr-voltage-floor missing: rc=%d\n", rc);
+ return rc;
+ }
+
+ cpr_parse_cond_min_volt_fuse(cpr_vreg, of_node);
+ rc = cpr_voltage_uplift_enable_check(cpr_vreg, of_node);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "voltage uplift enable check failed, %d\n",
+ rc);
+ return rc;
+ }
+ if (cpr_vreg->flags & FLAGS_SET_MIN_VOLTAGE) {
+ of_property_read_u32(of_node, "qcom,cpr-cond-min-voltage",
+ &min_uv);
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners;
+ i++)
+ if (cpr_vreg->fuse_ceiling_volt[i] < min_uv) {
+ cpr_vreg->fuse_ceiling_volt[i] = min_uv;
+ cpr_vreg->fuse_floor_volt[i] = min_uv;
+ } else if (cpr_vreg->fuse_floor_volt[i] < min_uv) {
+ cpr_vreg->fuse_floor_volt[i] = min_uv;
+ }
+ }
+
+ return 0;
+}
+
+static int cpr_mem_acc_init(struct platform_device *pdev,
+ struct cpr_regulator *cpr_vreg)
+{
+ int rc, size;
+ struct property *prop;
+ char *corner_map_str;
+
+ if (of_find_property(pdev->dev.of_node, "mem-acc-supply", NULL)) {
+ cpr_vreg->mem_acc_vreg = devm_regulator_get(&pdev->dev,
+ "mem-acc");
+ if (IS_ERR_OR_NULL(cpr_vreg->mem_acc_vreg)) {
+ rc = PTR_RET(cpr_vreg->mem_acc_vreg);
+ if (rc != -EPROBE_DEFER)
+ cpr_err(cpr_vreg,
+ "devm_regulator_get: mem-acc: rc=%d\n",
+ rc);
+ return rc;
+ }
+ }
+
+ corner_map_str = "qcom,mem-acc-corner-map";
+ prop = of_find_property(pdev->dev.of_node, corner_map_str, NULL);
+ if (!prop) {
+ corner_map_str = "qcom,cpr-corner-map";
+ prop = of_find_property(pdev->dev.of_node, corner_map_str,
+ NULL);
+ if (!prop) {
+ cpr_err(cpr_vreg, "qcom,cpr-corner-map missing\n");
+ return -EINVAL;
+ }
+ }
+
+ size = prop->length / sizeof(u32);
+ cpr_vreg->mem_acc_corner_map = devm_kzalloc(&pdev->dev,
+ sizeof(int) * (size + 1),
+ GFP_KERNEL);
+
+ rc = of_property_read_u32_array(pdev->dev.of_node, corner_map_str,
+ &cpr_vreg->mem_acc_corner_map[CPR_FUSE_CORNER_MIN],
+ size);
+ if (rc) {
+ cpr_err(cpr_vreg, "%s missing, rc = %d\n", corner_map_str, rc);
+ return rc;
+ }
+
+ return 0;
+}
+
+#if defined(CONFIG_DEBUG_FS)
+
+static int cpr_enable_set(void *data, u64 val)
+{
+ struct cpr_regulator *cpr_vreg = data;
+ bool old_cpr_enable;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ old_cpr_enable = cpr_vreg->enable;
+ cpr_vreg->enable = val;
+
+ if (old_cpr_enable == cpr_vreg->enable)
+ goto _exit;
+
+ if (cpr_vreg->enable && cpr_vreg->cpr_fuse_disable) {
+ cpr_info(cpr_vreg,
+ "CPR permanently disabled due to fuse values\n");
+ cpr_vreg->enable = false;
+ goto _exit;
+ }
+
+ cpr_debug(cpr_vreg, "%s CPR [corner=%d, fuse_corner=%d]\n",
+ cpr_vreg->enable ? "enabling" : "disabling",
+ cpr_vreg->corner, cpr_vreg->corner_map[cpr_vreg->corner]);
+
+ if (cpr_vreg->corner) {
+ if (cpr_vreg->enable) {
+ cpr_ctl_disable(cpr_vreg);
+ cpr_irq_clr(cpr_vreg);
+ cpr_corner_restore(cpr_vreg, cpr_vreg->corner);
+ cpr_ctl_enable(cpr_vreg, cpr_vreg->corner);
+ } else {
+ cpr_ctl_disable(cpr_vreg);
+ cpr_irq_set(cpr_vreg, 0);
+ }
+ }
+
+_exit:
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ return 0;
+}
+
+static int cpr_enable_get(void *data, u64 *val)
+{
+ struct cpr_regulator *cpr_vreg = data;
+
+ *val = cpr_vreg->enable;
+
+ return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(cpr_enable_fops, cpr_enable_get, cpr_enable_set,
+ "%llu\n");
+
+static int cpr_get_cpr_ceiling(void *data, u64 *val)
+{
+ struct cpr_regulator *cpr_vreg = data;
+
+ *val = cpr_vreg->ceiling_volt[cpr_vreg->corner];
+
+ return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(cpr_ceiling_fops, cpr_get_cpr_ceiling, NULL,
+ "%llu\n");
+
+static int cpr_get_cpr_floor(void *data, u64 *val)
+{
+ struct cpr_regulator *cpr_vreg = data;
+
+ *val = cpr_vreg->floor_volt[cpr_vreg->corner];
+
+ return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(cpr_floor_fops, cpr_get_cpr_floor, NULL,
+ "%llu\n");
+
+static int cpr_get_cpr_max_ceiling(void *data, u64 *val)
+{
+ struct cpr_regulator *cpr_vreg = data;
+
+ *val = cpr_vreg->cpr_max_ceiling[cpr_vreg->corner];
+
+ return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(cpr_max_ceiling_fops, cpr_get_cpr_max_ceiling, NULL,
+ "%llu\n");
+
+static int cpr_debug_info_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+
+ return 0;
+}
+
+static ssize_t cpr_debug_info_read(struct file *file, char __user *buff,
+ size_t count, loff_t *ppos)
+{
+ struct cpr_regulator *cpr_vreg = file->private_data;
+ char *debugfs_buf;
+ ssize_t len, ret = 0;
+ u32 gcnt, ro_sel, ctl, irq_status, reg, error_steps;
+ u32 step_dn, step_up, error, error_lt0, busy;
+ int fuse_corner;
+
+ debugfs_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+ if (!debugfs_buf)
+ return -ENOMEM;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ fuse_corner = cpr_vreg->corner_map[cpr_vreg->corner];
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "corner = %d, current_volt = %d uV\n",
+ cpr_vreg->corner, cpr_vreg->last_volt[cpr_vreg->corner]);
+ ret += len;
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "fuse_corner = %d, current_volt = %d uV\n",
+ fuse_corner, cpr_vreg->last_volt[cpr_vreg->corner]);
+ ret += len;
+
+ ro_sel = cpr_vreg->cpr_fuse_ro_sel[fuse_corner];
+ gcnt = cpr_read(cpr_vreg, REG_RBCPR_GCNT_TARGET(ro_sel));
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "rbcpr_gcnt_target (%u) = 0x%02X\n", ro_sel, gcnt);
+ ret += len;
+
+ ctl = cpr_read(cpr_vreg, REG_RBCPR_CTL);
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "rbcpr_ctl = 0x%02X\n", ctl);
+ ret += len;
+
+ irq_status = cpr_read(cpr_vreg, REG_RBIF_IRQ_STATUS);
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "rbcpr_irq_status = 0x%02X\n", irq_status);
+ ret += len;
+
+ reg = cpr_read(cpr_vreg, REG_RBCPR_RESULT_0);
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "rbcpr_result_0 = 0x%02X\n", reg);
+ ret += len;
+
+ step_dn = reg & 0x01;
+ step_up = (reg >> RBCPR_RESULT0_STEP_UP_SHIFT) & 0x01;
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ " [step_dn = %u", step_dn);
+ ret += len;
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ ", step_up = %u", step_up);
+ ret += len;
+
+ error_steps = (reg >> RBCPR_RESULT0_ERROR_STEPS_SHIFT)
+ & RBCPR_RESULT0_ERROR_STEPS_MASK;
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ ", error_steps = %u", error_steps);
+ ret += len;
+
+ error = (reg >> RBCPR_RESULT0_ERROR_SHIFT) & RBCPR_RESULT0_ERROR_MASK;
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ ", error = %u", error);
+ ret += len;
+
+ error_lt0 = (reg >> RBCPR_RESULT0_ERROR_LT0_SHIFT) & 0x01;
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ ", error_lt_0 = %u", error_lt0);
+ ret += len;
+
+ busy = (reg >> RBCPR_RESULT0_BUSY_SHIFT) & 0x01;
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ ", busy = %u]\n", busy);
+ ret += len;
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ ret = simple_read_from_buffer(buff, count, ppos, debugfs_buf, ret);
+ kfree(debugfs_buf);
+ return ret;
+}
+
+static const struct file_operations cpr_debug_info_fops = {
+ .open = cpr_debug_info_open,
+ .read = cpr_debug_info_read,
+};
+
+static int cpr_aging_debug_info_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+
+ return 0;
+}
+
+static ssize_t cpr_aging_debug_info_read(struct file *file, char __user *buff,
+ size_t count, loff_t *ppos)
+{
+ struct cpr_regulator *cpr_vreg = file->private_data;
+ struct cpr_aging_info *aging_info = cpr_vreg->aging_info;
+ char *debugfs_buf;
+ ssize_t len, ret = 0;
+ int i;
+
+ debugfs_buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
+ if (!debugfs_buf)
+ return -ENOMEM;
+
+ mutex_lock(&cpr_vreg->cpr_mutex);
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "aging_adj_volt = [");
+ ret += len;
+
+ for (i = CPR_FUSE_CORNER_MIN; i <= cpr_vreg->num_fuse_corners; i++) {
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ " %d", aging_info->voltage_adjust[i]);
+ ret += len;
+ }
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ " ]uV\n");
+ ret += len;
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "aging_measurement_done = %s\n",
+ aging_info->cpr_aging_done ? "true" : "false");
+ ret += len;
+
+ len = snprintf(debugfs_buf + ret, PAGE_SIZE - ret,
+ "aging_measurement_error = %s\n",
+ aging_info->cpr_aging_error ? "true" : "false");
+ ret += len;
+
+ mutex_unlock(&cpr_vreg->cpr_mutex);
+
+ ret = simple_read_from_buffer(buff, count, ppos, debugfs_buf, ret);
+ kfree(debugfs_buf);
+ return ret;
+}
+
+static const struct file_operations cpr_aging_debug_info_fops = {
+ .open = cpr_aging_debug_info_open,
+ .read = cpr_aging_debug_info_read,
+};
+
+static void cpr_debugfs_init(struct cpr_regulator *cpr_vreg)
+{
+ struct dentry *temp;
+
+ if (IS_ERR_OR_NULL(cpr_debugfs_base)) {
+ cpr_err(cpr_vreg, "Could not create debugfs nodes since base directory is missing\n");
+ return;
+ }
+
+ cpr_vreg->debugfs = debugfs_create_dir(cpr_vreg->rdesc.name,
+ cpr_debugfs_base);
+ if (IS_ERR_OR_NULL(cpr_vreg->debugfs)) {
+ cpr_err(cpr_vreg, "debugfs directory creation failed\n");
+ return;
+ }
+
+ temp = debugfs_create_file("debug_info", S_IRUGO, cpr_vreg->debugfs,
+ cpr_vreg, &cpr_debug_info_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "debug_info node creation failed\n");
+ return;
+ }
+
+ temp = debugfs_create_file("cpr_enable", S_IRUGO | S_IWUSR,
+ cpr_vreg->debugfs, cpr_vreg, &cpr_enable_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "cpr_enable node creation failed\n");
+ return;
+ }
+
+ temp = debugfs_create_file("cpr_ceiling", S_IRUGO,
+ cpr_vreg->debugfs, cpr_vreg, &cpr_ceiling_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "cpr_ceiling node creation failed\n");
+ return;
+ }
+
+ temp = debugfs_create_file("cpr_floor", S_IRUGO,
+ cpr_vreg->debugfs, cpr_vreg, &cpr_floor_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "cpr_floor node creation failed\n");
+ return;
+ }
+
+ temp = debugfs_create_file("cpr_max_ceiling", S_IRUGO,
+ cpr_vreg->debugfs, cpr_vreg, &cpr_max_ceiling_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "cpr_max_ceiling node creation failed\n");
+ return;
+ }
+
+ if (cpr_vreg->aging_info) {
+ temp = debugfs_create_file("aging_debug_info", S_IRUGO,
+ cpr_vreg->debugfs, cpr_vreg,
+ &cpr_aging_debug_info_fops);
+ if (IS_ERR_OR_NULL(temp)) {
+ cpr_err(cpr_vreg, "aging_debug_info node creation failed\n");
+ return;
+ }
+ }
+}
+
+static void cpr_debugfs_remove(struct cpr_regulator *cpr_vreg)
+{
+ debugfs_remove_recursive(cpr_vreg->debugfs);
+}
+
+static void cpr_debugfs_base_init(void)
+{
+ cpr_debugfs_base = debugfs_create_dir("cpr-regulator", NULL);
+ if (IS_ERR_OR_NULL(cpr_debugfs_base))
+ pr_err("cpr-regulator debugfs base directory creation failed\n");
+}
+
+static void cpr_debugfs_base_remove(void)
+{
+ debugfs_remove_recursive(cpr_debugfs_base);
+}
+
+#else
+
+static void cpr_debugfs_init(struct cpr_regulator *cpr_vreg)
+{}
+
+static void cpr_debugfs_remove(struct cpr_regulator *cpr_vreg)
+{}
+
+static void cpr_debugfs_base_init(void)
+{}
+
+static void cpr_debugfs_base_remove(void)
+{}
+
+#endif
+
+/**
+ * cpr_panic_callback() - panic notification callback function. This function
+ * is invoked when a kernel panic occurs.
+ * @nfb: Notifier block pointer of CPR regulator
+ * @event: Value passed unmodified to notifier function
+ * @data: Pointer passed unmodified to notifier function
+ *
+ * Return: NOTIFY_OK
+ */
+static int cpr_panic_callback(struct notifier_block *nfb,
+ unsigned long event, void *data)
+{
+ struct cpr_regulator *cpr_vreg = container_of(nfb,
+ struct cpr_regulator, panic_notifier);
+ int corner, fuse_corner, volt;
+
+ corner = cpr_vreg->corner;
+ fuse_corner = cpr_vreg->corner_map[corner];
+ if (cpr_is_allowed(cpr_vreg))
+ volt = cpr_vreg->last_volt[corner];
+ else
+ volt = cpr_vreg->open_loop_volt[corner];
+
+ cpr_err(cpr_vreg, "[corner:%d, fuse_corner:%d] = %d uV\n",
+ corner, fuse_corner, volt);
+
+ return NOTIFY_OK;
+}
+
+static int cpr_regulator_probe(struct platform_device *pdev)
+{
+ struct regulator_config reg_config = {};
+ struct cpr_regulator *cpr_vreg;
+ struct regulator_desc *rdesc;
+ struct device *dev = &pdev->dev;
+ struct regulator_init_data *init_data = pdev->dev.platform_data;
+ int rc;
+
+ if (!pdev->dev.of_node) {
+ dev_err(dev, "Device tree node is missing\n");
+ return -EINVAL;
+ }
+
+ init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node);
+ if (!init_data) {
+ dev_err(dev, "regulator init data is missing\n");
+ return -EINVAL;
+ } else {
+ init_data->constraints.input_uV
+ = init_data->constraints.max_uV;
+ init_data->constraints.valid_ops_mask
+ |= REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS;
+ }
+
+ cpr_vreg = devm_kzalloc(&pdev->dev, sizeof(struct cpr_regulator),
+ GFP_KERNEL);
+ if (!cpr_vreg) {
+ dev_err(dev, "Can't allocate cpr_regulator memory\n");
+ return -ENOMEM;
+ }
+
+ cpr_vreg->dev = &pdev->dev;
+ cpr_vreg->rdesc.name = init_data->constraints.name;
+ if (cpr_vreg->rdesc.name == NULL) {
+ dev_err(dev, "regulator-name missing\n");
+ return -EINVAL;
+ }
+
+ rc = cpr_fuse_corner_array_alloc(&pdev->dev, cpr_vreg);
+ if (rc)
+ return rc;
+
+ rc = cpr_mem_acc_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "mem_acc intialization error rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = cpr_efuse_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Wrong eFuse address specified: rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = cpr_remap_efuse_data(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Could not remap fuse data: rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = cpr_check_redundant(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Could not check redundant fuse: rc=%d\n",
+ rc);
+ goto err_out;
+ }
+
+ rc = cpr_read_fuse_revision(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Could not read fuse revision: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ cpr_parse_speed_bin_fuse(cpr_vreg, dev->of_node);
+ cpr_parse_pvs_version_fuse(cpr_vreg, dev->of_node);
+
+ rc = cpr_read_ro_select(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Could not read RO select: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ rc = cpr_find_fuse_map_match(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Could not determine fuse mapping match: rc=%d\n",
+ rc);
+ goto err_out;
+ }
+
+ rc = cpr_voltage_plan_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Wrong DT parameter specified: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ rc = cpr_pvs_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Initialize PVS wrong: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ rc = cpr_vsens_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Initialize vsens configuration failed rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ rc = cpr_apc_init(pdev, cpr_vreg);
+ if (rc) {
+ if (rc != -EPROBE_DEFER)
+ cpr_err(cpr_vreg, "Initialize APC wrong: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ rc = cpr_init_cpr(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Initialize CPR failed: rc=%d\n", rc);
+ goto err_out;
+ }
+
+ rc = cpr_rpm_apc_init(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Initialize RPM APC regulator failed rc=%d\n",
+ rc);
+ return rc;
+ }
+
+ rc = cpr_thermal_init(cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "Thermal intialization failed rc=%d\n", rc);
+ return rc;
+ }
+
+ if (of_property_read_bool(pdev->dev.of_node,
+ "qcom,disable-closed-loop-in-pc")) {
+ rc = cpr_init_pm_notification(cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg,
+ "cpr_init_pm_notification failed rc=%d\n", rc);
+ return rc;
+ }
+ }
+
+ /* Load per-online CPU adjustment data */
+ rc = cpr_init_per_cpu_adjustments(cpr_vreg, &pdev->dev);
+ if (rc) {
+ cpr_err(cpr_vreg, "cpr_init_per_cpu_adjustments failed: rc=%d\n",
+ rc);
+ goto err_out;
+ }
+
+ /* Parse dependency parameters */
+ if (cpr_vreg->vdd_mx) {
+ rc = cpr_parse_vdd_mx_parameters(pdev, cpr_vreg);
+ if (rc) {
+ cpr_err(cpr_vreg, "parsing vdd_mx parameters failed: rc=%d\n",
+ rc);
+ goto err_out;
+ }
+ }
+
+ cpr_efuse_free(cpr_vreg);
+
+ /*
+ * Ensure that enable state accurately reflects the case in which CPR
+ * is permanently disabled.
+ */
+ cpr_vreg->enable &= !cpr_vreg->cpr_fuse_disable;
+
+ mutex_init(&cpr_vreg->cpr_mutex);
+
+ rdesc = &cpr_vreg->rdesc;
+ rdesc->owner = THIS_MODULE;
+ rdesc->type = REGULATOR_VOLTAGE;
+ rdesc->ops = &cpr_corner_ops;
+
+ reg_config.dev = &pdev->dev;
+ reg_config.init_data = init_data;
+ reg_config.driver_data = cpr_vreg;
+ reg_config.of_node = pdev->dev.of_node;
+ cpr_vreg->rdev = regulator_register(rdesc, ®_config);
+ if (IS_ERR(cpr_vreg->rdev)) {
+ rc = PTR_ERR(cpr_vreg->rdev);
+ cpr_err(cpr_vreg, "regulator_register failed: rc=%d\n", rc);
+
+ cpr_apc_exit(cpr_vreg);
+ return rc;
+ }
+
+ platform_set_drvdata(pdev, cpr_vreg);
+ cpr_debugfs_init(cpr_vreg);
+
+ if (cpr_vreg->cpr_disable_on_temperature) {
+ rc = cpr_check_tsens(cpr_vreg);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "Unable to config CPR on tsens, rc=%d\n",
+ rc);
+ cpr_apc_exit(cpr_vreg);
+ cpr_debugfs_remove(cpr_vreg);
+ return rc;
+ }
+ }
+
+ /* Register panic notification call back */
+ cpr_vreg->panic_notifier.notifier_call = cpr_panic_callback;
+ atomic_notifier_chain_register(&panic_notifier_list,
+ &cpr_vreg->panic_notifier);
+
+ mutex_lock(&cpr_regulator_list_mutex);
+ list_add(&cpr_vreg->list, &cpr_regulator_list);
+ mutex_unlock(&cpr_regulator_list_mutex);
+
+ return 0;
+
+err_out:
+ cpr_efuse_free(cpr_vreg);
+ return rc;
+}
+
+static int cpr_regulator_remove(struct platform_device *pdev)
+{
+ struct cpr_regulator *cpr_vreg;
+
+ cpr_vreg = platform_get_drvdata(pdev);
+ if (cpr_vreg) {
+ /* Disable CPR */
+ if (cpr_is_allowed(cpr_vreg)) {
+ cpr_ctl_disable(cpr_vreg);
+ cpr_irq_set(cpr_vreg, 0);
+ }
+
+ mutex_lock(&cpr_regulator_list_mutex);
+ list_del(&cpr_vreg->list);
+ mutex_unlock(&cpr_regulator_list_mutex);
+
+ if (cpr_vreg->cpu_notifier.notifier_call)
+ unregister_hotcpu_notifier(&cpr_vreg->cpu_notifier);
+
+ if (cpr_vreg->cpr_disable_on_temperature)
+ sensor_mgr_remove_threshold(
+ &cpr_vreg->tsens_threshold_config);
+
+ atomic_notifier_chain_unregister(&panic_notifier_list,
+ &cpr_vreg->panic_notifier);
+
+ cpr_apc_exit(cpr_vreg);
+ cpr_debugfs_remove(cpr_vreg);
+ regulator_unregister(cpr_vreg->rdev);
+ }
+
+ return 0;
+}
+
+static struct of_device_id cpr_regulator_match_table[] = {
+ { .compatible = CPR_REGULATOR_DRIVER_NAME, },
+ {}
+};
+
+static struct platform_driver cpr_regulator_driver = {
+ .driver = {
+ .name = CPR_REGULATOR_DRIVER_NAME,
+ .of_match_table = cpr_regulator_match_table,
+ .owner = THIS_MODULE,
+ },
+ .probe = cpr_regulator_probe,
+ .remove = cpr_regulator_remove,
+ .suspend = cpr_regulator_suspend,
+ .resume = cpr_regulator_resume,
+};
+
+static int initialize_tsens_monitor(struct cpr_regulator *cpr_vreg)
+{
+ int rc;
+
+ rc = cpr_check_tsens(cpr_vreg);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "Unable to check tsens, rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = sensor_mgr_init_threshold(&cpr_vreg->tsens_threshold_config,
+ cpr_vreg->tsens_id,
+ cpr_vreg->cpr_enable_temp_threshold, /* high */
+ cpr_vreg->cpr_disable_temp_threshold, /* low */
+ tsens_threshold_notify);
+ if (rc < 0) {
+ cpr_err(cpr_vreg, "Failed to init tsens monitor, rc=%d\n", rc);
+ return rc;
+ }
+
+ rc = sensor_mgr_convert_id_and_set_threshold(
+ &cpr_vreg->tsens_threshold_config);
+ if (rc < 0)
+ cpr_err(cpr_vreg, "Failed to set tsens threshold, rc=%d\n",
+ rc);
+
+ return rc;
+}
+
+int __init cpr_regulator_late_init(void)
+{
+ int rc;
+ struct cpr_regulator *cpr_vreg;
+
+ mutex_lock(&cpr_regulator_list_mutex);
+
+ list_for_each_entry(cpr_vreg, &cpr_regulator_list, list) {
+ if (cpr_vreg->cpr_disable_on_temperature) {
+ rc = initialize_tsens_monitor(cpr_vreg);
+ if (rc)
+ cpr_err(cpr_vreg, "Failed to initialize temperature monitor, rc=%d\n",
+ rc);
+ }
+ }
+
+ mutex_unlock(&cpr_regulator_list_mutex);
+ return 0;
+}
+late_initcall(cpr_regulator_late_init);
+
+/**
+ * cpr_regulator_init() - register cpr-regulator driver
+ *
+ * This initialization function should be called in systems in which driver
+ * registration ordering must be controlled precisely.
+ */
+int __init cpr_regulator_init(void)
+{
+ static bool initialized;
+
+ if (initialized)
+ return 0;
+ else
+ initialized = true;
+
+ cpr_debugfs_base_init();
+ return platform_driver_register(&cpr_regulator_driver);
+}
+EXPORT_SYMBOL(cpr_regulator_init);
+
+static void __exit cpr_regulator_exit(void)
+{
+ platform_driver_unregister(&cpr_regulator_driver);
+ cpr_debugfs_base_remove();
+}
+
+MODULE_DESCRIPTION("CPR regulator driver");
+MODULE_LICENSE("GPL v2");
+
+arch_initcall(cpr_regulator_init);
+module_exit(cpr_regulator_exit);
diff --git a/drivers/regulator/rpmh-regulator.c b/drivers/regulator/rpmh-regulator.c
index 1de08d4..f370d2b 100644
--- a/drivers/regulator/rpmh-regulator.c
+++ b/drivers/regulator/rpmh-regulator.c
@@ -46,6 +46,23 @@
};
/**
+ * enum rpmh_regulator_hw_type - supported PMIC regulator hardware types
+ * This enum defines the specific regulator type along with its PMIC family.
+ */
+enum rpmh_regulator_hw_type {
+ RPMH_REGULATOR_HW_TYPE_UNKNOWN,
+ RPMH_REGULATOR_HW_TYPE_PMIC4_LDO,
+ RPMH_REGULATOR_HW_TYPE_PMIC4_HFSMPS,
+ RPMH_REGULATOR_HW_TYPE_PMIC4_FTSMPS,
+ RPMH_REGULATOR_HW_TYPE_PMIC4_BOB,
+ RPMH_REGULATOR_HW_TYPE_PMIC5_LDO,
+ RPMH_REGULATOR_HW_TYPE_PMIC5_HFSMPS,
+ RPMH_REGULATOR_HW_TYPE_PMIC5_FTSMPS,
+ RPMH_REGULATOR_HW_TYPE_PMIC5_BOB,
+ RPMH_REGULATOR_HW_TYPE_MAX,
+};
+
+/**
* enum rpmh_regulator_reg_index - RPMh accelerator register indices
* %RPMH_REGULATOR_REG_VRM_VOLTAGE: VRM voltage voting register index
* %RPMH_REGULATOR_REG_ARC_LEVEL: ARC voltage level voting register index
@@ -115,20 +132,6 @@
/* XOB voting registers are found in the VRM hardware module */
#define CMD_DB_HW_XOB CMD_DB_HW_VRM
-/*
- * Mapping from RPMh VRM accelerator modes to regulator framework modes
- * Assumes that SMPS PFM mode == LDO LPM mode and SMPS PWM mode == LDO HPM mode
- */
-static const int rpmh_regulator_mode_map[] = {
- [RPMH_REGULATOR_MODE_SMPS_PFM] = REGULATOR_MODE_IDLE,
- [RPMH_REGULATOR_MODE_SMPS_AUTO] = REGULATOR_MODE_NORMAL,
- [RPMH_REGULATOR_MODE_SMPS_PWM] = REGULATOR_MODE_FAST,
- [RPMH_REGULATOR_MODE_BOB_PASS] = REGULATOR_MODE_STANDBY,
- [RPMH_REGULATOR_MODE_BOB_PFM] = REGULATOR_MODE_IDLE,
- [RPMH_REGULATOR_MODE_BOB_AUTO] = REGULATOR_MODE_NORMAL,
- [RPMH_REGULATOR_MODE_BOB_PWM] = REGULATOR_MODE_FAST,
-};
-
/**
* struct rpmh_regulator_request - rpmh request data
* @reg: Array of RPMh accelerator register values
@@ -175,6 +178,8 @@
* common to a single aggregated resource
* @regulator_type: RPMh accelerator type for this regulator
* resource
+ * @regulator_hw_type: The regulator hardware type (e.g. LDO or SMPS)
+ * along with PMIC family (i.e. PMIC4 or PMIC5)
* @level: Mapping from ARC resource specific voltage
* levels (0 to RPMH_ARC_MAX_LEVELS - 1) to common
* consumer voltage levels (i.e.
@@ -221,6 +226,7 @@
struct rpmh_client *rpmh_client;
struct mutex lock;
enum rpmh_regulator_type regulator_type;
+ enum rpmh_regulator_hw_type regulator_hw_type;
u32 level[RPMH_ARC_MAX_LEVELS];
int level_count;
bool always_wait_for_ack;
@@ -268,6 +274,187 @@
int mode_index;
};
+#define RPMH_REGULATOR_MODE_COUNT 5
+
+#define RPMH_REGULATOR_MODE_PMIC4_LDO_RM 4
+#define RPMH_REGULATOR_MODE_PMIC4_LDO_LPM 5
+#define RPMH_REGULATOR_MODE_PMIC4_LDO_HPM 7
+
+#define RPMH_REGULATOR_MODE_PMIC4_SMPS_RM 4
+#define RPMH_REGULATOR_MODE_PMIC4_SMPS_PFM 5
+#define RPMH_REGULATOR_MODE_PMIC4_SMPS_AUTO 6
+#define RPMH_REGULATOR_MODE_PMIC4_SMPS_PWM 7
+
+#define RPMH_REGULATOR_MODE_PMIC4_BOB_PASS 0
+#define RPMH_REGULATOR_MODE_PMIC4_BOB_PFM 1
+#define RPMH_REGULATOR_MODE_PMIC4_BOB_AUTO 2
+#define RPMH_REGULATOR_MODE_PMIC4_BOB_PWM 3
+
+#define RPMH_REGULATOR_MODE_PMIC5_LDO_RM 3
+#define RPMH_REGULATOR_MODE_PMIC5_LDO_LPM 4
+#define RPMH_REGULATOR_MODE_PMIC5_LDO_HPM 7
+
+#define RPMH_REGULATOR_MODE_PMIC5_HFSMPS_RM 3
+#define RPMH_REGULATOR_MODE_PMIC5_HFSMPS_PFM 4
+#define RPMH_REGULATOR_MODE_PMIC5_HFSMPS_AUTO 6
+#define RPMH_REGULATOR_MODE_PMIC5_HFSMPS_PWM 7
+
+#define RPMH_REGULATOR_MODE_PMIC5_FTSMPS_RM 3
+#define RPMH_REGULATOR_MODE_PMIC5_FTSMPS_PWM 7
+
+#define RPMH_REGULATOR_MODE_PMIC5_BOB_PASS 2
+#define RPMH_REGULATOR_MODE_PMIC5_BOB_PFM 4
+#define RPMH_REGULATOR_MODE_PMIC5_BOB_AUTO 6
+#define RPMH_REGULATOR_MODE_PMIC5_BOB_PWM 7
+
+/*
+ * Mappings from RPMh generic modes to VRM accelerator modes and regulator
+ * framework modes for each regulator type.
+ */
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic4_ldo[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_RET] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_LDO_RM,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_LDO_LPM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_LDO_HPM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic4_smps[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_RET] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_SMPS_RM,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_SMPS_PFM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_AUTO] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_SMPS_AUTO,
+ .framework_mode = REGULATOR_MODE_NORMAL,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_SMPS_PWM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic4_bob[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_PASS] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_BOB_PASS,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_BOB_PFM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_AUTO] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_BOB_AUTO,
+ .framework_mode = REGULATOR_MODE_NORMAL,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC4_BOB_PWM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic5_ldo[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_RET] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_LDO_RM,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_LDO_LPM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_LDO_HPM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic5_hfsmps[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_RET] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_HFSMPS_RM,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_HFSMPS_PFM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_AUTO] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_HFSMPS_AUTO,
+ .framework_mode = REGULATOR_MODE_NORMAL,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_HFSMPS_PWM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic5_ftsmps[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_RET] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_FTSMPS_RM,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_FTSMPS_PWM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode
+rpmh_regulator_mode_map_pmic5_bob[RPMH_REGULATOR_MODE_COUNT] = {
+ [RPMH_REGULATOR_MODE_PASS] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_BOB_PASS,
+ .framework_mode = REGULATOR_MODE_STANDBY,
+ },
+ [RPMH_REGULATOR_MODE_LPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_BOB_PFM,
+ .framework_mode = REGULATOR_MODE_IDLE,
+ },
+ [RPMH_REGULATOR_MODE_AUTO] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_BOB_AUTO,
+ .framework_mode = REGULATOR_MODE_NORMAL,
+ },
+ [RPMH_REGULATOR_MODE_HPM] = {
+ .pmic_mode = RPMH_REGULATOR_MODE_PMIC5_BOB_PWM,
+ .framework_mode = REGULATOR_MODE_FAST,
+ },
+};
+
+static const struct rpmh_regulator_mode * const
+rpmh_regulator_mode_map[RPMH_REGULATOR_HW_TYPE_MAX] = {
+ [RPMH_REGULATOR_HW_TYPE_PMIC4_LDO]
+ = rpmh_regulator_mode_map_pmic4_ldo,
+ [RPMH_REGULATOR_HW_TYPE_PMIC4_HFSMPS]
+ = rpmh_regulator_mode_map_pmic4_smps,
+ [RPMH_REGULATOR_HW_TYPE_PMIC4_FTSMPS]
+ = rpmh_regulator_mode_map_pmic4_smps,
+ [RPMH_REGULATOR_HW_TYPE_PMIC4_BOB]
+ = rpmh_regulator_mode_map_pmic4_bob,
+ [RPMH_REGULATOR_HW_TYPE_PMIC5_LDO]
+ = rpmh_regulator_mode_map_pmic5_ldo,
+ [RPMH_REGULATOR_HW_TYPE_PMIC5_HFSMPS]
+ = rpmh_regulator_mode_map_pmic5_hfsmps,
+ [RPMH_REGULATOR_HW_TYPE_PMIC5_FTSMPS]
+ = rpmh_regulator_mode_map_pmic5_ftsmps,
+ [RPMH_REGULATOR_HW_TYPE_PMIC5_BOB]
+ = rpmh_regulator_mode_map_pmic5_bob,
+};
+
/*
* This voltage in uV is returned by get_voltage functions when there is no way
* to determine the current voltage level. It is needed because the regulator
@@ -869,9 +1056,9 @@
*
* This function sets the PMIC mode corresponding to the specified framework
* mode. The set of PMIC modes allowed is defined in device tree for a given
- * RPMh regulator resource. The full mapping from PMIC modes to framework modes
- * is defined in the rpmh_regulator_mode_map[] array. The RPMh resource
- * specific mapping is defined in the aggr_vreg->mode[] array.
+ * RPMh regulator resource. The full mapping from generic modes to PMIC modes
+ * and framework modes is defined in the rpmh_regulator_mode_map[] array. The
+ * RPMh resource specific mapping is defined in the aggr_vreg->mode[] array.
*
* Return: 0 on success, errno on failure
*/
@@ -1148,11 +1335,60 @@
static int rpmh_regulator_parse_vrm_modes(struct rpmh_aggr_vreg *aggr_vreg)
{
struct device_node *node = aggr_vreg->dev->of_node;
- const char *prop = "qcom,supported-modes";
+ const char *type = "";
+ const struct rpmh_regulator_mode *map;
+ const char *prop;
int i, len, rc;
u32 *buf;
+ aggr_vreg->regulator_hw_type = RPMH_REGULATOR_HW_TYPE_UNKNOWN;
+
+ /* qcom,regulator-type is optional */
+ prop = "qcom,regulator-type";
+ if (!of_find_property(node, prop, &len))
+ return 0;
+
+ rc = of_property_read_string(node, prop, &type);
+ if (rc) {
+ aggr_vreg_err(aggr_vreg, "unable to read %s, rc=%d\n",
+ prop, rc);
+ return rc;
+ }
+
+ if (!strcmp(type, "pmic4-ldo")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC4_LDO;
+ } else if (!strcmp(type, "pmic4-hfsmps")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC4_HFSMPS;
+ } else if (!strcmp(type, "pmic4-ftsmps")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC4_FTSMPS;
+ } else if (!strcmp(type, "pmic4-bob")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC4_BOB;
+ } else if (!strcmp(type, "pmic5-ldo")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC5_LDO;
+ } else if (!strcmp(type, "pmic5-hfsmps")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC5_HFSMPS;
+ } else if (!strcmp(type, "pmic5-ftsmps")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC5_FTSMPS;
+ } else if (!strcmp(type, "pmic5-bob")) {
+ aggr_vreg->regulator_hw_type
+ = RPMH_REGULATOR_HW_TYPE_PMIC5_BOB;
+ } else {
+ aggr_vreg_err(aggr_vreg, "unknown %s = %s\n",
+ prop, type);
+ return -EINVAL;
+ }
+
+ map = rpmh_regulator_mode_map[aggr_vreg->regulator_hw_type];
+
/* qcom,supported-modes is optional */
+ prop = "qcom,supported-modes";
if (!of_find_property(node, prop, &len))
return 0;
@@ -1176,15 +1412,22 @@
}
for (i = 0; i < len; i++) {
- if (buf[i] >= ARRAY_SIZE(rpmh_regulator_mode_map)) {
+ if (buf[i] >= RPMH_REGULATOR_MODE_COUNT) {
aggr_vreg_err(aggr_vreg, "element %d of %s = %u is invalid\n",
i, prop, buf[i]);
rc = -EINVAL;
goto done;
}
- aggr_vreg->mode[i].pmic_mode = buf[i];
- aggr_vreg->mode[i].framework_mode
- = rpmh_regulator_mode_map[buf[i]];
+
+ if (!map[buf[i]].framework_mode) {
+ aggr_vreg_err(aggr_vreg, "element %d of %s = %u is invalid for regulator type = %s\n",
+ i, prop, buf[i], type);
+ rc = -EINVAL;
+ goto done;
+ }
+
+ aggr_vreg->mode[i].pmic_mode = map[buf[i]].pmic_mode;
+ aggr_vreg->mode[i].framework_mode = map[buf[i]].framework_mode;
if (i > 0 && aggr_vreg->mode[i].pmic_mode
<= aggr_vreg->mode[i - 1].pmic_mode) {
@@ -1287,6 +1530,7 @@
static int rpmh_regulator_load_default_parameters(struct rpmh_vreg *vreg)
{
enum rpmh_regulator_type type = vreg->aggr_vreg->regulator_type;
+ const struct rpmh_regulator_mode *map;
const char *prop;
int i, rc;
u32 temp;
@@ -1336,15 +1580,36 @@
prop = "qcom,init-mode";
rc = of_property_read_u32(vreg->of_node, prop, &temp);
if (!rc) {
- if (temp < RPMH_VRM_MODE_MIN ||
- temp > RPMH_VRM_MODE_MAX) {
+ if (temp >= RPMH_REGULATOR_MODE_COUNT) {
vreg_err(vreg, "%s=%u is invalid\n",
prop, temp);
return -EINVAL;
+ } else if (vreg->aggr_vreg->regulator_hw_type
+ == RPMH_REGULATOR_HW_TYPE_UNKNOWN) {
+ vreg_err(vreg, "qcom,regulator-type missing so %s cannot be used\n",
+ prop);
+ return -EINVAL;
}
+
+ map = rpmh_regulator_mode_map[
+ vreg->aggr_vreg->regulator_hw_type];
+ if (!map[temp].framework_mode) {
+ vreg_err(vreg, "%s=%u is not supported by type = %d\n",
+ prop, temp,
+ vreg->aggr_vreg->regulator_hw_type);
+ return -EINVAL;
+ }
+
rpmh_regulator_set_reg(vreg,
RPMH_REGULATOR_REG_VRM_MODE,
- temp);
+ map[temp].pmic_mode);
+ for (i = 0; i < vreg->aggr_vreg->mode_count; i++) {
+ if (vreg->aggr_vreg->mode[i].pmic_mode
+ == map[temp].pmic_mode) {
+ vreg->mode_index = i;
+ break;
+ }
+ }
}
prop = "qcom,init-headroom-voltage";
diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
index dc641ef..f34b714 100644
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -87,6 +87,9 @@
ifdef CONFIG_MSM_RPM_SMD
obj-$(CONFIG_QTI_RPM_STATS_LOG) += rpm_master_stat.o
endif
+ifdef CONFIG_QTI_RPMH_API
+ obj-$(CONFIG_QTI_RPM_STATS_LOG) += rpmh_master_stat.o
+endif
obj-$(CONFIG_QCOM_SMCINVOKE) += smcinvoke.o
obj-$(CONFIG_QMP_DEBUGFS_CLIENT) += qmp-debugfs-client.o
obj-$(CONFIG_MSM_REMOTEQDSS) += remoteqdss.o
diff --git a/drivers/soc/qcom/minidump_log.c b/drivers/soc/qcom/minidump_log.c
index c65dfd9..87e1700 100644
--- a/drivers/soc/qcom/minidump_log.c
+++ b/drivers/soc/qcom/minidump_log.c
@@ -76,6 +76,9 @@
struct md_region ksp_entry, ktsk_entry;
u32 cpu = smp_processor_id();
+ if (is_idle_task(current))
+ return;
+
if (sp < KIMAGE_VADDR || sp > -256UL)
sp = current_stack_pointer;
diff --git a/drivers/soc/qcom/pil-msa.c b/drivers/soc/qcom/pil-msa.c
index ce31d66..e0f912d 100644
--- a/drivers/soc/qcom/pil-msa.c
+++ b/drivers/soc/qcom/pil-msa.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -263,6 +263,12 @@
pil_mss_pdc_sync(drv, 1);
pil_mss_alt_reset(drv, 1);
+ if (drv->reset_clk) {
+ pil_mss_disable_clks(drv);
+ if (drv->ahb_clk_vote)
+ clk_disable_unprepare(drv->ahb_clk);
+ }
+
ret = pil_mss_restart_reg(drv, true);
return ret;
@@ -277,6 +283,9 @@
return ret;
/* Wait 6 32kHz sleep cycles for reset */
udelay(200);
+
+ if (drv->reset_clk)
+ pil_mss_enable_clks(drv);
pil_mss_alt_reset(drv, 0);
pil_mss_pdc_sync(drv, false);
diff --git a/drivers/soc/qcom/pil-q6v5-mss.c b/drivers/soc/qcom/pil-q6v5-mss.c
index 728a68c..3fdacf2 100644
--- a/drivers/soc/qcom/pil-q6v5-mss.c
+++ b/drivers/soc/qcom/pil-q6v5-mss.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -38,7 +38,6 @@
#define PROXY_TIMEOUT_MS 10000
#define MAX_SSR_REASON_LEN 256U
#define STOP_ACK_TIMEOUT_MS 1000
-#define QDSP6SS_NMI_STATUS 0x44
#define subsys_to_drv(d) container_of(d, struct modem_data, subsys_desc)
@@ -72,17 +71,12 @@
static irqreturn_t modem_err_fatal_intr_handler(int irq, void *dev_id)
{
struct modem_data *drv = subsys_to_drv(dev_id);
- u32 nmi_status = readl_relaxed(drv->q6->reg_base + QDSP6SS_NMI_STATUS);
/* Ignore if we're the one that set the force stop GPIO */
if (drv->crash_shutdown)
return IRQ_HANDLED;
- if (nmi_status & 0x04)
- pr_err("%s: Fatal error on the modem due to TZ NMI\n",
- __func__);
- else
- pr_err("%s: Fatal error on the modem\n", __func__);
+ pr_err("Fatal error on the modem.\n");
subsys_set_crash_status(drv->subsys, CRASH_STATUS_ERR_FATAL);
restart_modem(drv);
return IRQ_HANDLED;
@@ -278,6 +272,8 @@
q6_desc->ops = &pil_msa_mss_ops;
+ q6->reset_clk = of_property_read_bool(pdev->dev.of_node,
+ "qcom,reset-clk");
q6->self_auth = of_property_read_bool(pdev->dev.of_node,
"qcom,pil-self-auth");
if (q6->self_auth) {
diff --git a/drivers/soc/qcom/pil-q6v5.h b/drivers/soc/qcom/pil-q6v5.h
index 4961b1f..2690bb7 100644
--- a/drivers/soc/qcom/pil-q6v5.h
+++ b/drivers/soc/qcom/pil-q6v5.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -77,6 +77,7 @@
int mss_pdc_offset;
bool ahb_clk_vote;
bool mx_spike_wa;
+ bool reset_clk;
};
int pil_q6v5_make_proxy_votes(struct pil_desc *pil);
diff --git a/drivers/soc/qcom/rpm-smd-debug.c b/drivers/soc/qcom/rpm-smd-debug.c
index 6ae9f08..e52fc72 100644
--- a/drivers/soc/qcom/rpm-smd-debug.c
+++ b/drivers/soc/qcom/rpm-smd-debug.c
@@ -90,23 +90,23 @@
cmp += pos;
if (sscanf(cmp, "%5s %n", key_str, &pos) != 1) {
pr_err("Invalid number of arguments passed\n");
- goto err;
+ goto err_request;
}
if (strlen(key_str) > 4) {
pr_err("Key value cannot be more than 4 charecters");
- goto err;
+ goto err_request;
}
key = string_to_uint(key_str);
if (!key) {
pr_err("Key values entered incorrectly\n");
- goto err;
+ goto err_request;
}
cmp += pos;
if (sscanf(cmp, "%u %n", &data, &pos) != 1) {
pr_err("Invalid number of arguments passed\n");
- goto err;
+ goto err_request;
}
if (msm_rpm_add_kvp_data(req, key,
diff --git a/drivers/soc/qcom/rpmh_master_stat.c b/drivers/soc/qcom/rpmh_master_stat.c
new file mode 100644
index 0000000..2c379a0
--- /dev/null
+++ b/drivers/soc/qcom/rpmh_master_stat.c
@@ -0,0 +1,220 @@
+/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#define pr_fmt(fmt) "%s: " fmt, KBUILD_MODNAME
+
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/types.h>
+#include <linux/mm.h>
+#include <linux/of.h>
+#include <linux/uaccess.h>
+#include <soc/qcom/smem.h>
+
+enum master_smem_id {
+ MPSS = 605,
+ ADSP,
+ CDSP,
+ SLPI,
+ GPU,
+ DISPLAY,
+};
+
+enum master_pid {
+ PID_APSS = 0,
+ PID_MPSS = 1,
+ PID_ADSP = 2,
+ PID_SLPI = 3,
+ PID_CDSP = 5,
+ PID_GPU = PID_APSS,
+ PID_DISPLAY = PID_APSS,
+};
+
+struct msm_rpmh_master_data {
+ char *master_name;
+ enum master_smem_id smem_id;
+ enum master_pid pid;
+};
+
+static const struct msm_rpmh_master_data rpmh_masters[] = {
+ {"MPSS", MPSS, PID_MPSS},
+ {"ADSP", ADSP, PID_ADSP},
+ {"CDSP", CDSP, PID_CDSP},
+ {"SLPI", SLPI, PID_SLPI},
+ {"GPU", GPU, PID_GPU},
+ {"DISPLAY", DISPLAY, PID_DISPLAY},
+};
+
+struct msm_rpmh_master_stats {
+ uint32_t version_id;
+ uint32_t counts;
+ uint64_t last_entered_at;
+ uint64_t last_exited_at;
+ uint64_t accumulated_duration;
+};
+
+struct rpmh_master_stats_prv_data {
+ struct kobj_attribute ka;
+ struct kobject *kobj;
+};
+
+static DEFINE_MUTEX(rpmh_stats_mutex);
+
+static ssize_t msm_rpmh_master_stats_print_data(char *prvbuf, ssize_t length,
+ struct msm_rpmh_master_stats *record,
+ const char *name)
+{
+ return snprintf(prvbuf, length, "%s\n\tVersion:0x%x\n"
+ "\tSleep Count:0x%x\n"
+ "\tSleep Last Entered At:0x%llx\n"
+ "\tSleep Last Exited At:0x%llx\n"
+ "\tSleep Accumulated Duration:0x%llx\n\n",
+ name, record->version_id, record->counts,
+ record->last_entered_at, record->last_exited_at,
+ record->accumulated_duration);
+}
+
+static ssize_t msm_rpmh_master_stats_show(struct kobject *kobj,
+ struct kobj_attribute *attr, char *buf)
+{
+ ssize_t length;
+ int i = 0;
+ unsigned int size = 0;
+ struct msm_rpmh_master_stats *record = NULL;
+
+ /*
+ * Read SMEM data written by masters
+ */
+
+ mutex_lock(&rpmh_stats_mutex);
+
+ for (i = 0, length = 0; i < ARRAY_SIZE(rpmh_masters); i++) {
+ record = (struct msm_rpmh_master_stats *) smem_get_entry(
+ rpmh_masters[i].smem_id, &size,
+ rpmh_masters[i].pid, 0);
+ if (!IS_ERR_OR_NULL(record) && (PAGE_SIZE - length > 0))
+ length += msm_rpmh_master_stats_print_data(
+ buf + length, PAGE_SIZE - length,
+ record,
+ rpmh_masters[i].master_name);
+ }
+
+ mutex_unlock(&rpmh_stats_mutex);
+
+ return length;
+}
+
+static int msm_rpmh_master_stats_probe(struct platform_device *pdev)
+{
+ struct rpmh_master_stats_prv_data *prvdata = NULL;
+ struct kobject *rpmh_master_stats_kobj = NULL;
+ int ret = 0;
+
+ if (!pdev)
+ return -EINVAL;
+
+ prvdata = kzalloc(sizeof(struct rpmh_master_stats_prv_data),
+ GFP_KERNEL);
+ if (!prvdata) {
+ ret = -ENOMEM;
+ goto fail;
+ }
+
+ rpmh_master_stats_kobj = kobject_create_and_add(
+ "rpmh_stats",
+ power_kobj);
+ if (!rpmh_master_stats_kobj) {
+ ret = -ENOMEM;
+ kfree(prvdata);
+ goto fail;
+ }
+
+ prvdata->kobj = rpmh_master_stats_kobj;
+
+ sysfs_attr_init(&prvdata->ka.attr);
+ prvdata->ka.attr.mode = 0444;
+ prvdata->ka.attr.name = "master_stats";
+ prvdata->ka.show = msm_rpmh_master_stats_show;
+ prvdata->ka.store = NULL;
+
+ ret = sysfs_create_file(prvdata->kobj, &prvdata->ka.attr);
+ if (ret) {
+ pr_err("sysfs_create_file failed\n");
+ kobject_put(prvdata->kobj);
+ kfree(prvdata);
+ goto fail;
+ }
+
+ platform_set_drvdata(pdev, prvdata);
+
+fail:
+ return ret;
+}
+
+static int msm_rpmh_master_stats_remove(struct platform_device *pdev)
+{
+ struct rpmh_master_stats_prv_data *prvdata;
+
+ if (!pdev)
+ return -EINVAL;
+
+ prvdata = (struct rpmh_master_stats_prv_data *)
+ platform_get_drvdata(pdev);
+
+ sysfs_remove_file(prvdata->kobj, &prvdata->ka.attr);
+ kobject_put(prvdata->kobj);
+ kfree(prvdata);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static const struct of_device_id rpmh_master_table[] = {
+ {.compatible = "qcom,rpmh-master-stats"},
+ {},
+};
+
+static struct platform_driver msm_rpmh_master_stats_driver = {
+ .probe = msm_rpmh_master_stats_probe,
+ .remove = msm_rpmh_master_stats_remove,
+ .driver = {
+ .name = "msm_rpmh_master_stats",
+ .owner = THIS_MODULE,
+ .of_match_table = rpmh_master_table,
+ },
+};
+
+static int __init msm_rpmh_master_stats_init(void)
+{
+ return platform_driver_register(&msm_rpmh_master_stats_driver);
+}
+
+static void __exit msm_rpmh_master_stats_exit(void)
+{
+ platform_driver_unregister(&msm_rpmh_master_stats_driver);
+}
+
+module_init(msm_rpmh_master_stats_init);
+module_exit(msm_rpmh_master_stats_exit);
+
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("MSM RPMH Master Statistics driver");
+MODULE_ALIAS("platform:msm_rpmh_master_stat_log");
diff --git a/drivers/soc/qcom/smp2p_sleepstate.c b/drivers/soc/qcom/smp2p_sleepstate.c
index 310a186..d2b8733 100644
--- a/drivers/soc/qcom/smp2p_sleepstate.c
+++ b/drivers/soc/qcom/smp2p_sleepstate.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -37,12 +37,12 @@
switch (event) {
case PM_SUSPEND_PREPARE:
gpio_set_value(slst_gpio_base_id + PROC_AWAKE_ID, 0);
+ usleep_range(10000, 10500); /* Tuned based on SMP2P latencies */
msm_ipc_router_set_ws_allowed(true);
break;
case PM_POST_SUSPEND:
gpio_set_value(slst_gpio_base_id + PROC_AWAKE_ID, 1);
- usleep_range(10000, 10500); /* Tuned based on SMP2P latencies */
msm_ipc_router_set_ws_allowed(false);
break;
}
diff --git a/drivers/soc/qcom/socinfo.c b/drivers/soc/qcom/socinfo.c
index 9af39e1..82dea32 100644
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -587,6 +587,10 @@
/* SDM450 ID */
[338] = {MSM_CPU_SDM450, "SDM450"},
+ /* SDM632 ID */
+ [349] = {MSM_CPU_SDM632, "SDM632"},
+ [350] = {MSM_CPU_SDA632, "SDA632"},
+
/* Uninitialized IDs are not known to run Linux.
* MSM_CPU_UNKNOWN is set to 0 to ensure these IDs are
* considered as unknown CPU.
@@ -1469,6 +1473,10 @@
dummy_socinfo.id = 338;
strlcpy(dummy_socinfo.build_id, "sdm450 - ",
sizeof(dummy_socinfo.build_id));
+ } else if (early_machine_is_sdm632()) {
+ dummy_socinfo.id = 349;
+ strlcpy(dummy_socinfo.build_id, "sdm632 - ",
+ sizeof(dummy_socinfo.build_id));
}
strlcat(dummy_socinfo.build_id, "Dummy socinfo",
diff --git a/drivers/soc/qcom/spcom.c b/drivers/soc/qcom/spcom.c
index 9ff0c73..0b037d4 100644
--- a/drivers/soc/qcom/spcom.c
+++ b/drivers/soc/qcom/spcom.c
@@ -1044,7 +1044,7 @@
mutex_lock(&ch->lock); /* re-lock after waiting */
/* Check Rx Abort on SP reset */
if (ch->rx_abort) {
- pr_err("rx aborted.\n");
+ pr_err("rx aborted, ch [%s].\n", ch->name);
goto exit_error;
}
@@ -1091,13 +1091,14 @@
if (!ch->is_server)
continue;
- /* The server might not be connected to a client.
- * Don't check if connected, only if open.
+ /* The ch REMOTE_DISCONNECT notification happens before
+ * the LINK_DOWN notification,
+ * so the channel is already closed.
*/
- if (!spcom_is_channel_open(ch) || (ch->rx_abort))
+ if (ch->rx_abort)
continue;
- pr_debug("rx-abort server ch [%s].\n", ch->name);
+ pr_err("rx-abort server ch [%s].\n", ch->name);
ch->rx_abort = true;
complete_all(&ch->rx_done);
}
@@ -2820,7 +2821,7 @@
{
int ret;
- pr_info("spcom driver version 1.2 23-Aug-2017.\n");
+ pr_info("spcom driver version 1.3 28-Dec-2017.\n");
ret = platform_driver_register(&spcom_driver);
if (ret)
diff --git a/drivers/soc/qcom/subsys-pil-tz.c b/drivers/soc/qcom/subsys-pil-tz.c
index 4b686e6..92b6423 100644
--- a/drivers/soc/qcom/subsys-pil-tz.c
+++ b/drivers/soc/qcom/subsys-pil-tz.c
@@ -42,7 +42,6 @@
#define ERR_READY 0
#define PBL_DONE 1
-#define QDSP6SS_NMI_STATUS 0x44
#define desc_to_data(d) container_of(d, struct pil_tz_data, desc)
#define subsys_to_data(d) container_of(d, struct pil_tz_data, subsys_desc)
@@ -117,7 +116,6 @@
void __iomem *irq_mask;
void __iomem *err_status;
void __iomem *err_status_spare;
- void __iomem *reg_base;
u32 bits_arr[2];
};
@@ -931,19 +929,8 @@
static irqreturn_t subsys_err_fatal_intr_handler (int irq, void *dev_id)
{
struct pil_tz_data *d = subsys_to_data(dev_id);
- u32 nmi_status = 0;
- if (d->reg_base)
- nmi_status = readl_relaxed(d->reg_base +
- QDSP6SS_NMI_STATUS);
-
- if (nmi_status & 0x04)
- pr_err("%s: Fatal error on the %s due to TZ NMI\n",
- __func__, d->subsys_desc.name);
- else
- pr_err("%s Fatal error on the %s\n",
- __func__, d->subsys_desc.name);
-
+ pr_err("Fatal error on %s!\n", d->subsys_desc.name);
if (subsys_get_crash_status(d->subsys)) {
pr_err("%s: Ignoring error fatal, restart in progress\n",
d->subsys_desc.name);
@@ -1080,13 +1067,6 @@
d->keep_proxy_regs_on = of_property_read_bool(pdev->dev.of_node,
"qcom,keep-proxy-regs-on");
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "base_reg");
- d->reg_base = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(d->reg_base)) {
- dev_err(&pdev->dev, "Failed to ioremap base register\n");
- d->reg_base = NULL;
- }
-
rc = of_property_read_string(pdev->dev.of_node, "qcom,firmware-name",
&d->desc.name);
if (rc)
diff --git a/drivers/soc/qcom/system_pm.c b/drivers/soc/qcom/system_pm.c
index 3d978f7..480a33c 100644
--- a/drivers/soc/qcom/system_pm.c
+++ b/drivers/soc/qcom/system_pm.c
@@ -18,23 +18,35 @@
#include <soc/qcom/rpmh.h>
#include <soc/qcom/system_pm.h>
-#define ARCH_TIMER_HZ (19200000UL)
+#include <clocksource/arm_arch_timer.h>
+
#define PDC_TIME_VALID_SHIFT 31
#define PDC_TIME_UPPER_MASK 0xFFFFFF
static struct rpmh_client *rpmh_client;
-static int setup_wakeup(uint64_t sleep_val)
+static int setup_wakeup(uint32_t lo, uint32_t hi)
{
struct tcs_cmd cmd[2] = { { 0 } };
- cmd[0].data = (sleep_val >> 32) & PDC_TIME_UPPER_MASK;
+ cmd[0].data = hi & PDC_TIME_UPPER_MASK;
cmd[0].data |= 1 << PDC_TIME_VALID_SHIFT;
- cmd[1].data = sleep_val & 0xFFFFFFFF;
+ cmd[1].data = lo;
return rpmh_write_control(rpmh_client, cmd, ARRAY_SIZE(cmd));
}
+int system_sleep_update_wakeup(void)
+{
+ uint32_t lo = ~0U, hi = ~0U;
+
+ /* Read the hardware to get the most accurate value */
+ arch_timer_mem_get_cval(&lo, &hi);
+
+ return setup_wakeup(lo, hi);
+}
+EXPORT_SYMBOL(system_sleep_update_wakeup);
+
/**
* system_sleep_allowed() - Returns if its okay to enter system low power modes
*/
@@ -47,35 +59,15 @@
/**
* system_sleep_enter() - Activties done when entering system low power modes
*
- * @sleep_val: The sleep duration in us.
- *
- * Returns 0 for success or error values from writing the timer value in the
- * hardware block.
+ * Returns 0 for success or error values from writing the sleep/wake values to
+ * the hardware block.
*/
-int system_sleep_enter(uint64_t sleep_val)
+int system_sleep_enter(void)
{
- int ret;
-
if (IS_ERR_OR_NULL(rpmh_client))
return -EFAULT;
- ret = rpmh_flush(rpmh_client);
- if (ret)
- return ret;
-
- /*
- * Set up the wake up value offset from the current time.
- * Convert us to ns to allow div by 19.2 Mhz tick timer.
- */
- if (sleep_val) {
- sleep_val *= NSEC_PER_USEC;
- do_div(sleep_val, NSEC_PER_SEC/ARCH_TIMER_HZ);
- sleep_val += arch_counter_get_cntvct();
- } else {
- sleep_val = ~0ULL;
- }
-
- return setup_wakeup(sleep_val);
+ return rpmh_flush(rpmh_client);
}
EXPORT_SYMBOL(system_sleep_enter);
diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index 186e7ae..58a9308 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1006,7 +1006,7 @@
for (i = 0 ; i < mas->num_tx_eot; i++) {
timeout =
- wait_for_completion_interruptible_timeout(
+ wait_for_completion_timeout(
&mas->tx_cb,
msecs_to_jiffies(SPI_XFER_TIMEOUT_MS));
if (timeout <= 0) {
@@ -1018,7 +1018,7 @@
}
for (i = 0 ; i < mas->num_rx_eot; i++) {
timeout =
- wait_for_completion_interruptible_timeout(
+ wait_for_completion_timeout(
&mas->rx_cb,
msecs_to_jiffies(SPI_XFER_TIMEOUT_MS));
if (timeout <= 0) {
diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c
index 72dfb3d..6199523 100644
--- a/drivers/spmi/spmi-pmic-arb.c
+++ b/drivers/spmi/spmi-pmic-arb.c
@@ -1264,6 +1264,13 @@
goto err_put_ctrl;
}
+ pa->ppid_to_apid = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PPID,
+ sizeof(*pa->ppid_to_apid), GFP_KERNEL);
+ if (!pa->ppid_to_apid) {
+ err = -ENOMEM;
+ goto err_put_ctrl;
+ }
+
hw_ver = readl_relaxed(core + PMIC_ARB_VERSION);
if (hw_ver < PMIC_ARB_VERSION_V2_MIN) {
@@ -1299,15 +1306,6 @@
err = PTR_ERR(pa->wr_base);
goto err_put_ctrl;
}
-
- pa->ppid_to_apid = devm_kcalloc(&ctrl->dev,
- PMIC_ARB_MAX_PPID,
- sizeof(*pa->ppid_to_apid),
- GFP_KERNEL);
- if (!pa->ppid_to_apid) {
- err = -ENOMEM;
- goto err_put_ctrl;
- }
}
dev_info(&ctrl->dev, "PMIC arbiter version %s (0x%x)\n",
diff --git a/drivers/thermal/qcom/qti_virtual_sensor.c b/drivers/thermal/qcom/qti_virtual_sensor.c
index 8cb7dc3..9b4fae8 100644
--- a/drivers/thermal/qcom/qti_virtual_sensor.c
+++ b/drivers/thermal/qcom/qti_virtual_sensor.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -64,6 +64,21 @@
"cpu1-gold-usr"},
.logic = VIRT_MAXIMUM,
},
+ {
+ .virt_zone_name = "deca-cpu-max-step",
+ .num_sensors = 10,
+ .sensor_names = {"apc0-cpu0-usr",
+ "apc0-cpu1-usr",
+ "apc0-cpu2-usr",
+ "apc0-cpu3-usr",
+ "apc0-l2-usr",
+ "apc1-cpu0-usr",
+ "apc1-cpu1-usr",
+ "apc1-cpu2-usr",
+ "apc1-cpu3-usr",
+ "apc1-l2-usr"},
+ .logic = VIRT_MAXIMUM,
+ },
};
int qti_virtual_sensor_register(struct device *dev)
diff --git a/drivers/tty/serial/msm_geni_serial.c b/drivers/tty/serial/msm_geni_serial.c
index 0ce23c3..62e01bd 100644
--- a/drivers/tty/serial/msm_geni_serial.c
+++ b/drivers/tty/serial/msm_geni_serial.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, The Linux foundation. All rights reserved.
+ * Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1727,7 +1727,8 @@
static int get_clk_cfg(unsigned long clk_freq, unsigned long *ser_clk)
{
unsigned long root_freq[] = {7372800, 14745600, 19200000, 29491200,
- 32000000, 48000000, 64000000, 80000000, 96000000, 100000000};
+ 32000000, 48000000, 64000000, 80000000, 96000000, 100000000,
+ 102400000, 112000000, 120000000, 128000000};
int i;
int match = -1;
diff --git a/drivers/usb/dwc3/dwc3-msm.c b/drivers/usb/dwc3/dwc3-msm.c
index de7fefc..6727ced 100644
--- a/drivers/usb/dwc3/dwc3-msm.c
+++ b/drivers/usb/dwc3/dwc3-msm.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -121,7 +121,7 @@
#define GSI_DBL_ADDR_L(n) ((QSCRATCH_REG_OFFSET + 0x110) + (n*4))
#define GSI_DBL_ADDR_H(n) ((QSCRATCH_REG_OFFSET + 0x120) + (n*4))
#define GSI_RING_BASE_ADDR_L(n) ((QSCRATCH_REG_OFFSET + 0x130) + (n*4))
-#define GSI_RING_BASE_ADDR_H(n) ((QSCRATCH_REG_OFFSET + 0x140) + (n*4))
+#define GSI_RING_BASE_ADDR_H(n) ((QSCRATCH_REG_OFFSET + 0x144) + (n*4))
#define GSI_IF_STS (QSCRATCH_REG_OFFSET + 0x1A4)
#define GSI_WR_CTRL_STATE_MASK BIT(15)
@@ -933,9 +933,10 @@
* for GSI channel creation.
*
* @usb_ep - pointer to usb_ep instance.
-* @dbl_addr - Doorbell address obtained from IPA driver
+* @request - USB GSI request to get Doorbell address obtained from IPA driver
*/
-static void gsi_store_ringbase_dbl_info(struct usb_ep *ep, u32 dbl_addr)
+static void gsi_store_ringbase_dbl_info(struct usb_ep *ep,
+ struct usb_gsi_request *request)
{
struct dwc3_ep *dep = to_dwc3_ep(ep);
struct dwc3 *dwc = dep->dwc;
@@ -944,11 +945,27 @@
dwc3_msm_write_reg(mdwc->base, GSI_RING_BASE_ADDR_L(n),
dwc3_trb_dma_offset(dep, &dep->trb_pool[0]));
- dwc3_msm_write_reg(mdwc->base, GSI_DBL_ADDR_L(n), dbl_addr);
- dev_dbg(mdwc->dev, "Ring Base Addr %d = %x", n,
+ if (request->mapped_db_reg_phs_addr_lsb)
+ dma_unmap_resource(dwc->sysdev,
+ request->mapped_db_reg_phs_addr_lsb,
+ PAGE_SIZE, DMA_BIDIRECTIONAL, 0);
+
+ request->mapped_db_reg_phs_addr_lsb = dma_map_resource(dwc->sysdev,
+ (phys_addr_t)request->db_reg_phs_addr_lsb, PAGE_SIZE,
+ DMA_BIDIRECTIONAL, 0);
+ if (dma_mapping_error(dwc->sysdev, request->mapped_db_reg_phs_addr_lsb))
+ dev_err(mdwc->dev, "mapping error for db_reg_phs_addr_lsb\n");
+
+ dev_dbg(mdwc->dev, "ep:%s dbl_addr_lsb:%x mapped_dbl_addr_lsb:%llx\n",
+ ep->name, request->db_reg_phs_addr_lsb,
+ (unsigned long long)request->mapped_db_reg_phs_addr_lsb);
+
+ dwc3_msm_write_reg(mdwc->base, GSI_DBL_ADDR_L(n),
+ (u32)request->mapped_db_reg_phs_addr_lsb);
+ dev_dbg(mdwc->dev, "Ring Base Addr %d: %x (LSB)\n", n,
dwc3_msm_read_reg(mdwc->base, GSI_RING_BASE_ADDR_L(n)));
- dev_dbg(mdwc->dev, "GSI DB Addr %d = %x", n,
+ dev_dbg(mdwc->dev, "GSI DB Addr %d: %x (LSB)\n", n,
dwc3_msm_read_reg(mdwc->base, GSI_DBL_ADDR_L(n)));
}
@@ -964,9 +981,6 @@
void __iomem *gsi_dbl_address_lsb;
void __iomem *gsi_dbl_address_msb;
dma_addr_t offset;
- u64 dbl_addr = *((u64 *)request->buf_base_addr);
- u32 dbl_lo_addr = (dbl_addr & 0xFFFFFFFF);
- u32 dbl_hi_addr = (dbl_addr >> 32);
struct dwc3_ep *dep = to_dwc3_ep(ep);
struct dwc3 *dwc = dep->dwc;
struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);
@@ -974,18 +988,19 @@
: (request->num_bufs + 2);
gsi_dbl_address_lsb = devm_ioremap_nocache(mdwc->dev,
- dbl_lo_addr, sizeof(u32));
+ request->db_reg_phs_addr_lsb, sizeof(u32));
if (!gsi_dbl_address_lsb)
dev_dbg(mdwc->dev, "Failed to get GSI DBL address LSB\n");
gsi_dbl_address_msb = devm_ioremap_nocache(mdwc->dev,
- dbl_hi_addr, sizeof(u32));
+ request->db_reg_phs_addr_msb, sizeof(u32));
if (!gsi_dbl_address_msb)
dev_dbg(mdwc->dev, "Failed to get GSI DBL address MSB\n");
offset = dwc3_trb_dma_offset(dep, &dep->trb_pool[num_trbs-1]);
dev_dbg(mdwc->dev, "Writing link TRB addr: %pa to %p (%x) for ep:%s\n",
- &offset, gsi_dbl_address_lsb, dbl_lo_addr, ep->name);
+ &offset, gsi_dbl_address_lsb, request->db_reg_phs_addr_lsb,
+ ep->name);
writel_relaxed(offset, gsi_dbl_address_lsb);
writel_relaxed(0, gsi_dbl_address_msb);
@@ -1381,7 +1396,8 @@
break;
case GSI_EP_OP_STORE_DBL_INFO:
dev_dbg(mdwc->dev, "EP_OP_STORE_DBL_INFO\n");
- gsi_store_ringbase_dbl_info(ep, *((u32 *)op_data));
+ request = (struct usb_gsi_request *)op_data;
+ gsi_store_ringbase_dbl_info(ep, request);
break;
case GSI_EP_OP_ENABLE_GSI:
dev_dbg(mdwc->dev, "EP_OP_ENABLE_GSI\n");
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 0ffe351..1541952 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -413,7 +413,7 @@
dwc3_trace(trace_dwc3_gadget, "Command Timed Out");
dev_err(dwc->dev, "%s command timeout for %s\n",
dwc3_gadget_ep_cmd_string(cmd), dep->name);
- if (!(cmd & DWC3_DEPCMD_ENDTRANSFER)) {
+ if (cmd != DWC3_DEPCMD_ENDTRANSFER) {
dwc->ep_cmd_timeout_cnt++;
dwc3_notify_event(dwc,
DWC3_CONTROLLER_RESTART_USB_SESSION);
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index ceacf3d..598a67d 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -10,5 +10,3 @@
libcomposite-y += composite.o functions.o configfs.o u_f.o
obj-$(CONFIG_USB_GADGET) += udc/ function/ legacy/
-
-obj-$(CONFIG_USB_CI13XXX_MSM) += ci13xxx_msm.o
diff --git a/drivers/usb/gadget/ci13xxx_msm.c b/drivers/usb/gadget/ci13xxx_msm.c
deleted file mode 100644
index 78b7d3a..0000000
--- a/drivers/usb/gadget/ci13xxx_msm.c
+++ /dev/null
@@ -1,556 +0,0 @@
-/* Copyright (c) 2010-2017, The Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/pm_runtime.h>
-#include <linux/usb/msm_hsusb_hw.h>
-#include <linux/usb/ulpi.h>
-#include <linux/gpio.h>
-#include <linux/pinctrl/consumer.h>
-
-#include "ci13xxx_udc.c"
-
-#define MSM_USB_BASE (udc->regs)
-
-#define CI13XXX_MSM_MAX_LOG2_ITC 7
-
-struct ci13xxx_udc_context {
- int irq;
- void __iomem *regs;
- int wake_gpio;
- int wake_irq;
- bool wake_irq_state;
- struct pinctrl *ci13xxx_pinctrl;
- struct timer_list irq_enable_timer;
- bool irq_disabled;
-};
-
-static struct ci13xxx_udc_context _udc_ctxt;
-#define IRQ_ENABLE_DELAY (jiffies + msecs_to_jiffies(1000))
-
-static irqreturn_t msm_udc_irq(int irq, void *data)
-{
- return udc_irq();
-}
-
-static void ci13xxx_msm_suspend(void)
-{
- struct device *dev = _udc->gadget.dev.parent;
-
- dev_dbg(dev, "ci13xxx_msm_suspend\n");
-
- if (_udc_ctxt.wake_irq && !_udc_ctxt.wake_irq_state) {
- enable_irq_wake(_udc_ctxt.wake_irq);
- enable_irq(_udc_ctxt.wake_irq);
- _udc_ctxt.wake_irq_state = true;
- }
-}
-
-static void ci13xxx_msm_resume(void)
-{
- struct device *dev = _udc->gadget.dev.parent;
-
- dev_dbg(dev, "ci13xxx_msm_resume\n");
-
- if (_udc_ctxt.wake_irq && _udc_ctxt.wake_irq_state) {
- disable_irq_wake(_udc_ctxt.wake_irq);
- disable_irq_nosync(_udc_ctxt.wake_irq);
- _udc_ctxt.wake_irq_state = false;
- }
-}
-
-static void ci13xxx_msm_disconnect(void)
-{
- struct ci13xxx *udc = _udc;
- struct usb_phy *phy = udc->transceiver;
-
- if (phy && (phy->flags & ENABLE_DP_MANUAL_PULLUP)) {
- u32 temp;
-
- usb_phy_io_write(phy,
- ULPI_MISC_A_VBUSVLDEXT |
- ULPI_MISC_A_VBUSVLDEXTSEL,
- ULPI_CLR(ULPI_MISC_A));
-
- /* Notify LINK of VBUS LOW */
- temp = readl_relaxed(USB_USBCMD);
- temp &= ~USBCMD_SESS_VLD_CTRL;
- writel_relaxed(temp, USB_USBCMD);
-
- /*
- * Add memory barrier as it is must to complete
- * above USB PHY and Link register writes before
- * moving ahead with USB peripheral mode enumeration,
- * otherwise USB peripheral mode may not work.
- */
- mb();
- }
-}
-
-/* Link power management will reduce power consumption by
- * short time HW suspend/resume.
- */
-static void ci13xxx_msm_set_l1(struct ci13xxx *udc)
-{
- int temp;
- struct device *dev = udc->gadget.dev.parent;
-
- dev_dbg(dev, "Enable link power management\n");
-
- /* Enable remote wakeup and L1 for IN EPs */
- writel_relaxed(0xffff0000, USB_L1_EP_CTRL);
-
- temp = readl_relaxed(USB_L1_CONFIG);
- temp |= L1_CONFIG_LPM_EN | L1_CONFIG_REMOTE_WAKEUP |
- L1_CONFIG_GATE_SYS_CLK | L1_CONFIG_PHY_LPM |
- L1_CONFIG_PLL;
- writel_relaxed(temp, USB_L1_CONFIG);
-}
-
-static void ci13xxx_msm_connect(void)
-{
- struct ci13xxx *udc = _udc;
- struct usb_phy *phy = udc->transceiver;
-
- if (phy && (phy->flags & ENABLE_DP_MANUAL_PULLUP)) {
- int temp;
-
- usb_phy_io_write(phy,
- ULPI_MISC_A_VBUSVLDEXT |
- ULPI_MISC_A_VBUSVLDEXTSEL,
- ULPI_SET(ULPI_MISC_A));
-
- temp = readl_relaxed(USB_GENCONFIG_2);
- temp |= GENCONFIG_2_SESS_VLD_CTRL_EN;
- writel_relaxed(temp, USB_GENCONFIG_2);
-
- temp = readl_relaxed(USB_USBCMD);
- temp |= USBCMD_SESS_VLD_CTRL;
- writel_relaxed(temp, USB_USBCMD);
-
- /*
- * Add memory barrier as it is must to complete
- * above USB PHY and Link register writes before
- * moving ahead with USB peripheral mode enumeration,
- * otherwise USB peripheral mode may not work.
- */
- mb();
- }
-}
-
-static void ci13xxx_msm_reset(void)
-{
- struct ci13xxx *udc = _udc;
- struct usb_phy *phy = udc->transceiver;
- struct device *dev = udc->gadget.dev.parent;
- int temp;
-
- writel_relaxed(0, USB_AHBBURST);
- writel_relaxed(0x08, USB_AHBMODE);
-
- /* workaround for rx buffer collision issue */
- temp = readl_relaxed(USB_GENCONFIG);
- temp &= ~GENCONFIG_TXFIFO_IDLE_FORCE_DISABLE;
- temp &= ~GENCONFIG_ULPI_SERIAL_EN;
- writel_relaxed(temp, USB_GENCONFIG);
-
- if (udc->gadget.l1_supported)
- ci13xxx_msm_set_l1(udc);
-
- if (phy && (phy->flags & ENABLE_SECONDARY_PHY)) {
- int temp;
-
- dev_dbg(dev, "using secondary hsphy\n");
- temp = readl_relaxed(USB_PHY_CTRL2);
- temp |= (1<<16);
- writel_relaxed(temp, USB_PHY_CTRL2);
-
- /*
- * Add memory barrier to make sure above LINK writes are
- * complete before moving ahead with USB peripheral mode
- * enumeration.
- */
- mb();
- }
-}
-
-static void ci13xxx_msm_mark_err_event(void)
-{
- struct ci13xxx *udc = _udc;
- struct msm_otg *otg;
-
- if (udc == NULL)
- return;
-
- if (udc->transceiver == NULL)
- return;
-
- otg = container_of(udc->transceiver, struct msm_otg, phy);
-
- /* This will trigger hardware reset before next connection */
- otg->err_event_seen = true;
-}
-
-static void ci13xxx_msm_notify_event(struct ci13xxx *udc, unsigned int event)
-{
- struct device *dev = udc->gadget.dev.parent;
-
- switch (event) {
- case CI13XXX_CONTROLLER_RESET_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_RESET_EVENT received\n");
- ci13xxx_msm_reset();
- break;
- case CI13XXX_CONTROLLER_DISCONNECT_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_DISCONNECT_EVENT received\n");
- ci13xxx_msm_disconnect();
- ci13xxx_msm_resume();
- break;
- case CI13XXX_CONTROLLER_CONNECT_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_CONNECT_EVENT received\n");
- ci13xxx_msm_connect();
- break;
- case CI13XXX_CONTROLLER_SUSPEND_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_SUSPEND_EVENT received\n");
- ci13xxx_msm_suspend();
- break;
- case CI13XXX_CONTROLLER_RESUME_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_RESUME_EVENT received\n");
- ci13xxx_msm_resume();
- break;
- case CI13XXX_CONTROLLER_ERROR_EVENT:
- dev_info(dev, "CI13XXX_CONTROLLER_ERROR_EVENT received\n");
- ci13xxx_msm_mark_err_event();
- break;
- case CI13XXX_CONTROLLER_UDC_STARTED_EVENT:
- dev_info(dev,
- "CI13XXX_CONTROLLER_UDC_STARTED_EVENT received\n");
- break;
- default:
- dev_dbg(dev, "unknown ci13xxx_udc event\n");
- break;
- }
-}
-
-static bool ci13xxx_msm_in_lpm(struct ci13xxx *udc)
-{
- struct msm_otg *otg;
-
- if (udc == NULL)
- return false;
-
- if (udc->transceiver == NULL)
- return false;
-
- otg = container_of(udc->transceiver, struct msm_otg, phy);
-
- return (atomic_read(&otg->in_lpm) != 0);
-}
-
-
-static irqreturn_t ci13xxx_msm_resume_irq(int irq, void *data)
-{
- struct ci13xxx *udc = _udc;
-
- if (udc->transceiver && udc->vbus_active && udc->suspended)
- usb_phy_set_suspend(udc->transceiver, 0);
- else if (!udc->suspended)
- ci13xxx_msm_resume();
-
- return IRQ_HANDLED;
-}
-
-static struct ci13xxx_udc_driver ci13xxx_msm_udc_driver = {
- .name = "ci13xxx_msm",
- .flags = CI13XXX_REGS_SHARED |
- CI13XXX_REQUIRE_TRANSCEIVER |
- CI13XXX_PULLUP_ON_VBUS |
- CI13XXX_ZERO_ITC |
- CI13XXX_DISABLE_STREAMING,
- .nz_itc = 0,
- .notify_event = ci13xxx_msm_notify_event,
- .in_lpm = ci13xxx_msm_in_lpm,
-};
-
-static int ci13xxx_msm_install_wake_gpio(struct platform_device *pdev,
- struct resource *res)
-{
- int wake_irq;
- int ret;
- struct pinctrl_state *set_state;
-
- dev_dbg(&pdev->dev, "ci13xxx_msm_install_wake_gpio\n");
-
- _udc_ctxt.wake_gpio = res->start;
- if (_udc_ctxt.ci13xxx_pinctrl) {
- set_state = pinctrl_lookup_state(_udc_ctxt.ci13xxx_pinctrl,
- "ci13xxx_active");
- if (IS_ERR(set_state)) {
- pr_err("cannot get ci13xxx pinctrl active state\n");
- return PTR_ERR(set_state);
- }
- pinctrl_select_state(_udc_ctxt.ci13xxx_pinctrl, set_state);
- }
- gpio_request(_udc_ctxt.wake_gpio, "USB_RESUME");
- gpio_direction_input(_udc_ctxt.wake_gpio);
- wake_irq = gpio_to_irq(_udc_ctxt.wake_gpio);
- if (wake_irq < 0) {
- dev_err(&pdev->dev, "could not register USB_RESUME GPIO.\n");
- return -ENXIO;
- }
-
- dev_dbg(&pdev->dev, "_udc_ctxt.gpio_irq = %d and irq = %d\n",
- _udc_ctxt.wake_gpio, wake_irq);
- ret = request_irq(wake_irq, ci13xxx_msm_resume_irq,
- IRQF_TRIGGER_RISING | IRQF_ONESHOT, "usb resume", NULL);
- if (ret < 0) {
- dev_err(&pdev->dev, "could not register USB_RESUME IRQ.\n");
- goto gpio_free;
- }
- disable_irq(wake_irq);
- _udc_ctxt.wake_irq = wake_irq;
-
- return 0;
-
-gpio_free:
- gpio_free(_udc_ctxt.wake_gpio);
- if (_udc_ctxt.ci13xxx_pinctrl) {
- set_state = pinctrl_lookup_state(_udc_ctxt.ci13xxx_pinctrl,
- "ci13xxx_sleep");
- if (IS_ERR(set_state))
- pr_err("cannot get ci13xxx pinctrl sleep state\n");
- else
- pinctrl_select_state(_udc_ctxt.ci13xxx_pinctrl,
- set_state);
- }
- _udc_ctxt.wake_gpio = 0;
- return ret;
-}
-
-static void ci13xxx_msm_uninstall_wake_gpio(struct platform_device *pdev)
-{
- struct pinctrl_state *set_state;
-
- dev_dbg(&pdev->dev, "ci13xxx_msm_uninstall_wake_gpio\n");
-
- if (_udc_ctxt.wake_gpio) {
- gpio_free(_udc_ctxt.wake_gpio);
- if (_udc_ctxt.ci13xxx_pinctrl) {
- set_state =
- pinctrl_lookup_state(_udc_ctxt.ci13xxx_pinctrl,
- "ci13xxx_sleep");
- if (IS_ERR(set_state))
- pr_err("cannot get ci13xxx pinctrl sleep state\n");
- else
- pinctrl_select_state(_udc_ctxt.ci13xxx_pinctrl,
- set_state);
- }
- _udc_ctxt.wake_gpio = 0;
- }
-}
-
-static void enable_usb_irq_timer_func(unsigned long data);
-static int ci13xxx_msm_probe(struct platform_device *pdev)
-{
- struct resource *res;
- int ret;
- struct ci13xxx_platform_data *pdata = pdev->dev.platform_data;
- bool is_l1_supported = false;
-
- dev_dbg(&pdev->dev, "ci13xxx_msm_probe\n");
-
- if (pdata) {
- /* Acceptable values for nz_itc are: 0,1,2,4,8,16,32,64 */
- if (pdata->log2_itc > CI13XXX_MSM_MAX_LOG2_ITC ||
- pdata->log2_itc <= 0)
- ci13xxx_msm_udc_driver.nz_itc = 0;
- else
- ci13xxx_msm_udc_driver.nz_itc =
- 1 << (pdata->log2_itc-1);
-
- is_l1_supported = pdata->l1_supported;
- /* Set ahb2ahb bypass flag if it is requested. */
- if (pdata->enable_ahb2ahb_bypass)
- ci13xxx_msm_udc_driver.flags |=
- CI13XXX_ENABLE_AHB2AHB_BYPASS;
-
- /* Clear disable streaming flag if is requested. */
- if (pdata->enable_streaming)
- ci13xxx_msm_udc_driver.flags &=
- ~CI13XXX_DISABLE_STREAMING;
- }
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!res) {
- dev_err(&pdev->dev, "failed to get platform resource mem\n");
- return -ENXIO;
- }
-
- _udc_ctxt.regs = ioremap(res->start, resource_size(res));
- if (!_udc_ctxt.regs) {
- dev_err(&pdev->dev, "ioremap failed\n");
- return -ENOMEM;
- }
-
- ret = udc_probe(&ci13xxx_msm_udc_driver, &pdev->dev, _udc_ctxt.regs);
- if (ret < 0) {
- dev_err(&pdev->dev, "udc_probe failed\n");
- goto iounmap;
- }
-
- _udc->gadget.l1_supported = is_l1_supported;
-
- _udc_ctxt.irq = platform_get_irq(pdev, 0);
- if (_udc_ctxt.irq < 0) {
- dev_err(&pdev->dev, "IRQ not found\n");
- ret = -ENXIO;
- goto udc_remove;
- }
-
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "USB_RESUME");
- /* Get pinctrl if target uses pinctrl */
- _udc_ctxt.ci13xxx_pinctrl = devm_pinctrl_get(&pdev->dev);
- if (IS_ERR(_udc_ctxt.ci13xxx_pinctrl)) {
- if (of_property_read_bool(pdev->dev.of_node, "pinctrl-names")) {
- dev_err(&pdev->dev, "Error encountered while getting pinctrl");
- ret = PTR_ERR(_udc_ctxt.ci13xxx_pinctrl);
- goto udc_remove;
- }
- dev_dbg(&pdev->dev, "Target does not use pinctrl\n");
- _udc_ctxt.ci13xxx_pinctrl = NULL;
- }
- if (res) {
- ret = ci13xxx_msm_install_wake_gpio(pdev, res);
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio irq install failed\n");
- goto udc_remove;
- }
- }
-
- ret = request_irq(_udc_ctxt.irq, msm_udc_irq, IRQF_SHARED, pdev->name,
- pdev);
- if (ret < 0) {
- dev_err(&pdev->dev, "request_irq failed\n");
- goto gpio_uninstall;
- }
-
- setup_timer(&_udc_ctxt.irq_enable_timer, enable_usb_irq_timer_func,
- (unsigned long)NULL);
-
- pm_runtime_no_callbacks(&pdev->dev);
- pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
-
- return 0;
-
-gpio_uninstall:
- ci13xxx_msm_uninstall_wake_gpio(pdev);
-udc_remove:
- udc_remove();
-iounmap:
- iounmap(_udc_ctxt.regs);
-
- return ret;
-}
-
-int ci13xxx_msm_remove(struct platform_device *pdev)
-{
- pm_runtime_disable(&pdev->dev);
- free_irq(_udc_ctxt.irq, pdev);
- ci13xxx_msm_uninstall_wake_gpio(pdev);
- udc_remove();
- iounmap(_udc_ctxt.regs);
- return 0;
-}
-
-void ci13xxx_msm_shutdown(struct platform_device *pdev)
-{
- ci13xxx_pullup(&_udc->gadget, 0);
-}
-
-void msm_hw_soft_reset(void)
-{
- struct ci13xxx *udc = _udc;
-
- hw_device_reset(udc);
-}
-
-void msm_hw_bam_disable(bool bam_disable)
-{
- u32 val;
- struct ci13xxx *udc = _udc;
-
- if (bam_disable)
- val = readl_relaxed(USB_GENCONFIG) | GENCONFIG_BAM_DISABLE;
- else
- val = readl_relaxed(USB_GENCONFIG) & ~GENCONFIG_BAM_DISABLE;
-
- writel_relaxed(val, USB_GENCONFIG);
-}
-
-void msm_usb_irq_disable(bool disable)
-{
- struct ci13xxx *udc = _udc;
- unsigned long flags;
-
- spin_lock_irqsave(udc->lock, flags);
-
- if (_udc_ctxt.irq_disabled == disable) {
- pr_debug("Interrupt state already disable = %d\n", disable);
- if (disable)
- mod_timer(&_udc_ctxt.irq_enable_timer,
- IRQ_ENABLE_DELAY);
- spin_unlock_irqrestore(udc->lock, flags);
- return;
- }
-
- if (disable) {
- disable_irq_nosync(_udc_ctxt.irq);
- /* start timer here */
- pr_debug("%s: Disabling interrupts\n", __func__);
- mod_timer(&_udc_ctxt.irq_enable_timer, IRQ_ENABLE_DELAY);
- _udc_ctxt.irq_disabled = true;
-
- } else {
- pr_debug("%s: Enabling interrupts\n", __func__);
- del_timer(&_udc_ctxt.irq_enable_timer);
- enable_irq(_udc_ctxt.irq);
- _udc_ctxt.irq_disabled = false;
- }
-
- spin_unlock_irqrestore(udc->lock, flags);
-}
-
-static void enable_usb_irq_timer_func(unsigned long data)
-{
- pr_debug("enabling interrupt from timer\n");
- msm_usb_irq_disable(false);
-}
-
-static struct platform_driver ci13xxx_msm_driver = {
- .probe = ci13xxx_msm_probe,
- .driver = {
- .name = "msm_hsusb",
- },
- .remove = ci13xxx_msm_remove,
- .shutdown = ci13xxx_msm_shutdown,
-};
-MODULE_ALIAS("platform:msm_hsusb");
-
-static int __init ci13xxx_msm_init(void)
-{
- return platform_driver_register(&ci13xxx_msm_driver);
-}
-module_init(ci13xxx_msm_init);
-
-static void __exit ci13xxx_msm_exit(void)
-{
- platform_driver_unregister(&ci13xxx_msm_driver);
-}
-module_exit(ci13xxx_msm_exit);
-
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/usb/gadget/ci13xxx_udc.c b/drivers/usb/gadget/ci13xxx_udc.c
deleted file mode 100644
index 28aaa1f..0000000
--- a/drivers/usb/gadget/ci13xxx_udc.c
+++ /dev/null
@@ -1,3983 +0,0 @@
-/*
- * ci13xxx_udc.c - MIPS USB IP core family device controller
- *
- * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
- *
- * Author: David Lopo
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-/*
- * Description: MIPS USB IP core family device controller
- * Currently it only supports IP part number CI13412
- *
- * This driver is composed of several blocks:
- * - HW: hardware interface
- * - DBG: debug facilities (optional)
- * - UTIL: utilities
- * - ISR: interrupts handling
- * - ENDPT: endpoint operations (Gadget API)
- * - GADGET: gadget operations (Gadget API)
- * - BUS: bus glue code, bus abstraction layer
- *
- * Compile Options
- * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
- * - STALL_IN: non-empty bulk-in pipes cannot be halted
- * if defined mass storage compliance succeeds but with warnings
- * => case 4: Hi > Dn
- * => case 5: Hi > Di
- * => case 8: Hi <> Do
- * if undefined usbtest 13 fails
- * - TRACE: enable function tracing (depends on DEBUG)
- *
- * Main Features
- * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
- * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
- * - Normal & LPM support
- *
- * USBTEST Report
- * - OK: 0-12, 13 (STALL_IN defined) & 14
- * - Not Supported: 15 & 16 (ISO)
- *
- * TODO List
- * - OTG
- * - Isochronous & Interrupt Traffic
- * - Handle requests which spawns into several TDs
- * - GET_STATUS(device) - always reports 0
- * - Gadget API (majority of optional features)
- */
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/dmapool.h>
-#include <linux/dma-mapping.h>
-#include <linux/init.h>
-#include <linux/ratelimit.h>
-#include <linux/interrupt.h>
-#include <linux/io.h>
-#include <linux/irq.h>
-#include <linux/clk.h>
-#include <linux/kernel.h>
-#include <linux/slab.h>
-#include <linux/module.h>
-#include <linux/pm_runtime.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/otg.h>
-#include <linux/usb/msm_hsusb.h>
-
-#include "ci13xxx_udc.h"
-
-/******************************************************************************
- * DEFINE
- *****************************************************************************/
-
-#define USB_MAX_TIMEOUT 25 /* 25msec timeout */
-#define EP_PRIME_CHECK_DELAY (jiffies + msecs_to_jiffies(1000))
-#define MAX_PRIME_CHECK_RETRY 3 /*Wait for 3sec for EP prime failure */
-#define EXTRA_ALLOCATION_SIZE 256
-
-/* ctrl register bank access */
-static DEFINE_SPINLOCK(udc_lock);
-
-/* control endpoint description */
-static const struct usb_endpoint_descriptor
-ctrl_endpt_out_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
-
- .bEndpointAddress = USB_DIR_OUT,
- .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
- .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
-};
-
-static const struct usb_endpoint_descriptor
-ctrl_endpt_in_desc = {
- .bLength = USB_DT_ENDPOINT_SIZE,
- .bDescriptorType = USB_DT_ENDPOINT,
-
- .bEndpointAddress = USB_DIR_IN,
- .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
- .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
-};
-
-/* UDC descriptor */
-static struct ci13xxx *_udc;
-
-/* Interrupt statistics */
-#define ISR_MASK 0x1F
-static struct {
- u32 test;
- u32 ui;
- u32 uei;
- u32 pci;
- u32 uri;
- u32 sli;
- u32 none;
- struct {
- u32 cnt;
- u32 buf[ISR_MASK+1];
- u32 idx;
- } hndl;
-} isr_statistics;
-
-/**
- * ffs_nr: find first (least significant) bit set
- * @x: the word to search
- *
- * This function returns bit number (instead of position)
- */
-static int ffs_nr(u32 x)
-{
- int n = ffs(x);
-
- return n ? n-1 : 32;
-}
-
-/******************************************************************************
- * HW block
- *****************************************************************************/
-/* register bank descriptor */
-static struct {
- unsigned int lpm; /* is LPM? */
- void __iomem *abs; /* bus map offset */
- void __iomem *cap; /* bus map offset + CAP offset + CAP data */
- size_t size; /* bank size */
-} hw_bank;
-
-/* MSM specific */
-#define ABS_AHBBURST (0x0090UL)
-#define ABS_AHBMODE (0x0098UL)
-/* UDC register map */
-#define ABS_CAPLENGTH (0x100UL)
-#define ABS_HCCPARAMS (0x108UL)
-#define ABS_DCCPARAMS (0x124UL)
-#define ABS_TESTMODE (hw_bank.lpm ? 0x0FCUL : 0x138UL)
-/* offset to CAPLENTGH (addr + data) */
-#define CAP_USBCMD (0x000UL)
-#define CAP_USBSTS (0x004UL)
-#define CAP_USBINTR (0x008UL)
-#define CAP_DEVICEADDR (0x014UL)
-#define CAP_ENDPTLISTADDR (0x018UL)
-#define CAP_PORTSC (0x044UL)
-#define CAP_DEVLC (0x084UL)
-#define CAP_ENDPTPIPEID (0x0BCUL)
-#define CAP_USBMODE (hw_bank.lpm ? 0x0C8UL : 0x068UL)
-#define CAP_ENDPTSETUPSTAT (hw_bank.lpm ? 0x0D8UL : 0x06CUL)
-#define CAP_ENDPTPRIME (hw_bank.lpm ? 0x0DCUL : 0x070UL)
-#define CAP_ENDPTFLUSH (hw_bank.lpm ? 0x0E0UL : 0x074UL)
-#define CAP_ENDPTSTAT (hw_bank.lpm ? 0x0E4UL : 0x078UL)
-#define CAP_ENDPTCOMPLETE (hw_bank.lpm ? 0x0E8UL : 0x07CUL)
-#define CAP_ENDPTCTRL (hw_bank.lpm ? 0x0ECUL : 0x080UL)
-#define CAP_LAST (hw_bank.lpm ? 0x12CUL : 0x0C0UL)
-
-#define REMOTE_WAKEUP_DELAY msecs_to_jiffies(200)
-
-/* maximum number of enpoints: valid only after hw_device_reset() */
-static unsigned int hw_ep_max;
-static void dbg_usb_op_fail(u8 addr, const char *name,
- const struct ci13xxx_ep *mep);
-/**
- * hw_ep_bit: calculates the bit number
- * @num: endpoint number
- * @dir: endpoint direction
- *
- * This function returns bit number
- */
-static inline int hw_ep_bit(int num, int dir)
-{
- return num + (dir ? 16 : 0);
-}
-
-static int ep_to_bit(int n)
-{
- int fill = 16 - hw_ep_max / 2;
-
- if (n >= hw_ep_max / 2)
- n += fill;
-
- return n;
-}
-
-/**
- * hw_aread: reads from register bitfield
- * @addr: address relative to bus map
- * @mask: bitfield mask
- *
- * This function returns register bitfield data
- */
-static u32 hw_aread(u32 addr, u32 mask)
-{
- return ioread32(addr + hw_bank.abs) & mask;
-}
-
-/**
- * hw_awrite: writes to register bitfield
- * @addr: address relative to bus map
- * @mask: bitfield mask
- * @data: new data
- */
-static void hw_awrite(u32 addr, u32 mask, u32 data)
-{
- iowrite32(hw_aread(addr, ~mask) | (data & mask),
- addr + hw_bank.abs);
-}
-
-/**
- * hw_cread: reads from register bitfield
- * @addr: address relative to CAP offset plus content
- * @mask: bitfield mask
- *
- * This function returns register bitfield data
- */
-static u32 hw_cread(u32 addr, u32 mask)
-{
- return ioread32(addr + hw_bank.cap) & mask;
-}
-
-/**
- * hw_cwrite: writes to register bitfield
- * @addr: address relative to CAP offset plus content
- * @mask: bitfield mask
- * @data: new data
- */
-static void hw_cwrite(u32 addr, u32 mask, u32 data)
-{
- iowrite32(hw_cread(addr, ~mask) | (data & mask),
- addr + hw_bank.cap);
-}
-
-/**
- * hw_ctest_and_clear: tests & clears register bitfield
- * @addr: address relative to CAP offset plus content
- * @mask: bitfield mask
- *
- * This function returns register bitfield data
- */
-static u32 hw_ctest_and_clear(u32 addr, u32 mask)
-{
- u32 reg = hw_cread(addr, mask);
-
- iowrite32(reg, addr + hw_bank.cap);
- return reg;
-}
-
-/**
- * hw_ctest_and_write: tests & writes register bitfield
- * @addr: address relative to CAP offset plus content
- * @mask: bitfield mask
- * @data: new data
- *
- * This function returns register bitfield data
- */
-static u32 hw_ctest_and_write(u32 addr, u32 mask, u32 data)
-{
- u32 reg = hw_cread(addr, ~0);
-
- iowrite32((reg & ~mask) | (data & mask), addr + hw_bank.cap);
- return (reg & mask) >> ffs_nr(mask);
-}
-
-static int hw_device_init(void __iomem *base)
-{
- u32 reg;
-
- /* bank is a module variable */
- hw_bank.abs = base;
-
- hw_bank.cap = hw_bank.abs;
- hw_bank.cap += ABS_CAPLENGTH;
- hw_bank.cap += ioread8(hw_bank.cap);
-
- reg = hw_aread(ABS_HCCPARAMS, HCCPARAMS_LEN) >> ffs_nr(HCCPARAMS_LEN);
- hw_bank.lpm = reg;
- hw_bank.size = hw_bank.cap - hw_bank.abs;
- hw_bank.size += CAP_LAST;
- hw_bank.size /= sizeof(u32);
-
- reg = hw_aread(ABS_DCCPARAMS, DCCPARAMS_DEN) >> ffs_nr(DCCPARAMS_DEN);
- hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
-
- if (hw_ep_max == 0 || hw_ep_max > ENDPT_MAX)
- return -ENODEV;
-
- /* setup lock mode ? */
-
- /* ENDPTSETUPSTAT is '0' by default */
-
- /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
-
- return 0;
-}
-/**
- * hw_device_reset: resets chip (execute without interruption)
- * @base: register base address
- *
- * This function returns an error code
- */
-static int hw_device_reset(struct ci13xxx *udc)
-{
- int delay_count = 25; /* 250 usec */
-
- /* should flush & stop before reset */
- hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0);
- hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
-
- hw_cwrite(CAP_USBCMD, USBCMD_RST, USBCMD_RST);
- while (delay_count-- && hw_cread(CAP_USBCMD, USBCMD_RST))
- udelay(10);
- if (delay_count < 0)
- pr_err("USB controller reset failed\n");
-
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_RESET_EVENT);
-
- /* USBMODE should be configured step by step */
- hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
- hw_cwrite(CAP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
- hw_cwrite(CAP_USBMODE, USBMODE_SLOM, USBMODE_SLOM); /* HW >= 2.3 */
-
- /*
- * ITC (Interrupt Threshold Control) field is to set the maximum
- * rate at which the device controller will issue interrupts.
- * The maximum interrupt interval measured in micro frames.
- * Valid values are 0, 1, 2, 4, 8, 16, 32, 64. The default value is
- * 8 micro frames. If CPU can handle interrupts at faster rate, ITC
- * can be set to lesser value to gain performance.
- */
- if (udc->udc_driver->nz_itc)
- hw_cwrite(CAP_USBCMD, USBCMD_ITC_MASK,
- USBCMD_ITC(udc->udc_driver->nz_itc));
- else if (udc->udc_driver->flags & CI13XXX_ZERO_ITC)
- hw_cwrite(CAP_USBCMD, USBCMD_ITC_MASK, USBCMD_ITC(0));
-
- if (hw_cread(CAP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
- pr_err("cannot enter in device mode");
- pr_err("lpm = %i", hw_bank.lpm);
- return -ENODEV;
- }
-
- return 0;
-}
-
-/**
- * hw_device_state: enables/disables interrupts & starts/stops device (execute
- * without interruption)
- * @dma: 0 => disable, !0 => enable and set dma engine
- *
- * This function returns an error code
- */
-static int hw_device_state(u32 dma)
-{
- struct ci13xxx *udc = _udc;
-
- if (dma) {
- if (!(udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)) {
- hw_cwrite(CAP_USBMODE, USBMODE_SDIS, 0);
- pr_debug("%s(): streaming mode is enabled. USBMODE:%x\n",
- __func__, hw_cread(CAP_USBMODE, ~0));
-
- } else {
- hw_cwrite(CAP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
- pr_debug("%s(): streaming mode is disabled. USBMODE:%x\n",
- __func__, hw_cread(CAP_USBMODE, ~0));
- }
-
- hw_cwrite(CAP_ENDPTLISTADDR, ~0, dma);
-
-
- /* Set BIT(31) to enable AHB2AHB Bypass functionality */
- if (udc->udc_driver->flags & CI13XXX_ENABLE_AHB2AHB_BYPASS) {
- hw_awrite(ABS_AHBMODE, AHB2AHB_BYPASS, AHB2AHB_BYPASS);
- pr_debug("%s(): ByPass Mode is enabled. AHBMODE:%x\n",
- __func__, hw_aread(ABS_AHBMODE, ~0));
- }
-
- /* interrupt, error, port change, reset, sleep/suspend */
- hw_cwrite(CAP_USBINTR, ~0,
- USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
- hw_cwrite(CAP_USBCMD, USBCMD_RS, USBCMD_RS);
- } else {
- hw_cwrite(CAP_USBCMD, USBCMD_RS, 0);
- hw_cwrite(CAP_USBINTR, ~0, 0);
- /* Clear BIT(31) to disable AHB2AHB Bypass functionality */
- if (udc->udc_driver->flags & CI13XXX_ENABLE_AHB2AHB_BYPASS) {
- hw_awrite(ABS_AHBMODE, AHB2AHB_BYPASS, 0);
- pr_debug("%s(): ByPass Mode is disabled. AHBMODE:%x\n",
- __func__, hw_aread(ABS_AHBMODE, ~0));
- }
- }
- return 0;
-}
-
-static void debug_ept_flush_info(int ep_num, int dir)
-{
- struct ci13xxx *udc = _udc;
- struct ci13xxx_ep *mep;
-
- if (dir)
- mep = &udc->ci13xxx_ep[ep_num + hw_ep_max/2];
- else
- mep = &udc->ci13xxx_ep[ep_num];
-
- pr_err_ratelimited("USB Registers\n");
- pr_err_ratelimited("USBCMD:%x\n", hw_cread(CAP_USBCMD, ~0));
- pr_err_ratelimited("USBSTS:%x\n", hw_cread(CAP_USBSTS, ~0));
- pr_err_ratelimited("ENDPTLISTADDR:%x\n",
- hw_cread(CAP_ENDPTLISTADDR, ~0));
- pr_err_ratelimited("PORTSC:%x\n", hw_cread(CAP_PORTSC, ~0));
- pr_err_ratelimited("USBMODE:%x\n", hw_cread(CAP_USBMODE, ~0));
- pr_err_ratelimited("ENDPTSTAT:%x\n", hw_cread(CAP_ENDPTSTAT, ~0));
-
- dbg_usb_op_fail(0xFF, "FLUSHF", mep);
-}
-/**
- * hw_ep_flush: flush endpoint fifo (execute without interruption)
- * @num: endpoint number
- * @dir: endpoint direction
- *
- * This function returns an error code
- */
-static int hw_ep_flush(int num, int dir)
-{
- ktime_t start, diff;
- int n = hw_ep_bit(num, dir);
- struct ci13xxx_ep *mEp = &_udc->ci13xxx_ep[n];
-
- /* Flush ep0 even when queue is empty */
- if (_udc->skip_flush || (num && list_empty(&mEp->qh.queue)))
- return 0;
-
- start = ktime_get();
- do {
- /* flush any pending transfer */
- hw_cwrite(CAP_ENDPTFLUSH, BIT(n), BIT(n));
- while (hw_cread(CAP_ENDPTFLUSH, BIT(n))) {
- cpu_relax();
- diff = ktime_sub(ktime_get(), start);
- if (ktime_to_ms(diff) > USB_MAX_TIMEOUT) {
- printk_ratelimited(KERN_ERR
- "%s: Failed to flush ep#%d %s\n",
- __func__, num,
- dir ? "IN" : "OUT");
- debug_ept_flush_info(num, dir);
- _udc->skip_flush = true;
- /* Notify to trigger h/w reset recovery later */
- if (_udc->udc_driver->notify_event)
- _udc->udc_driver->notify_event(_udc,
- CI13XXX_CONTROLLER_ERROR_EVENT);
- return 0;
- }
- }
- } while (hw_cread(CAP_ENDPTSTAT, BIT(n)));
-
- return 0;
-}
-
-/**
- * hw_ep_disable: disables endpoint (execute without interruption)
- * @num: endpoint number
- * @dir: endpoint direction
- *
- * This function returns an error code
- */
-static int hw_ep_disable(int num, int dir)
-{
- hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32),
- dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
- return 0;
-}
-
-/**
- * hw_ep_enable: enables endpoint (execute without interruption)
- * @num: endpoint number
- * @dir: endpoint direction
- * @type: endpoint type
- *
- * This function returns an error code
- */
-static int hw_ep_enable(int num, int dir, int type)
-{
- u32 mask, data;
-
- if (dir) {
- mask = ENDPTCTRL_TXT; /* type */
- data = type << ffs_nr(mask);
-
- mask |= ENDPTCTRL_TXS; /* unstall */
- mask |= ENDPTCTRL_TXR; /* reset data toggle */
- data |= ENDPTCTRL_TXR;
- mask |= ENDPTCTRL_TXE; /* enable */
- data |= ENDPTCTRL_TXE;
- } else {
- mask = ENDPTCTRL_RXT; /* type */
- data = type << ffs_nr(mask);
-
- mask |= ENDPTCTRL_RXS; /* unstall */
- mask |= ENDPTCTRL_RXR; /* reset data toggle */
- data |= ENDPTCTRL_RXR;
- mask |= ENDPTCTRL_RXE; /* enable */
- data |= ENDPTCTRL_RXE;
- }
- hw_cwrite(CAP_ENDPTCTRL + num * sizeof(u32), mask, data);
-
- /* make sure endpoint is enabled before returning */
- mb();
-
- return 0;
-}
-
-/**
- * hw_ep_get_halt: return endpoint halt status
- * @num: endpoint number
- * @dir: endpoint direction
- *
- * This function returns 1 if endpoint halted
- */
-static int hw_ep_get_halt(int num, int dir)
-{
- u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
-
- return hw_cread(CAP_ENDPTCTRL + num * sizeof(u32), mask) ? 1 : 0;
-}
-
-/**
- * hw_test_and_clear_setup_status: test & clear setup status (execute without
- * interruption)
- * @n: endpoint number
- *
- * This function returns setup status
- */
-static int hw_test_and_clear_setup_status(int n)
-{
- n = ep_to_bit(n);
- return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
-}
-
-/**
- * hw_ep_prime: primes endpoint (execute without interruption)
- * @num: endpoint number
- * @dir: endpoint direction
- * @is_ctrl: true if control endpoint
- *
- * This function returns an error code
- */
-static int hw_ep_prime(int num, int dir, int is_ctrl)
-{
- int n = hw_ep_bit(num, dir);
-
- if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
- return -EAGAIN;
-
- hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
-
- if (is_ctrl && dir == RX && hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
- return -EAGAIN;
-
- /* status shoult be tested according with manual but it doesn't work */
- return 0;
-}
-
-/**
- * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
- * without interruption)
- * @num: endpoint number
- * @dir: endpoint direction
- * @value: true => stall, false => unstall
- *
- * This function returns an error code
- */
-static int hw_ep_set_halt(int num, int dir, int value)
-{
- u32 addr, mask_xs, mask_xr;
-
- if (value != 0 && value != 1)
- return -EINVAL;
-
- do {
- if (hw_cread(CAP_ENDPTSETUPSTAT, BIT(num)))
- return 0;
-
- addr = CAP_ENDPTCTRL + num * sizeof(u32);
- mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
- mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
-
- /* data toggle - reserved for EP0 but it's in ESS */
- hw_cwrite(addr, mask_xs|mask_xr, value ? mask_xs : mask_xr);
-
- } while (value != hw_ep_get_halt(num, dir));
-
- return 0;
-}
-
-/**
- * hw_intr_clear: disables interrupt & clears interrupt status (execute without
- * interruption)
- * @n: interrupt bit
- *
- * This function returns an error code
- */
-static int hw_intr_clear(int n)
-{
- if (n >= REG_BITS)
- return -EINVAL;
-
- hw_cwrite(CAP_USBINTR, BIT(n), 0);
- hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
- return 0;
-}
-
-/**
- * hw_intr_force: enables interrupt & forces interrupt status (execute without
- * interruption)
- * @n: interrupt bit
- *
- * This function returns an error code
- */
-static int hw_intr_force(int n)
-{
- if (n >= REG_BITS)
- return -EINVAL;
-
- hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
- hw_cwrite(CAP_USBINTR, BIT(n), BIT(n));
- hw_cwrite(CAP_USBSTS, BIT(n), BIT(n));
- hw_awrite(ABS_TESTMODE, TESTMODE_FORCE, 0);
- return 0;
-}
-
-/**
- * hw_is_port_high_speed: test if port is high speed
- *
- * This function returns true if high speed port
- */
-static int hw_port_is_high_speed(void)
-{
- return hw_bank.lpm ? hw_cread(CAP_DEVLC, DEVLC_PSPD) :
- hw_cread(CAP_PORTSC, PORTSC_HSP);
-}
-
-/**
- * hw_port_test_get: reads port test mode value
- *
- * This function returns port test mode value
- */
-static u8 hw_port_test_get(void)
-{
- return hw_cread(CAP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
-}
-
-/**
- * hw_port_test_set: writes port test mode (execute without interruption)
- * @mode: new value
- *
- * This function returns an error code
- */
-static int hw_port_test_set(u8 mode)
-{
- const u8 TEST_MODE_MAX = 7;
-
- if (mode > TEST_MODE_MAX)
- return -EINVAL;
-
- hw_cwrite(CAP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
- return 0;
-}
-
-/**
- * hw_read_intr_enable: returns interrupt enable register
- *
- * This function returns register data
- */
-static u32 hw_read_intr_enable(void)
-{
- return hw_cread(CAP_USBINTR, ~0);
-}
-
-/**
- * hw_read_intr_status: returns interrupt status register
- *
- * This function returns register data
- */
-static u32 hw_read_intr_status(void)
-{
- return hw_cread(CAP_USBSTS, ~0);
-}
-
-/**
- * hw_register_read: reads all device registers (execute without interruption)
- * @buf: destination buffer
- * @size: buffer size
- *
- * This function returns number of registers read
- */
-static size_t hw_register_read(u32 *buf, size_t size)
-{
- unsigned int i;
-
- if (size > hw_bank.size)
- size = hw_bank.size;
-
- for (i = 0; i < size; i++)
- buf[i] = hw_aread(i * sizeof(u32), ~0);
-
- return size;
-}
-
-/**
- * hw_register_write: writes to register
- * @addr: register address
- * @data: register value
- *
- * This function returns an error code
- */
-static int hw_register_write(u16 addr, u32 data)
-{
- /* align */
- addr /= sizeof(u32);
-
- if (addr >= hw_bank.size)
- return -EINVAL;
-
- /* align */
- addr *= sizeof(u32);
-
- hw_awrite(addr, ~0, data);
- return 0;
-}
-
-/**
- * hw_test_and_clear_complete: test & clear complete status (execute without
- * interruption)
- * @n: endpoint number
- *
- * This function returns complete status
- */
-static int hw_test_and_clear_complete(int n)
-{
- n = ep_to_bit(n);
- return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
-}
-
-/**
- * hw_test_and_clear_intr_active: test & clear active interrupts (execute
- * without interruption)
- *
- * This function returns active interrutps
- */
-static u32 hw_test_and_clear_intr_active(void)
-{
- u32 reg = hw_read_intr_status() & hw_read_intr_enable();
-
- hw_cwrite(CAP_USBSTS, ~0, reg);
- return reg;
-}
-
-/**
- * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
- * interruption)
- *
- * This function returns guard value
- */
-static int hw_test_and_clear_setup_guard(void)
-{
- return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, 0);
-}
-
-/**
- * hw_test_and_set_setup_guard: test & set setup guard (execute without
- * interruption)
- *
- * This function returns guard value
- */
-static int hw_test_and_set_setup_guard(void)
-{
- return hw_ctest_and_write(CAP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
-}
-
-/**
- * hw_usb_set_address: configures USB address (execute without interruption)
- * @value: new USB address
- *
- * This function returns an error code
- */
-static int hw_usb_set_address(u8 value)
-{
- /* advance */
- hw_cwrite(CAP_DEVICEADDR, DEVICEADDR_USBADR | DEVICEADDR_USBADRA,
- value << ffs_nr(DEVICEADDR_USBADR) | DEVICEADDR_USBADRA);
- return 0;
-}
-
-/**
- * hw_usb_reset: restart device after a bus reset (execute without
- * interruption)
- *
- * This function returns an error code
- */
-static int hw_usb_reset(void)
-{
- int delay_count = 10; /* 100 usec delay */
-
- hw_usb_set_address(0);
-
- /* ESS flushes only at end?!? */
- hw_cwrite(CAP_ENDPTFLUSH, ~0, ~0); /* flush all EPs */
-
- /* clear complete status */
- hw_cwrite(CAP_ENDPTCOMPLETE, 0, 0); /* writes its content */
-
- /* wait until all bits cleared */
- while (delay_count-- && hw_cread(CAP_ENDPTPRIME, ~0))
- udelay(10);
- if (delay_count < 0)
- pr_err("ENDPTPRIME is not cleared during bus reset\n");
-
- /* reset all endpoints ? */
-
- /*
- * reset internal status and wait for further instructions
- * no need to verify the port reset status (ESS does it)
- */
-
- return 0;
-}
-
-/******************************************************************************
- * DBG block
- *****************************************************************************/
-/**
- * show_device: prints information about device capabilities and status
- *
- * Check "device.h" for details
- */
-static ssize_t show_device(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- struct usb_gadget *gadget = &udc->gadget;
- int n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
- gadget->speed);
- n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
- gadget->max_speed);
- /* TODO: Scheduled for removal in 3.8. */
- n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
- gadget_is_dualspeed(gadget));
- n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
- gadget->is_otg);
- n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
- gadget->is_a_peripheral);
- n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
- gadget->b_hnp_enable);
- n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
- gadget->a_hnp_support);
- n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
- gadget->a_alt_hnp_support);
- n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
- (gadget->name ? gadget->name : ""));
-
- return n;
-}
-static DEVICE_ATTR(device, 0400, show_device, NULL);
-
-/**
- * show_driver: prints information about attached gadget (if any)
- *
- * Check "device.h" for details
- */
-static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- struct usb_gadget_driver *driver = udc->driver;
- int n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- if (driver == NULL)
- return scnprintf(buf, PAGE_SIZE,
- "There is no gadget attached!\n");
-
- n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
- (driver->function ? driver->function : ""));
- n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
- driver->max_speed);
-
- return n;
-}
-static DEVICE_ATTR(driver, 0400, show_driver, NULL);
-
-/* Maximum event message length */
-#define DBG_DATA_MSG 64UL
-
-/* Maximum event messages */
-#define DBG_DATA_MAX 128UL
-
-/* Event buffer descriptor */
-static struct {
- char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
- unsigned int idx; /* index */
- unsigned int tty; /* print to console? */
- rwlock_t lck; /* lock */
-} dbg_data = {
- .idx = 0,
- .tty = 0,
- .lck = __RW_LOCK_UNLOCKED(lck)
-};
-
-/**
- * dbg_dec: decrements debug event index
- * @idx: buffer index
- */
-static void dbg_dec(unsigned int *idx)
-{
- *idx = (*idx - 1) & (DBG_DATA_MAX-1);
-}
-
-/**
- * dbg_inc: increments debug event index
- * @idx: buffer index
- */
-static void dbg_inc(unsigned int *idx)
-{
- *idx = (*idx + 1) & (DBG_DATA_MAX-1);
-}
-
-
-static unsigned int ep_addr_txdbg_mask;
-module_param(ep_addr_txdbg_mask, uint, 0644);
-static unsigned int ep_addr_rxdbg_mask;
-module_param(ep_addr_rxdbg_mask, uint, 0644);
-
-static int allow_dbg_print(u8 addr)
-{
- int dir, num;
-
- /* allow bus wide events */
- if (addr == 0xff)
- return 1;
-
- dir = addr & USB_ENDPOINT_DIR_MASK ? TX : RX;
- num = addr & ~USB_ENDPOINT_DIR_MASK;
- num = 1 << num;
-
- if ((dir == TX) && (num & ep_addr_txdbg_mask))
- return 1;
- if ((dir == RX) && (num & ep_addr_rxdbg_mask))
- return 1;
-
- return 0;
-}
-
-#define TIME_BUF_LEN 20
-/*get_timestamp - returns time of day in us */
-static char *get_timestamp(char *tbuf)
-{
- unsigned long long t;
- unsigned long nanosec_rem;
-
- t = cpu_clock(smp_processor_id());
- nanosec_rem = do_div(t, 1000000000)/1000;
- scnprintf(tbuf, TIME_BUF_LEN, "[%5lu.%06lu] ", (unsigned long)t,
- nanosec_rem);
- return tbuf;
-}
-
-/**
- * dbg_print: prints the common part of the event
- * @addr: endpoint address
- * @name: event name
- * @status: status
- * @extra: extra information
- */
-static void dbg_print(u8 addr, const char *name, int status, const char *extra)
-{
- unsigned long flags;
- char tbuf[TIME_BUF_LEN];
-
- if (!allow_dbg_print(addr))
- return;
-
- write_lock_irqsave(&dbg_data.lck, flags);
-
- scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
- "%s\t? %02X %-7.7s %4i ?\t%s\n",
- get_timestamp(tbuf), addr, name, status, extra);
-
- dbg_inc(&dbg_data.idx);
-
- write_unlock_irqrestore(&dbg_data.lck, flags);
-
- if (dbg_data.tty != 0)
- pr_notice("%s\t? %02X %-7.7s %4i ?\t%s\n",
- get_timestamp(tbuf), addr, name, status, extra);
-}
-
-/**
- * dbg_done: prints a DONE event
- * @addr: endpoint address
- * @td: transfer descriptor
- * @status: status
- */
-static void dbg_done(u8 addr, const u32 token, int status)
-{
- char msg[DBG_DATA_MSG];
-
- scnprintf(msg, sizeof(msg), "%d %02X",
- (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
- (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
- dbg_print(addr, "DONE", status, msg);
-}
-
-/**
- * dbg_event: prints a generic event
- * @addr: endpoint address
- * @name: event name
- * @status: status
- */
-static void dbg_event(u8 addr, const char *name, int status)
-{
- if (name != NULL)
- dbg_print(addr, name, status, "");
-}
-
-/*
- * dbg_queue: prints a QUEUE event
- * @addr: endpoint address
- * @req: USB request
- * @status: status
- */
-static void dbg_queue(u8 addr, const struct usb_request *req, int status)
-{
- char msg[DBG_DATA_MSG];
-
- if (req != NULL) {
- scnprintf(msg, sizeof(msg),
- "%d %d", !req->no_interrupt, req->length);
- dbg_print(addr, "QUEUE", status, msg);
- }
-}
-
-/**
- * dbg_setup: prints a SETUP event
- * @addr: endpoint address
- * @req: setup request
- */
-static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
-{
- char msg[DBG_DATA_MSG];
-
- if (req != NULL) {
- scnprintf(msg, sizeof(msg),
- "%02X %02X %04X %04X %d", req->bRequestType,
- req->bRequest, le16_to_cpu(req->wValue),
- le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
- dbg_print(addr, "SETUP", 0, msg);
- }
-}
-
-/**
- * dbg_usb_op_fail: prints USB Operation FAIL event
- * @addr: endpoint address
- * @mEp: endpoint structure
- */
-static void dbg_usb_op_fail(u8 addr, const char *name,
- const struct ci13xxx_ep *mep)
-{
- char msg[DBG_DATA_MSG];
- struct ci13xxx_req *req;
- struct list_head *ptr = NULL;
-
- if (mep != NULL) {
- scnprintf(msg, sizeof(msg),
- "%s Fail EP%d%s QH:%08X",
- name, mep->num,
- mep->dir ? "IN" : "OUT", mep->qh.ptr->cap);
- dbg_print(addr, name, 0, msg);
- scnprintf(msg, sizeof(msg),
- "cap:%08X %08X %08X\n",
- mep->qh.ptr->curr, mep->qh.ptr->td.next,
- mep->qh.ptr->td.token);
- dbg_print(addr, "QHEAD", 0, msg);
-
- list_for_each(ptr, &mep->qh.queue) {
- req = list_entry(ptr, struct ci13xxx_req, queue);
- scnprintf(msg, sizeof(msg),
- "%pKa:%08X:%08X\n",
- &req->dma, req->ptr->next,
- req->ptr->token);
- dbg_print(addr, "REQ", 0, msg);
- scnprintf(msg, sizeof(msg), "%08X:%d\n",
- req->ptr->page[0],
- req->req.status);
- dbg_print(addr, "REQPAGE", 0, msg);
- }
- }
-}
-
-/**
- * show_events: displays the event buffer
- *
- * Check "device.h" for details
- */
-static ssize_t show_events(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- unsigned long flags;
- unsigned int i, j, n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- read_lock_irqsave(&dbg_data.lck, flags);
-
- i = dbg_data.idx;
- for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
- n += strlen(dbg_data.buf[i]);
- if (n >= PAGE_SIZE) {
- n -= strlen(dbg_data.buf[i]);
- break;
- }
- }
- for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
- j += scnprintf(buf + j, PAGE_SIZE - j,
- "%s", dbg_data.buf[i]);
-
- read_unlock_irqrestore(&dbg_data.lck, flags);
-
- return n;
-}
-
-/**
- * store_events: configure if events are going to be also printed to console
- *
- * Check "device.h" for details
- */
-static ssize_t store_events(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- unsigned int tty;
-
- dbg_trace("[%s] %pK, %d\n", __func__, buf, count);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- goto done;
- }
-
- if (kstrtouint(buf, 10, &tty) || tty > 1) {
- dev_err(dev, "<1|0>: enable|disable console log\n");
- goto done;
- }
-
- dbg_data.tty = tty;
- dev_info(dev, "tty = %u", dbg_data.tty);
-
- done:
- return count;
-}
-static DEVICE_ATTR(events, 0600, show_events, store_events);
-
-/**
- * show_inters: interrupt status, enable status and historic
- *
- * Check "device.h" for details
- */
-static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- u32 intr;
- unsigned int i, j, n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- spin_lock_irqsave(udc->lock, flags);
-
- n += scnprintf(buf + n, PAGE_SIZE - n,
- "status = %08x\n", hw_read_intr_status());
- n += scnprintf(buf + n, PAGE_SIZE - n,
- "enable = %08x\n", hw_read_intr_enable());
-
- n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
- isr_statistics.test);
- n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
- isr_statistics.ui);
- n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
- isr_statistics.uei);
- n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
- isr_statistics.pci);
- n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
- isr_statistics.uri);
- n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
- isr_statistics.sli);
- n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
- isr_statistics.none);
- n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
- isr_statistics.hndl.cnt);
-
- for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
- i &= ISR_MASK;
- intr = isr_statistics.hndl.buf[i];
-
- if (USBi_UI & intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
- intr &= ~USBi_UI;
- if (USBi_UEI & intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
- intr &= ~USBi_UEI;
- if (USBi_PCI & intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
- intr &= ~USBi_PCI;
- if (USBi_URI & intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
- intr &= ~USBi_URI;
- if (USBi_SLI & intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
- intr &= ~USBi_SLI;
- if (intr)
- n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
- if (isr_statistics.hndl.buf[i])
- n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
- }
-
- spin_unlock_irqrestore(udc->lock, flags);
-
- return n;
-}
-
-/**
- * store_inters: enable & force or disable an individual interrutps
- * (to be used for test purposes only)
- *
- * Check "device.h" for details
- */
-static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- unsigned int en, bit;
-
- dbg_trace("[%s] %pK, %d\n", __func__, buf, count);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- goto done;
- }
-
- if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
- dev_err(dev, "<1|0> <bit>: enable|disable interrupt");
- goto done;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- if (en) {
- if (hw_intr_force(bit))
- dev_err(dev, "invalid bit number\n");
- else
- isr_statistics.test++;
- } else {
- if (hw_intr_clear(bit))
- dev_err(dev, "invalid bit number\n");
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- done:
- return count;
-}
-static DEVICE_ATTR(inters, 0600, show_inters, store_inters);
-
-/**
- * show_port_test: reads port test mode
- *
- * Check "device.h" for details
- */
-static ssize_t show_port_test(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- unsigned int mode;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- mode = hw_port_test_get();
- spin_unlock_irqrestore(udc->lock, flags);
-
- return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
-}
-
-/**
- * store_port_test: writes port test mode
- *
- * Check "device.h" for details
- */
-static ssize_t store_port_test(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- unsigned int mode;
-
- dbg_trace("[%s] %pK, %d\n", __func__, buf, count);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- goto done;
- }
-
- if (kstrtouint(buf, 10, &mode)) {
- dev_err(dev, "<mode>: set port test mode");
- goto done;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- if (hw_port_test_set(mode))
- dev_err(dev, "invalid mode\n");
- spin_unlock_irqrestore(udc->lock, flags);
-
- done:
- return count;
-}
-static DEVICE_ATTR(port_test, 0600, show_port_test, store_port_test);
-
-/**
- * show_qheads: DMA contents of all queue heads
- *
- * Check "device.h" for details
- */
-static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- unsigned int i, j, n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- for (i = 0; i < hw_ep_max/2; i++) {
- struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
- struct ci13xxx_ep *mEpTx = &udc->ci13xxx_ep[i + hw_ep_max/2];
-
- n += scnprintf(buf + n, PAGE_SIZE - n,
- "EP=%02i: RX=%08X TX=%08X\n",
- i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
- for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
- n += scnprintf(buf + n, PAGE_SIZE - n,
- " %04X: %08X %08X\n", j,
- *((u32 *)mEpRx->qh.ptr + j),
- *((u32 *)mEpTx->qh.ptr + j));
- }
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- return n;
-}
-static DEVICE_ATTR(qheads, 0400, show_qheads, NULL);
-
-/**
- * show_registers: dumps all registers
- *
- * Check "device.h" for details
- */
-#define DUMP_ENTRIES 512
-static ssize_t show_registers(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- u32 *dump;
- unsigned int i, k, n = 0;
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
- if (!dump)
- return 0;
-
- spin_lock_irqsave(udc->lock, flags);
- k = hw_register_read(dump, DUMP_ENTRIES);
- spin_unlock_irqrestore(udc->lock, flags);
-
- for (i = 0; i < k; i++) {
- n += scnprintf(buf + n, PAGE_SIZE - n,
- "reg[0x%04X] = 0x%08X\n",
- i * (unsigned int)sizeof(u32), dump[i]);
- }
- kfree(dump);
-
- return n;
-}
-
-/**
- * store_registers: writes value to register address
- *
- * Check "device.h" for details
- */
-static ssize_t store_registers(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long addr, data, flags;
-
- dbg_trace("[%s] %pK, %d\n", __func__, buf, count);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- goto done;
- }
-
- if (sscanf(buf, "%li %li", &addr, &data) != 2) {
- dev_err(dev, "<addr> <data>: write data to register address");
- goto done;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- if (hw_register_write(addr, data))
- dev_err(dev, "invalid address range\n");
- spin_unlock_irqrestore(udc->lock, flags);
-
- done:
- return count;
-}
-static DEVICE_ATTR(registers, 0600, show_registers, store_registers);
-
-/**
- * show_requests: DMA contents of all requests currently queued (all endpts)
- *
- * Check "device.h" for details
- */
-static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
- char *buf)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- unsigned long flags;
- struct list_head *ptr = NULL;
- struct ci13xxx_req *req = NULL;
- unsigned int i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
-
- dbg_trace("[%s] %pK\n", __func__, buf);
- if (attr == NULL || buf == NULL) {
- dev_err(dev, "[%s] EINVAL\n", __func__);
- return 0;
- }
-
- spin_lock_irqsave(udc->lock, flags);
- for (i = 0; i < hw_ep_max; i++)
- list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
- {
- req = list_entry(ptr, struct ci13xxx_req, queue);
-
- n += scnprintf(buf + n, PAGE_SIZE - n,
- "EP=%02i: TD=%08X %s\n",
- i % hw_ep_max/2, (u32)req->dma,
- ((i < hw_ep_max/2) ? "RX" : "TX"));
-
- for (j = 0; j < qSize; j++)
- n += scnprintf(buf + n, PAGE_SIZE - n,
- " %04X: %08X\n", j,
- *((u32 *)req->ptr + j));
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- return n;
-}
-static DEVICE_ATTR(requests, 0400, show_requests, NULL);
-
-/* EP# and Direction */
-static ssize_t prime_ept(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- struct ci13xxx_ep *mEp;
- unsigned int ep_num, dir;
- int n;
- struct ci13xxx_req *mReq = NULL;
-
- if (sscanf(buf, "%u %u", &ep_num, &dir) != 2) {
- dev_err(dev, "<ep_num> <dir>: prime the ep");
- goto done;
- }
-
- if (dir)
- mEp = &udc->ci13xxx_ep[ep_num + hw_ep_max/2];
- else
- mEp = &udc->ci13xxx_ep[ep_num];
-
- n = hw_ep_bit(mEp->num, mEp->dir);
- mReq = list_entry(mEp->qh.queue.next, struct ci13xxx_req, queue);
- mEp->qh.ptr->td.next = mReq->dma;
- mEp->qh.ptr->td.token &= ~TD_STATUS;
-
- /* Makes sure that above write goes through */
- wmb();
-
- hw_cwrite(CAP_ENDPTPRIME, BIT(n), BIT(n));
- while (hw_cread(CAP_ENDPTPRIME, BIT(n)))
- cpu_relax();
-
- pr_info("%s: prime:%08x stat:%08x ep#%d dir:%s\n", __func__,
- hw_cread(CAP_ENDPTPRIME, ~0),
- hw_cread(CAP_ENDPTSTAT, ~0),
- mEp->num, mEp->dir ? "IN" : "OUT");
-done:
- return count;
-
-}
-static DEVICE_ATTR(prime, 0200, NULL, prime_ept);
-
-/* EP# and Direction */
-static ssize_t print_dtds(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
- struct ci13xxx_ep *mEp;
- unsigned int ep_num, dir;
- int n;
- struct list_head *ptr = NULL;
- struct ci13xxx_req *req = NULL;
-
- if (sscanf(buf, "%u %u", &ep_num, &dir) != 2) {
- dev_err(dev, "<ep_num> <dir>: to print dtds");
- goto done;
- }
-
- if (dir)
- mEp = &udc->ci13xxx_ep[ep_num + hw_ep_max/2];
- else
- mEp = &udc->ci13xxx_ep[ep_num];
-
- n = hw_ep_bit(mEp->num, mEp->dir);
- pr_info("%s: prime:%08x stat:%08x ep#%d dir:%s dTD_update_fail_count: %lu mEp->dTD_update_fail_count: %lu mEp->dTD_active_re_q_count: %lu mEp->prime_fail_count: %lu\n",
- __func__,
- hw_cread(CAP_ENDPTPRIME, ~0),
- hw_cread(CAP_ENDPTSTAT, ~0),
- mEp->num, mEp->dir ? "IN" : "OUT",
- udc->dTD_update_fail_count,
- mEp->dTD_update_fail_count,
- mEp->dTD_active_re_q_count,
- mEp->prime_fail_count);
-
- pr_info("QH: cap:%08x cur:%08x next:%08x token:%08x\n",
- mEp->qh.ptr->cap, mEp->qh.ptr->curr,
- mEp->qh.ptr->td.next, mEp->qh.ptr->td.token);
-
- list_for_each(ptr, &mEp->qh.queue) {
- req = list_entry(ptr, struct ci13xxx_req, queue);
-
- pr_info("\treq:%pKa next:%08x token:%08x page0:%08x status:%d\n",
- &req->dma, req->ptr->next, req->ptr->token,
- req->ptr->page[0], req->req.status);
- }
-done:
- return count;
-
-}
-static DEVICE_ATTR(dtds, 0200, NULL, print_dtds);
-
-static int ci13xxx_wakeup(struct usb_gadget *_gadget)
-{
- struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
- unsigned long flags;
- int ret = 0;
-
- trace();
-
- spin_lock_irqsave(udc->lock, flags);
- if (!udc->gadget.remote_wakeup) {
- ret = -EOPNOTSUPP;
- dbg_trace("remote wakeup feature is not enabled\n");
- goto out;
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- pm_runtime_get_sync(&_gadget->dev);
-
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_REMOTE_WAKEUP_EVENT);
-
- if (udc->transceiver)
- usb_phy_set_suspend(udc->transceiver, 0);
-
- spin_lock_irqsave(udc->lock, flags);
- if (!hw_cread(CAP_PORTSC, PORTSC_SUSP)) {
- ret = -EINVAL;
- dbg_trace("port is not suspended\n");
- pm_runtime_put(&_gadget->dev);
- goto out;
- }
- hw_cwrite(CAP_PORTSC, PORTSC_FPR, PORTSC_FPR);
-
- pm_runtime_mark_last_busy(&_gadget->dev);
- pm_runtime_put_autosuspend(&_gadget->dev);
-out:
- spin_unlock_irqrestore(udc->lock, flags);
- return ret;
-}
-
-static void usb_do_remote_wakeup(struct work_struct *w)
-{
- struct ci13xxx *udc = _udc;
- unsigned long flags;
- bool do_wake;
-
- /*
- * This work can not be canceled from interrupt handler. Check
- * if wakeup conditions are still met.
- */
- spin_lock_irqsave(udc->lock, flags);
- do_wake = udc->suspended && udc->gadget.remote_wakeup;
- spin_unlock_irqrestore(udc->lock, flags);
-
- if (do_wake)
- ci13xxx_wakeup(&udc->gadget);
-}
-
-static ssize_t usb_remote_wakeup(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
-{
- struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
-
- ci13xxx_wakeup(&udc->gadget);
-
- return count;
-}
-static DEVICE_ATTR(wakeup, 0200, 0, usb_remote_wakeup);
-
-/**
- * dbg_create_files: initializes the attribute interface
- * @dev: device
- *
- * This function returns an error code
- */
-static int __maybe_unused dbg_create_files(struct device *dev)
-{
- int retval = 0;
-
- if (dev == NULL)
- return -EINVAL;
- retval = device_create_file(dev, &dev_attr_device);
- if (retval)
- goto done;
- retval = device_create_file(dev, &dev_attr_driver);
- if (retval)
- goto rm_device;
- retval = device_create_file(dev, &dev_attr_events);
- if (retval)
- goto rm_driver;
- retval = device_create_file(dev, &dev_attr_inters);
- if (retval)
- goto rm_events;
- retval = device_create_file(dev, &dev_attr_port_test);
- if (retval)
- goto rm_inters;
- retval = device_create_file(dev, &dev_attr_qheads);
- if (retval)
- goto rm_port_test;
- retval = device_create_file(dev, &dev_attr_registers);
- if (retval)
- goto rm_qheads;
- retval = device_create_file(dev, &dev_attr_requests);
- if (retval)
- goto rm_registers;
- retval = device_create_file(dev, &dev_attr_wakeup);
- if (retval)
- goto rm_remote_wakeup;
- retval = device_create_file(dev, &dev_attr_prime);
- if (retval)
- goto rm_prime;
- retval = device_create_file(dev, &dev_attr_dtds);
- if (retval)
- goto rm_dtds;
-
- return 0;
-
-rm_dtds:
- device_remove_file(dev, &dev_attr_dtds);
-rm_prime:
- device_remove_file(dev, &dev_attr_prime);
-rm_remote_wakeup:
- device_remove_file(dev, &dev_attr_wakeup);
- rm_registers:
- device_remove_file(dev, &dev_attr_registers);
- rm_qheads:
- device_remove_file(dev, &dev_attr_qheads);
- rm_port_test:
- device_remove_file(dev, &dev_attr_port_test);
- rm_inters:
- device_remove_file(dev, &dev_attr_inters);
- rm_events:
- device_remove_file(dev, &dev_attr_events);
- rm_driver:
- device_remove_file(dev, &dev_attr_driver);
- rm_device:
- device_remove_file(dev, &dev_attr_device);
- done:
- return retval;
-}
-
-/**
- * dbg_remove_files: destroys the attribute interface
- * @dev: device
- *
- * This function returns an error code
- */
-static int __maybe_unused dbg_remove_files(struct device *dev)
-{
- if (dev == NULL)
- return -EINVAL;
- device_remove_file(dev, &dev_attr_requests);
- device_remove_file(dev, &dev_attr_registers);
- device_remove_file(dev, &dev_attr_qheads);
- device_remove_file(dev, &dev_attr_port_test);
- device_remove_file(dev, &dev_attr_inters);
- device_remove_file(dev, &dev_attr_events);
- device_remove_file(dev, &dev_attr_driver);
- device_remove_file(dev, &dev_attr_device);
- device_remove_file(dev, &dev_attr_wakeup);
- return 0;
-}
-
-/******************************************************************************
- * UTIL block
- *****************************************************************************/
-/**
- * _usb_addr: calculates endpoint address from direction & number
- * @ep: endpoint
- */
-static inline u8 _usb_addr(struct ci13xxx_ep *ep)
-{
- return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
-}
-
-static void ep_prime_timer_func(unsigned long data)
-{
- struct ci13xxx_ep *mep = (struct ci13xxx_ep *)data;
- struct ci13xxx_req *req;
- struct list_head *ptr = NULL;
- int n = hw_ep_bit(mep->num, mep->dir);
- unsigned long flags;
-
-
- spin_lock_irqsave(mep->lock, flags);
-
- if (_udc && (!_udc->vbus_active || _udc->suspended)) {
- pr_debug("ep%d%s prime timer when vbus_active=%d,suspend=%d\n",
- mep->num, mep->dir ? "IN" : "OUT",
- _udc->vbus_active, _udc->suspended);
- goto out;
- }
-
- if (!hw_cread(CAP_ENDPTPRIME, BIT(n)))
- goto out;
-
- if (list_empty(&mep->qh.queue))
- goto out;
-
- req = list_entry(mep->qh.queue.next, struct ci13xxx_req, queue);
-
- /* clean speculative fetches on req->ptr->token */
- mb();
- if (!(TD_STATUS_ACTIVE & req->ptr->token))
- goto out;
-
- mep->prime_timer_count++;
- if (mep->prime_timer_count == MAX_PRIME_CHECK_RETRY) {
- mep->prime_timer_count = 0;
- pr_info("ep%d dir:%s QH:cap:%08x cur:%08x next:%08x tkn:%08x\n",
- mep->num, mep->dir ? "IN" : "OUT",
- mep->qh.ptr->cap, mep->qh.ptr->curr,
- mep->qh.ptr->td.next, mep->qh.ptr->td.token);
- list_for_each(ptr, &mep->qh.queue) {
- req = list_entry(ptr, struct ci13xxx_req, queue);
- pr_info("\treq:%pKa:%08xtkn:%08xpage0:%08xsts:%d\n",
- &req->dma, req->ptr->next,
- req->ptr->token, req->ptr->page[0],
- req->req.status);
- }
- dbg_usb_op_fail(0xFF, "PRIMEF", mep);
- mep->prime_fail_count++;
- } else {
- mod_timer(&mep->prime_timer, EP_PRIME_CHECK_DELAY);
- }
-
- spin_unlock_irqrestore(mep->lock, flags);
- return;
-
-out:
- mep->prime_timer_count = 0;
- spin_unlock_irqrestore(mep->lock, flags);
-
-}
-
-/**
- * _hardware_queue: configures a request at hardware level
- * @gadget: gadget
- * @mEp: endpoint
- *
- * This function returns an error code
- */
-static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
-{
- unsigned int i;
- int ret = 0;
- unsigned int length = mReq->req.length;
- struct ci13xxx *udc = _udc;
-
- trace("%pK, %pK", mEp, mReq);
-
- /* don't queue twice */
- if (mReq->req.status == -EALREADY)
- return -EALREADY;
-
- mReq->req.status = -EALREADY;
- if (length && mReq->req.dma == DMA_ERROR_CODE) {
- mReq->req.dma = dma_map_single(mEp->device, mReq->req.buf,
- length, mEp->dir ? DMA_TO_DEVICE :
- DMA_FROM_DEVICE);
- if (mReq->req.dma == 0)
- return -ENOMEM;
-
- mReq->map = 1;
- }
-
- if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
- mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
- &mReq->zdma);
- if (mReq->zptr == NULL) {
- if (mReq->map) {
- dma_unmap_single(mEp->device, mReq->req.dma,
- length, mEp->dir ? DMA_TO_DEVICE :
- DMA_FROM_DEVICE);
- mReq->req.dma = DMA_ERROR_CODE;
- mReq->map = 0;
- }
- return -ENOMEM;
- }
- memset(mReq->zptr, 0, sizeof(*mReq->zptr));
- mReq->zptr->next = TD_TERMINATE;
- mReq->zptr->token = TD_STATUS_ACTIVE;
- if (!mReq->req.no_interrupt)
- mReq->zptr->token |= TD_IOC;
- }
-
- /*
- * TD configuration
- * TODO - handle requests which spawns into several TDs
- */
- memset(mReq->ptr, 0, sizeof(*mReq->ptr));
- mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
- mReq->ptr->token &= TD_TOTAL_BYTES;
- mReq->ptr->token |= TD_STATUS_ACTIVE;
- if (mReq->zptr) {
- mReq->ptr->next = mReq->zdma;
- } else {
- mReq->ptr->next = TD_TERMINATE;
- if (!mReq->req.no_interrupt)
- mReq->ptr->token |= TD_IOC;
- }
-
- /* MSM Specific: updating the request as required for
- * SPS mode. Enable MSM DMA engine according
- * to the UDC private data in the request.
- */
- if (CI13XX_REQ_VENDOR_ID(mReq->req.udc_priv) == MSM_VENDOR_ID) {
- if (mReq->req.udc_priv & MSM_SPS_MODE) {
- mReq->ptr->token = TD_STATUS_ACTIVE;
- if (mReq->req.udc_priv & MSM_IS_FINITE_TRANSFER)
- mReq->ptr->next = TD_TERMINATE;
- else
- mReq->ptr->next = MSM_ETD_TYPE | mReq->dma;
- if (!mReq->req.no_interrupt)
- mReq->ptr->token |= MSM_ETD_IOC;
- }
- mReq->req.dma = 0;
- }
-
- mReq->ptr->page[0] = mReq->req.dma;
- for (i = 1; i < 5; i++)
- mReq->ptr->page[i] = (mReq->req.dma + i * CI13XXX_PAGE_SIZE) &
- ~TD_RESERVED_MASK;
- /* Makes sure that above write goes through */
- wmb();
-
- /* Remote Wakeup */
- if (udc->suspended) {
- if (!udc->gadget.remote_wakeup) {
- mReq->req.status = -EAGAIN;
-
- dev_dbg(mEp->device, "%s: queue failed (suspend).",
- __func__);
- dev_dbg(mEp->device, "%s: Remote wakeup is not supported. ept #%d\n",
- __func__, mEp->num);
-
- return -EAGAIN;
- }
-
- usb_phy_set_suspend(udc->transceiver, 0);
- schedule_delayed_work(&udc->rw_work, REMOTE_WAKEUP_DELAY);
- }
-
- if (!list_empty(&mEp->qh.queue)) {
- struct ci13xxx_req *mReqPrev;
- int n = hw_ep_bit(mEp->num, mEp->dir);
- int tmp_stat;
- ktime_t start, diff;
-
- mReqPrev = list_entry(mEp->qh.queue.prev,
- struct ci13xxx_req, queue);
- if (mReqPrev->zptr)
- mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
- else
- mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
- /* Makes sure that above write goes through */
- wmb();
- if (hw_cread(CAP_ENDPTPRIME, BIT(n)))
- goto done;
- start = ktime_get();
- do {
- hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
- tmp_stat = hw_cread(CAP_ENDPTSTAT, BIT(n));
- diff = ktime_sub(ktime_get(), start);
- /* poll for max. 100ms */
- if (ktime_to_ms(diff) > USB_MAX_TIMEOUT) {
- if (hw_cread(CAP_USBCMD, USBCMD_ATDTW))
- break;
- printk_ratelimited(KERN_ERR
- "%s:queue failed ep#%d %s\n",
- __func__, mEp->num, mEp->dir ? "IN" : "OUT");
- return -EAGAIN;
- }
- } while (!hw_cread(CAP_USBCMD, USBCMD_ATDTW));
- hw_cwrite(CAP_USBCMD, USBCMD_ATDTW, 0);
- if (tmp_stat)
- goto done;
- }
-
- /* Hardware may leave few TDs unprocessed, check and reprime with 1st */
- if (!list_empty(&mEp->qh.queue)) {
- struct ci13xxx_req *mReq_active, *mReq_next;
- u32 i = 0;
-
- /* Nothing to be done if hardware already finished this TD */
- if ((TD_STATUS_ACTIVE & mReq->ptr->token) == 0)
- goto done;
-
- /* Iterate forward to find first TD with ACTIVE bit set */
- mReq_active = mReq;
- list_for_each_entry(mReq_next, &mEp->qh.queue, queue) {
- i++;
- mEp->dTD_active_re_q_count++;
- if (TD_STATUS_ACTIVE & mReq_next->ptr->token) {
- mReq_active = mReq_next;
- dbg_event(_usb_addr(mEp), "ReQUE",
- mReq_next->ptr->token);
- pr_debug("!!ReQ(%u-%u-%x)-%u!!\n", mEp->num,
- mEp->dir, mReq_next->ptr->token, i);
- break;
- }
- }
-
- /* QH configuration */
- mEp->qh.ptr->td.next = mReq_active->dma;
- mEp->qh.ptr->td.token &= ~TD_STATUS;
- goto prime;
- }
-
- /* QH configuration */
- mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
-
- if (CI13XX_REQ_VENDOR_ID(mReq->req.udc_priv) == MSM_VENDOR_ID) {
- if (mReq->req.udc_priv & MSM_SPS_MODE) {
- mEp->qh.ptr->td.next |= MSM_ETD_TYPE;
- i = hw_cread(CAP_ENDPTPIPEID +
- mEp->num * sizeof(u32), ~0);
- /* Read current value of this EPs pipe id */
- i = (mEp->dir == TX) ?
- ((i >> MSM_TX_PIPE_ID_OFS) & MSM_PIPE_ID_MASK) :
- (i & MSM_PIPE_ID_MASK);
- /*
- * If requested pipe id is different from current,
- * then write it
- */
- if (i != (mReq->req.udc_priv & MSM_PIPE_ID_MASK)) {
- if (mEp->dir == TX)
- hw_cwrite(
- CAP_ENDPTPIPEID +
- mEp->num * sizeof(u32),
- MSM_PIPE_ID_MASK <<
- MSM_TX_PIPE_ID_OFS,
- (mReq->req.udc_priv &
- MSM_PIPE_ID_MASK)
- << MSM_TX_PIPE_ID_OFS);
- else
- hw_cwrite(
- CAP_ENDPTPIPEID +
- mEp->num * sizeof(u32),
- MSM_PIPE_ID_MASK,
- mReq->req.udc_priv &
- MSM_PIPE_ID_MASK);
- }
- }
- }
-
- mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
- mEp->qh.ptr->cap |= QH_ZLT;
-
-prime:
- /* Makes sure that above write goes through */
- wmb(); /* synchronize before ep prime */
-
- ret = hw_ep_prime(mEp->num, mEp->dir,
- mEp->type == USB_ENDPOINT_XFER_CONTROL);
- if (!ret)
- mod_timer(&mEp->prime_timer, EP_PRIME_CHECK_DELAY);
-
-done:
- return ret;
-}
-
-/**
- * _hardware_dequeue: handles a request at hardware level
- * @gadget: gadget
- * @mEp: endpoint
- *
- * This function returns an error code
- */
-static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
-{
- trace("%pK, %pK", mEp, mReq);
-
- if (mReq->req.status != -EALREADY)
- return -EINVAL;
-
- /* clean speculative fetches on req->ptr->token */
- mb();
-
- if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
- return -EBUSY;
-
- if (CI13XX_REQ_VENDOR_ID(mReq->req.udc_priv) == MSM_VENDOR_ID)
- if ((mReq->req.udc_priv & MSM_SPS_MODE) &&
- (mReq->req.udc_priv & MSM_IS_FINITE_TRANSFER))
- return -EBUSY;
- if (mReq->zptr) {
- if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
- return -EBUSY;
-
- /* The controller may access this dTD one more time.
- * Defer freeing this to next zero length dTD completion.
- * It is safe to assume that controller will no longer
- * access the previous dTD after next dTD completion.
- */
- if (mEp->last_zptr)
- dma_pool_free(mEp->td_pool, mEp->last_zptr,
- mEp->last_zdma);
- mEp->last_zptr = mReq->zptr;
- mEp->last_zdma = mReq->zdma;
-
- mReq->zptr = NULL;
- }
-
- mReq->req.status = 0;
-
- if (mReq->map) {
- dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
- mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
- mReq->req.dma = DMA_ERROR_CODE;
- mReq->map = 0;
- }
-
- mReq->req.status = mReq->ptr->token & TD_STATUS;
- if ((TD_STATUS_HALTED & mReq->req.status) != 0)
- mReq->req.status = -1;
- else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
- mReq->req.status = -1;
- else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
- mReq->req.status = -1;
-
- mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
- mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
- mReq->req.actual = mReq->req.length - mReq->req.actual;
- mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
-
- return mReq->req.actual;
-}
-
-/**
- * purge_rw_queue: Purge requests pending at the remote-wakeup
- * queue and send them to the HW.
- *
- * Go over all of the endpoints and push any pending requests to
- * the HW queue.
- */
-static void purge_rw_queue(struct ci13xxx *udc)
-{
- int i;
- struct ci13xxx_ep *mEp = NULL;
- struct ci13xxx_req *mReq = NULL;
-
- /*
- * Go over all of the endpoints and push any pending requests to
- * the HW queue.
- */
- for (i = 0; i < hw_ep_max; i++) {
- mEp = &udc->ci13xxx_ep[i];
-
- while (!list_empty(&udc->ci13xxx_ep[i].rw_queue)) {
- int retval;
-
- /* pop oldest request */
- mReq = list_entry(udc->ci13xxx_ep[i].rw_queue.next,
- struct ci13xxx_req, queue);
-
- list_del_init(&mReq->queue);
-
- retval = _hardware_enqueue(mEp, mReq);
-
- if (retval != 0) {
- dbg_event(_usb_addr(mEp), "QUEUE", retval);
- mReq->req.status = retval;
- if (mReq->req.complete != NULL) {
- if (mEp->type ==
- USB_ENDPOINT_XFER_CONTROL)
- mReq->req.complete(
- &(_udc->ep0in.ep),
- &mReq->req);
- else
- mReq->req.complete(
- &mEp->ep,
- &mReq->req);
- }
- retval = 0;
- }
-
- if (!retval)
- list_add_tail(&mReq->queue, &mEp->qh.queue);
- else if (mEp->multi_req)
- mEp->multi_req = false;
-
- }
- }
-
- udc->rw_pending = false;
-}
-
-/**
- * restore_original_req: Restore original req's attributes
- * @mReq: Request
- *
- * This function restores original req's attributes. Call
- * this function before completing the large req (>16K).
- */
-static void restore_original_req(struct ci13xxx_req *mReq)
-{
- mReq->req.buf = mReq->multi.buf;
- mReq->req.length = mReq->multi.len;
- if (!mReq->req.status)
- mReq->req.actual = mReq->multi.actual;
-
- mReq->multi.len = 0;
- mReq->multi.actual = 0;
- mReq->multi.buf = NULL;
-}
-
-/**
- * release_ep_request: Free and endpoint request and release
- * resources
- * @mReq: request
- * @mEp: endpoint
- *
- */
-static void release_ep_request(struct ci13xxx_ep *mEp,
- struct ci13xxx_req *mReq)
-{
- struct ci13xxx_ep *mEpTemp = mEp;
-
- unsigned int val;
-
- /* MSM Specific: Clear end point specific register */
- if (CI13XX_REQ_VENDOR_ID(mReq->req.udc_priv) == MSM_VENDOR_ID) {
- if (mReq->req.udc_priv & MSM_SPS_MODE) {
- val = hw_cread(CAP_ENDPTPIPEID +
- mEp->num * sizeof(u32),
- ~0);
-
- if (val != MSM_EP_PIPE_ID_RESET_VAL)
- hw_cwrite(
- CAP_ENDPTPIPEID +
- mEp->num * sizeof(u32),
- ~0, MSM_EP_PIPE_ID_RESET_VAL);
- }
- }
- mReq->req.status = -ESHUTDOWN;
-
- if (mReq->map) {
- dma_unmap_single(mEp->device, mReq->req.dma,
- mReq->req.length,
- mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
- mReq->req.dma = DMA_ERROR_CODE;
- mReq->map = 0;
- }
-
- if (mReq->zptr) {
- dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
- mReq->zptr = NULL;
- mReq->zdma = 0;
- }
-
- if (mEp->multi_req) {
- restore_original_req(mReq);
- mEp->multi_req = false;
- }
-
- if (mReq->req.complete != NULL) {
- spin_unlock(mEp->lock);
- if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
- mReq->req.length)
- mEpTemp = &_udc->ep0in;
- mReq->req.complete(&mEpTemp->ep, &mReq->req);
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
- mReq->req.complete = NULL;
- spin_lock(mEp->lock);
- }
-}
-
-/**
- * _ep_nuke: dequeues all endpoint requests
- * @mEp: endpoint
- *
- * This function returns an error code
- * Caller must hold lock
- */
-static int _ep_nuke(struct ci13xxx_ep *mEp)
-__releases(mEp->lock)
-__acquires(mEp->lock)
-{
- trace("%pK", mEp);
-
- if (mEp == NULL)
- return -EINVAL;
-
- del_timer(&mEp->prime_timer);
- mEp->prime_timer_count = 0;
-
- hw_ep_flush(mEp->num, mEp->dir);
-
- while (!list_empty(&mEp->qh.queue)) {
- /* pop oldest request */
- struct ci13xxx_req *mReq =
- list_entry(mEp->qh.queue.next,
- struct ci13xxx_req, queue);
- list_del_init(&mReq->queue);
-
- release_ep_request(mEp, mReq);
- }
-
- /* Clear the requests pending at the remote-wakeup queue */
- while (!list_empty(&mEp->rw_queue)) {
-
- /* pop oldest request */
- struct ci13xxx_req *mReq =
- list_entry(mEp->rw_queue.next,
- struct ci13xxx_req, queue);
-
- list_del_init(&mReq->queue);
-
- release_ep_request(mEp, mReq);
- }
-
- if (mEp->last_zptr) {
- dma_pool_free(mEp->td_pool, mEp->last_zptr, mEp->last_zdma);
- mEp->last_zptr = NULL;
- mEp->last_zdma = 0;
- }
-
- return 0;
-}
-
-/**
- * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
- * @gadget: gadget
- *
- * This function returns an error code
- */
-static int _gadget_stop_activity(struct usb_gadget *gadget)
-{
- struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
- unsigned long flags;
-
- trace("%pK", gadget);
-
- if (gadget == NULL)
- return -EINVAL;
-
- spin_lock_irqsave(udc->lock, flags);
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- udc->gadget.remote_wakeup = 0;
- udc->suspended = 0;
- udc->configured = 0;
- spin_unlock_irqrestore(udc->lock, flags);
-
- udc->driver->disconnect(gadget);
-
- spin_lock_irqsave(udc->lock, flags);
- _ep_nuke(&udc->ep0out);
- _ep_nuke(&udc->ep0in);
- spin_unlock_irqrestore(udc->lock, flags);
-
- return 0;
-}
-
-/******************************************************************************
- * ISR block
- *****************************************************************************/
-/**
- * isr_reset_handler: USB reset interrupt handler
- * @udc: UDC device
- *
- * This function resets USB engine after a bus reset occurred
- */
-static void isr_reset_handler(struct ci13xxx *udc)
-__releases(udc->lock)
-__acquires(udc->lock)
-{
- int retval;
-
- trace("%pK", udc);
-
- if (udc == NULL) {
- err("EINVAL");
- return;
- }
-
- dbg_event(0xFF, "BUS RST", 0);
-
- spin_unlock(udc->lock);
-
- if (udc->suspended) {
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_RESUME_EVENT);
- if (udc->transceiver)
- usb_phy_set_suspend(udc->transceiver, 0);
- udc->driver->resume(&udc->gadget);
- udc->suspended = 0;
- }
-
- /*stop charging upon reset */
- if (udc->transceiver)
- usb_phy_set_power(udc->transceiver, 100);
-
- retval = _gadget_stop_activity(&udc->gadget);
- if (retval)
- goto done;
-
- if (udc->rw_pending)
- purge_rw_queue(udc);
-
- _udc->skip_flush = false;
- retval = hw_usb_reset();
- if (retval)
- goto done;
-
- spin_lock(udc->lock);
-
- done:
- if (retval)
- err("error: %i", retval);
-}
-
-/**
- * isr_resume_handler: USB PCI interrupt handler
- * @udc: UDC device
- *
- */
-static void isr_resume_handler(struct ci13xxx *udc)
-{
- udc->gadget.speed = hw_port_is_high_speed() ?
- USB_SPEED_HIGH : USB_SPEED_FULL;
- if (udc->suspended) {
- spin_unlock(udc->lock);
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_RESUME_EVENT);
- if (udc->transceiver)
- usb_phy_set_suspend(udc->transceiver, 0);
- udc->suspended = 0;
- udc->driver->resume(&udc->gadget);
- spin_lock(udc->lock);
-
- if (udc->rw_pending)
- purge_rw_queue(udc);
-
- }
-}
-
-/**
- * isr_resume_handler: USB SLI interrupt handler
- * @udc: UDC device
- *
- */
-static void isr_suspend_handler(struct ci13xxx *udc)
-{
- if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
- udc->vbus_active) {
- if (udc->suspended == 0) {
- spin_unlock(udc->lock);
- udc->driver->suspend(&udc->gadget);
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_SUSPEND_EVENT);
- if (udc->transceiver)
- usb_phy_set_suspend(udc->transceiver, 1);
- spin_lock(udc->lock);
- udc->suspended = 1;
- }
- }
-}
-
-/**
- * isr_get_status_complete: get_status request complete function
- * @ep: endpoint
- * @req: request handled
- *
- * Caller must release lock
- */
-static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
-{
- trace("%pK, %pK", ep, req);
-
- if (ep == NULL || req == NULL) {
- err("EINVAL");
- return;
- }
-
- if (req->status)
- err("GET_STATUS failed");
-}
-
-/**
- * isr_get_status_response: get_status request response
- * @udc: udc struct
- * @setup: setup request packet
- *
- * This function returns an error code
- */
-static int isr_get_status_response(struct ci13xxx *udc,
- struct usb_ctrlrequest *setup)
-__releases(mEp->lock)
-__acquires(mEp->lock)
-{
- struct ci13xxx_ep *mEp = &udc->ep0in;
- struct usb_request *req = udc->status;
- int dir, num, retval;
-
- trace("%pK, %pK", mEp, setup);
-
- if (mEp == NULL || setup == NULL)
- return -EINVAL;
-
- req->complete = isr_get_status_complete;
- req->length = 2;
- req->buf = udc->status_buf;
-
- if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
- /* Assume that device is bus powered for now. */
- *((u16 *)req->buf) = _udc->gadget.remote_wakeup << 1;
- retval = 0;
- } else if ((setup->bRequestType & USB_RECIP_MASK) ==
- USB_RECIP_ENDPOINT) {
- dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
- TX : RX;
- num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
- *((u16 *)req->buf) = hw_ep_get_halt(num, dir);
- }
- /* else do nothing; reserved for future use */
-
- spin_unlock(mEp->lock);
- retval = usb_ep_queue(&mEp->ep, req, GFP_ATOMIC);
- spin_lock(mEp->lock);
- return retval;
-}
-
-/**
- * isr_setup_status_complete: setup_status request complete function
- * @ep: endpoint
- * @req: request handled
- *
- * Caller must release lock. Put the port in test mode if test mode
- * feature is selected.
- */
-static void
-isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
-{
- struct ci13xxx *udc = req->context;
- unsigned long flags;
-
- trace("%pK, %pK", ep, req);
-
- spin_lock_irqsave(udc->lock, flags);
- if (udc->test_mode)
- hw_port_test_set(udc->test_mode);
- spin_unlock_irqrestore(udc->lock, flags);
-}
-
-/**
- * isr_setup_status_phase: queues the status phase of a setup transation
- * @udc: udc struct
- *
- * This function returns an error code
- */
-static int isr_setup_status_phase(struct ci13xxx *udc)
-__releases(mEp->lock)
-__acquires(mEp->lock)
-{
- int retval;
- struct ci13xxx_ep *mEp;
-
- trace("%pK", udc);
-
- mEp = (udc->ep0_dir == TX) ? &udc->ep0out : &udc->ep0in;
- udc->status->context = udc;
- udc->status->complete = isr_setup_status_complete;
- udc->status->length = 0;
-
- spin_unlock(mEp->lock);
- retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
- spin_lock(mEp->lock);
-
- return retval;
-}
-
-/**
- * isr_tr_complete_low: transaction complete low level handler
- * @mEp: endpoint
- *
- * This function returns an error code
- * Caller must hold lock
- */
-static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
-__releases(mEp->lock)
-__acquires(mEp->lock)
-{
- struct ci13xxx_req *mReq, *mReqTemp;
- struct ci13xxx_ep *mEpTemp = mEp;
- int retval = 0;
- int req_dequeue = 1;
- struct ci13xxx *udc = _udc;
-
- trace("%pK", mEp);
-
- if (list_empty(&mEp->qh.queue))
- return 0;
-
- del_timer(&mEp->prime_timer);
- mEp->prime_timer_count = 0;
- list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
- queue) {
-dequeue:
- retval = _hardware_dequeue(mEp, mReq);
- if (retval < 0) {
- /*
- * FIXME: don't know exact delay
- * required for HW to update dTD status
- * bits. This is a temporary workaround till
- * HW designers come back on this.
- */
- if (retval == -EBUSY && req_dequeue &&
- (mEp->dir == 0 || mEp->num == 0)) {
- req_dequeue = 0;
- udc->dTD_update_fail_count++;
- mEp->dTD_update_fail_count++;
- udelay(10);
- goto dequeue;
- }
- break;
- }
- req_dequeue = 0;
-
- if (mEp->multi_req) { /* Large request in progress */
- unsigned int remain_len;
-
- mReq->multi.actual += mReq->req.actual;
- remain_len = mReq->multi.len - mReq->multi.actual;
- if (mReq->req.status || !remain_len ||
- (mReq->req.actual != mReq->req.length)) {
- restore_original_req(mReq);
- mEp->multi_req = false;
- } else {
- mReq->req.buf = mReq->multi.buf +
- mReq->multi.actual;
- mReq->req.length = min_t(unsigned int,
- remain_len,
- 4 * CI13XXX_PAGE_SIZE);
-
- mReq->req.status = -EINPROGRESS;
- mReq->req.actual = 0;
- list_del_init(&mReq->queue);
- retval = _hardware_enqueue(mEp, mReq);
- if (retval) {
- err("Large req failed in middle");
- mReq->req.status = retval;
- restore_original_req(mReq);
- mEp->multi_req = false;
- goto done;
- } else {
- list_add_tail(&mReq->queue,
- &mEp->qh.queue);
- return 0;
- }
- }
- }
- list_del_init(&mReq->queue);
-done:
-
- dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
-
- if (mReq->req.complete != NULL) {
- spin_unlock(mEp->lock);
- if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
- mReq->req.length)
- mEpTemp = &_udc->ep0in;
- mReq->req.complete(&mEpTemp->ep, &mReq->req);
- spin_lock(mEp->lock);
- }
- }
-
- if (retval == -EBUSY)
- retval = 0;
- if (retval < 0)
- dbg_event(_usb_addr(mEp), "DONE", retval);
-
- return retval;
-}
-
-/**
- * isr_tr_complete_handler: transaction complete interrupt handler
- * @udc: UDC descriptor
- *
- * This function handles traffic events
- */
-static void isr_tr_complete_handler(struct ci13xxx *udc)
-__releases(udc->lock)
-__acquires(udc->lock)
-{
- unsigned int i;
- u8 tmode = 0;
-
- trace("%pK", udc);
-
- if (udc == NULL) {
- err("EINVAL");
- return;
- }
-
- for (i = 0; i < hw_ep_max; i++) {
- struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
- int type, num, dir, err = -EINVAL;
- struct usb_ctrlrequest req;
-
- if (mEp->desc == NULL)
- continue; /* not configured */
-
- if (hw_test_and_clear_complete(i)) {
- err = isr_tr_complete_low(mEp);
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
- if (err > 0) /* needs status phase */
- err = isr_setup_status_phase(udc);
- if (err < 0) {
- dbg_event(_usb_addr(mEp),
- "ERROR", err);
- spin_unlock(udc->lock);
- if (usb_ep_set_halt(&mEp->ep))
- err("error: ep_set_halt");
- spin_lock(udc->lock);
- }
- }
- }
-
- if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
- !hw_test_and_clear_setup_status(i))
- continue;
-
- if (i != 0) {
- warn("ctrl traffic received at endpoint");
- continue;
- }
-
- /*
- * Flush data and handshake transactions of previous
- * setup packet.
- */
- _ep_nuke(&udc->ep0out);
- _ep_nuke(&udc->ep0in);
-
- /* read_setup_packet */
- do {
- hw_test_and_set_setup_guard();
- memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
- /* Ensure buffer is read before acknowledging to h/w */
- mb();
- } while (!hw_test_and_clear_setup_guard());
-
- type = req.bRequestType;
-
- udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
-
- dbg_setup(_usb_addr(mEp), &req);
-
- switch (req.bRequest) {
- case USB_REQ_CLEAR_FEATURE:
- if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
- le16_to_cpu(req.wValue) ==
- USB_ENDPOINT_HALT) {
- if (req.wLength != 0)
- break;
- num = le16_to_cpu(req.wIndex);
- dir = num & USB_ENDPOINT_DIR_MASK;
- num &= USB_ENDPOINT_NUMBER_MASK;
- if (dir) /* TX */
- num += hw_ep_max/2;
- if (!udc->ci13xxx_ep[num].wedge) {
- spin_unlock(udc->lock);
- err = usb_ep_clear_halt(
- &udc->ci13xxx_ep[num].ep);
- spin_lock(udc->lock);
- if (err)
- break;
- }
- err = isr_setup_status_phase(udc);
- } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
- le16_to_cpu(req.wValue) ==
- USB_DEVICE_REMOTE_WAKEUP) {
- if (req.wLength != 0)
- break;
- udc->gadget.remote_wakeup = 0;
- err = isr_setup_status_phase(udc);
- } else {
- goto delegate;
- }
- break;
- case USB_REQ_GET_STATUS:
- if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
- type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
- type != (USB_DIR_IN|USB_RECIP_INTERFACE))
- goto delegate;
- if (le16_to_cpu(req.wLength) != 2 ||
- le16_to_cpu(req.wValue) != 0)
- break;
- err = isr_get_status_response(udc, &req);
- break;
- case USB_REQ_SET_ADDRESS:
- if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
- goto delegate;
- if (le16_to_cpu(req.wLength) != 0 ||
- le16_to_cpu(req.wIndex) != 0)
- break;
- err = hw_usb_set_address((u8)le16_to_cpu(req.wValue));
- if (err)
- break;
- err = isr_setup_status_phase(udc);
- break;
- case USB_REQ_SET_CONFIGURATION:
- if (type == (USB_DIR_OUT|USB_TYPE_STANDARD))
- udc->configured = !!req.wValue;
- goto delegate;
- case USB_REQ_SET_FEATURE:
- if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
- le16_to_cpu(req.wValue) ==
- USB_ENDPOINT_HALT) {
- if (req.wLength != 0)
- break;
- num = le16_to_cpu(req.wIndex);
- dir = num & USB_ENDPOINT_DIR_MASK;
- num &= USB_ENDPOINT_NUMBER_MASK;
- if (dir) /* TX */
- num += hw_ep_max/2;
-
- spin_unlock(udc->lock);
- err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
- spin_lock(udc->lock);
- if (!err)
- isr_setup_status_phase(udc);
- } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
- if (req.wLength != 0)
- break;
- switch (le16_to_cpu(req.wValue)) {
- case USB_DEVICE_REMOTE_WAKEUP:
- udc->gadget.remote_wakeup = 1;
- err = isr_setup_status_phase(udc);
- break;
- case USB_DEVICE_TEST_MODE:
- tmode = le16_to_cpu(req.wIndex) >> 8;
- switch (tmode) {
- case TEST_J:
- case TEST_K:
- case TEST_SE0_NAK:
- case TEST_PACKET:
- case TEST_FORCE_EN:
- udc->test_mode = tmode;
- err = isr_setup_status_phase(
- udc);
- break;
- default:
- break;
- }
- default:
- goto delegate;
- }
- } else {
- goto delegate;
- }
- break;
- default:
-delegate:
- if (req.wLength == 0) /* no data phase */
- udc->ep0_dir = TX;
-
- spin_unlock(udc->lock);
- err = udc->driver->setup(&udc->gadget, &req);
- spin_lock(udc->lock);
- break;
- }
-
- if (err < 0) {
- dbg_event(_usb_addr(mEp), "ERROR", err);
-
- spin_unlock(udc->lock);
- if (usb_ep_set_halt(&mEp->ep))
- err("error: ep_set_halt");
- spin_lock(udc->lock);
- }
- }
-}
-
-/******************************************************************************
- * ENDPT block
- *****************************************************************************/
-/**
- * ep_enable: configure endpoint, making it usable
- *
- * Check usb_ep_enable() at "usb_gadget.h" for details
- */
-static int ep_enable(struct usb_ep *ep,
- const struct usb_endpoint_descriptor *desc)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- int retval = 0;
- unsigned long flags;
- unsigned int mult = 0;
-
- trace("ep = %pK, desc = %pK", ep, desc);
-
- if (ep == NULL || desc == NULL)
- return -EINVAL;
-
- spin_lock_irqsave(mEp->lock, flags);
-
- /* only internal SW should enable ctrl endpts */
-
- mEp->desc = desc;
-
- if (!list_empty(&mEp->qh.queue))
- warn("enabling a non-empty endpoint!");
-
- mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
- mEp->num = usb_endpoint_num(desc);
- mEp->type = usb_endpoint_type(desc);
-
- mEp->ep.maxpacket = usb_endpoint_maxp(desc);
-
- dbg_event(_usb_addr(mEp), "ENABLE", 0);
-
- mEp->qh.ptr->cap = 0;
-
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
- mEp->qh.ptr->cap |= QH_IOS;
- } else if (mEp->type == USB_ENDPOINT_XFER_ISOC) {
- mEp->qh.ptr->cap &= ~QH_MULT;
- mult = ((mEp->ep.maxpacket >> QH_MULT_SHIFT) + 1) & 0x03;
- mEp->qh.ptr->cap |= (mult << ffs_nr(QH_MULT));
- } else {
- mEp->qh.ptr->cap |= QH_ZLT;
- }
-
- mEp->qh.ptr->cap |=
- (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
- mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
-
- /* complete all the updates to ept->head before enabling endpoint*/
- mb();
-
- /*
- * Enable endpoints in the HW other than ep0 as ep0
- * is always enabled
- */
- if (mEp->num)
- retval |= hw_ep_enable(mEp->num, mEp->dir, mEp->type);
-
- spin_unlock_irqrestore(mEp->lock, flags);
- return retval;
-}
-
-/**
- * ep_disable: endpoint is no longer usable
- *
- * Check usb_ep_disable() at "usb_gadget.h" for details
- */
-static int ep_disable(struct usb_ep *ep)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- int direction, retval = 0;
- unsigned long flags;
-
- trace("%pK", ep);
-
- if (ep == NULL)
- return -EINVAL;
- else if (mEp->desc == NULL)
- return -EBUSY;
-
- spin_lock_irqsave(mEp->lock, flags);
-
- /* only internal SW should disable ctrl endpts */
-
- direction = mEp->dir;
- do {
- dbg_event(_usb_addr(mEp), "DISABLE", 0);
-
- retval |= _ep_nuke(mEp);
- retval |= hw_ep_disable(mEp->num, mEp->dir);
-
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
- mEp->dir = (mEp->dir == TX) ? RX : TX;
-
- } while (mEp->dir != direction);
-
- mEp->desc = NULL;
- mEp->ep.desc = NULL;
- mEp->ep.maxpacket = USHRT_MAX;
-
- spin_unlock_irqrestore(mEp->lock, flags);
- return retval;
-}
-
-/**
- * ep_alloc_request: allocate a request object to use with this endpoint
- *
- * Check usb_ep_alloc_request() at "usb_gadget.h" for details
- */
-static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- struct ci13xxx_req *mReq = NULL;
-
- trace("%pK, %i", ep, gfp_flags);
-
- if (ep == NULL) {
- err("EINVAL");
- return NULL;
- }
-
- mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
- if (mReq != NULL) {
- INIT_LIST_HEAD(&mReq->queue);
- mReq->req.dma = DMA_ERROR_CODE;
-
- mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
- &mReq->dma);
- if (mReq->ptr == NULL) {
- kfree(mReq);
- mReq = NULL;
- }
- }
-
- dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
-
- return (mReq == NULL) ? NULL : &mReq->req;
-}
-
-/**
- * ep_free_request: frees a request object
- *
- * Check usb_ep_free_request() at "usb_gadget.h" for details
- */
-static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
- unsigned long flags;
-
- trace("%pK, %pK", ep, req);
-
- if (ep == NULL || req == NULL) {
- err("EINVAL");
- return;
- } else if (!list_empty(&mReq->queue)) {
- err("EBUSY");
- return;
- }
-
- spin_lock_irqsave(mEp->lock, flags);
-
- if (mReq->ptr)
- dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
- kfree(mReq);
-
- dbg_event(_usb_addr(mEp), "FREE", 0);
-
- spin_unlock_irqrestore(mEp->lock, flags);
-}
-
-/**
- * ep_queue: queues (submits) an I/O request to an endpoint
- *
- * Check usb_ep_queue()* at usb_gadget.h" for details
- */
-static int ep_queue(struct usb_ep *ep, struct usb_request *req,
- gfp_t __maybe_unused gfp_flags)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
- int retval = 0;
- unsigned long flags;
- struct ci13xxx *udc = _udc;
-
- trace("%pK, %pK, %X", ep, req, gfp_flags);
-
- if (ep == NULL)
- return -EINVAL;
-
- spin_lock_irqsave(mEp->lock, flags);
- if (req == NULL || mEp->desc == NULL) {
- retval = -EINVAL;
- goto done;
- }
-
- if (!udc->softconnect) {
- retval = -ENODEV;
- goto done;
- }
-
- if (!udc->configured && mEp->type !=
- USB_ENDPOINT_XFER_CONTROL) {
- trace("usb is not configured ept #%d, ept name#%s\n",
- mEp->num, mEp->ep.name);
- retval = -ESHUTDOWN;
- goto done;
- }
-
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
- if (req->length)
- mEp = (_udc->ep0_dir == RX) ?
- &_udc->ep0out : &_udc->ep0in;
- if (!list_empty(&mEp->qh.queue)) {
- _ep_nuke(mEp);
- retval = -EOVERFLOW;
- warn("endpoint ctrl %X nuked", _usb_addr(mEp));
- }
- }
-
- if (ep->endless && udc->gadget.speed == USB_SPEED_FULL) {
- err("Queueing endless req is not supported for FS");
- retval = -EINVAL;
- goto done;
- }
-
- /* first nuke then test link, e.g. previous status has not sent */
- if (!list_empty(&mReq->queue)) {
- retval = -EBUSY;
- err("request already in queue");
- goto done;
- }
- if (mEp->multi_req) {
- retval = -EAGAIN;
- err("Large request is in progress. come again");
- goto done;
- }
-
- if (req->length > (4 * CI13XXX_PAGE_SIZE)) {
- if (!list_empty(&mEp->qh.queue)) {
- retval = -EAGAIN;
- err("Queue is busy. Large req is not allowed");
- goto done;
- }
- if ((mEp->type != USB_ENDPOINT_XFER_BULK) ||
- (mEp->dir != RX)) {
- retval = -EINVAL;
- err("Larger req is supported only for Bulk OUT");
- goto done;
- }
- mEp->multi_req = true;
- mReq->multi.len = req->length;
- mReq->multi.buf = req->buf;
- req->length = (4 * CI13XXX_PAGE_SIZE);
- }
-
- dbg_queue(_usb_addr(mEp), req, retval);
-
- /* push request */
- mReq->req.status = -EINPROGRESS;
- mReq->req.actual = 0;
-
- if (udc->rw_pending) {
- list_add_tail(&mReq->queue, &mEp->rw_queue);
- retval = 0;
- goto done;
- }
-
- if (udc->suspended) {
- /* Remote Wakeup */
- if (!udc->gadget.remote_wakeup) {
-
- dev_dbg(mEp->device, "%s: queue failed (suspend).",
- __func__);
- dev_dbg(mEp->device, "%s: Remote wakeup is not supported. ept #%d\n",
- __func__, mEp->num);
- mEp->multi_req = false;
-
- retval = -EAGAIN;
- goto done;
- }
-
- list_add_tail(&mReq->queue, &mEp->rw_queue);
-
- udc->rw_pending = true;
- schedule_delayed_work(&udc->rw_work,
- REMOTE_WAKEUP_DELAY);
-
- retval = 0;
- goto done;
- }
-
- retval = _hardware_enqueue(mEp, mReq);
-
- if (retval == -EALREADY) {
- dbg_event(_usb_addr(mEp), "QUEUE", retval);
- retval = 0;
- }
- if (!retval)
- list_add_tail(&mReq->queue, &mEp->qh.queue);
- else if (mEp->multi_req)
- mEp->multi_req = false;
-
- done:
- spin_unlock_irqrestore(mEp->lock, flags);
- return retval;
-}
-
-/**
- * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
- *
- * Check usb_ep_dequeue() at "usb_gadget.h" for details
- */
-static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- struct ci13xxx_ep *mEpTemp = mEp;
- struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
- struct ci13xxx *udc = _udc;
- unsigned long flags;
-
- trace("%pK, %pK", ep, req);
-
- if (udc->udc_driver->in_lpm && udc->udc_driver->in_lpm(udc)) {
- dev_err(udc->transceiver->dev,
- "%s: Unable to dequeue while in LPM\n",
- __func__);
- return -EAGAIN;
- }
-
- if (ep == NULL)
- return -EINVAL;
-
- spin_lock_irqsave(mEp->lock, flags);
- /*
- * Only ep0 IN is exposed to composite. When a req is dequeued
- * on ep0, check both ep0 IN and ep0 OUT queues.
- */
- if (req == NULL || mReq->req.status != -EALREADY ||
- mEp->desc == NULL || list_empty(&mReq->queue) ||
- (list_empty(&mEp->qh.queue) && ((mEp->type !=
- USB_ENDPOINT_XFER_CONTROL) ||
- list_empty(&_udc->ep0out.qh.queue)))) {
- spin_unlock_irqrestore(mEp->lock, flags);
- return -EINVAL;
- }
-
- dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
-
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
- hw_ep_flush(_udc->ep0out.num, RX);
- hw_ep_flush(_udc->ep0in.num, TX);
- } else {
- hw_ep_flush(mEp->num, mEp->dir);
- }
-
- /* pop request */
- list_del_init(&mReq->queue);
- if (mReq->map) {
- dma_unmap_single(mEp->device, mReq->req.dma, mReq->req.length,
- mEp->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
- mReq->req.dma = DMA_ERROR_CODE;
- mReq->map = 0;
- }
- req->status = -ECONNRESET;
-
- if (mEp->last_zptr) {
- dma_pool_free(mEp->td_pool, mEp->last_zptr, mEp->last_zdma);
- mEp->last_zptr = NULL;
- mEp->last_zdma = 0;
- }
-
- if (mReq->zptr) {
- dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
- mReq->zptr = NULL;
- mReq->zdma = 0;
- }
-
- if (mEp->multi_req) {
- restore_original_req(mReq);
- mEp->multi_req = false;
- }
-
- if (mReq->req.complete != NULL) {
- spin_unlock(mEp->lock);
- if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
- mReq->req.length)
- mEpTemp = &_udc->ep0in;
- mReq->req.complete(&mEpTemp->ep, &mReq->req);
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
- mReq->req.complete = NULL;
- spin_lock(mEp->lock);
- }
-
- spin_unlock_irqrestore(mEp->lock, flags);
- return 0;
-}
-
-static int is_sps_req(struct ci13xxx_req *mReq)
-{
- return (CI13XX_REQ_VENDOR_ID(mReq->req.udc_priv) == MSM_VENDOR_ID &&
- mReq->req.udc_priv & MSM_SPS_MODE);
-}
-
-/**
- * ep_set_halt: sets the endpoint halt feature
- *
- * Check usb_ep_set_halt() at "usb_gadget.h" for details
- */
-static int ep_set_halt(struct usb_ep *ep, int value)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- struct ci13xxx *udc = _udc;
- int direction, retval = 0;
- unsigned long flags;
-
- trace("%pK, %i", ep, value);
-
- if (ep == NULL || mEp->desc == NULL)
- return -EINVAL;
-
- if (udc->suspended) {
- dev_err(udc->transceiver->dev,
- "%s: Unable to halt EP while suspended\n", __func__);
- return -EINVAL;
- }
-
- spin_lock_irqsave(mEp->lock, flags);
-
-#ifndef STALL_IN
- /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
- if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
- !list_empty(&mEp->qh.queue) &&
- !is_sps_req(list_entry(mEp->qh.queue.next, struct ci13xxx_req,
- queue))){
- spin_unlock_irqrestore(mEp->lock, flags);
- return -EAGAIN;
- }
-#endif
-
- direction = mEp->dir;
- do {
- dbg_event(_usb_addr(mEp), "HALT", value);
- retval |= hw_ep_set_halt(mEp->num, mEp->dir, value);
-
- if (!value)
- mEp->wedge = 0;
-
- if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
- mEp->dir = (mEp->dir == TX) ? RX : TX;
-
- } while (mEp->dir != direction);
-
- spin_unlock_irqrestore(mEp->lock, flags);
- return retval;
-}
-
-/**
- * ep_set_wedge: sets the halt feature and ignores clear requests
- *
- * Check usb_ep_set_wedge() at "usb_gadget.h" for details
- */
-static int ep_set_wedge(struct usb_ep *ep)
-{
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- unsigned long flags;
-
- trace("%pK", ep);
-
- if (ep == NULL || mEp->desc == NULL)
- return -EINVAL;
-
- spin_lock_irqsave(mEp->lock, flags);
-
- dbg_event(_usb_addr(mEp), "WEDGE", 0);
- mEp->wedge = 1;
-
- spin_unlock_irqrestore(mEp->lock, flags);
-
- return usb_ep_set_halt(ep);
-}
-
-/**
- * ep_fifo_flush: flushes contents of a fifo
- *
- * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
- */
-static void ep_fifo_flush(struct usb_ep *ep)
-{
- struct ci13xxx *udc = _udc;
- struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
- unsigned long flags;
-
- trace("%pK", ep);
-
- if (ep == NULL) {
- err("%02X: -EINVAL", _usb_addr(mEp));
- return;
- }
-
- if (udc->udc_driver->in_lpm && udc->udc_driver->in_lpm(udc)) {
- dev_err(udc->transceiver->dev,
- "%s: Unable to fifo_flush while in LPM\n",
- __func__);
- return;
- }
-
- spin_lock_irqsave(mEp->lock, flags);
-
- dbg_event(_usb_addr(mEp), "FFLUSH", 0);
- /*
- * _ep_nuke() takes care of flushing the endpoint.
- * some function drivers expect udc to retire all
- * pending requests upon flushing an endpoint. There
- * is no harm in doing it.
- */
- _ep_nuke(mEp);
-
- spin_unlock_irqrestore(mEp->lock, flags);
-}
-
-/**
- * Endpoint-specific part of the API to the USB controller hardware
- * Check "usb_gadget.h" for details
- */
-static const struct usb_ep_ops usb_ep_ops = {
- .enable = ep_enable,
- .disable = ep_disable,
- .alloc_request = ep_alloc_request,
- .free_request = ep_free_request,
- .queue = ep_queue,
- .dequeue = ep_dequeue,
- .set_halt = ep_set_halt,
- .set_wedge = ep_set_wedge,
- .fifo_flush = ep_fifo_flush,
-};
-
-/******************************************************************************
- * GADGET block
- *****************************************************************************/
-static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
-{
- struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
- unsigned long flags;
- int gadget_ready = 0;
-
- if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
- return -EOPNOTSUPP;
-
- spin_lock_irqsave(udc->lock, flags);
- udc->vbus_active = is_active;
- if (udc->driver)
- gadget_ready = 1;
- spin_unlock_irqrestore(udc->lock, flags);
-
- if (!gadget_ready)
- return 0;
-
- if (is_active) {
- hw_device_reset(udc);
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_CONNECT_EVENT);
- /* Enable BAM (if needed) before starting controller */
- if (udc->softconnect) {
- dbg_event(0xFF, "BAM EN2",
- _gadget->bam2bam_func_enabled);
- msm_usb_bam_enable(CI_CTRL,
- _gadget->bam2bam_func_enabled);
- hw_device_state(udc->ep0out.qh.dma);
- }
- } else {
- hw_device_state(0);
- _gadget_stop_activity(&udc->gadget);
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_DISCONNECT_EVENT);
- }
-
- return 0;
-}
-
-#define VBUS_DRAW_BUF_LEN 10
-#define MAX_OVERRIDE_VBUS_ALLOWED 900 /* 900 mA */
-static char vbus_draw_mA[VBUS_DRAW_BUF_LEN];
-module_param_string(vbus_draw_mA, vbus_draw_mA, VBUS_DRAW_BUF_LEN, 0644);
-
-static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned int mA)
-{
- struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
- unsigned int override_mA = 0;
-
- /* override param to draw more current if battery draining faster */
- if ((mA == CONFIG_USB_GADGET_VBUS_DRAW) &&
- (vbus_draw_mA[0] != '\0')) {
- if ((!kstrtoint(vbus_draw_mA, 10, &override_mA)) &&
- (override_mA <= MAX_OVERRIDE_VBUS_ALLOWED)) {
- mA = override_mA;
- }
- }
-
- if (udc->transceiver)
- return usb_phy_set_power(udc->transceiver, mA);
- return -ENOTSUPP;
-}
-
-static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_active)
-{
- struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
- unsigned long flags;
-
- spin_lock_irqsave(udc->lock, flags);
- udc->softconnect = is_active;
- if (((udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) &&
- !udc->vbus_active) || !udc->driver) {
- spin_unlock_irqrestore(udc->lock, flags);
- return 0;
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- pm_runtime_get_sync(&_gadget->dev);
-
- /* Enable BAM (if needed) before starting controller */
- if (is_active) {
- dbg_event(0xFF, "BAM EN1", _gadget->bam2bam_func_enabled);
- msm_usb_bam_enable(CI_CTRL, _gadget->bam2bam_func_enabled);
- }
-
- spin_lock_irqsave(udc->lock, flags);
- if (!udc->vbus_active) {
- spin_unlock_irqrestore(udc->lock, flags);
- pm_runtime_put_sync(&_gadget->dev);
- return 0;
- }
- if (is_active) {
- spin_unlock(udc->lock);
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_CONNECT_EVENT);
- spin_lock(udc->lock);
- hw_device_state(udc->ep0out.qh.dma);
- } else {
- hw_device_state(0);
- }
- spin_unlock_irqrestore(udc->lock, flags);
-
- pm_runtime_mark_last_busy(&_gadget->dev);
- pm_runtime_put_autosuspend(&_gadget->dev);
-
- return 0;
-}
-
-static int ci13xxx_start(struct usb_gadget *gadget,
- struct usb_gadget_driver *driver);
-static int ci13xxx_stop(struct usb_gadget *gadget);
-
-/**
- * Device operations part of the API to the USB controller hardware,
- * which don't involve endpoints (or i/o)
- * Check "usb_gadget.h" for details
- */
-static const struct usb_gadget_ops usb_gadget_ops = {
- .vbus_session = ci13xxx_vbus_session,
- .wakeup = ci13xxx_wakeup,
- .vbus_draw = ci13xxx_vbus_draw,
- .pullup = ci13xxx_pullup,
- .udc_start = ci13xxx_start,
- .udc_stop = ci13xxx_stop,
-};
-
-/**
- * ci13xxx_start: register a gadget driver
- * @gadget: our gadget
- * @driver: the driver being registered
- *
- * Interrupts are enabled here.
- */
-static int ci13xxx_start(struct usb_gadget *gadget,
- struct usb_gadget_driver *driver)
-{
- struct ci13xxx *udc = _udc;
- unsigned long flags;
- int retval = -ENOMEM;
-
- trace("%pK", driver);
-
- if (driver == NULL ||
- driver->setup == NULL ||
- driver->disconnect == NULL)
- return -EINVAL;
- else if (udc == NULL)
- return -ENODEV;
- else if (udc->driver != NULL)
- return -EBUSY;
-
- spin_lock_irqsave(udc->lock, flags);
-
- info("hw_ep_max = %d", hw_ep_max);
-
- udc->gadget.dev.driver = NULL;
-
- spin_unlock_irqrestore(udc->lock, flags);
-
- pm_runtime_get_sync(&udc->gadget.dev);
-
- udc->ep0out.ep.desc = &ctrl_endpt_out_desc;
- retval = usb_ep_enable(&udc->ep0out.ep);
- if (retval)
- goto pm_put;
-
- udc->ep0in.ep.desc = &ctrl_endpt_in_desc;
- retval = usb_ep_enable(&udc->ep0in.ep);
- if (retval)
- goto pm_put;
- udc->status = usb_ep_alloc_request(&udc->ep0in.ep, GFP_KERNEL);
- if (!udc->status) {
- retval = -ENOMEM;
- goto pm_put;
- }
-
- udc->status_buf = kzalloc(2 + udc->gadget.extra_buf_alloc,
- GFP_KERNEL); /* for GET_STATUS */
- if (!udc->status_buf) {
- usb_ep_free_request(&udc->ep0in.ep, udc->status);
- retval = -ENOMEM;
- goto pm_put;
- }
- spin_lock_irqsave(udc->lock, flags);
-
- udc->gadget.ep0 = &udc->ep0in.ep;
- /* bind gadget */
- driver->driver.bus = NULL;
- udc->gadget.dev.driver = &driver->driver;
-
- udc->driver = driver;
- if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
- if (udc->vbus_active) {
- if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
- hw_device_reset(udc);
- } else {
- goto done;
- }
- }
-
- if (!udc->softconnect)
- goto done;
-
- retval = hw_device_state(udc->ep0out.qh.dma);
-
-done:
- spin_unlock_irqrestore(udc->lock, flags);
-
- if (udc->udc_driver->notify_event)
- udc->udc_driver->notify_event(udc,
- CI13XXX_CONTROLLER_UDC_STARTED_EVENT);
-pm_put:
- pm_runtime_put(&udc->gadget.dev);
-
- return retval;
-}
-
-/**
- * ci13xxx_stop: unregister a gadget driver
- *
- * Check usb_gadget_unregister_driver() at "usb_gadget.h" for details
- */
-static int ci13xxx_stop(struct usb_gadget *gadget)
-{
- struct ci13xxx *udc = _udc;
- unsigned long flags;
-
- spin_lock_irqsave(udc->lock, flags);
-
- if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
- udc->vbus_active) {
- hw_device_state(0);
- spin_unlock_irqrestore(udc->lock, flags);
- _gadget_stop_activity(&udc->gadget);
- spin_lock_irqsave(udc->lock, flags);
- }
-
- spin_unlock_irqrestore(udc->lock, flags);
-
- usb_ep_free_request(&udc->ep0in.ep, udc->status);
- kfree(udc->status_buf);
-
- return 0;
-}
-
-/******************************************************************************
- * BUS block
- *****************************************************************************/
-/**
- * udc_irq: global interrupt handler
- *
- * This function returns IRQ_HANDLED if the IRQ has been handled
- * It locks access to registers
- */
-static irqreturn_t udc_irq(void)
-{
- struct ci13xxx *udc = _udc;
- irqreturn_t retval;
- u32 intr;
-
- trace();
-
- if (udc == NULL) {
- err("ENODEV");
- return IRQ_HANDLED;
- }
-
- spin_lock(udc->lock);
-
- if (udc->udc_driver->in_lpm && udc->udc_driver->in_lpm(udc)) {
- spin_unlock(udc->lock);
- return IRQ_NONE;
- }
-
- if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
- if (hw_cread(CAP_USBMODE, USBMODE_CM) !=
- USBMODE_CM_DEVICE) {
- spin_unlock(udc->lock);
- return IRQ_NONE;
- }
- }
- intr = hw_test_and_clear_intr_active();
- if (intr) {
- isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
- isr_statistics.hndl.idx &= ISR_MASK;
- isr_statistics.hndl.cnt++;
-
- /* order defines priority - do NOT change it */
- if (USBi_URI & intr) {
- isr_statistics.uri++;
- if (!hw_cread(CAP_PORTSC, PORTSC_PR))
- pr_info("%s: USB reset interrupt is delayed\n",
- __func__);
- isr_reset_handler(udc);
- }
- if (USBi_PCI & intr) {
- isr_statistics.pci++;
- isr_resume_handler(udc);
- }
- if (USBi_UEI & intr)
- isr_statistics.uei++;
- if (USBi_UI & intr) {
- isr_statistics.ui++;
- isr_tr_complete_handler(udc);
- }
- if (USBi_SLI & intr) {
- isr_suspend_handler(udc);
- isr_statistics.sli++;
- }
- retval = IRQ_HANDLED;
- } else {
- isr_statistics.none++;
- retval = IRQ_NONE;
- }
- spin_unlock(udc->lock);
-
- return retval;
-}
-
-static void destroy_eps(struct ci13xxx *ci)
-{
- int i;
-
- for (i = 0; i < hw_ep_max; i++) {
- struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
-
- dma_pool_free(ci->qh_pool, mEp->qh.ptr, mEp->qh.dma);
- }
-}
-
-/**
- * udc_probe: parent probe must call this to initialize UDC
- * @dev: parent device
- * @regs: registers base address
- * @name: driver name
- *
- * This function returns an error code
- * No interrupts active, the IRQ has not been requested yet
- * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
- */
-static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
- void __iomem *regs)
-{
- struct ci13xxx *udc;
- struct ci13xxx_platform_data *pdata;
- int retval = 0, i, j;
-
- trace("%pK, %pK, %pK", dev, regs, driver->name);
-
- if (dev == NULL || regs == NULL || driver == NULL ||
- driver->name == NULL)
- return -EINVAL;
-
- udc = kzalloc(sizeof(struct ci13xxx), GFP_KERNEL);
- if (udc == NULL)
- return -ENOMEM;
-
- udc->lock = &udc_lock;
- udc->regs = regs;
- udc->udc_driver = driver;
-
- udc->gadget.ops = &usb_gadget_ops;
- udc->gadget.speed = USB_SPEED_UNKNOWN;
- udc->gadget.max_speed = USB_SPEED_HIGH;
- udc->gadget.is_otg = 0;
- udc->gadget.name = driver->name;
-
- /* alloc resources */
- udc->qh_pool = dma_pool_create("ci13xxx_qh", dev,
- sizeof(struct ci13xxx_qh),
- 64, CI13XXX_PAGE_SIZE);
- if (udc->qh_pool == NULL) {
- retval = -ENOMEM;
- goto free_udc;
- }
-
- udc->td_pool = dma_pool_create("ci13xxx_td", dev,
- sizeof(struct ci13xxx_td),
- 64, CI13XXX_PAGE_SIZE);
- if (udc->td_pool == NULL) {
- retval = -ENOMEM;
- goto free_qh_pool;
- }
-
- INIT_DELAYED_WORK(&udc->rw_work, usb_do_remote_wakeup);
-
- retval = hw_device_init(regs);
- if (retval < 0)
- goto free_qh_pool;
-
- INIT_LIST_HEAD(&udc->gadget.ep_list);
- for (i = 0; i < hw_ep_max; i++) {
- struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
-
- INIT_LIST_HEAD(&mEp->ep.ep_list);
- INIT_LIST_HEAD(&mEp->rw_queue);
- setup_timer(&mEp->prime_timer, ep_prime_timer_func,
- (unsigned long) mEp);
- }
-
- for (i = 0; i < hw_ep_max/2; i++) {
- for (j = RX; j <= TX; j++) {
- int k = i + j * hw_ep_max/2;
- struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
-
- scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
- (j == TX) ? "in" : "out");
-
- mEp->lock = udc->lock;
- mEp->device = &udc->gadget.dev;
- mEp->td_pool = udc->td_pool;
-
- mEp->ep.name = mEp->name;
- mEp->ep.ops = &usb_ep_ops;
- usb_ep_set_maxpacket_limit(&mEp->ep,
- k ? USHRT_MAX : CTRL_PAYLOAD_MAX);
-
- INIT_LIST_HEAD(&mEp->qh.queue);
- mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
- &mEp->qh.dma);
- if (mEp->qh.ptr == NULL)
- retval = -ENOMEM;
- else
- memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
-
- /* skip ep0 out and in endpoints */
- if (i == 0)
- continue;
-
- list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
- }
- }
-
- if (retval)
- goto free_dma_pools;
-
- udc->gadget.ep0 = &udc->ep0in.ep;
-
- pdata = dev->platform_data;
- if (pdata) {
- if (pdata->enable_axi_prefetch)
- udc->gadget.extra_buf_alloc = EXTRA_ALLOCATION_SIZE;
- }
-
- if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
- udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
- if (udc->transceiver == NULL) {
- retval = -ENODEV;
- goto destroy_eps;
- }
- }
-
- if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
- retval = hw_device_reset(udc);
- if (retval)
- goto put_transceiver;
- }
-
- if (udc->transceiver) {
- retval = otg_set_peripheral(udc->transceiver->otg,
- &udc->gadget);
- if (retval)
- goto put_transceiver;
- }
-
- retval = usb_add_gadget_udc(dev, &udc->gadget);
- if (retval)
- goto remove_trans;
-
-#ifdef CONFIG_USB_GADGET_DEBUG_FILES
- retval = dbg_create_files(&udc->gadget.dev);
- if (retval) {
- pr_err("Registering sysfs files for debug failed!!!!\n");
- goto del_udc;
- }
-#endif
-
- pm_runtime_no_callbacks(&udc->gadget.dev);
- pm_runtime_set_active(&udc->gadget.dev);
- pm_runtime_enable(&udc->gadget.dev);
-
- /* Use delayed LPM especially for composition-switch in LPM (suspend) */
- pm_runtime_set_autosuspend_delay(&udc->gadget.dev, 2000);
- pm_runtime_use_autosuspend(&udc->gadget.dev);
-
- _udc = udc;
- return retval;
-
-del_udc:
- usb_del_gadget_udc(&udc->gadget);
-remove_trans:
- if (udc->transceiver)
- otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
-
- err("error = %i", retval);
-put_transceiver:
- if (udc->transceiver)
- usb_put_phy(udc->transceiver);
-destroy_eps:
- destroy_eps(udc);
-free_dma_pools:
- dma_pool_destroy(udc->td_pool);
-free_qh_pool:
- dma_pool_destroy(udc->qh_pool);
-free_udc:
- kfree(udc);
- _udc = NULL;
- return retval;
-}
-
-/**
- * udc_remove: parent remove must call this to remove UDC
- *
- * No interrupts active, the IRQ has been released
- */
-static void udc_remove(void)
-{
- struct ci13xxx *udc = _udc;
-
- if (udc == NULL) {
- err("EINVAL");
- return;
- }
-
- usb_del_gadget_udc(&udc->gadget);
-
- if (udc->transceiver) {
- otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
- usb_put_phy(udc->transceiver);
- }
-#ifdef CONFIG_USB_GADGET_DEBUG_FILES
- dbg_remove_files(&udc->gadget.dev);
-#endif
- destroy_eps(udc);
- dma_pool_destroy(udc->td_pool);
- dma_pool_destroy(udc->qh_pool);
-
- kfree(udc);
- _udc = NULL;
-}
diff --git a/drivers/usb/gadget/ci13xxx_udc.h b/drivers/usb/gadget/ci13xxx_udc.h
deleted file mode 100644
index 8c93080..0000000
--- a/drivers/usb/gadget/ci13xxx_udc.h
+++ /dev/null
@@ -1,282 +0,0 @@
-/*
- * ci13xxx_udc.h - structures, registers, and macros MIPS USB IP core
- *
- * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
- *
- * Author: David Lopo
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * Description: MIPS USB IP core family device controller
- * Structures, registers and logging macros
- */
-
-#ifndef _CI13XXX_h_
-#define _CI13XXX_h_
-
-/******************************************************************************
- * DEFINE
- *****************************************************************************/
-#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
-#define ENDPT_MAX (32)
-#define CTRL_PAYLOAD_MAX (64)
-#define RX (0) /* similar to USB_DIR_OUT but can be used as an index */
-#define TX (1) /* similar to USB_DIR_IN but can be used as an index */
-
-/* UDC private data:
- * 16MSb - Vendor ID | 16 LSb Vendor private data
- */
-#define CI13XX_REQ_VENDOR_ID(id) (id & 0xFFFF0000UL)
-
-#define MSM_ETD_TYPE BIT(1)
-#define MSM_EP_PIPE_ID_RESET_VAL 0x1F001F
-
-/******************************************************************************
- * STRUCTURES
- *****************************************************************************/
-/* DMA layout of transfer descriptors */
-struct ci13xxx_td {
- /* 0 */
- u32 next;
-#define TD_TERMINATE BIT(0)
-#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
- /* 1 */
- u32 token;
-#define TD_STATUS (0x00FFUL << 0)
-#define TD_STATUS_TR_ERR BIT(3)
-#define TD_STATUS_DT_ERR BIT(5)
-#define TD_STATUS_HALTED BIT(6)
-#define TD_STATUS_ACTIVE BIT(7)
-#define TD_MULTO (0x0003UL << 10)
-#define TD_IOC BIT(15)
-#define TD_TOTAL_BYTES (0x7FFFUL << 16)
- /* 2 */
- u32 page[5];
-#define TD_CURR_OFFSET (0x0FFFUL << 0)
-#define TD_FRAME_NUM (0x07FFUL << 0)
-#define TD_RESERVED_MASK (0x0FFFUL << 0)
-} __packed __aligned(4);
-
-/* DMA layout of queue heads */
-struct ci13xxx_qh {
- /* 0 */
- u32 cap;
-#define QH_IOS BIT(15)
-#define QH_MAX_PKT (0x07FFUL << 16)
-#define QH_ZLT BIT(29)
-#define QH_MULT (0x0003UL << 30)
-#define QH_MULT_SHIFT 11
- /* 1 */
- u32 curr;
- /* 2 - 8 */
- struct ci13xxx_td td;
- /* 9 */
- u32 RESERVED;
- struct usb_ctrlrequest setup;
-} __packed __aligned(4);
-
-/* cache of larger request's original attributes */
-struct ci13xxx_multi_req {
- unsigned int len;
- unsigned int actual;
- void *buf;
-};
-
-/* Extension of usb_request */
-struct ci13xxx_req {
- struct usb_request req;
- unsigned int map;
- struct list_head queue;
- struct ci13xxx_td *ptr;
- dma_addr_t dma;
- struct ci13xxx_td *zptr;
- dma_addr_t zdma;
- struct ci13xxx_multi_req multi;
-};
-
-/* Extension of usb_ep */
-struct ci13xxx_ep {
- struct usb_ep ep;
- const struct usb_endpoint_descriptor *desc;
- u8 dir;
- u8 num;
- u8 type;
- char name[16];
- struct {
- struct list_head queue;
- struct ci13xxx_qh *ptr;
- dma_addr_t dma;
- } qh;
- struct list_head rw_queue;
- int wedge;
-
- /* global resources */
- spinlock_t *lock;
- struct device *device;
- struct dma_pool *td_pool;
- struct ci13xxx_td *last_zptr;
- dma_addr_t last_zdma;
- unsigned long dTD_update_fail_count;
- unsigned long dTD_active_re_q_count;
- unsigned long prime_fail_count;
- int prime_timer_count;
- struct timer_list prime_timer;
-
- bool multi_req;
-};
-
-struct ci13xxx;
-struct ci13xxx_udc_driver {
- const char *name;
- unsigned long flags;
- unsigned int nz_itc;
-#define CI13XXX_REGS_SHARED BIT(0)
-#define CI13XXX_REQUIRE_TRANSCEIVER BIT(1)
-#define CI13XXX_PULLUP_ON_VBUS BIT(2)
-#define CI13XXX_DISABLE_STREAMING BIT(3)
-#define CI13XXX_ZERO_ITC BIT(4)
-#define CI13XXX_ENABLE_AHB2AHB_BYPASS BIT(6)
-
-#define CI13XXX_CONTROLLER_RESET_EVENT 0
-#define CI13XXX_CONTROLLER_CONNECT_EVENT 1
-#define CI13XXX_CONTROLLER_SUSPEND_EVENT 2
-#define CI13XXX_CONTROLLER_REMOTE_WAKEUP_EVENT 3
-#define CI13XXX_CONTROLLER_RESUME_EVENT 4
-#define CI13XXX_CONTROLLER_DISCONNECT_EVENT 5
-#define CI13XXX_CONTROLLER_UDC_STARTED_EVENT 6
-#define CI13XXX_CONTROLLER_ERROR_EVENT 7
-
- void (*notify_event)(struct ci13xxx *udc, unsigned int event);
- bool (*in_lpm)(struct ci13xxx *udc);
-};
-
-/* CI13XXX UDC descriptor & global resources */
-struct ci13xxx {
- spinlock_t *lock; /* ctrl register bank access */
- void __iomem *regs; /* registers address space */
-
- struct dma_pool *qh_pool; /* DMA pool for queue heads */
- struct dma_pool *td_pool; /* DMA pool for transfer descs */
- struct usb_request *status; /* ep0 status request */
- void *status_buf;/* GET_STATUS buffer */
-
- struct usb_gadget gadget; /* USB slave device */
- struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
- u32 ep0_dir; /* ep0 direction */
-#define ep0out ci13xxx_ep[0]
-#define ep0in ci13xxx_ep[hw_ep_max / 2]
- u8 suspended; /* suspended by the host */
- u8 configured; /* is device configured */
- u8 test_mode; /* the selected test mode */
- bool rw_pending; /* Remote wakeup pending flag */
- struct delayed_work rw_work; /* remote wakeup delayed work */
- struct usb_gadget_driver *driver; /* 3rd party gadget driver */
- struct ci13xxx_udc_driver *udc_driver; /* device controller driver */
- int vbus_active; /* is VBUS active */
- int softconnect; /* is pull-up enable allowed */
- unsigned long dTD_update_fail_count;
- struct usb_phy *transceiver; /* Transceiver struct */
- bool skip_flush; /*
- * skip flushing remaining EP
- * upon flush timeout for the
- * first EP.
- */
-};
-
-/******************************************************************************
- * REGISTERS
- *****************************************************************************/
-/* register size */
-#define REG_BITS (32)
-
-/* HCCPARAMS */
-#define HCCPARAMS_LEN BIT(17)
-
-/* DCCPARAMS */
-#define DCCPARAMS_DEN (0x1F << 0)
-#define DCCPARAMS_DC BIT(7)
-
-/* TESTMODE */
-#define TESTMODE_FORCE BIT(0)
-
-/* AHB_MODE */
-#define AHB2AHB_BYPASS BIT(31)
-
-/* USBCMD */
-#define USBCMD_RS BIT(0)
-#define USBCMD_RST BIT(1)
-#define USBCMD_SUTW BIT(13)
-#define USBCMD_ATDTW BIT(14)
-
-/* USBSTS & USBINTR */
-#define USBi_UI BIT(0)
-#define USBi_UEI BIT(1)
-#define USBi_PCI BIT(2)
-#define USBi_URI BIT(6)
-#define USBi_SLI BIT(8)
-
-/* DEVICEADDR */
-#define DEVICEADDR_USBADRA BIT(24)
-#define DEVICEADDR_USBADR (0x7FUL << 25)
-
-/* PORTSC */
-#define PORTSC_FPR BIT(6)
-#define PORTSC_SUSP BIT(7)
-#define PORTSC_PR BIT(8)
-#define PORTSC_HSP BIT(9)
-#define PORTSC_PTC (0x0FUL << 16)
-
-/* DEVLC */
-#define DEVLC_PSPD (0x03UL << 25)
-#define DEVLC_PSPD_HS (0x02UL << 25)
-
-/* USBMODE */
-#define USBMODE_CM (0x03UL << 0)
-#define USBMODE_CM_IDLE (0x00UL << 0)
-#define USBMODE_CM_DEVICE (0x02UL << 0)
-#define USBMODE_CM_HOST (0x03UL << 0)
-#define USBMODE_SLOM BIT(3)
-#define USBMODE_SDIS BIT(4)
-#define USBCMD_ITC(n) (n << 16) /* n = 0, 1, 2, 4, 8, 16, 32, 64 */
-#define USBCMD_ITC_MASK (0xFF << 16)
-
-/* ENDPTCTRL */
-#define ENDPTCTRL_RXS BIT(0)
-#define ENDPTCTRL_RXT (0x03UL << 2)
-#define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
-#define ENDPTCTRL_RXE BIT(7)
-#define ENDPTCTRL_TXS BIT(16)
-#define ENDPTCTRL_TXT (0x03UL << 18)
-#define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
-#define ENDPTCTRL_TXE BIT(23)
-
-/******************************************************************************
- * LOGGING
- *****************************************************************************/
-#define ci13xxx_printk(level, format, args...) \
-do { \
- if (_udc == NULL) \
- printk(level "[%s] " format "\n", __func__, ## args); \
- else \
- dev_printk(level, _udc->gadget.dev.parent, \
- "[%s] " format "\n", __func__, ## args); \
-} while (0)
-
-#ifndef err
-#define err(format, args...) ci13xxx_printk(KERN_ERR, format, ## args)
-#endif
-
-#define warn(format, args...) ci13xxx_printk(KERN_WARNING, format, ## args)
-#define info(format, args...) ci13xxx_printk(KERN_INFO, format, ## args)
-
-#ifdef TRACE
-#define trace(format, args...) ci13xxx_printk(KERN_DEBUG, format, ## args)
-#define dbg_trace(format, args...) dev_dbg(dev, format, ##args)
-#else
-#define trace(format, args...) do {} while (0)
-#define dbg_trace(format, args...) do {} while (0)
-#endif
-
-#endif /* _CI13XXX_h_ */
diff --git a/drivers/usb/gadget/function/f_gsi.c b/drivers/usb/gadget/function/f_gsi.c
index 7e4e7ce..dc368c7 100644
--- a/drivers/usb/gadget/function/f_gsi.c
+++ b/drivers/usb/gadget/function/f_gsi.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -407,17 +407,17 @@
ipa_out_channel_out_params.db_reg_phs_addr_lsb);
d_port->in_channel_handle = ipa_in_channel_out_params.clnt_hdl;
- d_port->in_db_reg_phs_addr_lsb =
+ d_port->in_request.db_reg_phs_addr_lsb =
ipa_in_channel_out_params.db_reg_phs_addr_lsb;
- d_port->in_db_reg_phs_addr_msb =
+ d_port->in_request.db_reg_phs_addr_msb =
ipa_in_channel_out_params.db_reg_phs_addr_msb;
if (gsi->prot_id != IPA_USB_DIAG) {
d_port->out_channel_handle =
ipa_out_channel_out_params.clnt_hdl;
- d_port->out_db_reg_phs_addr_lsb =
+ d_port->out_request.db_reg_phs_addr_lsb =
ipa_out_channel_out_params.db_reg_phs_addr_lsb;
- d_port->out_db_reg_phs_addr_msb =
+ d_port->out_request.db_reg_phs_addr_msb =
ipa_out_channel_out_params.db_reg_phs_addr_msb;
}
return ret;
@@ -426,22 +426,19 @@
static void ipa_data_path_enable(struct gsi_data_port *d_port)
{
struct f_gsi *gsi = d_port_to_gsi(d_port);
- struct usb_gsi_request req;
- u64 dbl_register_addr;
bool block_db = false;
-
- log_event_dbg("in_db_reg_phs_addr_lsb = %x",
- gsi->d_port.in_db_reg_phs_addr_lsb);
+ log_event_dbg("IN: db_reg_phs_addr_lsb = %x",
+ gsi->d_port.in_request.db_reg_phs_addr_lsb);
usb_gsi_ep_op(gsi->d_port.in_ep,
- (void *)&gsi->d_port.in_db_reg_phs_addr_lsb,
+ &gsi->d_port.in_request,
GSI_EP_OP_STORE_DBL_INFO);
if (gsi->d_port.out_ep) {
- log_event_dbg("out_db_reg_phs_addr_lsb = %x",
- gsi->d_port.out_db_reg_phs_addr_lsb);
+ log_event_dbg("OUT: db_reg_phs_addr_lsb = %x",
+ gsi->d_port.out_request.db_reg_phs_addr_lsb);
usb_gsi_ep_op(gsi->d_port.out_ep,
- (void *)&gsi->d_port.out_db_reg_phs_addr_lsb,
+ &gsi->d_port.out_request,
GSI_EP_OP_STORE_DBL_INFO);
usb_gsi_ep_op(gsi->d_port.out_ep, &gsi->d_port.out_request,
@@ -452,29 +449,12 @@
usb_gsi_ep_op(d_port->in_ep, (void *)&block_db,
GSI_EP_OP_SET_CLR_BLOCK_DBL);
- /* GSI channel DBL address for USB IN endpoint */
- dbl_register_addr = gsi->d_port.in_db_reg_phs_addr_msb;
- dbl_register_addr = dbl_register_addr << 32;
- dbl_register_addr =
- dbl_register_addr | gsi->d_port.in_db_reg_phs_addr_lsb;
+ usb_gsi_ep_op(gsi->d_port.in_ep, &gsi->d_port.in_request,
+ GSI_EP_OP_RING_DB);
- /* use temp gsi request to pass 64 bit dbl reg addr and num_bufs */
- req.buf_base_addr = &dbl_register_addr;
-
- req.num_bufs = gsi->d_port.in_request.num_bufs;
- usb_gsi_ep_op(gsi->d_port.in_ep, &req, GSI_EP_OP_RING_DB);
-
- if (gsi->d_port.out_ep) {
- /* GSI channel DBL address for USB OUT endpoint */
- dbl_register_addr = gsi->d_port.out_db_reg_phs_addr_msb;
- dbl_register_addr = dbl_register_addr << 32;
- dbl_register_addr = dbl_register_addr |
- gsi->d_port.out_db_reg_phs_addr_lsb;
- /* use temp request to pass 64 bit dbl reg addr and num_bufs */
- req.buf_base_addr = &dbl_register_addr;
- req.num_bufs = gsi->d_port.out_request.num_bufs;
- usb_gsi_ep_op(gsi->d_port.out_ep, &req, GSI_EP_OP_RING_DB);
- }
+ if (gsi->d_port.out_ep)
+ usb_gsi_ep_op(gsi->d_port.out_ep, &gsi->d_port.out_request,
+ GSI_EP_OP_RING_DB);
}
static void ipa_disconnect_handler(struct gsi_data_port *d_port)
@@ -491,11 +471,13 @@
*/
usb_gsi_ep_op(d_port->in_ep, (void *)&block_db,
GSI_EP_OP_SET_CLR_BLOCK_DBL);
- usb_gsi_ep_op(gsi->d_port.in_ep, NULL, GSI_EP_OP_DISABLE);
+ usb_gsi_ep_op(gsi->d_port.in_ep,
+ &gsi->d_port.in_request, GSI_EP_OP_DISABLE);
}
if (gsi->d_port.out_ep)
- usb_gsi_ep_op(gsi->d_port.out_ep, NULL, GSI_EP_OP_DISABLE);
+ usb_gsi_ep_op(gsi->d_port.out_ep,
+ &gsi->d_port.out_request, GSI_EP_OP_DISABLE);
gsi->d_port.net_ready_trigger = false;
}
@@ -1219,14 +1201,16 @@
break;
case QTI_CTRL_GET_LINE_STATE:
val = atomic_read(&gsi->connected);
+ if (gsi->prot_id == IPA_USB_RMNET)
+ val = gsi->rmnet_dtr_status;
+
ret = copy_to_user((void __user *)arg, &val, sizeof(val));
if (ret) {
log_event_err("copy_to_user fail LINE_STATE");
ret = -EFAULT;
}
log_event_dbg("%s: Sent line_state: %d for prot id:%d",
- __func__,
- atomic_read(&gsi->connected), gsi->prot_id);
+ __func__, val, gsi->prot_id);
break;
case QTI_CTRL_EP_LOOKUP:
case GSI_MBIM_EP_LOOKUP:
@@ -1750,6 +1734,7 @@
struct gsi_ctrl_pkt *cpkt;
u8 *buf;
u32 n;
+ bool line_state;
if (!atomic_read(&gsi->connected)) {
log_event_dbg("usb cable is not connected");
@@ -1830,8 +1815,11 @@
break;
case ((USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE) << 8)
| USB_CDC_REQ_SET_CONTROL_LINE_STATE:
+ line_state = (w_value & GSI_CTRL_DTR ? true : false);
+ if (gsi->prot_id == IPA_USB_RMNET)
+ gsi->rmnet_dtr_status = line_state;
log_event_dbg("%s: USB_CDC_REQ_SET_CONTROL_LINE_STATE DTR:%d\n",
- __func__, w_value & GSI_CTRL_DTR ? 1 : 0);
+ __func__, line_state);
gsi_ctrl_send_cpkt_tomodem(gsi, NULL, 0);
value = 0;
break;
@@ -2184,7 +2172,10 @@
if (gsi->prot_id == IPA_USB_RNDIS)
rndis_uninit(gsi->params);
- /* Disable Control Path */
+ if (gsi->prot_id == IPA_USB_RMNET)
+ gsi->rmnet_dtr_status = false;
+
+ /* Disable Control Path */
if (gsi->c_port.notify &&
gsi->c_port.notify->driver_data) {
usb_ep_disable(gsi->c_port.notify);
@@ -3072,7 +3063,7 @@
gsi->d_port.in_channel_handle);
len += scnprintf(buf + len, PAGE_SIZE - len,
"%25s %10x\n", "IN Chnl Dbl Addr: ",
- gsi->d_port.in_db_reg_phs_addr_lsb);
+ gsi->d_port.in_request.db_reg_phs_addr_lsb);
len += scnprintf(buf + len, PAGE_SIZE - len,
"%25s %10u\n", "IN TRB Ring Len: ",
ipa_chnl_params->xfer_ring_len);
@@ -3106,7 +3097,7 @@
gsi->d_port.out_channel_handle);
len += scnprintf(buf + len, PAGE_SIZE - len,
"%25s %10x\n", "OUT Channel Dbl Addr: ",
- gsi->d_port.out_db_reg_phs_addr_lsb);
+ gsi->d_port.out_request.db_reg_phs_addr_lsb);
len += scnprintf(buf + len, PAGE_SIZE - len,
"%25s %10u\n", "OUT TRB Ring Len: ",
ipa_chnl_params->xfer_ring_len);
diff --git a/drivers/usb/gadget/function/f_gsi.h b/drivers/usb/gadget/function/f_gsi.h
index fa36d05..58a7706 100644
--- a/drivers/usb/gadget/function/f_gsi.h
+++ b/drivers/usb/gadget/function/f_gsi.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -232,10 +232,6 @@
struct ipa_usb_teth_params ipa_init_params;
int in_channel_handle;
int out_channel_handle;
- u32 in_db_reg_phs_addr_lsb;
- u32 in_db_reg_phs_addr_msb;
- u32 out_db_reg_phs_addr_lsb;
- u32 out_db_reg_phs_addr_msb;
u32 in_xfer_rsc_index;
u32 out_xfer_rsc_index;
u16 in_last_trb_addr;
@@ -280,6 +276,7 @@
struct gsi_data_port d_port;
struct gsi_ctrl_port c_port;
void *ipc_log_ctxt;
+ bool rmnet_dtr_status;
};
static inline struct f_gsi *func_to_gsi(struct usb_function *f)
diff --git a/drivers/usb/gadget/udc/Kconfig b/drivers/usb/gadget/udc/Kconfig
index 243febf..658b8da 100644
--- a/drivers/usb/gadget/udc/Kconfig
+++ b/drivers/usb/gadget/udc/Kconfig
@@ -389,20 +389,6 @@
dynamically linked module called "udc-xilinx" and force all
gadget drivers to also be dynamically linked.
-config USB_CI13XXX_MSM
- tristate "MIPS USB CI13xxx for MSM"
- select USB_MSM_OTG
- help
- MSM SoC has chipidea USB controller. This driver uses
- ci13xxx_udc core.
- This driver depends on OTG driver for PHY initialization,
- clock management, powering up VBUS, and power management.
- This driver is not supported on boards like trout which
- has an external PHY.
-
- Say "y" to link the driver statically, or "m" to build a
- dynamically linked module called "ci13xxx_msm" and force all
- gadget drivers to also be dynamically linked.
#
# LAST -- dummy/emulated controller
#
diff --git a/drivers/usb/phy/Kconfig b/drivers/usb/phy/Kconfig
index f76d347..17e8edb 100644
--- a/drivers/usb/phy/Kconfig
+++ b/drivers/usb/phy/Kconfig
@@ -253,17 +253,4 @@
the high-speed PHY which is usually paired with either the ChipIdea or
Synopsys DWC3 USB IPs on MSM SOCs. This driver expects to configure the
PHY with a dedicated register I/O memory region.
-
-config USB_MSM_OTG
- tristate "Qualcomm on-chip USB OTG controller support"
- depends on (USB || USB_GADGET) && (ARCH_QCOM || COMPILE_TEST)
- select USB_PHY
- help
- Enable this to support the USB OTG transceiver on Qualcomm chips. It
- handles PHY initialization, clock management, and workarounds
- required after resetting the hardware and power management.
- This driver is required even for peripheral only or host only
- mode configurations.
- This driver is not supported on boards like trout which
- has an external PHY.
endmenu
diff --git a/drivers/usb/phy/Makefile b/drivers/usb/phy/Makefile
index 7e9ffa0..285659d 100644
--- a/drivers/usb/phy/Makefile
+++ b/drivers/usb/phy/Makefile
@@ -31,4 +31,3 @@
obj-$(CONFIG_USB_MSM_SSPHY_QMP) += phy-msm-ssusb-qmp.o
obj-$(CONFIG_MSM_QUSB_PHY) += phy-msm-qusb.o phy-msm-qusb-v2.o
obj-$(CONFIG_MSM_HSUSB_PHY) += phy-msm-snps-hs.o
-obj-$(CONFIG_USB_MSM_OTG) += phy-msm-usb.o
diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
deleted file mode 100644
index 6170656..0000000
--- a/drivers/usb/phy/phy-msm-usb.c
+++ /dev/null
@@ -1,5471 +0,0 @@
-/* Copyright (c) 2009-2017, Linux Foundation. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/err.h>
-#include <linux/delay.h>
-#include <linux/io.h>
-#include <linux/ioport.h>
-#include <linux/gpio.h>
-#include <linux/of_gpio.h>
-#include <linux/of_platform.h>
-#include <linux/uaccess.h>
-#include <linux/debugfs.h>
-#include <linux/seq_file.h>
-#include <linux/pm_runtime.h>
-#include <linux/suspend.h>
-#include <linux/of.h>
-#include <linux/dma-mapping.h>
-#include <linux/pinctrl/consumer.h>
-#include <linux/irqchip/msm-mpm-irq.h>
-#include <linux/pm_wakeup.h>
-#include <linux/reset.h>
-#include <linux/extcon.h>
-#include <soc/qcom/scm.h>
-
-#include <linux/usb.h>
-#include <linux/usb/otg.h>
-#include <linux/usb/ulpi.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/hcd.h>
-#include <linux/usb/msm_hsusb.h>
-#include <linux/usb/msm_hsusb_hw.h>
-#include <linux/regulator/consumer.h>
-#include <linux/regulator/driver.h>
-#include <linux/regulator/machine.h>
-#include <linux/qpnp/qpnp-adc.h>
-
-#include <linux/msm-bus.h>
-
-/**
- * Requested USB votes for BUS bandwidth
- *
- * USB_NO_PERF_VOTE BUS Vote for inactive USB session or disconnect
- * USB_MAX_PERF_VOTE Maximum BUS bandwidth vote
- * USB_MIN_PERF_VOTE Minimum BUS bandwidth vote (for some hw same as NO_PERF)
- *
- */
-enum usb_bus_vote {
- USB_NO_PERF_VOTE = 0,
- USB_MAX_PERF_VOTE,
- USB_MIN_PERF_VOTE,
-};
-
-/**
- * Supported USB modes
- *
- * USB_PERIPHERAL Only peripheral mode is supported.
- * USB_HOST Only host mode is supported.
- * USB_OTG OTG mode is supported.
- *
- */
-enum usb_mode_type {
- USB_NONE = 0,
- USB_PERIPHERAL,
- USB_HOST,
- USB_OTG,
-};
-
-/**
- * OTG control
- *
- * OTG_NO_CONTROL Id/VBUS notifications not required. Useful in host
- * only configuration.
- * OTG_PHY_CONTROL Id/VBUS notifications comes form USB PHY.
- * OTG_PMIC_CONTROL Id/VBUS notifications comes from PMIC hardware.
- * OTG_USER_CONTROL Id/VBUS notifcations comes from User via sysfs.
- *
- */
-enum otg_control_type {
- OTG_NO_CONTROL = 0,
- OTG_PHY_CONTROL,
- OTG_PMIC_CONTROL,
- OTG_USER_CONTROL,
-};
-
-/**
- * PHY used in
- *
- * INVALID_PHY Unsupported PHY
- * CI_PHY Chipidea PHY
- * SNPS_PICO_PHY Synopsis Pico PHY
- * SNPS_FEMTO_PHY Synopsis Femto PHY
- * QUSB_ULPI_PHY
- *
- */
-enum msm_usb_phy_type {
- INVALID_PHY = 0,
- CI_PHY, /* not supported */
- SNPS_PICO_PHY,
- SNPS_FEMTO_PHY,
- QUSB_ULPI_PHY,
-};
-
-#define IDEV_CHG_MAX 1500
-#define IUNIT 100
-#define IDEV_HVDCP_CHG_MAX 1800
-
-/**
- * Used different VDDCX voltage values
- */
-enum usb_vdd_value {
- VDD_NONE = 0,
- VDD_MIN,
- VDD_MAX,
- VDD_VAL_MAX,
-};
-
-/**
- * struct msm_otg_platform_data - platform device data
- * for msm_otg driver.
- * @phy_init_seq: PHY configuration sequence values. Value of -1 is reserved as
- * "do not overwrite default value at this address".
- * @vbus_power: VBUS power on/off routine.It should return result
- * as success(zero value) or failure(non-zero value).
- * @power_budget: VBUS power budget in mA (0 will be treated as 500mA).
- * @mode: Supported mode (OTG/peripheral/host).
- * @otg_control: OTG switch controlled by user/Id pin
- * @default_mode: Default operational mode. Applicable only if
- * OTG switch is controller by user.
- * @pmic_id_irq: IRQ number assigned for PMIC USB ID line.
- * @mpm_otgsessvld_int: MPM wakeup pin assigned for OTG SESSVLD
- * interrupt. Used when .otg_control == OTG_PHY_CONTROL.
- * @mpm_dpshv_int: MPM wakeup pin assigned for DP SHV interrupt.
- * Used during host bus suspend.
- * @mpm_dmshv_int: MPM wakeup pin assigned for DM SHV interrupt.
- * Used during host bus suspend.
- * @disable_reset_on_disconnect: perform USB PHY and LINK reset
- * on USB cable disconnection.
- * @pnoc_errata_fix: workaround needed for PNOC hardware bug that
- * affects USB performance.
- * @enable_lpm_on_suspend: Enable the USB core to go into Low
- * Power Mode, when USB bus is suspended but cable
- * is connected.
- * @core_clk_always_on_workaround: Don't disable core_clk when
- * USB enters LPM.
- * @delay_lpm_on_disconnect: Use a delay before entering LPM
- * upon USB cable disconnection.
- * @enable_sec_phy: Use second HSPHY with USB2 core
- * @bus_scale_table: parameters for bus bandwidth requirements
- * @log2_itc: value of 2^(log2_itc-1) will be used as the
- * interrupt threshold (ITC), when log2_itc is
- * between 1 to 7.
- * @l1_supported: enable link power management support.
- * @dpdm_pulldown_added: Indicates whether pull down resistors are
- * connected on data lines or not.
- * @vddmin_gpio: dedictaed gpio in the platform that is used for
- * pullup the D+ line in case of bus suspend with
- * phy retention.
- * @enable_ahb2ahb_bypass: Indicates whether enable AHB2AHB BYPASS
- * mode with controller in device mode.
- * @bool disable_retention_with_vdd_min: Indicates whether to enable
- allowing VDDmin without putting PHY into retention.
- * @bool enable_phy_id_pullup: Indicates whether phy id pullup is
- enabled or not.
- * @usb_id_gpio: Gpio used for USB ID detection.
- * @hub_reset_gpio: Gpio used for hub reset.
- * @switch_sel_gpio: Gpio used for controlling switch that
- routing D+/D- from the USB HUB to the USB jack type B
- for peripheral mode.
- * @bool phy_dvdd_always_on: PHY DVDD is supplied by always on PMIC LDO.
- * @bool emulation: Indicates whether we are running on emulation platform.
- * @bool enable_streaming: Indicates whether streaming to be enabled by default.
- * @bool enable_axi_prefetch: Indicates whether AXI Prefetch interface is used
- for improving data performance.
- * @bool enable_sdp_typec_current_limit: Indicates whether type-c current for
- sdp charger to be limited.
- * @usbeth_reset_gpio: Gpio used for external usb-to-eth reset.
- */
-struct msm_otg_platform_data {
- int *phy_init_seq;
- int phy_init_sz;
- int (*vbus_power)(bool on);
- unsigned int power_budget;
- enum usb_mode_type mode;
- enum otg_control_type otg_control;
- enum usb_mode_type default_mode;
- enum msm_usb_phy_type phy_type;
- int pmic_id_irq;
- unsigned int mpm_otgsessvld_int;
- unsigned int mpm_dpshv_int;
- unsigned int mpm_dmshv_int;
- bool disable_reset_on_disconnect;
- bool pnoc_errata_fix;
- bool enable_lpm_on_dev_suspend;
- bool core_clk_always_on_workaround;
- bool delay_lpm_on_disconnect;
- bool dp_manual_pullup;
- bool enable_sec_phy;
- struct msm_bus_scale_pdata *bus_scale_table;
- int log2_itc;
- bool l1_supported;
- bool dpdm_pulldown_added;
- int vddmin_gpio;
- bool enable_ahb2ahb_bypass;
- bool disable_retention_with_vdd_min;
- bool enable_phy_id_pullup;
- int usb_id_gpio;
- int hub_reset_gpio;
- int usbeth_reset_gpio;
- int switch_sel_gpio;
- bool phy_dvdd_always_on;
- bool emulation;
- bool enable_streaming;
- bool enable_axi_prefetch;
- bool enable_sdp_typec_current_limit;
- bool vbus_low_as_hostmode;
-};
-
-#define USB_CHG_BLOCK_ULPI 1
-
-#define USB_REQUEST_5V 1
-#define USB_REQUEST_9V 2
-/**
- * struct msm_usb_chg_info - MSM USB charger block details.
- * @chg_block_type: The type of charger block. QSCRATCH/ULPI.
- * @page_offset: USB charger register base may not be aligned to
- * PAGE_SIZE. The kernel driver aligns the base
- * address and use it for memory mapping. This
- * page_offset is used by user space to calaculate
- * the corret charger register base address.
- * @length: The length of the charger register address space.
- */
-struct msm_usb_chg_info {
- uint32_t chg_block_type;
- __kernel_off_t page_offset;
- size_t length;
-};
-
-/* Get the MSM USB charger block information */
-#define MSM_USB_EXT_CHG_INFO _IOW('M', 0, struct msm_usb_chg_info)
-
-/* Vote against USB hardware low power mode */
-#define MSM_USB_EXT_CHG_BLOCK_LPM _IOW('M', 1, int)
-
-/* To tell kernel about voltage being voted */
-#define MSM_USB_EXT_CHG_VOLTAGE_INFO _IOW('M', 2, int)
-
-/* To tell kernel about voltage request result */
-#define MSM_USB_EXT_CHG_RESULT _IOW('M', 3, int)
-
-/* To tell kernel whether charger connected is external charger or not */
-#define MSM_USB_EXT_CHG_TYPE _IOW('M', 4, int)
-
-#define MSM_USB_BASE (motg->regs)
-#define MSM_USB_PHY_CSR_BASE (motg->phy_csr_regs)
-
-#define DRIVER_NAME "msm_otg"
-
-#define CHG_RECHECK_DELAY (jiffies + msecs_to_jiffies(2000))
-#define ULPI_IO_TIMEOUT_USEC (10 * 1000)
-#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
-#define USB_PHY_3P3_VOL_MAX 3300000 /* uV */
-#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
-#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
-
-#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
-#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
-#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
-#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
-
-#define USB_PHY_VDD_DIG_VOL_NONE 0 /*uV */
-#define USB_PHY_VDD_DIG_VOL_MIN 1045000 /* uV */
-#define USB_PHY_VDD_DIG_VOL_MAX 1320000 /* uV */
-
-#define USB_SUSPEND_DELAY_TIME (500 * HZ/1000) /* 500 msec */
-
-#define USB_DEFAULT_SYSTEM_CLOCK 80000000 /* 80 MHz */
-
-#define PM_QOS_SAMPLE_SEC 2
-#define PM_QOS_THRESHOLD 400
-
-#define MICRO_5V 5000000
-#define MICRO_9V 9000000
-
-#define SDP_CURRENT_UA 500000
-#define CDP_CURRENT_UA 1500000
-#define DCP_CURRENT_UA 1500000
-#define HVDCP_CURRENT_UA 3000000
-
-enum msm_otg_phy_reg_mode {
- USB_PHY_REG_OFF,
- USB_PHY_REG_ON,
- USB_PHY_REG_LPM_ON,
- USB_PHY_REG_LPM_OFF,
- USB_PHY_REG_3P3_ON,
- USB_PHY_REG_3P3_OFF,
-};
-
-static char *override_phy_init;
-module_param(override_phy_init, charp, 0644);
-MODULE_PARM_DESC(override_phy_init,
- "Override HSUSB PHY Init Settings");
-
-unsigned int lpm_disconnect_thresh = 1000;
-module_param(lpm_disconnect_thresh, uint, 0644);
-MODULE_PARM_DESC(lpm_disconnect_thresh,
- "Delay before entering LPM on USB disconnect");
-
-static bool floated_charger_enable;
-module_param(floated_charger_enable, bool, 0644);
-MODULE_PARM_DESC(floated_charger_enable,
- "Whether to enable floated charger");
-
-/* by default debugging is enabled */
-static unsigned int enable_dbg_log = 1;
-module_param(enable_dbg_log, uint, 0644);
-MODULE_PARM_DESC(enable_dbg_log, "Debug buffer events");
-
-/* Max current to be drawn for HVDCP charger */
-static int hvdcp_max_current = IDEV_HVDCP_CHG_MAX;
-module_param(hvdcp_max_current, int, 0644);
-MODULE_PARM_DESC(hvdcp_max_current, "max current drawn for HVDCP charger");
-
-/* Max current to be drawn for DCP charger */
-static int dcp_max_current = IDEV_CHG_MAX;
-module_param(dcp_max_current, int, 0644);
-MODULE_PARM_DESC(dcp_max_current, "max current drawn for DCP charger");
-
-static DECLARE_COMPLETION(pmic_vbus_init);
-static struct msm_otg *the_msm_otg;
-static bool debug_bus_voting_enabled;
-
-static struct regulator *hsusb_3p3;
-static struct regulator *hsusb_1p8;
-static struct regulator *hsusb_vdd;
-static struct regulator *vbus_otg;
-static struct power_supply *psy;
-
-static int vdd_val[VDD_VAL_MAX];
-static u32 bus_freqs[USB_NOC_NUM_VOTE][USB_NUM_BUS_CLOCKS] /*bimc,snoc,pcnoc*/;
-static char bus_clkname[USB_NUM_BUS_CLOCKS][20] = {"bimc_clk", "snoc_clk",
- "pcnoc_clk"};
-static bool bus_clk_rate_set;
-
-static void dbg_inc(unsigned int *idx)
-{
- *idx = (*idx + 1) & (DEBUG_MAX_MSG-1);
-}
-
-static void
-msm_otg_dbg_log_event(struct usb_phy *phy, char *event, int d1, int d2)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
- unsigned long flags;
- unsigned long long t;
- unsigned long nanosec;
-
- if (!enable_dbg_log)
- return;
-
- write_lock_irqsave(&motg->dbg_lock, flags);
- t = cpu_clock(smp_processor_id());
- nanosec = do_div(t, 1000000000)/1000;
- scnprintf(motg->buf[motg->dbg_idx], DEBUG_MSG_LEN,
- "[%5lu.%06lu]: %s :%d:%d",
- (unsigned long)t, nanosec, event, d1, d2);
-
- motg->dbg_idx++;
- motg->dbg_idx = motg->dbg_idx % DEBUG_MAX_MSG;
- write_unlock_irqrestore(&motg->dbg_lock, flags);
-}
-
-static int msm_hsusb_ldo_init(struct msm_otg *motg, int init)
-{
- int rc = 0;
-
- if (init) {
- hsusb_3p3 = devm_regulator_get(motg->phy.dev, "HSUSB_3p3");
- if (IS_ERR(hsusb_3p3)) {
- dev_err(motg->phy.dev, "unable to get hsusb 3p3\n");
- return PTR_ERR(hsusb_3p3);
- }
-
- rc = regulator_set_voltage(hsusb_3p3, USB_PHY_3P3_VOL_MIN,
- USB_PHY_3P3_VOL_MAX);
- if (rc) {
- dev_err(motg->phy.dev, "unable to set voltage level for hsusb 3p3\n"
- );
- return rc;
- }
- hsusb_1p8 = devm_regulator_get(motg->phy.dev, "HSUSB_1p8");
- if (IS_ERR(hsusb_1p8)) {
- dev_err(motg->phy.dev, "unable to get hsusb 1p8\n");
- rc = PTR_ERR(hsusb_1p8);
- goto put_3p3_lpm;
- }
- rc = regulator_set_voltage(hsusb_1p8, USB_PHY_1P8_VOL_MIN,
- USB_PHY_1P8_VOL_MAX);
- if (rc) {
- dev_err(motg->phy.dev, "unable to set voltage level for hsusb 1p8\n"
- );
- goto put_1p8;
- }
-
- return 0;
- }
-
-put_1p8:
- regulator_set_voltage(hsusb_1p8, 0, USB_PHY_1P8_VOL_MAX);
-put_3p3_lpm:
- regulator_set_voltage(hsusb_3p3, 0, USB_PHY_3P3_VOL_MAX);
- return rc;
-}
-
-static int msm_hsusb_config_vddcx(int high)
-{
- struct msm_otg *motg = the_msm_otg;
- int max_vol = vdd_val[VDD_MAX];
- int min_vol;
- int ret;
-
- min_vol = vdd_val[!!high];
- ret = regulator_set_voltage(hsusb_vdd, min_vol, max_vol);
- if (ret) {
- pr_err("%s: unable to set the voltage for regulator HSUSB_VDDCX\n",
- __func__);
- return ret;
- }
-
- pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
- msm_otg_dbg_log_event(&motg->phy, "CONFIG VDDCX", min_vol, max_vol);
-
- return ret;
-}
-
-static int msm_hsusb_ldo_enable(struct msm_otg *motg,
- enum msm_otg_phy_reg_mode mode)
-{
- int ret = 0;
-
- if (IS_ERR(hsusb_1p8)) {
- pr_err("%s: HSUSB_1p8 is not initialized\n", __func__);
- return -ENODEV;
- }
-
- if (IS_ERR(hsusb_3p3)) {
- pr_err("%s: HSUSB_3p3 is not initialized\n", __func__);
- return -ENODEV;
- }
-
- switch (mode) {
- case USB_PHY_REG_ON:
- ret = regulator_set_load(hsusb_1p8, USB_PHY_1P8_HPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator HSUSB_1p8\n",
- __func__);
- return ret;
- }
-
- ret = regulator_enable(hsusb_1p8);
- if (ret) {
- dev_err(motg->phy.dev, "%s: unable to enable the hsusb 1p8\n",
- __func__);
- regulator_set_load(hsusb_1p8, 0);
- return ret;
- }
-
- /* fall through */
- case USB_PHY_REG_3P3_ON:
- ret = regulator_set_load(hsusb_3p3, USB_PHY_3P3_HPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator HSUSB_3p3\n",
- __func__);
- if (mode == USB_PHY_REG_ON) {
- regulator_set_load(hsusb_1p8, 0);
- regulator_disable(hsusb_1p8);
- }
- return ret;
- }
-
- ret = regulator_enable(hsusb_3p3);
- if (ret) {
- dev_err(motg->phy.dev, "%s: unable to enable the hsusb 3p3\n",
- __func__);
- regulator_set_load(hsusb_3p3, 0);
- if (mode == USB_PHY_REG_ON) {
- regulator_set_load(hsusb_1p8, 0);
- regulator_disable(hsusb_1p8);
- }
- return ret;
- }
-
- break;
-
- case USB_PHY_REG_OFF:
- ret = regulator_disable(hsusb_1p8);
- if (ret) {
- dev_err(motg->phy.dev, "%s: unable to disable the hsusb 1p8\n",
- __func__);
- return ret;
- }
-
- ret = regulator_set_load(hsusb_1p8, 0);
- if (ret < 0)
- pr_err("%s: Unable to set LPM of the regulator HSUSB_1p8\n",
- __func__);
-
- /* fall through */
- case USB_PHY_REG_3P3_OFF:
- ret = regulator_disable(hsusb_3p3);
- if (ret) {
- dev_err(motg->phy.dev, "%s: unable to disable the hsusb 3p3\n",
- __func__);
- return ret;
- }
- ret = regulator_set_load(hsusb_3p3, 0);
- if (ret < 0)
- pr_err("%s: Unable to set LPM of the regulator HSUSB_3p3\n",
- __func__);
-
- break;
-
- case USB_PHY_REG_LPM_ON:
- ret = regulator_set_load(hsusb_1p8, USB_PHY_1P8_LPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set LPM of the regulator: HSUSB_1p8\n",
- __func__);
- return ret;
- }
-
- ret = regulator_set_load(hsusb_3p3, USB_PHY_3P3_LPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set LPM of the regulator: HSUSB_3p3\n",
- __func__);
- regulator_set_load(hsusb_1p8, USB_PHY_REG_ON);
- return ret;
- }
-
- break;
-
- case USB_PHY_REG_LPM_OFF:
- ret = regulator_set_load(hsusb_1p8, USB_PHY_1P8_HPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator: HSUSB_1p8\n",
- __func__);
- return ret;
- }
-
- ret = regulator_set_load(hsusb_3p3, USB_PHY_3P3_HPM_LOAD);
- if (ret < 0) {
- pr_err("%s: Unable to set HPM of the regulator: HSUSB_3p3\n",
- __func__);
- regulator_set_load(hsusb_1p8, USB_PHY_REG_ON);
- return ret;
- }
-
- break;
-
- default:
- pr_err("%s: Unsupported mode (%d).", __func__, mode);
- return -ENOTSUPP;
- }
-
- pr_debug("%s: USB reg mode (%d) (OFF/HPM/LPM)\n", __func__, mode);
- msm_otg_dbg_log_event(&motg->phy, "USB REG MODE", mode, ret);
- return ret < 0 ? ret : 0;
-}
-
-static int ulpi_read(struct usb_phy *phy, u32 reg)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
- int cnt = 0;
-
- if (motg->pdata->emulation)
- return 0;
-
- if (motg->pdata->phy_type == QUSB_ULPI_PHY && reg > 0x3F) {
- pr_debug("%s: ULPI vendor-specific reg 0x%02x not supported\n",
- __func__, reg);
- return 0;
- }
-
- /* initiate read operation */
- writel_relaxed(ULPI_RUN | ULPI_READ | ULPI_ADDR(reg),
- USB_ULPI_VIEWPORT);
-
- /* wait for completion */
- while (cnt < ULPI_IO_TIMEOUT_USEC) {
- if (!(readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_RUN))
- break;
- udelay(1);
- cnt++;
- }
-
- if (cnt >= ULPI_IO_TIMEOUT_USEC) {
- dev_err(phy->dev, "ulpi_read: timeout %08x\n",
- readl_relaxed(USB_ULPI_VIEWPORT));
- dev_err(phy->dev, "PORTSC: %08x USBCMD: %08x\n",
- readl_relaxed(USB_PORTSC), readl_relaxed(USB_USBCMD));
- return -ETIMEDOUT;
- }
- return ULPI_DATA_READ(readl_relaxed(USB_ULPI_VIEWPORT));
-}
-
-static int ulpi_write(struct usb_phy *phy, u32 val, u32 reg)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
- int cnt = 0;
-
- if (motg->pdata->emulation)
- return 0;
-
- if (motg->pdata->phy_type == QUSB_ULPI_PHY && reg > 0x3F) {
- pr_debug("%s: ULPI vendor-specific reg 0x%02x not supported\n",
- __func__, reg);
- return 0;
- }
-
- /* initiate write operation */
- writel_relaxed(ULPI_RUN | ULPI_WRITE |
- ULPI_ADDR(reg) | ULPI_DATA(val),
- USB_ULPI_VIEWPORT);
-
- /* wait for completion */
- while (cnt < ULPI_IO_TIMEOUT_USEC) {
- if (!(readl_relaxed(USB_ULPI_VIEWPORT) & ULPI_RUN))
- break;
- udelay(1);
- cnt++;
- }
-
- if (cnt >= ULPI_IO_TIMEOUT_USEC) {
- dev_err(phy->dev, "ulpi_write: timeout\n");
- dev_err(phy->dev, "PORTSC: %08x USBCMD: %08x\n",
- readl_relaxed(USB_PORTSC), readl_relaxed(USB_USBCMD));
- return -ETIMEDOUT;
- }
- return 0;
-}
-
-static struct usb_phy_io_ops msm_otg_io_ops = {
- .read = ulpi_read,
- .write = ulpi_write,
-};
-
-static void ulpi_init(struct msm_otg *motg)
-{
- struct msm_otg_platform_data *pdata = motg->pdata;
- int aseq[10];
- int *seq = NULL;
-
- if (override_phy_init) {
- pr_debug("%s(): HUSB PHY Init:%s\n", __func__,
- override_phy_init);
- get_options(override_phy_init, ARRAY_SIZE(aseq), aseq);
- seq = &aseq[1];
- } else {
- seq = pdata->phy_init_seq;
- }
-
- if (!seq)
- return;
-
- while (seq[0] >= 0) {
- if (override_phy_init)
- pr_debug("ulpi: write 0x%02x to 0x%02x\n",
- seq[0], seq[1]);
-
- dev_vdbg(motg->phy.dev, "ulpi: write 0x%02x to 0x%02x\n",
- seq[0], seq[1]);
- msm_otg_dbg_log_event(&motg->phy, "ULPI WRITE", seq[0], seq[1]);
- ulpi_write(&motg->phy, seq[0], seq[1]);
- seq += 2;
- }
-}
-
-static int msm_otg_phy_clk_reset(struct msm_otg *motg)
-{
- int ret;
-
- if (!motg->phy_reset_clk)
- return 0;
-
- if (motg->sleep_clk)
- clk_disable_unprepare(motg->sleep_clk);
- if (motg->phy_csr_clk)
- clk_disable_unprepare(motg->phy_csr_clk);
-
- ret = reset_control_assert(motg->phy_reset);
- if (ret) {
- pr_err("phy_reset_clk assert failed %d\n", ret);
- return ret;
- }
- /*
- * As per databook, 10 usec delay is required between
- * PHY POR assert and de-assert.
- */
- usleep_range(10, 15);
- ret = reset_control_deassert(motg->phy_reset);
- if (ret) {
- pr_err("phy_reset_clk de-assert failed %d\n", ret);
- return ret;
- }
- /*
- * As per databook, it takes 75 usec for PHY to stabilize
- * after the reset.
- */
- usleep_range(80, 100);
-
- if (motg->phy_csr_clk)
- clk_prepare_enable(motg->phy_csr_clk);
- if (motg->sleep_clk)
- clk_prepare_enable(motg->sleep_clk);
-
- return 0;
-}
-
-static int msm_otg_link_clk_reset(struct msm_otg *motg, bool assert)
-{
- int ret;
-
- if (assert) {
- /* Using asynchronous block reset to the hardware */
- dev_dbg(motg->phy.dev, "block_reset ASSERT\n");
- clk_disable_unprepare(motg->pclk);
- clk_disable_unprepare(motg->core_clk);
- ret = reset_control_assert(motg->core_reset);
- if (ret)
- dev_err(motg->phy.dev, "usb hs_clk assert failed\n");
- } else {
- dev_dbg(motg->phy.dev, "block_reset DEASSERT\n");
- ret = reset_control_deassert(motg->core_reset);
- ndelay(200);
- ret = clk_prepare_enable(motg->core_clk);
- WARN(ret, "USB core_clk enable failed\n");
- ret = clk_prepare_enable(motg->pclk);
- WARN(ret, "USB pclk enable failed\n");
- if (ret)
- dev_err(motg->phy.dev, "usb hs_clk deassert failed\n");
- }
- return ret;
-}
-
-static int msm_otg_phy_reset(struct msm_otg *motg)
-{
- u32 val;
- int ret;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- /*
- * AHB2AHB Bypass mode shouldn't be enable before doing
- * async clock reset. If it is enable, disable the same.
- */
- val = readl_relaxed(USB_AHBMODE);
- if (val & AHB2AHB_BYPASS) {
- pr_err("%s(): AHB2AHB_BYPASS SET: AHBMODE:%x\n",
- __func__, val);
- val &= ~AHB2AHB_BYPASS_BIT_MASK;
- writel_relaxed(val | AHB2AHB_BYPASS_CLEAR, USB_AHBMODE);
- pr_err("%s(): AHBMODE: %x\n", __func__,
- readl_relaxed(USB_AHBMODE));
- }
-
- ret = msm_otg_link_clk_reset(motg, 1);
- if (ret)
- return ret;
-
- msm_otg_phy_clk_reset(motg);
-
- /* wait for 1ms delay as suggested in HPG. */
- usleep_range(1000, 1200);
-
- ret = msm_otg_link_clk_reset(motg, 0);
- if (ret)
- return ret;
-
- if (pdata && pdata->enable_sec_phy)
- writel_relaxed(readl_relaxed(USB_PHY_CTRL2) | (1<<16),
- USB_PHY_CTRL2);
- val = readl_relaxed(USB_PORTSC) & ~PORTSC_PTS_MASK;
- writel_relaxed(val | PORTSC_PTS_ULPI, USB_PORTSC);
-
- dev_info(motg->phy.dev, "phy_reset: success\n");
- msm_otg_dbg_log_event(&motg->phy, "PHY RESET SUCCESS",
- motg->inputs, motg->phy.otg->state);
- return 0;
-}
-
-#define LINK_RESET_TIMEOUT_USEC (250 * 1000)
-static int msm_otg_link_reset(struct msm_otg *motg)
-{
- int cnt = 0;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- writel_relaxed(USBCMD_RESET, USB_USBCMD);
- while (cnt < LINK_RESET_TIMEOUT_USEC) {
- if (!(readl_relaxed(USB_USBCMD) & USBCMD_RESET))
- break;
- udelay(1);
- cnt++;
- }
- if (cnt >= LINK_RESET_TIMEOUT_USEC)
- return -ETIMEDOUT;
-
- /* select ULPI phy */
- writel_relaxed(0x80000000, USB_PORTSC);
- writel_relaxed(0x0, USB_AHBBURST);
- writel_relaxed(0x08, USB_AHBMODE);
-
- if (pdata && pdata->enable_sec_phy)
- writel_relaxed(readl_relaxed(USB_PHY_CTRL2) | (1<<16),
- USB_PHY_CTRL2);
- return 0;
-}
-
-#define QUSB2PHY_PORT_POWERDOWN 0xB4
-#define QUSB2PHY_PORT_UTMI_CTRL2 0xC4
-
-static void msm_usb_phy_reset(struct msm_otg *motg)
-{
- u32 val;
- int ret, *seq;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- /* Assert USB PHY_PON */
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- val &= ~PHY_POR_BIT_MASK;
- val |= PHY_POR_ASSERT;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
-
- /* wait for minimum 10 microseconds as
- * suggested in HPG.
- */
- usleep_range(10, 15);
-
- /* Deassert USB PHY_PON */
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- val &= ~PHY_POR_BIT_MASK;
- val |= PHY_POR_DEASSERT;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
- break;
- case QUSB_ULPI_PHY:
- ret = reset_control_assert(motg->phy_reset);
- if (ret) {
- pr_err("phy_reset_clk assert failed %d\n", ret);
- break;
- }
-
- /* need to delay 10us for PHY to reset */
- usleep_range(10, 20);
-
- ret = reset_control_deassert(motg->phy_reset);
- if (ret) {
- pr_err("phy_reset_clk de-assert failed %d\n", ret);
- break;
- }
-
- /* Ensure that RESET operation is completed. */
- mb();
-
- writel_relaxed(0x23,
- motg->phy_csr_regs + QUSB2PHY_PORT_POWERDOWN);
- writel_relaxed(0x0,
- motg->phy_csr_regs + QUSB2PHY_PORT_UTMI_CTRL2);
-
- /* Program tuning parameters for PHY */
- seq = motg->pdata->phy_init_seq;
- if (seq) {
- while (seq[0] >= 0) {
- writel_relaxed(seq[1],
- motg->phy_csr_regs + seq[0]);
- seq += 2;
- }
- }
-
- /* ensure above writes are completed before re-enabling PHY */
- wmb();
- writel_relaxed(0x22,
- motg->phy_csr_regs + QUSB2PHY_PORT_POWERDOWN);
- break;
- case SNPS_FEMTO_PHY:
- if (!motg->phy_por_clk) {
- pr_err("phy_por_clk missing\n");
- break;
- }
- ret = reset_control_assert(motg->phy_por_reset);
- if (ret) {
- pr_err("phy_por_clk assert failed %d\n", ret);
- break;
- }
- /*
- * The Femto PHY is POR reset in the following scenarios.
- *
- * 1. After overriding the parameter registers.
- * 2. Low power mode exit from PHY retention.
- *
- * Ensure that SIDDQ is cleared before bringing the PHY
- * out of reset.
- *
- */
-
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL_COMMON0);
- val &= ~SIDDQ;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL_COMMON0);
-
- /*
- * As per databook, 10 usec delay is required between
- * PHY POR assert and de-assert.
- */
- usleep_range(10, 20);
- ret = reset_control_deassert(motg->phy_por_reset);
- if (ret) {
- pr_err("phy_por_clk de-assert failed %d\n", ret);
- break;
- }
- /*
- * As per databook, it takes 75 usec for PHY to stabilize
- * after the reset.
- */
- usleep_range(80, 100);
- break;
- default:
- break;
- }
- /* Ensure that RESET operation is completed. */
- mb();
-}
-
-static int msm_otg_reset(struct usb_phy *phy)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
- struct msm_otg_platform_data *pdata = motg->pdata;
- int ret;
- u32 val = 0;
- u32 ulpi_val = 0;
-
- msm_otg_dbg_log_event(&motg->phy, "USB RESET", phy->otg->state,
- get_pm_runtime_counter(phy->dev));
- /*
- * USB PHY and Link reset also reset the USB BAM.
- * Thus perform reset operation only once to avoid
- * USB BAM reset on other cases e.g. USB cable disconnections.
- * If hardware reported error then it must be reset for recovery.
- */
- if (motg->err_event_seen)
- dev_info(phy->dev, "performing USB h/w reset for recovery\n");
- else if (pdata->disable_reset_on_disconnect && motg->reset_counter)
- return 0;
-
- motg->reset_counter++;
-
- disable_irq(motg->irq);
- if (motg->phy_irq)
- disable_irq(motg->phy_irq);
-
- ret = msm_otg_phy_reset(motg);
- if (ret) {
- dev_err(phy->dev, "phy_reset failed\n");
- if (motg->phy_irq)
- enable_irq(motg->phy_irq);
-
- enable_irq(motg->irq);
- return ret;
- }
-
- if (motg->phy_irq)
- enable_irq(motg->phy_irq);
-
- enable_irq(motg->irq);
- ret = msm_otg_link_reset(motg);
- if (ret) {
- dev_err(phy->dev, "link reset failed\n");
- return ret;
- }
-
- msleep(100);
-
- /* Reset USB PHY after performing USB Link RESET */
- msm_usb_phy_reset(motg);
-
- /* Program USB PHY Override registers. */
- ulpi_init(motg);
-
- /*
- * It is required to reset USB PHY after programming
- * the USB PHY Override registers to get the new
- * values into effect.
- */
- msm_usb_phy_reset(motg);
-
- if (pdata->otg_control == OTG_PHY_CONTROL) {
- val = readl_relaxed(USB_OTGSC);
- if (pdata->mode == USB_OTG) {
- ulpi_val = ULPI_INT_IDGRD | ULPI_INT_SESS_VALID;
- val |= OTGSC_IDIE | OTGSC_BSVIE;
- } else if (pdata->mode == USB_PERIPHERAL) {
- ulpi_val = ULPI_INT_SESS_VALID;
- val |= OTGSC_BSVIE;
- }
- writel_relaxed(val, USB_OTGSC);
- ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_RISE);
- ulpi_write(phy, ulpi_val, ULPI_USB_INT_EN_FALL);
- } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
- ulpi_write(phy, OTG_COMP_DISABLE,
- ULPI_SET(ULPI_PWR_CLK_MNG_REG));
- if (motg->phy_irq)
- writeb_relaxed(USB_PHY_ID_MASK,
- USB2_PHY_USB_PHY_INTERRUPT_MASK1);
- }
-
- if (motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED)
- writel_relaxed(readl_relaxed(USB_OTGSC) & ~(OTGSC_IDPU),
- USB_OTGSC);
-
- msm_otg_dbg_log_event(&motg->phy, "USB RESET DONE", phy->otg->state,
- get_pm_runtime_counter(phy->dev));
-
- if (pdata->enable_axi_prefetch)
- writel_relaxed(readl_relaxed(USB_HS_APF_CTRL) | (APF_CTRL_EN),
- USB_HS_APF_CTRL);
-
- /*
- * Disable USB BAM as block reset resets USB BAM registers.
- */
- msm_usb_bam_enable(CI_CTRL, false);
-
- return 0;
-}
-
-static void msm_otg_kick_sm_work(struct msm_otg *motg)
-{
- if (atomic_read(&motg->in_lpm))
- motg->resume_pending = true;
-
- /* For device mode, resume now. Let pm_resume handle other cases */
- if (atomic_read(&motg->pm_suspended) &&
- motg->phy.otg->state != OTG_STATE_B_SUSPEND) {
- motg->sm_work_pending = true;
- } else if (!motg->sm_work_pending) {
- /* process event only if previous one is not pending */
- queue_work(motg->otg_wq, &motg->sm_work);
- }
-}
-
-/*
- * UDC calls usb_phy_set_suspend() to notify during bus suspend/resume.
- * Update relevant state-machine inputs and queue sm_work.
- * LPM enter/exit doesn't happen directly from this routine.
- */
-
-static int msm_otg_set_suspend(struct usb_phy *phy, int suspend)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
-
- pr_debug("%s(%d) in %s state\n", __func__, suspend,
- usb_otg_state_string(phy->otg->state));
- msm_otg_dbg_log_event(phy, "SET SUSPEND", suspend, phy->otg->state);
-
- if (!(motg->caps & ALLOW_LPM_ON_DEV_SUSPEND))
- return 0;
-
- if (suspend) {
- /* called in suspend interrupt context */
- pr_debug("peripheral bus suspend\n");
- msm_otg_dbg_log_event(phy, "PERIPHERAL BUS SUSPEND",
- motg->inputs, phy->otg->state);
-
- set_bit(A_BUS_SUSPEND, &motg->inputs);
- } else {
- /* host resume or remote-wakeup */
- pr_debug("peripheral bus resume\n");
- msm_otg_dbg_log_event(phy, "PERIPHERAL BUS RESUME",
- motg->inputs, phy->otg->state);
-
- clear_bit(A_BUS_SUSPEND, &motg->inputs);
- }
- /* use kick_sm_work to handle race with pm_resume */
- msm_otg_kick_sm_work(motg);
-
- return 0;
-}
-
-static int msm_otg_bus_freq_set(struct msm_otg *motg, enum usb_noc_mode mode)
-{
- int i, ret;
- long rate;
-
- for (i = 0; i < USB_NUM_BUS_CLOCKS; i++) {
- rate = bus_freqs[mode][i];
- if (!rate) {
- pr_debug("%s rate not available\n", bus_clkname[i]);
- continue;
- }
-
- ret = clk_set_rate(motg->bus_clks[i], rate);
- if (ret) {
- pr_err("%s set rate failed: %d\n", bus_clkname[i], ret);
- return ret;
- }
- pr_debug("%s set to %lu Hz\n", bus_clkname[i],
- clk_get_rate(motg->bus_clks[i]));
- msm_otg_dbg_log_event(&motg->phy, "OTG BUS FREQ SET", i, rate);
- }
-
- bus_clk_rate_set = true;
-
- return 0;
-}
-
-static int msm_otg_bus_freq_get(struct msm_otg *motg)
-{
- struct device *dev = motg->phy.dev;
- struct device_node *np = dev->of_node;
- int len = 0, i, count = USB_NUM_BUS_CLOCKS;
-
- if (!np)
- return -EINVAL;
-
- of_find_property(np, "qcom,bus-clk-rate", &len);
- /* SVS requires extra set of frequencies for perf_mode sysfs node */
- if (motg->default_noc_mode == USB_NOC_SVS_VOTE)
- count *= 2;
-
- if (!len || (len / sizeof(u32) != count)) {
- pr_err("Invalid bus rate:%d %u\n", len, motg->default_noc_mode);
- return -EINVAL;
- }
- of_property_read_u32_array(np, "qcom,bus-clk-rate", bus_freqs[0],
- count);
- for (i = 0; i < USB_NUM_BUS_CLOCKS; i++) {
- if (bus_freqs[0][i] == 0) {
- motg->bus_clks[i] = NULL;
- pr_debug("%s not available\n", bus_clkname[i]);
- continue;
- }
-
- motg->bus_clks[i] = devm_clk_get(dev, bus_clkname[i]);
- if (IS_ERR(motg->bus_clks[i])) {
- pr_err("%s get failed\n", bus_clkname[i]);
- return PTR_ERR(motg->bus_clks[i]);
- }
- }
- return 0;
-}
-
-static void msm_otg_bus_clks_enable(struct msm_otg *motg)
-{
- int i;
- int ret;
-
- if (!bus_clk_rate_set || motg->bus_clks_enabled)
- return;
-
- for (i = 0; i < USB_NUM_BUS_CLOCKS; i++) {
- if (motg->bus_clks[i] == NULL)
- continue;
- ret = clk_prepare_enable(motg->bus_clks[i]);
- if (ret) {
- pr_err("%s enable rate failed: %d\n", bus_clkname[i],
- ret);
- goto err_clk_en;
- }
- }
- motg->bus_clks_enabled = true;
- return;
-err_clk_en:
- for (--i; i >= 0; --i) {
- if (motg->bus_clks[i] != NULL)
- clk_disable_unprepare(motg->bus_clks[i]);
- }
-}
-
-static void msm_otg_bus_clks_disable(struct msm_otg *motg)
-{
- int i;
-
- if (!bus_clk_rate_set || !motg->bus_clks_enabled)
- return;
-
- for (i = 0; i < USB_NUM_BUS_CLOCKS; i++) {
- if (motg->bus_clks[i] != NULL)
- clk_disable_unprepare(motg->bus_clks[i]);
- }
- motg->bus_clks_enabled = false;
-}
-
-static void msm_otg_bus_vote(struct msm_otg *motg, enum usb_bus_vote vote)
-{
- int ret;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- msm_otg_dbg_log_event(&motg->phy, "BUS VOTE", vote,
- motg->phy.otg->state);
- /* Check if target allows min_vote to be same as no_vote */
- if (pdata->bus_scale_table &&
- vote >= pdata->bus_scale_table->num_usecases)
- vote = USB_NO_PERF_VOTE;
-
- if (motg->bus_perf_client) {
- ret = msm_bus_scale_client_update_request(
- motg->bus_perf_client, vote);
- if (ret)
- dev_err(motg->phy.dev, "%s: Failed to vote (%d)\n"
- "for bus bw %d\n", __func__, vote, ret);
- }
-
- if (vote == USB_MAX_PERF_VOTE)
- msm_otg_bus_clks_enable(motg);
- else
- msm_otg_bus_clks_disable(motg);
-}
-
-static void msm_otg_enable_phy_hv_int(struct msm_otg *motg)
-{
- bool bsv_id_hv_int = false;
- bool dp_dm_hv_int = false;
- u32 val;
-
- if (motg->pdata->otg_control == OTG_PHY_CONTROL ||
- motg->phy_irq)
- bsv_id_hv_int = true;
- if (motg->host_bus_suspend || motg->device_bus_suspend)
- dp_dm_hv_int = true;
-
- if (!bsv_id_hv_int && !dp_dm_hv_int)
- return;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- if (bsv_id_hv_int)
- val |= (PHY_IDHV_INTEN | PHY_OTGSESSVLDHV_INTEN);
- if (dp_dm_hv_int)
- val |= PHY_CLAMP_DPDMSE_EN;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
- break;
- case SNPS_FEMTO_PHY:
- if (bsv_id_hv_int) {
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL1);
- val |= ID_HV_CLAMP_EN_N;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL1);
- }
-
- if (dp_dm_hv_int) {
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL3);
- val |= CLAMP_MPM_DPSE_DMSE_EN_N;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL3);
- }
- break;
- default:
- break;
- }
- pr_debug("%s: bsv_id_hv = %d dp_dm_hv_int = %d\n",
- __func__, bsv_id_hv_int, dp_dm_hv_int);
- msm_otg_dbg_log_event(&motg->phy, "PHY HV INTR ENABLED",
- bsv_id_hv_int, dp_dm_hv_int);
-}
-
-static void msm_otg_disable_phy_hv_int(struct msm_otg *motg)
-{
- bool bsv_id_hv_int = false;
- bool dp_dm_hv_int = false;
- u32 val;
-
- if (motg->pdata->otg_control == OTG_PHY_CONTROL ||
- motg->phy_irq)
- bsv_id_hv_int = true;
- if (motg->host_bus_suspend || motg->device_bus_suspend)
- dp_dm_hv_int = true;
-
- if (!bsv_id_hv_int && !dp_dm_hv_int)
- return;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- if (bsv_id_hv_int)
- val &= ~(PHY_IDHV_INTEN | PHY_OTGSESSVLDHV_INTEN);
- if (dp_dm_hv_int)
- val &= ~PHY_CLAMP_DPDMSE_EN;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
- break;
- case SNPS_FEMTO_PHY:
- if (bsv_id_hv_int) {
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL1);
- val &= ~ID_HV_CLAMP_EN_N;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL1);
- }
-
- if (dp_dm_hv_int) {
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL3);
- val &= ~CLAMP_MPM_DPSE_DMSE_EN_N;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL3);
- }
- break;
- default:
- break;
- }
- pr_debug("%s: bsv_id_hv = %d dp_dm_hv_int = %d\n",
- __func__, bsv_id_hv_int, dp_dm_hv_int);
- msm_otg_dbg_log_event(&motg->phy, "PHY HV INTR DISABLED",
- bsv_id_hv_int, dp_dm_hv_int);
-}
-
-static void msm_otg_enter_phy_retention(struct msm_otg *motg)
-{
- u32 val;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- val &= ~PHY_RETEN;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
- break;
- case SNPS_FEMTO_PHY:
- /* Retention is supported via SIDDQ */
- val = readb_relaxed(USB_PHY_CSR_PHY_CTRL_COMMON0);
- val |= SIDDQ;
- writeb_relaxed(val, USB_PHY_CSR_PHY_CTRL_COMMON0);
- break;
- default:
- break;
- }
- pr_debug("USB PHY is in retention\n");
- msm_otg_dbg_log_event(&motg->phy, "USB PHY ENTER RETENTION",
- motg->pdata->phy_type, 0);
-}
-
-static void msm_otg_exit_phy_retention(struct msm_otg *motg)
-{
- int val;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- val = readl_relaxed(motg->usb_phy_ctrl_reg);
- val |= PHY_RETEN;
- writel_relaxed(val, motg->usb_phy_ctrl_reg);
- break;
- case SNPS_FEMTO_PHY:
- /*
- * It is required to do USB block reset to bring Femto PHY out
- * of retention.
- */
- msm_otg_reset(&motg->phy);
- break;
- default:
- break;
- }
- pr_debug("USB PHY is exited from retention\n");
- msm_otg_dbg_log_event(&motg->phy, "USB PHY EXIT RETENTION",
- motg->pdata->phy_type, 0);
-}
-
-static void msm_id_status_w(struct work_struct *w);
-static irqreturn_t msm_otg_phy_irq_handler(int irq, void *data)
-{
- struct msm_otg *motg = data;
-
- msm_otg_dbg_log_event(&motg->phy, "PHY ID IRQ",
- atomic_read(&motg->in_lpm), motg->phy.otg->state);
- if (atomic_read(&motg->in_lpm)) {
- pr_debug("PHY ID IRQ in LPM\n");
- motg->phy_irq_pending = true;
- msm_otg_kick_sm_work(motg);
- } else {
- pr_debug("PHY ID IRQ outside LPM\n");
- msm_id_status_w(&motg->id_status_work.work);
- }
-
- return IRQ_HANDLED;
-}
-
-#define PHY_SUSPEND_TIMEOUT_USEC (5 * 1000)
-#define PHY_DEVICE_BUS_SUSPEND_TIMEOUT_USEC 100
-#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
-
-#define PHY_SUSPEND_RETRIES_MAX 3
-
-static void msm_otg_set_vbus_state(int online);
-static void msm_otg_perf_vote_update(struct msm_otg *motg, bool perf_mode);
-
-#ifdef CONFIG_PM_SLEEP
-static int msm_otg_suspend(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- struct usb_bus *bus = phy->otg->host;
- struct msm_otg_platform_data *pdata = motg->pdata;
- int cnt;
- bool host_bus_suspend, device_bus_suspend, dcp, prop_charger;
- bool floated_charger, sm_work_busy;
- u32 cmd_val;
- u32 portsc, config2;
- u32 func_ctrl;
- int phcd_retry_cnt = 0, ret;
- unsigned int phy_suspend_timeout;
-
- cnt = 0;
- msm_otg_dbg_log_event(phy, "LPM ENTER START",
- motg->inputs, phy->otg->state);
-
- if (atomic_read(&motg->in_lpm))
- return 0;
-
- cancel_delayed_work_sync(&motg->perf_vote_work);
-
- disable_irq(motg->irq);
- if (motg->phy_irq)
- disable_irq(motg->phy_irq);
-lpm_start:
- host_bus_suspend = phy->otg->host && !test_bit(ID, &motg->inputs);
- device_bus_suspend = phy->otg->gadget && test_bit(ID, &motg->inputs) &&
- test_bit(A_BUS_SUSPEND, &motg->inputs) &&
- motg->caps & ALLOW_LPM_ON_DEV_SUSPEND;
-
- if (host_bus_suspend)
- msm_otg_perf_vote_update(motg, false);
- /*
- * Allow putting PHY into SIDDQ with wall charger connected in
- * case of external charger detection.
- */
- dcp = (motg->chg_type == USB_DCP_CHARGER) && !motg->is_ext_chg_dcp;
- prop_charger = motg->chg_type == USB_NONCOMPLIANT_CHARGER;
- floated_charger = motg->chg_type == USB_FLOATED_CHARGER;
-
- /* !BSV, but its handling is in progress by otg sm_work */
- sm_work_busy = !test_bit(B_SESS_VLD, &motg->inputs) &&
- phy->otg->state == OTG_STATE_B_PERIPHERAL;
-
- /* Perform block reset to recover from UDC error events on disconnect */
- if (motg->err_event_seen)
- msm_otg_reset(phy);
-
- /* Enable line state difference wakeup fix for only device and host
- * bus suspend scenarios. Otherwise PHY can not be suspended when
- * a charger that pulls DP/DM high is connected.
- */
- config2 = readl_relaxed(USB_GENCONFIG_2);
- if (device_bus_suspend)
- config2 |= GENCONFIG_2_LINESTATE_DIFF_WAKEUP_EN;
- else
- config2 &= ~GENCONFIG_2_LINESTATE_DIFF_WAKEUP_EN;
- writel_relaxed(config2, USB_GENCONFIG_2);
-
- /*
- * Abort suspend when,
- * 1. charging detection in progress due to cable plug-in
- * 2. host mode activation in progress due to Micro-A cable insertion
- * 3. !BSV, but its handling is in progress by otg sm_work
- * Don't abort suspend in case of dcp detected by PMIC
- */
-
- if ((test_bit(B_SESS_VLD, &motg->inputs) && !device_bus_suspend &&
- !dcp && !motg->is_ext_chg_dcp && !prop_charger &&
- !floated_charger) || sm_work_busy) {
- msm_otg_dbg_log_event(phy, "LPM ENTER ABORTED",
- motg->inputs, motg->chg_type);
- enable_irq(motg->irq);
- if (motg->phy_irq)
- enable_irq(motg->phy_irq);
- return -EBUSY;
- }
-
- if (motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED) {
- /* put the controller in non-driving mode */
- func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
- func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
- func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
- ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
- ulpi_write(phy, ULPI_IFC_CTRL_AUTORESUME,
- ULPI_CLR(ULPI_IFC_CTRL));
- }
-
- /*
- * PHY suspend sequence as mentioned in the databook.
- *
- * Device bus suspend: The controller may abort PHY suspend if
- * there is an incoming reset or resume from the host. If PHCD
- * is not set within 100 usec. Abort the LPM sequence.
- *
- * Host bus suspend: If the peripheral is attached, PHY is already
- * put into suspend along with the peripheral bus suspend. poll for
- * PHCD upto 5 msec. If the peripheral is not attached i.e entering
- * LPM with Micro-A cable, set the PHCD and poll for it for 5 msec.
- *
- * No cable connected: Set the PHCD to suspend the PHY. Poll for PHCD
- * upto 5 msec.
- *
- * The controller aborts PHY suspend only in device bus suspend case.
- * In other cases, it is observed that PHCD may not get set within
- * the timeout. If so, set the PHCD again and poll for it before
- * reset recovery.
- */
-
-phcd_retry:
- if (device_bus_suspend)
- phy_suspend_timeout = PHY_DEVICE_BUS_SUSPEND_TIMEOUT_USEC;
- else
- phy_suspend_timeout = PHY_SUSPEND_TIMEOUT_USEC;
-
- cnt = 0;
- portsc = readl_relaxed(USB_PORTSC);
- if (!(portsc & PORTSC_PHCD)) {
- writel_relaxed(portsc | PORTSC_PHCD,
- USB_PORTSC);
- while (cnt < phy_suspend_timeout) {
- if (readl_relaxed(USB_PORTSC) & PORTSC_PHCD)
- break;
- udelay(1);
- cnt++;
- }
- }
-
- if (cnt >= phy_suspend_timeout) {
- if (phcd_retry_cnt > PHY_SUSPEND_RETRIES_MAX) {
- msm_otg_dbg_log_event(phy, "PHY SUSPEND FAILED",
- phcd_retry_cnt, phy->otg->state);
- dev_err(phy->dev, "PHY suspend failed\n");
- ret = -EBUSY;
- goto phy_suspend_fail;
- }
-
- if (device_bus_suspend) {
- dev_dbg(phy->dev, "PHY suspend aborted\n");
- ret = -EBUSY;
- goto phy_suspend_fail;
- } else {
- if (phcd_retry_cnt++ < PHY_SUSPEND_RETRIES_MAX) {
- dev_dbg(phy->dev, "PHY suspend retry\n");
- goto phcd_retry;
- } else {
- dev_err(phy->dev, "reset attempt during PHY suspend\n");
- phcd_retry_cnt++;
- motg->reset_counter = 0;
- msm_otg_reset(phy);
- goto lpm_start;
- }
- }
- }
-
- /*
- * PHY has capability to generate interrupt asynchronously in low
- * power mode (LPM). This interrupt is level triggered. So USB IRQ
- * line must be disabled till async interrupt enable bit is cleared
- * in USBCMD register. Assert STP (ULPI interface STOP signal) to
- * block data communication from PHY.
- *
- * PHY retention mode is disallowed while entering to LPM with wall
- * charger connected. But PHY is put into suspend mode. Hence
- * enable asynchronous interrupt to detect charger disconnection when
- * PMIC notifications are unavailable.
- */
- cmd_val = readl_relaxed(USB_USBCMD);
- if (host_bus_suspend || device_bus_suspend ||
- (motg->pdata->otg_control == OTG_PHY_CONTROL))
- cmd_val |= ASYNC_INTR_CTRL | ULPI_STP_CTRL;
- else
- cmd_val |= ULPI_STP_CTRL;
- writel_relaxed(cmd_val, USB_USBCMD);
-
- /*
- * BC1.2 spec mandates PD to enable VDP_SRC when charging from DCP.
- * PHY retention and collapse can not happen with VDP_SRC enabled.
- */
-
-
- /*
- * We come here in 3 scenarios.
- *
- * (1) No cable connected (out of session):
- * - BSV/ID HV interrupts are enabled for PHY based detection.
- * - PHY is put in retention.
- * - If allowed (PMIC based detection), PHY is power collapsed.
- * - DVDD (CX/MX) minimization and XO shutdown are allowed.
- * - The wakeup is through VBUS/ID interrupt from PHY/PMIC/user.
- * (2) USB wall charger:
- * - BSV/ID HV interrupts are enabled for PHY based detection.
- * - For BC1.2 compliant charger, retention is not allowed to
- * keep VDP_SRC on. XO shutdown is allowed.
- * - The wakeup is through VBUS/ID interrupt from PHY/PMIC/user.
- * (3) Device/Host Bus suspend (if LPM is enabled):
- * - BSV/ID HV interrupts are enabled for PHY based detection.
- * - D+/D- MPM pin are configured to wakeup from line state
- * change through PHY HV interrupts. PHY HV interrupts are
- * also enabled. If MPM pins are not available, retention and
- * XO is not allowed.
- * - PHY is put into retention only if a gpio is used to keep
- * the D+ pull-up. ALLOW_BUS_SUSPEND_WITHOUT_REWORK capability
- * is set means, PHY can enable D+ pull-up or D+/D- pull-down
- * without any re-work and PHY should not be put into retention.
- * - DVDD (CX/MX) minimization and XO shutdown is allowed if
- * ALLOW_BUS_SUSPEND_WITHOUT_REWORK is set (PHY DVDD is supplied
- * via PMIC LDO) or board level re-work is present.
- * - The wakeup is through VBUS/ID interrupt from PHY/PMIC/user
- * or USB link asynchronous interrupt for line state change.
- *
- */
- motg->host_bus_suspend = host_bus_suspend;
- motg->device_bus_suspend = device_bus_suspend;
-
- if (motg->caps & ALLOW_PHY_RETENTION && !device_bus_suspend && !dcp &&
- (!host_bus_suspend || (motg->caps &
- ALLOW_BUS_SUSPEND_WITHOUT_REWORK) ||
- ((motg->caps & ALLOW_HOST_PHY_RETENTION)
- && (pdata->dpdm_pulldown_added || !(portsc & PORTSC_CCS))))) {
- msm_otg_enable_phy_hv_int(motg);
- if ((!host_bus_suspend || !(motg->caps &
- ALLOW_BUS_SUSPEND_WITHOUT_REWORK)) &&
- !(motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED)) {
- msm_otg_enter_phy_retention(motg);
- motg->lpm_flags |= PHY_RETENTIONED;
- }
- } else if (device_bus_suspend && !dcp &&
- (pdata->mpm_dpshv_int || pdata->mpm_dmshv_int)) {
- /* DP DM HV interrupts are used for bus resume from XO off */
- msm_otg_enable_phy_hv_int(motg);
- if (motg->caps & ALLOW_PHY_RETENTION && pdata->vddmin_gpio) {
-
- /*
- * This is HW WA needed when PHY_CLAMP_DPDMSE_EN is
- * enabled and we put the phy in retention mode.
- * Without this WA, the async_irq will be fired right
- * after suspending whithout any bus resume.
- */
- config2 = readl_relaxed(USB_GENCONFIG_2);
- config2 &= ~GENCONFIG_2_DPSE_DMSE_HV_INTR_EN;
- writel_relaxed(config2, USB_GENCONFIG_2);
-
- msm_otg_enter_phy_retention(motg);
- motg->lpm_flags |= PHY_RETENTIONED;
- gpio_direction_output(pdata->vddmin_gpio, 1);
- }
- }
-
- /* Ensure that above operation is completed before turning off clocks */
- mb();
- /* Consider clocks on workaround flag only in case of bus suspend */
- if (!(phy->otg->state == OTG_STATE_B_PERIPHERAL &&
- test_bit(A_BUS_SUSPEND, &motg->inputs)) ||
- !motg->pdata->core_clk_always_on_workaround) {
- clk_disable_unprepare(motg->pclk);
- clk_disable_unprepare(motg->core_clk);
- if (motg->phy_csr_clk)
- clk_disable_unprepare(motg->phy_csr_clk);
- motg->lpm_flags |= CLOCKS_DOWN;
- }
-
- /* usb phy no more require TCXO clock, hence vote for TCXO disable */
- if (!host_bus_suspend || (motg->caps &
- ALLOW_BUS_SUSPEND_WITHOUT_REWORK) ||
- ((motg->caps & ALLOW_HOST_PHY_RETENTION) &&
- (pdata->dpdm_pulldown_added || !(portsc & PORTSC_CCS)))) {
- if (motg->xo_clk) {
- clk_disable_unprepare(motg->xo_clk);
- motg->lpm_flags |= XO_SHUTDOWN;
- }
- }
-
- if (motg->caps & ALLOW_PHY_POWER_COLLAPSE &&
- !host_bus_suspend && !dcp && !device_bus_suspend) {
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
- motg->lpm_flags |= PHY_PWR_COLLAPSED;
- } else if (motg->caps & ALLOW_PHY_REGULATORS_LPM &&
- !host_bus_suspend && !device_bus_suspend && !dcp) {
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_ON);
- motg->lpm_flags |= PHY_REGULATORS_LPM;
- }
-
- if (motg->lpm_flags & PHY_RETENTIONED ||
- (motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED)) {
- regulator_disable(hsusb_vdd);
- msm_hsusb_config_vddcx(0);
- }
-
- if (device_may_wakeup(phy->dev)) {
- if (host_bus_suspend || device_bus_suspend) {
- enable_irq_wake(motg->async_irq);
- enable_irq_wake(motg->irq);
- }
-
- if (motg->phy_irq)
- enable_irq_wake(motg->phy_irq);
- if (motg->pdata->pmic_id_irq)
- enable_irq_wake(motg->pdata->pmic_id_irq);
- if (motg->ext_id_irq)
- enable_irq_wake(motg->ext_id_irq);
- if (pdata->otg_control == OTG_PHY_CONTROL &&
- pdata->mpm_otgsessvld_int)
- msm_mpm_set_pin_wake(pdata->mpm_otgsessvld_int, 1);
- if ((host_bus_suspend || device_bus_suspend) &&
- pdata->mpm_dpshv_int)
- msm_mpm_set_pin_wake(pdata->mpm_dpshv_int, 1);
- if ((host_bus_suspend || device_bus_suspend) &&
- pdata->mpm_dmshv_int)
- msm_mpm_set_pin_wake(pdata->mpm_dmshv_int, 1);
- }
- if (bus)
- clear_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
-
- msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
-
- atomic_set(&motg->in_lpm, 1);
-
- /* Enable ASYNC IRQ during LPM */
- enable_irq(motg->async_irq);
- if (motg->phy_irq)
- enable_irq(motg->phy_irq);
-
- enable_irq(motg->irq);
- pm_relax(&motg->pdev->dev);
-
- dev_dbg(phy->dev, "LPM caps = %lu flags = %lu\n",
- motg->caps, motg->lpm_flags);
- dev_info(phy->dev, "USB in low power mode\n");
- msm_otg_dbg_log_event(phy, "LPM ENTER DONE",
- motg->caps, motg->lpm_flags);
-
- if (motg->err_event_seen) {
- motg->err_event_seen = false;
- if (motg->vbus_state != test_bit(B_SESS_VLD, &motg->inputs))
- msm_otg_set_vbus_state(motg->vbus_state);
- if (motg->id_state != test_bit(ID, &motg->inputs))
- msm_id_status_w(&motg->id_status_work.work);
- }
-
- return 0;
-
-phy_suspend_fail:
- enable_irq(motg->irq);
- if (motg->phy_irq)
- enable_irq(motg->phy_irq);
- return ret;
-}
-
-static int msm_otg_resume(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- struct usb_bus *bus = phy->otg->host;
- struct usb_hcd *hcd = bus_to_hcd(phy->otg->host);
- struct msm_otg_platform_data *pdata = motg->pdata;
- int cnt = 0;
- unsigned int temp;
- unsigned int ret;
- u32 func_ctrl;
-
- msm_otg_dbg_log_event(phy, "LPM EXIT START", motg->inputs,
- phy->otg->state);
- if (!atomic_read(&motg->in_lpm)) {
- msm_otg_dbg_log_event(phy, "USB NOT IN LPM",
- atomic_read(&motg->in_lpm), phy->otg->state);
- return 0;
- }
-
- disable_irq(motg->irq);
- pm_stay_awake(&motg->pdev->dev);
-
- /*
- * If we are resuming from the device bus suspend, restore
- * the max performance bus vote. Otherwise put a minimum
- * bus vote to satisfy the requirement for enabling clocks.
- */
-
- if (motg->device_bus_suspend && debug_bus_voting_enabled)
- msm_otg_bus_vote(motg, USB_MAX_PERF_VOTE);
- else
- msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
-
- /* Vote for TCXO when waking up the phy */
- if (motg->lpm_flags & XO_SHUTDOWN) {
- if (motg->xo_clk)
- clk_prepare_enable(motg->xo_clk);
- motg->lpm_flags &= ~XO_SHUTDOWN;
- }
-
- if (motg->lpm_flags & CLOCKS_DOWN) {
- if (motg->phy_csr_clk) {
- ret = clk_prepare_enable(motg->phy_csr_clk);
- WARN(ret, "USB phy_csr_clk enable failed\n");
- }
- ret = clk_prepare_enable(motg->core_clk);
- WARN(ret, "USB core_clk enable failed\n");
- ret = clk_prepare_enable(motg->pclk);
- WARN(ret, "USB pclk enable failed\n");
- motg->lpm_flags &= ~CLOCKS_DOWN;
- }
-
- if (motg->lpm_flags & PHY_PWR_COLLAPSED) {
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_ON);
- motg->lpm_flags &= ~PHY_PWR_COLLAPSED;
- } else if (motg->lpm_flags & PHY_REGULATORS_LPM) {
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_LPM_OFF);
- motg->lpm_flags &= ~PHY_REGULATORS_LPM;
- }
-
- if (motg->lpm_flags & PHY_RETENTIONED ||
- (motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED)) {
- msm_hsusb_config_vddcx(1);
- ret = regulator_enable(hsusb_vdd);
- WARN(ret, "hsusb_vdd LDO enable failed\n");
- msm_otg_disable_phy_hv_int(motg);
- msm_otg_exit_phy_retention(motg);
- motg->lpm_flags &= ~PHY_RETENTIONED;
- if (pdata->vddmin_gpio && motg->device_bus_suspend)
- gpio_direction_input(pdata->vddmin_gpio);
- } else if (motg->device_bus_suspend) {
- msm_otg_disable_phy_hv_int(motg);
- }
-
- temp = readl_relaxed(USB_USBCMD);
- temp &= ~ASYNC_INTR_CTRL;
- temp &= ~ULPI_STP_CTRL;
- writel_relaxed(temp, USB_USBCMD);
-
- /*
- * PHY comes out of low power mode (LPM) in case of wakeup
- * from asynchronous interrupt.
- */
- if (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD))
- goto skip_phy_resume;
-
- writel_relaxed(readl_relaxed(USB_PORTSC) & ~PORTSC_PHCD, USB_PORTSC);
-
- while (cnt < PHY_RESUME_TIMEOUT_USEC) {
- if (!(readl_relaxed(USB_PORTSC) & PORTSC_PHCD))
- break;
- udelay(1);
- cnt++;
- }
-
- if (cnt >= PHY_RESUME_TIMEOUT_USEC) {
- /*
- * This is a fatal error. Reset the link and
- * PHY. USB state can not be restored. Re-insertion
- * of USB cable is the only way to get USB working.
- */
- dev_err(phy->dev, "Unable to resume USB. Re-plugin the cable\n"
- );
- msm_otg_reset(phy);
- }
-
-skip_phy_resume:
- if (motg->caps & ALLOW_VDD_MIN_WITH_RETENTION_DISABLED) {
- /* put the controller in normal mode */
- func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
- func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
- func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
- ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
- }
-
- if (device_may_wakeup(phy->dev)) {
- if (motg->host_bus_suspend || motg->device_bus_suspend) {
- disable_irq_wake(motg->async_irq);
- disable_irq_wake(motg->irq);
- }
-
- if (motg->phy_irq)
- disable_irq_wake(motg->phy_irq);
- if (motg->pdata->pmic_id_irq)
- disable_irq_wake(motg->pdata->pmic_id_irq);
- if (motg->ext_id_irq)
- disable_irq_wake(motg->ext_id_irq);
- if (pdata->otg_control == OTG_PHY_CONTROL &&
- pdata->mpm_otgsessvld_int)
- msm_mpm_set_pin_wake(pdata->mpm_otgsessvld_int, 0);
- if ((motg->host_bus_suspend || motg->device_bus_suspend) &&
- pdata->mpm_dpshv_int)
- msm_mpm_set_pin_wake(pdata->mpm_dpshv_int, 0);
- if ((motg->host_bus_suspend || motg->device_bus_suspend) &&
- pdata->mpm_dmshv_int)
- msm_mpm_set_pin_wake(pdata->mpm_dmshv_int, 0);
- }
- if (bus)
- set_bit(HCD_FLAG_HW_ACCESSIBLE, &(bus_to_hcd(bus))->flags);
-
- atomic_set(&motg->in_lpm, 0);
-
- if (motg->async_int) {
- /* Match the disable_irq call from ISR */
- enable_irq(motg->async_int);
- motg->async_int = 0;
- }
- enable_irq(motg->irq);
-
- /* Enable ASYNC_IRQ only during LPM */
- disable_irq(motg->async_irq);
-
- if (motg->phy_irq_pending) {
- motg->phy_irq_pending = false;
- msm_id_status_w(&motg->id_status_work.work);
- }
-
- if (motg->host_bus_suspend) {
- usb_hcd_resume_root_hub(hcd);
- schedule_delayed_work(&motg->perf_vote_work,
- msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
- }
-
- dev_info(phy->dev, "USB exited from low power mode\n");
- msm_otg_dbg_log_event(phy, "LPM EXIT DONE",
- motg->caps, motg->lpm_flags);
-
- return 0;
-}
-#endif
-
-static void msm_otg_notify_host_mode(struct msm_otg *motg, bool host_mode)
-{
- if (!psy) {
- pr_err("No USB power supply registered!\n");
- return;
- }
-
- motg->host_mode = host_mode;
- power_supply_changed(psy);
-}
-
-static int msm_otg_notify_chg_type(struct msm_otg *motg)
-{
- static int charger_type;
- union power_supply_propval pval = {0};
-
- /*
- * TODO
- * Unify OTG driver charger types and power supply charger types
- */
- if (charger_type == motg->chg_type)
- return 0;
-
- if (motg->chg_type == USB_SDP_CHARGER)
- charger_type = POWER_SUPPLY_TYPE_USB;
- else if (motg->chg_type == USB_CDP_CHARGER)
- charger_type = POWER_SUPPLY_TYPE_USB_CDP;
- else if (motg->chg_type == USB_DCP_CHARGER ||
- motg->chg_type == USB_NONCOMPLIANT_CHARGER ||
- motg->chg_type == USB_FLOATED_CHARGER)
- charger_type = POWER_SUPPLY_TYPE_USB_DCP;
- else
- charger_type = POWER_SUPPLY_TYPE_UNKNOWN;
-
- if (!psy) {
- pr_err("No USB power supply registered!\n");
- return -EINVAL;
- }
-
- pr_debug("setting usb power supply type %d\n", charger_type);
- msm_otg_dbg_log_event(&motg->phy, "SET USB PWR SUPPLY TYPE",
- motg->chg_type, charger_type);
- pval.intval = charger_type;
- power_supply_set_property(psy, POWER_SUPPLY_PROP_TYPE, &pval);
- return 0;
-}
-
-static int msm_otg_notify_power_supply(struct msm_otg *motg, unsigned int mA)
-{
- union power_supply_propval pval = {0};
- bool enable;
- int limit;
-
- if (!psy) {
- dev_dbg(motg->phy.dev, "no usb power supply registered\n");
- goto psy_error;
- }
-
- if (motg->cur_power == 0 && mA > 2) {
- /* Enable charging */
- enable = true;
- limit = 1000 * mA;
- } else if (motg->cur_power >= 0 && (mA == 0 || mA == 2)) {
- /* Disable charging */
- enable = false;
- /* Set max current limit in uA */
- limit = 1000 * mA;
- } else {
- enable = true;
- /* Current has changed (100/2 --> 500) */
- limit = 1000 * mA;
- }
-
- pval.intval = enable;
- if (power_supply_set_property(psy, POWER_SUPPLY_PROP_ONLINE, &pval))
- goto psy_error;
-
- pval.intval = limit;
- if (power_supply_set_property(psy, POWER_SUPPLY_PROP_CURRENT_MAX,
- &pval))
- goto psy_error;
-
- power_supply_changed(psy);
- return 0;
-
-psy_error:
- dev_dbg(motg->phy.dev, "power supply error when setting property\n");
- return -ENXIO;
-}
-
-static void msm_otg_set_online_status(struct msm_otg *motg)
-{
- union power_supply_propval pval = {0};
-
- if (!psy) {
- dev_dbg(motg->phy.dev, "no usb power supply registered\n");
- return;
- }
-
- /* Set power supply online status to false */
- pval.intval = false;
- if (power_supply_set_property(psy, POWER_SUPPLY_PROP_ONLINE, &pval))
- dev_dbg(motg->phy.dev, "error setting power supply property\n");
-}
-
-static void msm_otg_notify_charger(struct msm_otg *motg, unsigned int mA)
-{
- struct usb_gadget *g = motg->phy.otg->gadget;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- if (g && g->is_a_peripheral)
- return;
-
- dev_dbg(motg->phy.dev, "Requested curr from USB = %u, max-type-c:%u\n",
- mA, motg->typec_current_max);
- /* Save bc1.2 max_curr if type-c charger later moves to diff mode */
- motg->bc1p2_current_max = mA;
-
- /*
- * Limit type-c charger current to 500 for SDP charger to avoid more
- * current drawn than 500 with Hosts that don't support type C due to
- * non compliant type-c to standard A cables.
- */
- if (pdata->enable_sdp_typec_current_limit &&
- (motg->chg_type == USB_SDP_CHARGER) &&
- motg->typec_current_max > 500)
- motg->typec_current_max = 500;
-
- /* Override mA if type-c charger used (use hvdcp/bc1.2 if it is 500) */
- if (motg->typec_current_max > 500 && mA < motg->typec_current_max)
- mA = motg->typec_current_max;
-
- if (msm_otg_notify_chg_type(motg))
- dev_err(motg->phy.dev,
- "Failed notifying %d charger type to PMIC\n",
- motg->chg_type);
-
- /*
- * This condition will be true when usb cable is disconnected
- * during bootup before enumeration. Check charger type also
- * to avoid clearing online flag in case of valid charger.
- */
- if (motg->online && motg->cur_power == 0 && mA == 0 &&
- (motg->chg_type == USB_INVALID_CHARGER))
- msm_otg_set_online_status(motg);
-
- if (motg->cur_power == mA)
- return;
-
- dev_info(motg->phy.dev, "Avail curr from USB = %u\n", mA);
- msm_otg_dbg_log_event(&motg->phy, "AVAIL CURR FROM USB",
- mA, motg->chg_type);
-
- msm_otg_notify_power_supply(motg, mA);
-
- motg->cur_power = mA;
-}
-
-static int msm_otg_set_power(struct usb_phy *phy, unsigned int mA)
-{
- struct msm_otg *motg = container_of(phy, struct msm_otg, phy);
-
- /*
- * Gadget driver uses set_power method to notify about the
- * available current based on suspend/configured states.
- *
- * IDEV_CHG can be drawn irrespective of suspend/un-configured
- * states when CDP/ACA is connected.
- */
- if (motg->chg_type == USB_SDP_CHARGER)
- msm_otg_notify_charger(motg, mA);
-
- return 0;
-}
-
-static void msm_hsusb_vbus_power(struct msm_otg *motg, bool on);
-
-static void msm_otg_perf_vote_update(struct msm_otg *motg, bool perf_mode)
-{
- static bool curr_perf_mode;
- int ret, latency = motg->pm_qos_latency;
- long clk_rate;
-
- if (curr_perf_mode == perf_mode)
- return;
-
- if (perf_mode) {
- if (latency)
- pm_qos_update_request(&motg->pm_qos_req_dma, latency);
- msm_otg_bus_vote(motg, USB_MAX_PERF_VOTE);
- clk_rate = motg->core_clk_rate;
- } else {
- if (latency)
- pm_qos_update_request(&motg->pm_qos_req_dma,
- PM_QOS_DEFAULT_VALUE);
- msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
- clk_rate = motg->core_clk_svs_rate;
- }
-
- if (clk_rate) {
- ret = clk_set_rate(motg->core_clk, clk_rate);
- if (ret)
- dev_err(motg->phy.dev, "sys_clk set_rate fail:%d %ld\n",
- ret, clk_rate);
- }
- curr_perf_mode = perf_mode;
- pr_debug("%s: latency updated to: %d, core_freq to: %ld\n", __func__,
- latency, clk_rate);
-}
-
-static void msm_otg_perf_vote_work(struct work_struct *w)
-{
- struct msm_otg *motg = container_of(w, struct msm_otg,
- perf_vote_work.work);
- unsigned int curr_sample_int_count;
- bool in_perf_mode = false;
-
- curr_sample_int_count = motg->usb_irq_count;
- motg->usb_irq_count = 0;
-
- if (curr_sample_int_count >= PM_QOS_THRESHOLD)
- in_perf_mode = true;
-
- msm_otg_perf_vote_update(motg, in_perf_mode);
- pr_debug("%s: in_perf_mode:%u, interrupts in last sample:%u\n",
- __func__, in_perf_mode, curr_sample_int_count);
-
- schedule_delayed_work(&motg->perf_vote_work,
- msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
-}
-
-static void msm_otg_start_host(struct usb_otg *otg, int on)
-{
- struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy);
- struct msm_otg_platform_data *pdata = motg->pdata;
- struct usb_hcd *hcd;
- u32 val;
-
- if (!otg->host)
- return;
-
- hcd = bus_to_hcd(otg->host);
-
- msm_otg_dbg_log_event(&motg->phy, "PM RT: StartHost GET",
- get_pm_runtime_counter(motg->phy.dev), 0);
- pm_runtime_get_sync(otg->usb_phy->dev);
- if (on) {
- dev_dbg(otg->usb_phy->dev, "host on\n");
- msm_otg_dbg_log_event(&motg->phy, "HOST ON",
- motg->inputs, otg->state);
- msm_hsusb_vbus_power(motg, 1);
- msm_otg_reset(&motg->phy);
-
- if (pdata->otg_control == OTG_PHY_CONTROL)
- ulpi_write(otg->usb_phy, OTG_COMP_DISABLE,
- ULPI_SET(ULPI_PWR_CLK_MNG_REG));
-
- if (pdata->enable_axi_prefetch) {
- val = readl_relaxed(USB_HS_APF_CTRL);
- val &= ~APF_CTRL_EN;
- writel_relaxed(val, USB_HS_APF_CTRL);
- }
- usb_add_hcd(hcd, hcd->irq, IRQF_SHARED);
-#ifdef CONFIG_SMP
- motg->pm_qos_req_dma.type = PM_QOS_REQ_AFFINE_IRQ;
- motg->pm_qos_req_dma.irq = motg->irq;
-#endif
- pm_qos_add_request(&motg->pm_qos_req_dma,
- PM_QOS_CPU_DMA_LATENCY, PM_QOS_DEFAULT_VALUE);
- /* start in perf mode for better performance initially */
- msm_otg_perf_vote_update(motg, true);
- schedule_delayed_work(&motg->perf_vote_work,
- msecs_to_jiffies(1000 * PM_QOS_SAMPLE_SEC));
- } else {
- dev_dbg(otg->usb_phy->dev, "host off\n");
- msm_otg_dbg_log_event(&motg->phy, "HOST OFF",
- motg->inputs, otg->state);
- msm_hsusb_vbus_power(motg, 0);
-
- cancel_delayed_work_sync(&motg->perf_vote_work);
- msm_otg_perf_vote_update(motg, false);
- pm_qos_remove_request(&motg->pm_qos_req_dma);
-
- pm_runtime_disable(&hcd->self.root_hub->dev);
- pm_runtime_barrier(&hcd->self.root_hub->dev);
- usb_remove_hcd(hcd);
- msm_otg_reset(&motg->phy);
-
- if (pdata->enable_axi_prefetch)
- writel_relaxed(readl_relaxed(USB_HS_APF_CTRL)
- | (APF_CTRL_EN), USB_HS_APF_CTRL);
-
- /* HCD core reset all bits of PORTSC. select ULPI phy */
- writel_relaxed(0x80000000, USB_PORTSC);
-
- if (pdata->otg_control == OTG_PHY_CONTROL)
- ulpi_write(otg->usb_phy, OTG_COMP_DISABLE,
- ULPI_CLR(ULPI_PWR_CLK_MNG_REG));
- }
- msm_otg_dbg_log_event(&motg->phy, "PM RT: StartHost PUT",
- get_pm_runtime_counter(motg->phy.dev), 0);
-
- pm_runtime_mark_last_busy(otg->usb_phy->dev);
- pm_runtime_put_autosuspend(otg->usb_phy->dev);
-}
-
-static void msm_hsusb_vbus_power(struct msm_otg *motg, bool on)
-{
- int ret;
- static bool vbus_is_on;
-
- msm_otg_dbg_log_event(&motg->phy, "VBUS POWER", on, vbus_is_on);
- if (vbus_is_on == on)
- return;
-
- if (motg->pdata->vbus_power) {
- ret = motg->pdata->vbus_power(on);
- if (!ret)
- vbus_is_on = on;
- return;
- }
-
- if (!vbus_otg) {
- pr_err("vbus_otg is NULL.");
- return;
- }
-
- /*
- * if entering host mode tell the charger to not draw any current
- * from usb before turning on the boost.
- * if exiting host mode disable the boost before enabling to draw
- * current from the source.
- */
- if (on) {
- msm_otg_notify_host_mode(motg, on);
- ret = regulator_enable(vbus_otg);
- if (ret) {
- pr_err("unable to enable vbus_otg\n");
- return;
- }
- vbus_is_on = true;
- } else {
- ret = regulator_disable(vbus_otg);
- if (ret) {
- pr_err("unable to disable vbus_otg\n");
- return;
- }
- msm_otg_notify_host_mode(motg, on);
- vbus_is_on = false;
- }
-}
-
-static int msm_otg_set_host(struct usb_otg *otg, struct usb_bus *host)
-{
- struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy);
- struct usb_hcd *hcd;
-
- /*
- * Fail host registration if this board can support
- * only peripheral configuration.
- */
- if (motg->pdata->mode == USB_PERIPHERAL) {
- dev_info(otg->usb_phy->dev, "Host mode is not supported\n");
- return -ENODEV;
- }
-
- if (!motg->pdata->vbus_power && host) {
- vbus_otg = devm_regulator_get(motg->phy.dev, "vbus_otg");
- if (IS_ERR(vbus_otg)) {
- msm_otg_dbg_log_event(&motg->phy,
- "UNABLE TO GET VBUS_OTG",
- otg->state, 0);
- pr_err("Unable to get vbus_otg\n");
- return PTR_ERR(vbus_otg);
- }
- }
-
- if (!host) {
- if (otg->state == OTG_STATE_A_HOST) {
- msm_otg_start_host(otg, 0);
- otg->host = NULL;
- otg->state = OTG_STATE_UNDEFINED;
- queue_work(motg->otg_wq, &motg->sm_work);
- } else {
- otg->host = NULL;
- }
-
- return 0;
- }
-
- hcd = bus_to_hcd(host);
- hcd->power_budget = motg->pdata->power_budget;
-
- otg->host = host;
- dev_dbg(otg->usb_phy->dev, "host driver registered w/ tranceiver\n");
- msm_otg_dbg_log_event(&motg->phy, "HOST DRIVER REGISTERED",
- hcd->power_budget, motg->pdata->mode);
-
- /*
- * Kick the state machine work, if peripheral is not supported
- * or peripheral is already registered with us.
- */
- if (motg->pdata->mode == USB_HOST || otg->gadget)
- queue_work(motg->otg_wq, &motg->sm_work);
-
- return 0;
-}
-
-static void msm_otg_start_peripheral(struct usb_otg *otg, int on)
-{
- struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy);
- struct msm_otg_platform_data *pdata = motg->pdata;
- struct pinctrl_state *set_state;
- int ret;
-
- if (!otg->gadget)
- return;
-
- msm_otg_dbg_log_event(&motg->phy, "PM RT: StartPeri GET",
- get_pm_runtime_counter(motg->phy.dev), 0);
- pm_runtime_get_sync(otg->usb_phy->dev);
- if (on) {
- dev_dbg(otg->usb_phy->dev, "gadget on\n");
- msm_otg_dbg_log_event(&motg->phy, "GADGET ON",
- motg->inputs, otg->state);
-
- /* Configure BUS performance parameters for MAX bandwidth */
- if (debug_bus_voting_enabled)
- msm_otg_bus_vote(motg, USB_MAX_PERF_VOTE);
- /* bump up usb core_clk to default */
- clk_set_rate(motg->core_clk, motg->core_clk_rate);
-
- usb_gadget_vbus_connect(otg->gadget);
-
- /*
- * Request VDD min gpio, if need to support VDD
- * minimazation during peripheral bus suspend.
- */
- if (pdata->vddmin_gpio) {
- if (motg->phy_pinctrl) {
- set_state =
- pinctrl_lookup_state(motg->phy_pinctrl,
- "hsusb_active");
- if (IS_ERR(set_state)) {
- pr_err("cannot get phy pinctrl active state\n");
- } else {
- pinctrl_select_state(motg->phy_pinctrl,
- set_state);
- }
- }
-
- ret = gpio_request(pdata->vddmin_gpio,
- "MSM_OTG_VDD_MIN_GPIO");
- if (ret < 0) {
- dev_err(otg->usb_phy->dev, "gpio req failed for vdd min:%d\n",
- ret);
- pdata->vddmin_gpio = 0;
- }
- }
- } else {
- dev_dbg(otg->usb_phy->dev, "gadget off\n");
- msm_otg_dbg_log_event(&motg->phy, "GADGET OFF",
- motg->inputs, otg->state);
- usb_gadget_vbus_disconnect(otg->gadget);
- clear_bit(A_BUS_SUSPEND, &motg->inputs);
- /* Configure BUS performance parameters to default */
- msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
-
- if (pdata->vddmin_gpio) {
- gpio_free(pdata->vddmin_gpio);
- if (motg->phy_pinctrl) {
- set_state =
- pinctrl_lookup_state(motg->phy_pinctrl,
- "hsusb_sleep");
- if (IS_ERR(set_state))
- pr_err("cannot get phy pinctrl sleep state\n");
- else
- pinctrl_select_state(motg->phy_pinctrl,
- set_state);
- }
- }
- }
- msm_otg_dbg_log_event(&motg->phy, "PM RT: StartPeri PUT",
- get_pm_runtime_counter(motg->phy.dev), 0);
- pm_runtime_mark_last_busy(otg->usb_phy->dev);
- pm_runtime_put_autosuspend(otg->usb_phy->dev);
-}
-
-static int msm_otg_set_peripheral(struct usb_otg *otg,
- struct usb_gadget *gadget)
-{
- struct msm_otg *motg = container_of(otg->usb_phy, struct msm_otg, phy);
-
- /*
- * Fail peripheral registration if this board can support
- * only host configuration.
- */
- if (motg->pdata->mode == USB_HOST) {
- dev_info(otg->usb_phy->dev, "Peripheral mode is not supported\n");
- return -ENODEV;
- }
-
- if (!gadget) {
- if (otg->state == OTG_STATE_B_PERIPHERAL) {
- msm_otg_dbg_log_event(&motg->phy,
- "PM RUNTIME: PERIPHERAL GET1",
- get_pm_runtime_counter(otg->usb_phy->dev), 0);
- msm_otg_start_peripheral(otg, 0);
- otg->gadget = NULL;
- otg->state = OTG_STATE_UNDEFINED;
- queue_work(motg->otg_wq, &motg->sm_work);
- } else {
- otg->gadget = NULL;
- }
-
- return 0;
- }
- otg->gadget = gadget;
- dev_dbg(otg->usb_phy->dev, "peripheral driver registered w/ tranceiver\n");
- msm_otg_dbg_log_event(&motg->phy, "PERIPHERAL DRIVER REGISTERED",
- otg->state, motg->pdata->mode);
-
- /*
- * Kick the state machine work, if host is not supported
- * or host is already registered with us.
- */
- if (motg->pdata->mode == USB_PERIPHERAL || otg->host)
- queue_work(motg->otg_wq, &motg->sm_work);
-
- return 0;
-}
-
-static bool msm_otg_read_pmic_id_state(struct msm_otg *motg)
-{
- unsigned long flags;
- bool id;
- int ret;
-
- if (!motg->pdata->pmic_id_irq)
- return -ENODEV;
-
- local_irq_save(flags);
- ret = irq_get_irqchip_state(motg->pdata->pmic_id_irq,
- IRQCHIP_STATE_LINE_LEVEL, &id);
- local_irq_restore(flags);
-
- /*
- * If we can not read ID line state for some reason, treat
- * it as float. This would prevent MHL discovery and kicking
- * host mode unnecessarily.
- */
- if (ret < 0)
- return true;
-
- return !!id;
-}
-
-static bool msm_otg_read_phy_id_state(struct msm_otg *motg)
-{
- u8 val;
-
- /*
- * clear the pending/outstanding interrupts and
- * read the ID status from the SRC_STATUS register.
- */
- writeb_relaxed(USB_PHY_ID_MASK, USB2_PHY_USB_PHY_INTERRUPT_CLEAR1);
-
- writeb_relaxed(0x1, USB2_PHY_USB_PHY_IRQ_CMD);
- /*
- * Databook says 200 usec delay is required for
- * clearing the interrupts.
- */
- udelay(200);
- writeb_relaxed(0x0, USB2_PHY_USB_PHY_IRQ_CMD);
-
- val = readb_relaxed(USB2_PHY_USB_PHY_INTERRUPT_SRC_STATUS);
- if (val & USB_PHY_IDDIG_1_0)
- return false; /* ID is grounded */
- else
- return true;
-}
-
-static void msm_otg_chg_check_timer_func(unsigned long data)
-{
- struct msm_otg *motg = (struct msm_otg *) data;
- struct usb_otg *otg = motg->phy.otg;
-
- if (atomic_read(&motg->in_lpm) ||
- !test_bit(B_SESS_VLD, &motg->inputs) ||
- otg->state != OTG_STATE_B_PERIPHERAL ||
- otg->gadget->speed != USB_SPEED_UNKNOWN) {
- dev_dbg(otg->usb_phy->dev, "Nothing to do in chg_check_timer\n");
- return;
- }
-
- if ((readl_relaxed(USB_PORTSC) & PORTSC_LS) == PORTSC_LS) {
- dev_dbg(otg->usb_phy->dev, "DCP is detected as SDP\n");
- msm_otg_dbg_log_event(&motg->phy, "DCP IS DETECTED AS SDP",
- otg->state, 0);
- set_bit(B_FALSE_SDP, &motg->inputs);
- queue_work(motg->otg_wq, &motg->sm_work);
- }
-}
-
-static bool msm_chg_check_secondary_det(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- u32 chg_det;
- bool ret = false;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- chg_det = ulpi_read(phy, 0x87);
- ret = chg_det & 1;
- break;
- default:
- break;
- }
- return ret;
-}
-
-static void msm_chg_enable_secondary_det(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- /*
- * Configure DM as current source, DP as current sink
- * and enable battery charging comparators.
- */
- ulpi_write(phy, 0x8, 0x85);
- ulpi_write(phy, 0x2, 0x85);
- ulpi_write(phy, 0x1, 0x85);
- break;
- default:
- break;
- }
-}
-
-static bool msm_chg_check_primary_det(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- u32 chg_det;
- bool ret = false;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- chg_det = ulpi_read(phy, 0x87);
- ret = chg_det & 1;
- /* Turn off VDP_SRC */
- ulpi_write(phy, 0x3, 0x86);
- msleep(20);
- break;
- default:
- break;
- }
- return ret;
-}
-
-static void msm_chg_enable_primary_det(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- /*
- * Configure DP as current source, DM as current sink
- * and enable battery charging comparators.
- */
- ulpi_write(phy, 0x2, 0x85);
- ulpi_write(phy, 0x1, 0x85);
- break;
- default:
- break;
- }
-}
-
-static bool msm_chg_check_dcd(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- u32 line_state;
- bool ret = false;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- line_state = ulpi_read(phy, 0x87);
- ret = line_state & 2;
- break;
- default:
- break;
- }
- return ret;
-}
-
-static void msm_chg_disable_dcd(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- ulpi_write(phy, 0x10, 0x86);
- break;
- case SNPS_FEMTO_PHY:
- ulpi_write(phy, 0x10, 0x86);
- /*
- * Disable the Rdm_down after
- * the DCD is completed.
- */
- ulpi_write(phy, 0x04, 0x0C);
- break;
- default:
- break;
- }
-}
-
-static void msm_chg_enable_dcd(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- /* Data contact detection enable */
- ulpi_write(phy, 0x10, 0x85);
- break;
- case SNPS_FEMTO_PHY:
- /*
- * Idp_src and Rdm_down are de-coupled
- * on Femto PHY. If Idp_src alone is
- * enabled, DCD timeout is observed with
- * wall charger. But a genuine DCD timeout
- * may be incorrectly interpreted. Also
- * BC1.2 compliance testers expect Rdm_down
- * to enabled during DCD. Enable Rdm_down
- * explicitly before enabling the DCD.
- */
- ulpi_write(phy, 0x04, 0x0B);
- ulpi_write(phy, 0x10, 0x85);
- break;
- default:
- break;
- }
-}
-
-static void msm_chg_block_on(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- u32 func_ctrl;
-
- /* put the controller in non-driving mode */
- func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
- func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
- func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NONDRIVING;
- ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- /* disable DP and DM pull down resistors */
- ulpi_write(phy, 0x6, 0xC);
- /* Clear charger detecting control bits */
- ulpi_write(phy, 0x1F, 0x86);
- /* Clear alt interrupt latch and enable bits */
- ulpi_write(phy, 0x1F, 0x92);
- ulpi_write(phy, 0x1F, 0x95);
- udelay(100);
- break;
- default:
- break;
- }
-}
-
-static void msm_chg_block_off(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- u32 func_ctrl;
-
- switch (motg->pdata->phy_type) {
- case SNPS_PICO_PHY:
- case SNPS_FEMTO_PHY:
- /* Clear charger detecting control bits */
- ulpi_write(phy, 0x3F, 0x86);
- /* Clear alt interrupt latch and enable bits */
- ulpi_write(phy, 0x1F, 0x92);
- ulpi_write(phy, 0x1F, 0x95);
- /* re-enable DP and DM pull down resistors */
- ulpi_write(phy, 0x6, 0xB);
- break;
- default:
- break;
- }
-
- /* put the controller in normal mode */
- func_ctrl = ulpi_read(phy, ULPI_FUNC_CTRL);
- func_ctrl &= ~ULPI_FUNC_CTRL_OPMODE_MASK;
- func_ctrl |= ULPI_FUNC_CTRL_OPMODE_NORMAL;
- ulpi_write(phy, func_ctrl, ULPI_FUNC_CTRL);
-}
-
-static const char *chg_to_string(enum usb_chg_type chg_type)
-{
- switch (chg_type) {
- case USB_SDP_CHARGER: return "USB_SDP_CHARGER";
- case USB_DCP_CHARGER: return "USB_DCP_CHARGER";
- case USB_CDP_CHARGER: return "USB_CDP_CHARGER";
- case USB_NONCOMPLIANT_CHARGER: return "USB_NONCOMPLIANT_CHARGER";
- case USB_FLOATED_CHARGER: return "USB_FLOATED_CHARGER";
- default: return "INVALID_CHARGER";
- }
-}
-
-#define MSM_CHG_DCD_TIMEOUT (750 * HZ/1000) /* 750 msec */
-#define MSM_CHG_DCD_POLL_TIME (50 * HZ/1000) /* 50 msec */
-#define MSM_CHG_PRIMARY_DET_TIME (50 * HZ/1000) /* TVDPSRC_ON */
-#define MSM_CHG_SECONDARY_DET_TIME (50 * HZ/1000) /* TVDMSRC_ON */
-static void msm_chg_detect_work(struct work_struct *w)
-{
- struct msm_otg *motg = container_of(w, struct msm_otg, chg_work.work);
- struct usb_phy *phy = &motg->phy;
- bool is_dcd = false, tmout, vout;
- static bool dcd;
- u32 line_state, dm_vlgc;
- unsigned long delay;
-
- dev_dbg(phy->dev, "chg detection work\n");
- msm_otg_dbg_log_event(phy, "CHG DETECTION WORK",
- motg->chg_state, get_pm_runtime_counter(phy->dev));
-
- switch (motg->chg_state) {
- case USB_CHG_STATE_UNDEFINED:
- case USB_CHG_STATE_IN_PROGRESS:
- msm_chg_block_on(motg);
- msm_chg_enable_dcd(motg);
- motg->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
- motg->dcd_time = 0;
- delay = MSM_CHG_DCD_POLL_TIME;
- break;
- case USB_CHG_STATE_WAIT_FOR_DCD:
- is_dcd = msm_chg_check_dcd(motg);
- motg->dcd_time += MSM_CHG_DCD_POLL_TIME;
- tmout = motg->dcd_time >= MSM_CHG_DCD_TIMEOUT;
- if (is_dcd || tmout) {
- if (is_dcd)
- dcd = true;
- else
- dcd = false;
- msm_chg_disable_dcd(motg);
- msm_chg_enable_primary_det(motg);
- delay = MSM_CHG_PRIMARY_DET_TIME;
- motg->chg_state = USB_CHG_STATE_DCD_DONE;
- } else {
- delay = MSM_CHG_DCD_POLL_TIME;
- }
- break;
- case USB_CHG_STATE_DCD_DONE:
- vout = msm_chg_check_primary_det(motg);
- line_state = readl_relaxed(USB_PORTSC) & PORTSC_LS;
- dm_vlgc = line_state & PORTSC_LS_DM;
- if (vout && !dm_vlgc) { /* VDAT_REF < DM < VLGC */
- if (line_state) { /* DP > VLGC */
- motg->chg_type = USB_NONCOMPLIANT_CHARGER;
- motg->chg_state = USB_CHG_STATE_DETECTED;
- delay = 0;
- } else {
- msm_chg_enable_secondary_det(motg);
- delay = MSM_CHG_SECONDARY_DET_TIME;
- motg->chg_state = USB_CHG_STATE_PRIMARY_DONE;
- }
- } else { /* DM < VDAT_REF || DM > VLGC */
- if (line_state) /* DP > VLGC or/and DM > VLGC */
- motg->chg_type = USB_NONCOMPLIANT_CHARGER;
- else if (!dcd && floated_charger_enable)
- motg->chg_type = USB_FLOATED_CHARGER;
- else
- motg->chg_type = USB_SDP_CHARGER;
-
- motg->chg_state = USB_CHG_STATE_DETECTED;
- delay = 0;
- goto state_detected;
- }
- break;
- case USB_CHG_STATE_PRIMARY_DONE:
- vout = msm_chg_check_secondary_det(motg);
- if (vout)
- motg->chg_type = USB_DCP_CHARGER;
- else
- motg->chg_type = USB_CDP_CHARGER;
- motg->chg_state = USB_CHG_STATE_SECONDARY_DONE;
- /* fall through */
- case USB_CHG_STATE_SECONDARY_DONE:
- motg->chg_state = USB_CHG_STATE_DETECTED;
- case USB_CHG_STATE_DETECTED:
-state_detected:
- /*
- * Notify the charger type to power supply
- * owner as soon as we determine the charger.
- */
- if (motg->chg_type == USB_DCP_CHARGER && motg->ext_chg_opened) {
- init_completion(&motg->ext_chg_wait);
- motg->ext_chg_active = DEFAULT;
- }
- msm_otg_notify_chg_type(motg);
- msm_chg_block_off(motg);
-
- /* Enable VDP_SRC in case of DCP charger */
- if (motg->chg_type == USB_DCP_CHARGER)
- ulpi_write(phy, 0x2, 0x85);
-
- dev_dbg(phy->dev, "chg_type = %s\n",
- chg_to_string(motg->chg_type));
- msm_otg_dbg_log_event(phy, "CHG WORK PUT: CHG_TYPE",
- motg->chg_type, get_pm_runtime_counter(phy->dev));
- /* to match _get from sm_work before starting chg_det_work */
- pm_runtime_mark_last_busy(phy->dev);
- pm_runtime_put_autosuspend(phy->dev);
-
- queue_work(motg->otg_wq, &motg->sm_work);
- return;
- default:
- return;
- }
-
- msm_otg_dbg_log_event(phy, "CHG WORK: QUEUE", motg->chg_type, delay);
- queue_delayed_work(motg->otg_wq, &motg->chg_work, delay);
-}
-
-#define VBUS_INIT_TIMEOUT msecs_to_jiffies(5000)
-
-/*
- * We support OTG, Peripheral only and Host only configurations. In case
- * of OTG, mode switch (host-->peripheral/peripheral-->host) can happen
- * via Id pin status or user request (debugfs). Id/BSV interrupts are not
- * enabled when switch is controlled by user and default mode is supplied
- * by board file, which can be changed by userspace later.
- */
-static void msm_otg_init_sm(struct msm_otg *motg)
-{
- struct msm_otg_platform_data *pdata = motg->pdata;
- u32 otgsc = readl_relaxed(USB_OTGSC);
- int ret;
-
- switch (pdata->mode) {
- case USB_OTG:
- if (pdata->otg_control == OTG_USER_CONTROL) {
- if (pdata->default_mode == USB_HOST) {
- clear_bit(ID, &motg->inputs);
- } else if (pdata->default_mode == USB_PERIPHERAL) {
- set_bit(ID, &motg->inputs);
- set_bit(B_SESS_VLD, &motg->inputs);
- } else {
- set_bit(ID, &motg->inputs);
- clear_bit(B_SESS_VLD, &motg->inputs);
- }
- } else if (pdata->otg_control == OTG_PHY_CONTROL) {
- if (otgsc & OTGSC_ID)
- set_bit(ID, &motg->inputs);
- else
- clear_bit(ID, &motg->inputs);
- if (otgsc & OTGSC_BSV)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
- } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
- if (pdata->pmic_id_irq) {
- if (msm_otg_read_pmic_id_state(motg))
- set_bit(ID, &motg->inputs);
- else
- clear_bit(ID, &motg->inputs);
- } else if (motg->ext_id_irq) {
- if (gpio_get_value(pdata->usb_id_gpio))
- set_bit(ID, &motg->inputs);
- else
- clear_bit(ID, &motg->inputs);
- } else if (motg->phy_irq) {
- if (msm_otg_read_phy_id_state(motg))
- set_bit(ID, &motg->inputs);
- else
- clear_bit(ID, &motg->inputs);
- }
- /*
- * VBUS initial state is reported after PMIC
- * driver initialization. Wait for it.
- */
- ret = wait_for_completion_timeout(&pmic_vbus_init,
- VBUS_INIT_TIMEOUT);
- if (!ret) {
- dev_dbg(motg->phy.dev, "%s: timeout waiting for PMIC VBUS\n",
- __func__);
- msm_otg_dbg_log_event(&motg->phy,
- "PMIC VBUS WAIT TMOUT", motg->inputs,
- motg->phy.otg->state);
- clear_bit(B_SESS_VLD, &motg->inputs);
- pmic_vbus_init.done = 1;
- }
- }
- break;
- case USB_HOST:
- clear_bit(ID, &motg->inputs);
- break;
- case USB_PERIPHERAL:
- set_bit(ID, &motg->inputs);
- if (pdata->otg_control == OTG_PHY_CONTROL) {
- if (otgsc & OTGSC_BSV)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
- } else if (pdata->otg_control == OTG_PMIC_CONTROL) {
- /*
- * VBUS initial state is reported after PMIC
- * driver initialization. Wait for it.
- */
- ret = wait_for_completion_timeout(&pmic_vbus_init,
- VBUS_INIT_TIMEOUT);
- if (!ret) {
- dev_dbg(motg->phy.dev, "%s: timeout waiting for PMIC VBUS\n",
- __func__);
- msm_otg_dbg_log_event(&motg->phy,
- "PMIC VBUS WAIT TMOUT", motg->inputs,
- motg->phy.otg->state);
- clear_bit(B_SESS_VLD, &motg->inputs);
- pmic_vbus_init.done = 1;
- }
- } else if (pdata->otg_control == OTG_USER_CONTROL) {
- set_bit(ID, &motg->inputs);
- set_bit(B_SESS_VLD, &motg->inputs);
- }
- break;
- default:
- break;
- }
- msm_otg_dbg_log_event(&motg->phy, "SM INIT", pdata->mode, motg->inputs);
- if (motg->id_state != USB_ID_GROUND)
- motg->id_state = (test_bit(ID, &motg->inputs)) ? USB_ID_FLOAT :
- USB_ID_GROUND;
-}
-
-static void msm_otg_wait_for_ext_chg_done(struct msm_otg *motg)
-{
- struct usb_phy *phy = &motg->phy;
- unsigned long t;
-
- /*
- * Defer next cable connect event till external charger
- * detection is completed.
- */
-
- if (motg->ext_chg_active == ACTIVE) {
-
-do_wait:
- pr_debug("before msm_otg ext chg wait\n");
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: WAIT", 0, 0);
-
- t = wait_for_completion_timeout(&motg->ext_chg_wait,
- msecs_to_jiffies(3000));
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: DONE", t, 0);
-
- if (!t)
- pr_err("msm_otg ext chg wait timeout\n");
- else if (motg->ext_chg_active == ACTIVE)
- goto do_wait;
- else
- pr_debug("msm_otg ext chg wait done\n");
- }
-
- if (motg->ext_chg_opened) {
- if (phy->flags & ENABLE_DP_MANUAL_PULLUP) {
- ulpi_write(phy, ULPI_MISC_A_VBUSVLDEXT |
- ULPI_MISC_A_VBUSVLDEXTSEL,
- ULPI_CLR(ULPI_MISC_A));
- }
- /* clear charging register bits */
- ulpi_write(phy, 0x3F, 0x86);
- /* re-enable DP and DM pull-down resistors*/
- ulpi_write(phy, 0x6, 0xB);
- }
-}
-
-static void msm_otg_sm_work(struct work_struct *w)
-{
- struct msm_otg *motg = container_of(w, struct msm_otg, sm_work);
- struct usb_otg *otg = motg->phy.otg;
- struct device *dev = otg->usb_phy->dev;
- bool work = 0, dcp;
- int ret;
-
- pr_debug("%s work\n", usb_otg_state_string(otg->state));
- msm_otg_dbg_log_event(&motg->phy, "SM WORK:",
- otg->state, motg->inputs);
-
- /* Just resume h/w if reqd, pm_count is handled based on state/inputs */
- if (motg->resume_pending) {
- pm_runtime_get_sync(otg->usb_phy->dev);
- if (atomic_read(&motg->in_lpm)) {
- dev_err(dev, "SM WORK: USB is in LPM\n");
- msm_otg_dbg_log_event(&motg->phy,
- "SM WORK: USB IS IN LPM",
- otg->state, motg->inputs);
- msm_otg_resume(motg);
- }
- motg->resume_pending = false;
- pm_runtime_put_noidle(otg->usb_phy->dev);
- }
-
- switch (otg->state) {
- case OTG_STATE_UNDEFINED:
- pm_runtime_get_sync(otg->usb_phy->dev);
- msm_otg_reset(otg->usb_phy);
- /* Add child device only after block reset */
- ret = of_platform_populate(motg->pdev->dev.of_node, NULL, NULL,
- &motg->pdev->dev);
- if (ret)
- dev_dbg(&motg->pdev->dev, "failed to add BAM core\n");
-
- msm_otg_init_sm(motg);
- otg->state = OTG_STATE_B_IDLE;
- if (!test_bit(B_SESS_VLD, &motg->inputs) &&
- test_bit(ID, &motg->inputs)) {
- msm_otg_dbg_log_event(&motg->phy,
- "PM RUNTIME: UNDEF PUT",
- get_pm_runtime_counter(otg->usb_phy->dev), 0);
- pm_runtime_put_sync(otg->usb_phy->dev);
- break;
- }
- pm_runtime_put(otg->usb_phy->dev);
- /* FALL THROUGH */
- case OTG_STATE_B_IDLE:
- if (!test_bit(ID, &motg->inputs) && otg->host) {
- pr_debug("!id\n");
- msm_otg_dbg_log_event(&motg->phy, "!ID",
- motg->inputs, otg->state);
-
- msm_otg_start_host(otg, 1);
- otg->state = OTG_STATE_A_HOST;
- } else if (test_bit(B_SESS_VLD, &motg->inputs)) {
- pr_debug("b_sess_vld\n");
- msm_otg_dbg_log_event(&motg->phy, "B_SESS_VLD",
- motg->inputs, otg->state);
- switch (motg->chg_state) {
- case USB_CHG_STATE_UNDEFINED:
- /* put at the end of chg_det or disconnect */
- pm_runtime_get_sync(otg->usb_phy->dev);
- msm_otg_dbg_log_event(&motg->phy, "PM CHG GET",
- get_pm_runtime_counter(dev), 0);
- motg->chg_state = USB_CHG_STATE_IN_PROGRESS;
- msm_chg_detect_work(&motg->chg_work.work);
- break;
- case USB_CHG_STATE_DETECTED:
- switch (motg->chg_type) {
- case USB_DCP_CHARGER:
- /* fall through */
- case USB_NONCOMPLIANT_CHARGER:
- msm_otg_notify_charger(motg,
- dcp_max_current);
- if (!motg->is_ext_chg_dcp)
- otg->state =
- OTG_STATE_B_CHARGER;
- break;
- case USB_FLOATED_CHARGER:
- msm_otg_notify_charger(motg,
- IDEV_CHG_MAX);
- otg->state = OTG_STATE_B_CHARGER;
- break;
- case USB_CDP_CHARGER:
- msm_otg_notify_charger(motg,
- IDEV_CHG_MAX);
- /* fall through */
- case USB_SDP_CHARGER:
- pm_runtime_get_sync(otg->usb_phy->dev);
- msm_otg_start_peripheral(otg, 1);
- otg->state =
- OTG_STATE_B_PERIPHERAL;
- mod_timer(&motg->chg_check_timer,
- CHG_RECHECK_DELAY);
- break;
- default:
- break;
- }
- break;
- default:
- break;
- }
- } else {
- pr_debug("chg_work cancel");
- msm_otg_dbg_log_event(&motg->phy, "CHG_WORK CANCEL",
- motg->inputs, otg->state);
- del_timer_sync(&motg->chg_check_timer);
- clear_bit(B_FALSE_SDP, &motg->inputs);
- cancel_delayed_work_sync(&motg->chg_work);
- /*
- * Find out whether chg_w couldn't start or finished.
- * In both the cases, runtime ref_count vote is missing
- */
- if (motg->chg_state == USB_CHG_STATE_UNDEFINED ||
- motg->chg_state == USB_CHG_STATE_DETECTED) {
- msm_otg_dbg_log_event(&motg->phy, "RT !CHG GET",
- get_pm_runtime_counter(otg->usb_phy->dev), 0);
- pm_runtime_get_sync(dev);
- }
-
- dcp = (motg->chg_type == USB_DCP_CHARGER);
- motg->chg_state = USB_CHG_STATE_UNDEFINED;
- motg->chg_type = USB_INVALID_CHARGER;
- msm_otg_notify_charger(motg, 0);
- if (dcp) {
- if (motg->ext_chg_active == DEFAULT)
- motg->ext_chg_active = INACTIVE;
- msm_otg_wait_for_ext_chg_done(motg);
- /* Turn off VDP_SRC */
- ulpi_write(otg->usb_phy, 0x2, 0x86);
- }
- msm_chg_block_off(motg);
- msm_otg_dbg_log_event(&motg->phy, "RT: CHG A PUT",
- get_pm_runtime_counter(otg->usb_phy->dev), 0);
- /* Delay used only if autosuspend enabled */
- pm_runtime_mark_last_busy(dev);
- pm_runtime_put_autosuspend(dev);
- }
- break;
- case OTG_STATE_B_PERIPHERAL:
- if (test_bit(B_SESS_VLD, &motg->inputs) &&
- test_bit(B_FALSE_SDP, &motg->inputs)) {
- pr_debug("B_FALSE_SDP\n");
- msm_otg_start_peripheral(otg, 0);
- motg->chg_type = USB_DCP_CHARGER;
- clear_bit(B_FALSE_SDP, &motg->inputs);
- otg->state = OTG_STATE_B_IDLE;
- msm_otg_dbg_log_event(&motg->phy, "B_FALSE_SDP PUT",
- get_pm_runtime_counter(dev), motg->inputs);
- pm_runtime_put_sync(dev);
- /* schedule work to update charging current */
- work = 1;
- } else if (!test_bit(B_SESS_VLD, &motg->inputs)) {
- msm_otg_start_peripheral(otg, 0);
- msm_otg_dbg_log_event(&motg->phy, "RT PM: B_PERI A PUT",
- get_pm_runtime_counter(dev), 0);
- /* _put for _get done on cable connect in B_IDLE */
- pm_runtime_put_noidle(dev);
- /* Schedule work to finish cable disconnect processing*/
- otg->state = OTG_STATE_B_IDLE;
- work = 1;
- } else if (test_bit(A_BUS_SUSPEND, &motg->inputs)) {
- pr_debug("a_bus_suspend\n");
- msm_otg_dbg_log_event(&motg->phy,
- "BUS_SUSPEND: PM RT PUT",
- get_pm_runtime_counter(dev), 0);
- otg->state = OTG_STATE_B_SUSPEND;
- /* _get on connect in B_IDLE or host resume in B_SUSP */
- pm_runtime_mark_last_busy(dev);
- pm_runtime_put_autosuspend(dev);
- }
- break;
- case OTG_STATE_B_SUSPEND:
- if (!test_bit(B_SESS_VLD, &motg->inputs)) {
- msm_otg_start_peripheral(otg, 0);
- otg->state = OTG_STATE_B_IDLE;
- /* Schedule work to finish cable disconnect processing*/
- work = 1;
- } else if (!test_bit(A_BUS_SUSPEND, &motg->inputs)) {
- pr_debug("!a_bus_suspend\n");
- otg->state = OTG_STATE_B_PERIPHERAL;
- msm_otg_dbg_log_event(&motg->phy,
- "BUS_RESUME: PM RT GET",
- get_pm_runtime_counter(dev), 0);
- pm_runtime_get_sync(dev);
- }
- break;
-
- case OTG_STATE_B_CHARGER:
- if (test_bit(B_SESS_VLD, &motg->inputs)) {
- pr_debug("BSV set again\n");
- msm_otg_dbg_log_event(&motg->phy, "BSV SET AGAIN",
- motg->inputs, otg->state);
- } else if (!test_bit(B_SESS_VLD, &motg->inputs)) {
- otg->state = OTG_STATE_B_IDLE;
- work = 1;
- }
- break;
- case OTG_STATE_A_HOST:
- if (test_bit(ID, &motg->inputs)) {
- msm_otg_start_host(otg, 0);
- otg->state = OTG_STATE_B_IDLE;
- work = 1;
- }
- break;
- default:
- break;
- }
-
- if (work)
- queue_work(motg->otg_wq, &motg->sm_work);
-}
-
-static irqreturn_t msm_otg_irq(int irq, void *data)
-{
- struct msm_otg *motg = data;
- struct usb_otg *otg = motg->phy.otg;
- u32 otgsc = 0;
- bool work = 0;
-
- if (atomic_read(&motg->in_lpm)) {
- pr_debug("OTG IRQ: %d in LPM\n", irq);
- msm_otg_dbg_log_event(&motg->phy, "OTG IRQ IS IN LPM",
- irq, otg->state);
- /*Ignore interrupt if one interrupt already seen in LPM*/
- if (motg->async_int)
- return IRQ_HANDLED;
-
- disable_irq_nosync(irq);
- motg->async_int = irq;
- msm_otg_kick_sm_work(motg);
-
- return IRQ_HANDLED;
- }
- motg->usb_irq_count++;
-
- otgsc = readl_relaxed(USB_OTGSC);
- if (!(otgsc & (OTGSC_IDIS | OTGSC_BSVIS)))
- return IRQ_NONE;
-
- if ((otgsc & OTGSC_IDIS) && (otgsc & OTGSC_IDIE)) {
- if (otgsc & OTGSC_ID) {
- dev_dbg(otg->usb_phy->dev, "ID set\n");
- msm_otg_dbg_log_event(&motg->phy, "ID SET",
- motg->inputs, otg->state);
- set_bit(ID, &motg->inputs);
- } else {
- dev_dbg(otg->usb_phy->dev, "ID clear\n");
- msm_otg_dbg_log_event(&motg->phy, "ID CLEAR",
- motg->inputs, otg->state);
- clear_bit(ID, &motg->inputs);
- }
- work = 1;
- } else if ((otgsc & OTGSC_BSVIE) && (otgsc & OTGSC_BSVIS)) {
- if (otgsc & OTGSC_BSV) {
- dev_dbg(otg->usb_phy->dev, "BSV set\n");
- msm_otg_dbg_log_event(&motg->phy, "BSV SET",
- motg->inputs, otg->state);
- set_bit(B_SESS_VLD, &motg->inputs);
- } else {
- dev_dbg(otg->usb_phy->dev, "BSV clear\n");
- msm_otg_dbg_log_event(&motg->phy, "BSV CLEAR",
- motg->inputs, otg->state);
- clear_bit(B_SESS_VLD, &motg->inputs);
- clear_bit(A_BUS_SUSPEND, &motg->inputs);
- }
- work = 1;
- }
- if (work)
- queue_work(motg->otg_wq, &motg->sm_work);
-
- writel_relaxed(otgsc, USB_OTGSC);
-
- return IRQ_HANDLED;
-}
-
-static void msm_otg_set_vbus_state(int online)
-{
- struct msm_otg *motg = the_msm_otg;
- static bool init;
-
- motg->vbus_state = online;
-
- if (motg->err_event_seen)
- return;
-
- if (online) {
- pr_debug("PMIC: BSV set\n");
- msm_otg_dbg_log_event(&motg->phy, "PMIC: BSV SET",
- init, motg->inputs);
- if (test_and_set_bit(B_SESS_VLD, &motg->inputs) && init)
- return;
- } else {
- pr_debug("PMIC: BSV clear\n");
- msm_otg_dbg_log_event(&motg->phy, "PMIC: BSV CLEAR",
- init, motg->inputs);
- motg->is_ext_chg_dcp = false;
- if (!test_and_clear_bit(B_SESS_VLD, &motg->inputs) && init)
- return;
- }
-
- /* do not queue state m/c work if id is grounded */
- if (!test_bit(ID, &motg->inputs) &&
- !motg->pdata->vbus_low_as_hostmode) {
- /*
- * state machine work waits for initial VBUS
- * completion in UNDEFINED state. Process
- * the initial VBUS event in ID_GND state.
- */
- if (init)
- return;
- }
-
- if (!init) {
- init = true;
- if (pmic_vbus_init.done &&
- test_bit(B_SESS_VLD, &motg->inputs)) {
- pr_debug("PMIC: BSV came late\n");
- msm_otg_dbg_log_event(&motg->phy, "PMIC: BSV CAME LATE",
- init, motg->inputs);
- goto out;
- }
-
- if (motg->pdata->vbus_low_as_hostmode &&
- !test_bit(B_SESS_VLD, &motg->inputs)) {
- motg->id_state = USB_ID_GROUND;
- clear_bit(ID, &motg->inputs);
- }
- complete(&pmic_vbus_init);
- pr_debug("PMIC: BSV init complete\n");
- msm_otg_dbg_log_event(&motg->phy, "PMIC: BSV INIT COMPLETE",
- init, motg->inputs);
- return;
- }
-
-out:
- if (motg->is_ext_chg_dcp) {
- if (test_bit(B_SESS_VLD, &motg->inputs)) {
- msm_otg_notify_charger(motg, IDEV_CHG_MAX);
- } else {
- motg->is_ext_chg_dcp = false;
- motg->chg_state = USB_CHG_STATE_UNDEFINED;
- motg->chg_type = USB_INVALID_CHARGER;
- msm_otg_notify_charger(motg, 0);
- }
- return;
- }
-
- msm_otg_dbg_log_event(&motg->phy, "CHECK VBUS EVENT DURING SUSPEND",
- atomic_read(&motg->pm_suspended),
- motg->sm_work_pending);
-
- /* Move to host mode on vbus low if required */
- if (motg->pdata->vbus_low_as_hostmode) {
- if (!test_bit(B_SESS_VLD, &motg->inputs))
- clear_bit(ID, &motg->inputs);
- else
- set_bit(ID, &motg->inputs);
- }
- msm_otg_kick_sm_work(motg);
-}
-
-static void msm_id_status_w(struct work_struct *w)
-{
- struct msm_otg *motg = container_of(w, struct msm_otg,
- id_status_work.work);
- int work = 0;
-
- dev_dbg(motg->phy.dev, "ID status_w\n");
-
- if (motg->pdata->pmic_id_irq)
- motg->id_state = msm_otg_read_pmic_id_state(motg);
- else if (motg->ext_id_irq)
- motg->id_state = gpio_get_value(motg->pdata->usb_id_gpio);
- else if (motg->phy_irq)
- motg->id_state = msm_otg_read_phy_id_state(motg);
-
- if (motg->err_event_seen)
- return;
-
- if (motg->id_state) {
- if (gpio_is_valid(motg->pdata->switch_sel_gpio))
- gpio_direction_input(motg->pdata->switch_sel_gpio);
- if (!test_and_set_bit(ID, &motg->inputs)) {
- pr_debug("ID set\n");
- msm_otg_dbg_log_event(&motg->phy, "ID SET",
- motg->inputs, motg->phy.otg->state);
- work = 1;
- }
- } else {
- if (gpio_is_valid(motg->pdata->switch_sel_gpio))
- gpio_direction_output(motg->pdata->switch_sel_gpio, 1);
- if (test_and_clear_bit(ID, &motg->inputs)) {
- pr_debug("ID clear\n");
- msm_otg_dbg_log_event(&motg->phy, "ID CLEAR",
- motg->inputs, motg->phy.otg->state);
- work = 1;
- }
- }
-
- if (work && (motg->phy.otg->state != OTG_STATE_UNDEFINED)) {
- msm_otg_dbg_log_event(&motg->phy,
- "CHECK ID EVENT DURING SUSPEND",
- atomic_read(&motg->pm_suspended),
- motg->sm_work_pending);
- msm_otg_kick_sm_work(motg);
- }
-}
-
-#define MSM_ID_STATUS_DELAY 5 /* 5msec */
-static irqreturn_t msm_id_irq(int irq, void *data)
-{
- struct msm_otg *motg = data;
-
- /*schedule delayed work for 5msec for ID line state to settle*/
- queue_delayed_work(motg->otg_wq, &motg->id_status_work,
- msecs_to_jiffies(MSM_ID_STATUS_DELAY));
-
- return IRQ_HANDLED;
-}
-
-int msm_otg_pm_notify(struct notifier_block *notify_block,
- unsigned long mode, void *unused)
-{
- struct msm_otg *motg = container_of(
- notify_block, struct msm_otg, pm_notify);
-
- dev_dbg(motg->phy.dev, "OTG PM notify:%lx, sm_pending:%u\n", mode,
- motg->sm_work_pending);
- msm_otg_dbg_log_event(&motg->phy, "PM NOTIFY",
- mode, motg->sm_work_pending);
-
- switch (mode) {
- case PM_POST_SUSPEND:
- /* OTG sm_work can be armed now */
- atomic_set(&motg->pm_suspended, 0);
-
- /* Handle any deferred wakeup events from USB during suspend */
- if (motg->sm_work_pending) {
- motg->sm_work_pending = false;
- queue_work(motg->otg_wq, &motg->sm_work);
- }
- break;
-
- default:
- break;
- }
-
- return NOTIFY_OK;
-}
-
-static int msm_otg_mode_show(struct seq_file *s, void *unused)
-{
- struct msm_otg *motg = s->private;
- struct usb_otg *otg = motg->phy.otg;
-
- switch (otg->state) {
- case OTG_STATE_A_HOST:
- seq_puts(s, "host\n");
- break;
- case OTG_STATE_B_IDLE:
- case OTG_STATE_B_PERIPHERAL:
- case OTG_STATE_B_SUSPEND:
- seq_puts(s, "peripheral\n");
- break;
- default:
- seq_puts(s, "none\n");
- break;
- }
-
- return 0;
-}
-
-static int msm_otg_mode_open(struct inode *inode, struct file *file)
-{
- return single_open(file, msm_otg_mode_show, inode->i_private);
-}
-
-static ssize_t msm_otg_mode_write(struct file *file, const char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- struct seq_file *s = file->private_data;
- struct msm_otg *motg = s->private;
- char buf[16];
- struct usb_phy *phy = &motg->phy;
- int status = count;
- enum usb_mode_type req_mode;
-
- memset(buf, 0x00, sizeof(buf));
-
- if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) {
- status = -EFAULT;
- goto out;
- }
-
- if (!strncmp(buf, "host", 4)) {
- req_mode = USB_HOST;
- } else if (!strncmp(buf, "peripheral", 10)) {
- req_mode = USB_PERIPHERAL;
- } else if (!strncmp(buf, "none", 4)) {
- req_mode = USB_NONE;
- } else {
- status = -EINVAL;
- goto out;
- }
-
- switch (req_mode) {
- case USB_NONE:
- switch (phy->otg->state) {
- case OTG_STATE_A_HOST:
- case OTG_STATE_B_PERIPHERAL:
- case OTG_STATE_B_SUSPEND:
- set_bit(ID, &motg->inputs);
- clear_bit(B_SESS_VLD, &motg->inputs);
- break;
- default:
- goto out;
- }
- break;
- case USB_PERIPHERAL:
- switch (phy->otg->state) {
- case OTG_STATE_B_IDLE:
- case OTG_STATE_A_HOST:
- set_bit(ID, &motg->inputs);
- set_bit(B_SESS_VLD, &motg->inputs);
- break;
- default:
- goto out;
- }
- break;
- case USB_HOST:
- switch (phy->otg->state) {
- case OTG_STATE_B_IDLE:
- case OTG_STATE_B_PERIPHERAL:
- case OTG_STATE_B_SUSPEND:
- clear_bit(ID, &motg->inputs);
- break;
- default:
- goto out;
- }
- break;
- default:
- goto out;
- }
-
- motg->id_state = (test_bit(ID, &motg->inputs)) ? USB_ID_FLOAT :
- USB_ID_GROUND;
- queue_work(motg->otg_wq, &motg->sm_work);
-out:
- return status;
-}
-
-const struct file_operations msm_otg_mode_fops = {
- .open = msm_otg_mode_open,
- .read = seq_read,
- .write = msm_otg_mode_write,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int msm_otg_show_otg_state(struct seq_file *s, void *unused)
-{
- struct msm_otg *motg = s->private;
- struct usb_phy *phy = &motg->phy;
-
- seq_printf(s, "%s\n", usb_otg_state_string(phy->otg->state));
- return 0;
-}
-
-static int msm_otg_otg_state_open(struct inode *inode, struct file *file)
-{
- return single_open(file, msm_otg_show_otg_state, inode->i_private);
-}
-
-const struct file_operations msm_otg_state_fops = {
- .open = msm_otg_otg_state_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int msm_otg_show_chg_type(struct seq_file *s, void *unused)
-{
- struct msm_otg *motg = s->private;
-
- seq_printf(s, "%s\n", chg_to_string(motg->chg_type));
- return 0;
-}
-
-static int msm_otg_chg_open(struct inode *inode, struct file *file)
-{
- return single_open(file, msm_otg_show_chg_type, inode->i_private);
-}
-
-const struct file_operations msm_otg_chg_fops = {
- .open = msm_otg_chg_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int msm_otg_bus_show(struct seq_file *s, void *unused)
-{
- if (debug_bus_voting_enabled)
- seq_puts(s, "enabled\n");
- else
- seq_puts(s, "disabled\n");
-
- return 0;
-}
-
-static int msm_otg_bus_open(struct inode *inode, struct file *file)
-{
- return single_open(file, msm_otg_bus_show, inode->i_private);
-}
-
-static ssize_t msm_otg_bus_write(struct file *file, const char __user *ubuf,
- size_t count, loff_t *ppos)
-{
- char buf[8];
- struct seq_file *s = file->private_data;
- struct msm_otg *motg = s->private;
-
- memset(buf, 0x00, sizeof(buf));
-
- if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
- return -EFAULT;
-
- if (!strncmp(buf, "enable", 6)) {
- /* Do not vote here. Let OTG statemachine decide when to vote */
- debug_bus_voting_enabled = true;
- } else {
- debug_bus_voting_enabled = false;
- msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
- }
-
- return count;
-}
-
-static int msm_otg_dbg_buff_show(struct seq_file *s, void *unused)
-{
- struct msm_otg *motg = s->private;
- unsigned long flags;
- unsigned int i;
-
- read_lock_irqsave(&motg->dbg_lock, flags);
-
- i = motg->dbg_idx;
- if (strnlen(motg->buf[i], DEBUG_MSG_LEN))
- seq_printf(s, "%s\n", motg->buf[i]);
- for (dbg_inc(&i); i != motg->dbg_idx; dbg_inc(&i)) {
- if (!strnlen(motg->buf[i], DEBUG_MSG_LEN))
- continue;
- seq_printf(s, "%s\n", motg->buf[i]);
- }
- read_unlock_irqrestore(&motg->dbg_lock, flags);
-
- return 0;
-}
-
-static int msm_otg_dbg_buff_open(struct inode *inode, struct file *file)
-{
- return single_open(file, msm_otg_dbg_buff_show, inode->i_private);
-}
-
-const struct file_operations msm_otg_dbg_buff_fops = {
- .open = msm_otg_dbg_buff_open,
- .read = seq_read,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static int msm_otg_dpdm_regulator_enable(struct regulator_dev *rdev)
-{
- int ret = 0;
- struct msm_otg *motg = rdev_get_drvdata(rdev);
-
- if (!motg->rm_pulldown) {
- ret = msm_hsusb_ldo_enable(motg, USB_PHY_REG_3P3_ON);
- if (!ret) {
- motg->rm_pulldown = true;
- msm_otg_dbg_log_event(&motg->phy, "RM Pulldown",
- motg->rm_pulldown, 0);
- }
- }
-
- return ret;
-}
-
-static int msm_otg_dpdm_regulator_disable(struct regulator_dev *rdev)
-{
- int ret = 0;
- struct msm_otg *motg = rdev_get_drvdata(rdev);
-
- if (motg->rm_pulldown) {
- ret = msm_hsusb_ldo_enable(motg, USB_PHY_REG_3P3_OFF);
- if (!ret) {
- motg->rm_pulldown = false;
- msm_otg_dbg_log_event(&motg->phy, "RM Pulldown",
- motg->rm_pulldown, 0);
- }
- }
-
- return ret;
-}
-
-static int msm_otg_dpdm_regulator_is_enabled(struct regulator_dev *rdev)
-{
- struct msm_otg *motg = rdev_get_drvdata(rdev);
-
- return motg->rm_pulldown;
-}
-
-static struct regulator_ops msm_otg_dpdm_regulator_ops = {
- .enable = msm_otg_dpdm_regulator_enable,
- .disable = msm_otg_dpdm_regulator_disable,
- .is_enabled = msm_otg_dpdm_regulator_is_enabled,
-};
-
-static int usb_phy_regulator_init(struct msm_otg *motg)
-{
- struct device *dev = motg->phy.dev;
- struct regulator_config cfg = {};
- struct regulator_init_data *init_data;
-
- init_data = devm_kzalloc(dev, sizeof(*init_data), GFP_KERNEL);
- if (!init_data)
- return -ENOMEM;
-
- init_data->constraints.valid_ops_mask |= REGULATOR_CHANGE_STATUS;
- motg->dpdm_rdesc.owner = THIS_MODULE;
- motg->dpdm_rdesc.type = REGULATOR_VOLTAGE;
- motg->dpdm_rdesc.ops = &msm_otg_dpdm_regulator_ops;
- motg->dpdm_rdesc.name = kbasename(dev->of_node->full_name);
-
- cfg.dev = dev;
- cfg.init_data = init_data;
- cfg.driver_data = motg;
- cfg.of_node = dev->of_node;
-
- motg->dpdm_rdev = devm_regulator_register(dev, &motg->dpdm_rdesc, &cfg);
- if (IS_ERR(motg->dpdm_rdev))
- return PTR_ERR(motg->dpdm_rdev);
-
- return 0;
-}
-
-const struct file_operations msm_otg_bus_fops = {
- .open = msm_otg_bus_open,
- .read = seq_read,
- .write = msm_otg_bus_write,
- .llseek = seq_lseek,
- .release = single_release,
-};
-
-static struct dentry *msm_otg_dbg_root;
-
-static int msm_otg_debugfs_init(struct msm_otg *motg)
-{
- struct dentry *msm_otg_dentry;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- msm_otg_dbg_root = debugfs_create_dir("msm_otg", NULL);
-
- if (!msm_otg_dbg_root || IS_ERR(msm_otg_dbg_root))
- return -ENODEV;
-
- if ((pdata->mode == USB_OTG || pdata->mode == USB_PERIPHERAL) &&
- pdata->otg_control == OTG_USER_CONTROL) {
-
- msm_otg_dentry = debugfs_create_file("mode", 0644,
- msm_otg_dbg_root, motg, &msm_otg_mode_fops);
-
- if (!msm_otg_dentry) {
- debugfs_remove(msm_otg_dbg_root);
- msm_otg_dbg_root = NULL;
- return -ENODEV;
- }
- }
-
- msm_otg_dentry = debugfs_create_file("chg_type", 0444, msm_otg_dbg_root,
- motg, &msm_otg_chg_fops);
-
- if (!msm_otg_dentry) {
- debugfs_remove_recursive(msm_otg_dbg_root);
- return -ENODEV;
- }
-
- msm_otg_dentry = debugfs_create_file("bus_voting", 0644,
- msm_otg_dbg_root, motg, &msm_otg_bus_fops);
-
- if (!msm_otg_dentry) {
- debugfs_remove_recursive(msm_otg_dbg_root);
- return -ENODEV;
- }
-
- msm_otg_dentry = debugfs_create_file("otg_state", 0444,
- msm_otg_dbg_root, motg, &msm_otg_state_fops);
-
- if (!msm_otg_dentry) {
- debugfs_remove_recursive(msm_otg_dbg_root);
- return -ENODEV;
- }
-
- msm_otg_dentry = debugfs_create_file("dbg_buff", 0444,
- msm_otg_dbg_root, motg, &msm_otg_dbg_buff_fops);
-
- if (!msm_otg_dentry) {
- debugfs_remove_recursive(msm_otg_dbg_root);
- return -ENODEV;
- }
- return 0;
-}
-
-static void msm_otg_debugfs_cleanup(void)
-{
- debugfs_remove_recursive(msm_otg_dbg_root);
-}
-
-static ssize_t
-set_msm_otg_perf_mode(struct device *dev, struct device_attribute *attr,
- const char *buf, size_t count)
-{
- struct msm_otg *motg = the_msm_otg;
- int ret;
- long clk_rate;
-
- pr_debug("%s: enable:%d\n", __func__, !strncasecmp(buf, "enable", 6));
-
- if (!strncasecmp(buf, "enable", 6)) {
- clk_rate = motg->core_clk_nominal_rate;
- msm_otg_bus_freq_set(motg, USB_NOC_NOM_VOTE);
- } else {
- clk_rate = motg->core_clk_svs_rate;
- msm_otg_bus_freq_set(motg, USB_NOC_SVS_VOTE);
- }
-
- if (clk_rate) {
- pr_debug("Set usb sys_clk rate:%ld\n", clk_rate);
- ret = clk_set_rate(motg->core_clk, clk_rate);
- if (ret)
- pr_err("sys_clk set_rate fail:%d %ld\n", ret, clk_rate);
- msm_otg_dbg_log_event(&motg->phy, "OTG PERF SET",
- clk_rate, ret);
- } else {
- pr_err("usb sys_clk rate is undefined\n");
- }
-
- return count;
-}
-
-static DEVICE_ATTR(perf_mode, 0200, NULL, set_msm_otg_perf_mode);
-
-#define MSM_OTG_CMD_ID 0x09
-#define MSM_OTG_DEVICE_ID 0x04
-#define MSM_OTG_VMID_IDX 0xFF
-#define MSM_OTG_MEM_TYPE 0x02
-struct msm_otg_scm_cmd_buf {
- unsigned int device_id;
- unsigned int vmid_idx;
- unsigned int mem_type;
-} __attribute__ ((__packed__));
-
-static void msm_otg_pnoc_errata_fix(struct msm_otg *motg)
-{
- int ret;
- struct msm_otg_platform_data *pdata = motg->pdata;
- struct msm_otg_scm_cmd_buf cmd_buf;
-
- if (!pdata->pnoc_errata_fix)
- return;
-
- dev_dbg(motg->phy.dev, "applying fix for pnoc h/w issue\n");
-
- cmd_buf.device_id = MSM_OTG_DEVICE_ID;
- cmd_buf.vmid_idx = MSM_OTG_VMID_IDX;
- cmd_buf.mem_type = MSM_OTG_MEM_TYPE;
-
- ret = scm_call(SCM_SVC_MP, MSM_OTG_CMD_ID, &cmd_buf,
- sizeof(cmd_buf), NULL, 0);
-
- if (ret)
- dev_err(motg->phy.dev, "scm command failed to update VMIDMT\n");
-}
-
-static u64 msm_otg_dma_mask = DMA_BIT_MASK(32);
-static struct platform_device *msm_otg_add_pdev(
- struct platform_device *ofdev, const char *name)
-{
- struct platform_device *pdev;
- const struct resource *res = ofdev->resource;
- unsigned int num = ofdev->num_resources;
- int retval;
- struct ci13xxx_platform_data ci_pdata;
- struct msm_otg_platform_data *otg_pdata;
- struct msm_otg *motg;
-
- pdev = platform_device_alloc(name, -1);
- if (!pdev) {
- retval = -ENOMEM;
- goto error;
- }
-
- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
- pdev->dev.dma_mask = &msm_otg_dma_mask;
- pdev->dev.parent = &ofdev->dev;
-
- if (num) {
- retval = platform_device_add_resources(pdev, res, num);
- if (retval)
- goto error;
- }
-
- if (!strcmp(name, "msm_hsusb")) {
- otg_pdata =
- (struct msm_otg_platform_data *)
- ofdev->dev.platform_data;
- motg = platform_get_drvdata(ofdev);
- ci_pdata.log2_itc = otg_pdata->log2_itc;
- ci_pdata.usb_core_id = 0;
- ci_pdata.l1_supported = otg_pdata->l1_supported;
- ci_pdata.enable_ahb2ahb_bypass =
- otg_pdata->enable_ahb2ahb_bypass;
- ci_pdata.enable_streaming = otg_pdata->enable_streaming;
- ci_pdata.enable_axi_prefetch = otg_pdata->enable_axi_prefetch;
- retval = platform_device_add_data(pdev, &ci_pdata,
- sizeof(ci_pdata));
- if (retval)
- goto error;
- }
-
- retval = platform_device_add(pdev);
- if (retval)
- goto error;
-
- return pdev;
-
-error:
- platform_device_put(pdev);
- return ERR_PTR(retval);
-}
-
-static int msm_otg_setup_devices(struct platform_device *ofdev,
- enum usb_mode_type mode, bool init)
-{
- const char *gadget_name = "msm_hsusb";
- const char *host_name = "msm_hsusb_host";
- static struct platform_device *gadget_pdev;
- static struct platform_device *host_pdev;
- int retval = 0;
-
- if (!init) {
- if (gadget_pdev) {
- platform_device_unregister(gadget_pdev);
- device_remove_file(&gadget_pdev->dev,
- &dev_attr_perf_mode);
- }
- if (host_pdev)
- platform_device_unregister(host_pdev);
- return 0;
- }
-
- switch (mode) {
- case USB_OTG:
- /* fall through */
- case USB_PERIPHERAL:
- gadget_pdev = msm_otg_add_pdev(ofdev, gadget_name);
- if (IS_ERR(gadget_pdev)) {
- retval = PTR_ERR(gadget_pdev);
- break;
- }
- if (device_create_file(&gadget_pdev->dev, &dev_attr_perf_mode))
- dev_err(&gadget_pdev->dev, "perf_mode file failed\n");
- if (mode == USB_PERIPHERAL)
- break;
- /* fall through */
- case USB_HOST:
- host_pdev = msm_otg_add_pdev(ofdev, host_name);
- if (IS_ERR(host_pdev)) {
- retval = PTR_ERR(host_pdev);
- if (mode == USB_OTG) {
- platform_device_unregister(gadget_pdev);
- device_remove_file(&gadget_pdev->dev,
- &dev_attr_perf_mode);
- }
- }
- break;
- default:
- break;
- }
-
- return retval;
-}
-
-static int msm_otg_ext_chg_open(struct inode *inode, struct file *file)
-{
- struct msm_otg *motg = the_msm_otg;
-
- pr_debug("msm_otg ext chg open\n");
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: OPEN",
- motg->inputs, motg->phy.otg->state);
-
- motg->ext_chg_opened = true;
- file->private_data = (void *)motg;
- return 0;
-}
-
-static long
-msm_otg_ext_chg_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
-{
- struct msm_otg *motg = file->private_data;
- struct msm_usb_chg_info info = {0};
- int ret = 0, val;
-
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: IOCTL", cmd, 0);
- switch (cmd) {
- case MSM_USB_EXT_CHG_INFO:
- info.chg_block_type = USB_CHG_BLOCK_ULPI;
- info.page_offset = motg->io_res->start & ~PAGE_MASK;
- /* mmap() works on PAGE granularity */
- info.length = PAGE_SIZE;
-
- if (copy_to_user((void __user *)arg, &info, sizeof(info))) {
- pr_err("%s: copy to user failed\n\n", __func__);
- ret = -EFAULT;
- }
- break;
- case MSM_USB_EXT_CHG_BLOCK_LPM:
- if (get_user(val, (int __user *)arg)) {
- pr_err("%s: get_user failed\n\n", __func__);
- ret = -EFAULT;
- break;
- }
- pr_debug("%s: LPM block request %d\n", __func__, val);
- msm_otg_dbg_log_event(&motg->phy, "LPM BLOCK REQ", val, 0);
- if (val) { /* block LPM */
- if (motg->chg_type == USB_DCP_CHARGER) {
- motg->ext_chg_active = ACTIVE;
- msm_otg_dbg_log_event(&motg->phy,
- "PM RUNTIME: EXT_CHG GET",
- get_pm_runtime_counter(motg->phy.dev), 0);
- pm_runtime_get_sync(motg->phy.dev);
- } else {
- motg->ext_chg_active = INACTIVE;
- complete(&motg->ext_chg_wait);
- ret = -ENODEV;
- }
- } else {
- motg->ext_chg_active = INACTIVE;
- complete(&motg->ext_chg_wait);
- /*
- * If usb cable is disconnected and then userspace
- * calls ioctl to unblock low power mode, make sure
- * otg_sm work for usb disconnect is processed first
- * followed by decrementing the PM usage counters.
- */
- flush_work(&motg->sm_work);
- msm_otg_dbg_log_event(&motg->phy,
- "PM RUNTIME: EXT_CHG PUT",
- get_pm_runtime_counter(motg->phy.dev), 0);
- pm_runtime_put_sync(motg->phy.dev);
- }
- break;
- case MSM_USB_EXT_CHG_VOLTAGE_INFO:
- if (get_user(val, (int __user *)arg)) {
- pr_err("%s: get_user failed\n\n", __func__);
- ret = -EFAULT;
- break;
- }
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: VOL REQ", cmd, val);
-
- if (val == USB_REQUEST_5V)
- pr_debug("%s:voting 5V voltage request\n", __func__);
- else if (val == USB_REQUEST_9V)
- pr_debug("%s:voting 9V voltage request\n", __func__);
- break;
- case MSM_USB_EXT_CHG_RESULT:
- if (get_user(val, (int __user *)arg)) {
- pr_err("%s: get_user failed\n\n", __func__);
- ret = -EFAULT;
- break;
- }
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: VOL REQ", cmd, val);
-
- if (!val)
- pr_debug("%s:voltage request successful\n", __func__);
- else
- pr_debug("%s:voltage request failed\n", __func__);
- break;
- case MSM_USB_EXT_CHG_TYPE:
- if (get_user(val, (int __user *)arg)) {
- pr_err("%s: get_user failed\n\n", __func__);
- ret = -EFAULT;
- break;
- }
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: VOL REQ", cmd, val);
-
- if (val)
- pr_debug("%s:charger is external charger\n", __func__);
- else
- pr_debug("%s:charger is not ext charger\n", __func__);
- break;
- default:
- ret = -EINVAL;
- }
-
- return ret;
-}
-
-static int msm_otg_ext_chg_mmap(struct file *file, struct vm_area_struct *vma)
-{
- struct msm_otg *motg = file->private_data;
- unsigned long vsize = vma->vm_end - vma->vm_start;
- int ret;
-
- if (vma->vm_pgoff || vsize > PAGE_SIZE)
- return -EINVAL;
-
- vma->vm_pgoff = __phys_to_pfn(motg->io_res->start);
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
-
- ret = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vsize, vma->vm_page_prot);
- if (ret < 0) {
- pr_err("%s: failed with return val %d\n", __func__, ret);
- return ret;
- }
-
- return 0;
-}
-
-static int msm_otg_ext_chg_release(struct inode *inode, struct file *file)
-{
- struct msm_otg *motg = file->private_data;
-
- pr_debug("msm_otg ext chg release\n");
- msm_otg_dbg_log_event(&motg->phy, "EXT CHG: RELEASE",
- motg->inputs, motg->phy.otg->state);
-
- motg->ext_chg_opened = false;
-
- return 0;
-}
-
-static const struct file_operations msm_otg_ext_chg_fops = {
- .owner = THIS_MODULE,
- .open = msm_otg_ext_chg_open,
- .unlocked_ioctl = msm_otg_ext_chg_ioctl,
- .mmap = msm_otg_ext_chg_mmap,
- .release = msm_otg_ext_chg_release,
-};
-
-static int msm_otg_setup_ext_chg_cdev(struct msm_otg *motg)
-{
- int ret;
-
- if (motg->pdata->enable_sec_phy || motg->pdata->mode == USB_HOST ||
- motg->pdata->otg_control != OTG_PMIC_CONTROL) {
- pr_debug("usb ext chg is not supported by msm otg\n");
- return -ENODEV;
- }
-
- ret = alloc_chrdev_region(&motg->ext_chg_dev, 0, 1, "usb_ext_chg");
- if (ret < 0) {
- pr_err("Fail to allocate usb ext char dev region\n");
- return ret;
- }
- motg->ext_chg_class = class_create(THIS_MODULE, "msm_ext_chg");
- if (ret < 0) {
- pr_err("Fail to create usb ext chg class\n");
- goto unreg_chrdev;
- }
- cdev_init(&motg->ext_chg_cdev, &msm_otg_ext_chg_fops);
- motg->ext_chg_cdev.owner = THIS_MODULE;
-
- ret = cdev_add(&motg->ext_chg_cdev, motg->ext_chg_dev, 1);
- if (ret < 0) {
- pr_err("Fail to add usb ext chg cdev\n");
- goto destroy_class;
- }
- motg->ext_chg_device = device_create(motg->ext_chg_class,
- NULL, motg->ext_chg_dev, NULL,
- "usb_ext_chg");
- if (IS_ERR(motg->ext_chg_device)) {
- pr_err("Fail to create usb ext chg device\n");
- ret = PTR_ERR(motg->ext_chg_device);
- motg->ext_chg_device = NULL;
- goto del_cdev;
- }
-
- init_completion(&motg->ext_chg_wait);
- pr_debug("msm otg ext chg cdev setup success\n");
- return 0;
-
-del_cdev:
- cdev_del(&motg->ext_chg_cdev);
-destroy_class:
- class_destroy(motg->ext_chg_class);
-unreg_chrdev:
- unregister_chrdev_region(motg->ext_chg_dev, 1);
-
- return ret;
-}
-
-static ssize_t dpdm_pulldown_enable_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct msm_otg *motg = the_msm_otg;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- return snprintf(buf, PAGE_SIZE, "%s\n", pdata->dpdm_pulldown_added ?
- "enabled" : "disabled");
-}
-
-static ssize_t dpdm_pulldown_enable_store(struct device *dev,
- struct device_attribute *attr, const char
- *buf, size_t size)
-{
- struct msm_otg *motg = the_msm_otg;
- struct msm_otg_platform_data *pdata = motg->pdata;
-
- if (!strncasecmp(buf, "enable", 6)) {
- pdata->dpdm_pulldown_added = true;
- return size;
- } else if (!strncasecmp(buf, "disable", 7)) {
- pdata->dpdm_pulldown_added = false;
- return size;
- }
-
- return -EINVAL;
-}
-
-static DEVICE_ATTR(dpdm_pulldown_enable, 0644,
- dpdm_pulldown_enable_show, dpdm_pulldown_enable_store);
-
-static int msm_otg_vbus_notifier(struct notifier_block *nb, unsigned long event,
- void *ptr)
-{
- struct msm_otg *motg = container_of(nb, struct msm_otg, vbus_nb);
-
- if (event)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
-
- queue_work(motg->otg_wq, &motg->sm_work);
-
- return NOTIFY_DONE;
-}
-
-static int msm_otg_id_notifier(struct notifier_block *nb, unsigned long event,
- void *ptr)
-{
- struct msm_otg *motg = container_of(nb, struct msm_otg, id_nb);
-
- if (event)
- clear_bit(ID, &motg->inputs);
- else
- set_bit(ID, &motg->inputs);
-
- queue_work(motg->otg_wq, &motg->sm_work);
-
- return NOTIFY_DONE;
-}
-
-static int msm_otg_extcon_register(struct msm_otg *motg)
-{
- struct device_node *node = motg->pdev->dev.of_node;
- struct extcon_dev *edev;
- int ret = 0;
-
- if (!of_property_read_bool(node, "extcon"))
- return 0;
-
- edev = extcon_get_edev_by_phandle(&motg->pdev->dev, 0);
- if (IS_ERR(edev) && PTR_ERR(edev) != -ENODEV)
- return PTR_ERR(edev);
-
- if (!IS_ERR(edev)) {
- motg->extcon_vbus = edev;
- motg->vbus_nb.notifier_call = msm_otg_vbus_notifier;
- ret = extcon_register_notifier(edev, EXTCON_USB,
- &motg->vbus_nb);
- if (ret < 0) {
- dev_err(&motg->pdev->dev, "failed to register notifier for USB\n");
- return ret;
- }
- }
-
- if (of_count_phandle_with_args(node, "extcon", NULL) > 1) {
- edev = extcon_get_edev_by_phandle(&motg->pdev->dev, 1);
- if (IS_ERR(edev) && PTR_ERR(edev) != -ENODEV) {
- ret = PTR_ERR(edev);
- goto err;
- }
- }
-
- if (!IS_ERR(edev)) {
- motg->extcon_id = edev;
- motg->id_nb.notifier_call = msm_otg_id_notifier;
- ret = extcon_register_notifier(edev, EXTCON_USB_HOST,
- &motg->id_nb);
- if (ret < 0) {
- dev_err(&motg->pdev->dev, "failed to register notifier for USB-HOST\n");
- goto err;
- }
- }
-
- return 0;
-err:
- if (motg->extcon_vbus)
- extcon_unregister_notifier(motg->extcon_vbus, EXTCON_USB,
- &motg->vbus_nb);
-
- return ret;
-}
-
-struct msm_otg_platform_data *msm_otg_dt_to_pdata(struct platform_device *pdev)
-{
- struct device_node *node = pdev->dev.of_node;
- struct msm_otg_platform_data *pdata;
- int len = 0;
- int res_gpio;
-
- pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
- if (!pdata)
- return NULL;
-
- of_get_property(node, "qcom,hsusb-otg-phy-init-seq", &len);
- if (len) {
- pdata->phy_init_seq = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
- if (!pdata->phy_init_seq)
- return NULL;
- of_property_read_u32_array(node, "qcom,hsusb-otg-phy-init-seq",
- pdata->phy_init_seq,
- len/sizeof(*pdata->phy_init_seq));
- }
- of_property_read_u32(node, "qcom,hsusb-otg-power-budget",
- &pdata->power_budget);
- of_property_read_u32(node, "qcom,hsusb-otg-mode",
- &pdata->mode);
- of_property_read_u32(node, "qcom,hsusb-otg-otg-control",
- &pdata->otg_control);
- of_property_read_u32(node, "qcom,hsusb-otg-default-mode",
- &pdata->default_mode);
- of_property_read_u32(node, "qcom,hsusb-otg-phy-type",
- &pdata->phy_type);
- pdata->disable_reset_on_disconnect = of_property_read_bool(node,
- "qcom,hsusb-otg-disable-reset");
- pdata->pnoc_errata_fix = of_property_read_bool(node,
- "qcom,hsusb-otg-pnoc-errata-fix");
- pdata->enable_lpm_on_dev_suspend = of_property_read_bool(node,
- "qcom,hsusb-otg-lpm-on-dev-suspend");
- pdata->core_clk_always_on_workaround = of_property_read_bool(node,
- "qcom,hsusb-otg-clk-always-on-workaround");
- pdata->delay_lpm_on_disconnect = of_property_read_bool(node,
- "qcom,hsusb-otg-delay-lpm");
- pdata->dp_manual_pullup = of_property_read_bool(node,
- "qcom,dp-manual-pullup");
- pdata->enable_sec_phy = of_property_read_bool(node,
- "qcom,usb2-enable-hsphy2");
- of_property_read_u32(node, "qcom,hsusb-log2-itc",
- &pdata->log2_itc);
-
- of_property_read_u32(node, "qcom,hsusb-otg-mpm-dpsehv-int",
- &pdata->mpm_dpshv_int);
- of_property_read_u32(node, "qcom,hsusb-otg-mpm-dmsehv-int",
- &pdata->mpm_dmshv_int);
- pdata->pmic_id_irq = platform_get_irq_byname(pdev, "pmic_id_irq");
- if (pdata->pmic_id_irq < 0)
- pdata->pmic_id_irq = 0;
-
- pdata->hub_reset_gpio = of_get_named_gpio(
- node, "qcom,hub-reset-gpio", 0);
- if (pdata->hub_reset_gpio < 0)
- pr_debug("hub_reset_gpio is not available\n");
-
- pdata->usbeth_reset_gpio = of_get_named_gpio(
- node, "qcom,usbeth-reset-gpio", 0);
- if (pdata->usbeth_reset_gpio < 0)
- pr_debug("usbeth_reset_gpio is not available\n");
-
- pdata->switch_sel_gpio =
- of_get_named_gpio(node, "qcom,sw-sel-gpio", 0);
- if (pdata->switch_sel_gpio < 0)
- pr_debug("switch_sel_gpio is not available\n");
-
- pdata->usb_id_gpio =
- of_get_named_gpio(node, "qcom,usbid-gpio", 0);
- if (pdata->usb_id_gpio < 0)
- pr_debug("usb_id_gpio is not available\n");
-
- pdata->l1_supported = of_property_read_bool(node,
- "qcom,hsusb-l1-supported");
- pdata->enable_ahb2ahb_bypass = of_property_read_bool(node,
- "qcom,ahb-async-bridge-bypass");
- pdata->disable_retention_with_vdd_min = of_property_read_bool(node,
- "qcom,disable-retention-with-vdd-min");
- pdata->enable_phy_id_pullup = of_property_read_bool(node,
- "qcom,enable-phy-id-pullup");
- pdata->phy_dvdd_always_on = of_property_read_bool(node,
- "qcom,phy-dvdd-always-on");
-
- res_gpio = of_get_named_gpio(node, "qcom,hsusb-otg-vddmin-gpio", 0);
- if (res_gpio < 0)
- res_gpio = 0;
- pdata->vddmin_gpio = res_gpio;
-
- pdata->emulation = of_property_read_bool(node,
- "qcom,emulation");
-
- pdata->enable_streaming = of_property_read_bool(node,
- "qcom,boost-sysclk-with-streaming");
-
- pdata->enable_axi_prefetch = of_property_read_bool(node,
- "qcom,axi-prefetch-enable");
-
- pdata->enable_sdp_typec_current_limit = of_property_read_bool(node,
- "qcom,enable-sdp-typec-current-limit");
- pdata->vbus_low_as_hostmode = of_property_read_bool(node,
- "qcom,vbus-low-as-hostmode");
- return pdata;
-}
-
-static int msm_otg_probe(struct platform_device *pdev)
-{
- int ret = 0;
- int len = 0;
- u32 tmp[3];
- struct resource *res;
- struct msm_otg *motg;
- struct usb_phy *phy;
- struct msm_otg_platform_data *pdata;
- void __iomem *tcsr;
- int id_irq = 0;
-
- dev_info(&pdev->dev, "msm_otg probe\n");
-
- motg = kzalloc(sizeof(struct msm_otg), GFP_KERNEL);
- if (!motg) {
- ret = -ENOMEM;
- return ret;
- }
-
- /*
- * USB Core is running its protocol engine based on CORE CLK,
- * CORE CLK must be running at >55Mhz for correct HSUSB
- * operation and USB core cannot tolerate frequency changes on
- * CORE CLK. For such USB cores, vote for maximum clk frequency
- * on pclk source
- */
- motg->core_clk = clk_get(&pdev->dev, "core_clk");
- if (IS_ERR(motg->core_clk)) {
- ret = PTR_ERR(motg->core_clk);
- motg->core_clk = NULL;
- if (ret != -EPROBE_DEFER)
- dev_err(&pdev->dev, "failed to get core_clk\n");
- goto free_motg;
- }
-
- motg->core_reset = devm_reset_control_get(&pdev->dev, "core_reset");
- if (IS_ERR(motg->core_reset)) {
- dev_err(&pdev->dev, "failed to get core_reset\n");
- ret = PTR_ERR(motg->core_reset);
- goto put_core_clk;
- }
-
- /*
- * USB Core CLK can run at max freq if streaming is enabled. Hence,
- * get Max supported clk frequency for USB Core CLK and request to set
- * the same. Otherwise set USB Core CLK to defined default value.
- */
- if (of_property_read_u32(pdev->dev.of_node,
- "qcom,max-nominal-sysclk-rate", &ret)) {
- ret = -EINVAL;
- goto put_core_clk;
- } else {
- motg->core_clk_nominal_rate = clk_round_rate(motg->core_clk,
- ret);
- }
-
- if (of_property_read_u32(pdev->dev.of_node,
- "qcom,max-svs-sysclk-rate", &ret)) {
- dev_dbg(&pdev->dev, "core_clk svs freq not specified\n");
- } else {
- motg->core_clk_svs_rate = clk_round_rate(motg->core_clk, ret);
- }
-
- motg->default_noc_mode = USB_NOC_NOM_VOTE;
- if (of_property_read_bool(pdev->dev.of_node, "qcom,default-mode-svs")) {
- motg->core_clk_rate = motg->core_clk_svs_rate;
- motg->default_noc_mode = USB_NOC_SVS_VOTE;
- } else if (of_property_read_bool(pdev->dev.of_node,
- "qcom,boost-sysclk-with-streaming")) {
- motg->core_clk_rate = motg->core_clk_nominal_rate;
- } else {
- motg->core_clk_rate = clk_round_rate(motg->core_clk,
- USB_DEFAULT_SYSTEM_CLOCK);
- }
-
- if (IS_ERR_VALUE(motg->core_clk_rate)) {
- dev_err(&pdev->dev, "fail to get core clk max freq.\n");
- } else {
- ret = clk_set_rate(motg->core_clk, motg->core_clk_rate);
- if (ret)
- dev_err(&pdev->dev, "fail to set core_clk freq:%d\n",
- ret);
- }
-
- motg->pclk = clk_get(&pdev->dev, "iface_clk");
- if (IS_ERR(motg->pclk)) {
- ret = PTR_ERR(motg->pclk);
- motg->pclk = NULL;
- if (ret != -EPROBE_DEFER)
- dev_err(&pdev->dev, "failed to get iface_clk\n");
- goto put_core_clk;
- }
-
- motg->xo_clk = clk_get(&pdev->dev, "xo");
- if (IS_ERR(motg->xo_clk)) {
- ret = PTR_ERR(motg->xo_clk);
- motg->xo_clk = NULL;
- if (ret == -EPROBE_DEFER)
- goto put_pclk;
- }
-
- /*
- * On few platforms USB PHY is fed with sleep clk.
- * Hence don't fail probe.
- */
- motg->sleep_clk = devm_clk_get(&pdev->dev, "sleep_clk");
- if (IS_ERR(motg->sleep_clk)) {
- ret = PTR_ERR(motg->sleep_clk);
- motg->sleep_clk = NULL;
- if (ret == -EPROBE_DEFER)
- goto put_xo_clk;
- else
- dev_dbg(&pdev->dev, "failed to get sleep_clk\n");
- } else {
- ret = clk_prepare_enable(motg->sleep_clk);
- if (ret) {
- dev_err(&pdev->dev, "%s failed to vote sleep_clk%d\n",
- __func__, ret);
- goto put_xo_clk;
- }
- }
-
- /*
- * If present, phy_reset_clk is used to reset the PHY, ULPI bridge
- * and CSR Wrapper. This is a reset only clock.
- */
-
- if (of_property_match_string(pdev->dev.of_node,
- "clock-names", "phy_reset_clk") >= 0) {
- motg->phy_reset_clk = devm_clk_get(&pdev->dev, "phy_reset_clk");
- if (IS_ERR(motg->phy_reset_clk)) {
- ret = PTR_ERR(motg->phy_reset_clk);
- goto disable_sleep_clk;
- }
-
- motg->phy_reset = devm_reset_control_get(&pdev->dev,
- "phy_reset");
- if (IS_ERR(motg->phy_reset)) {
- dev_err(&pdev->dev, "failed to get phy_reset\n");
- ret = PTR_ERR(motg->phy_reset);
- goto disable_sleep_clk;
- }
- }
-
- /*
- * If present, phy_por_clk is used to assert/de-assert phy POR
- * input. This is a reset only clock. phy POR must be asserted
- * after overriding the parameter registers via CSR wrapper or
- * ULPI bridge.
- */
- if (of_property_match_string(pdev->dev.of_node,
- "clock-names", "phy_por_clk") >= 0) {
- motg->phy_por_clk = devm_clk_get(&pdev->dev, "phy_por_clk");
- if (IS_ERR(motg->phy_por_clk)) {
- ret = PTR_ERR(motg->phy_por_clk);
- goto disable_sleep_clk;
- }
-
- motg->phy_por_reset = devm_reset_control_get(&pdev->dev,
- "phy_por_reset");
- if (IS_ERR(motg->phy_por_reset)) {
- dev_err(&pdev->dev, "failed to get phy_por_reset\n");
- ret = PTR_ERR(motg->phy_por_reset);
- goto disable_sleep_clk;
- }
- }
-
- /*
- * If present, phy_csr_clk is required for accessing PHY
- * CSR registers via AHB2PHY interface.
- */
- if (of_property_match_string(pdev->dev.of_node,
- "clock-names", "phy_csr_clk") >= 0) {
- motg->phy_csr_clk = devm_clk_get(&pdev->dev, "phy_csr_clk");
- if (IS_ERR(motg->phy_csr_clk)) {
- ret = PTR_ERR(motg->phy_csr_clk);
- goto disable_sleep_clk;
- } else {
- ret = clk_prepare_enable(motg->phy_csr_clk);
- if (ret) {
- dev_err(&pdev->dev,
- "fail to enable phy csr clk %d\n", ret);
- goto disable_sleep_clk;
- }
- }
- }
-
- of_property_read_u32(pdev->dev.of_node, "qcom,pm-qos-latency",
- &motg->pm_qos_latency);
-
- pdata = msm_otg_dt_to_pdata(pdev);
- if (!pdata) {
- ret = -ENOMEM;
- goto disable_phy_csr_clk;
- }
- pdev->dev.platform_data = pdata;
-
- pdata->bus_scale_table = msm_bus_cl_get_pdata(pdev);
- if (!pdata->bus_scale_table)
- dev_dbg(&pdev->dev, "bus scaling is disabled\n");
-
- if (pdata->phy_type == QUSB_ULPI_PHY) {
- if (of_property_match_string(pdev->dev.of_node,
- "clock-names", "phy_ref_clk") >= 0) {
- motg->phy_ref_clk = devm_clk_get(&pdev->dev,
- "phy_ref_clk");
- if (IS_ERR(motg->phy_ref_clk)) {
- ret = PTR_ERR(motg->phy_ref_clk);
- goto disable_phy_csr_clk;
- } else {
- ret = clk_prepare_enable(motg->phy_ref_clk);
- if (ret) {
- dev_err(&pdev->dev,
- "fail to enable phy ref clk %d\n",
- ret);
- goto disable_phy_csr_clk;
- }
- }
- }
- }
-
- motg->phy.otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
- GFP_KERNEL);
- if (!motg->phy.otg) {
- ret = -ENOMEM;
- goto disable_phy_csr_clk;
- }
-
- the_msm_otg = motg;
- motg->pdata = pdata;
- phy = &motg->phy;
- phy->dev = &pdev->dev;
- motg->pdev = pdev;
- motg->dbg_idx = 0;
- motg->dbg_lock = __RW_LOCK_UNLOCKED(lck);
-
- if (motg->pdata->bus_scale_table) {
- motg->bus_perf_client =
- msm_bus_scale_register_client(motg->pdata->bus_scale_table);
- if (!motg->bus_perf_client) {
- dev_err(motg->phy.dev, "%s: Failed to register BUS\n"
- "scaling client!!\n", __func__);
- } else {
- debug_bus_voting_enabled = true;
- /* Some platforms require BUS vote to control clocks */
- msm_otg_bus_vote(motg, USB_MIN_PERF_VOTE);
- }
- }
-
- ret = msm_otg_bus_freq_get(motg);
- if (ret) {
- pr_err("failed to get noc clocks: %d\n", ret);
- } else {
- ret = msm_otg_bus_freq_set(motg, motg->default_noc_mode);
- if (ret)
- pr_err("failed to vote explicit noc rates: %d\n", ret);
- }
-
- /* initialize reset counter */
- motg->reset_counter = 0;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core");
- if (!res) {
- dev_err(&pdev->dev, "failed to get core iomem resource\n");
- ret = -ENODEV;
- goto devote_bus_bw;
- }
-
- motg->io_res = res;
- motg->regs = ioremap(res->start, resource_size(res));
- if (!motg->regs) {
- dev_err(&pdev->dev, "core iomem ioremap failed\n");
- ret = -ENOMEM;
- goto devote_bus_bw;
- }
- dev_info(&pdev->dev, "OTG regs = %pK\n", motg->regs);
-
- if (pdata->enable_sec_phy) {
- res = platform_get_resource_byname(pdev,
- IORESOURCE_MEM, "tcsr");
- if (!res) {
- dev_dbg(&pdev->dev, "missing TCSR memory resource\n");
- } else {
- tcsr = devm_ioremap_nocache(&pdev->dev, res->start,
- resource_size(res));
- if (!tcsr) {
- dev_dbg(&pdev->dev, "tcsr ioremap failed\n");
- } else {
- /* Enable USB2 on secondary HSPHY. */
- writel_relaxed(0x1, tcsr);
- /*
- * Ensure that TCSR write is completed before
- * USB registers initialization.
- */
- mb();
- }
- }
- }
-
- if (pdata->enable_sec_phy)
- motg->usb_phy_ctrl_reg = USB_PHY_CTRL2;
- else
- motg->usb_phy_ctrl_reg = USB_PHY_CTRL;
-
- /*
- * The USB PHY wrapper provides a register interface
- * through AHB2PHY for performing PHY related operations
- * like retention, HV interrupts and overriding parameter
- * registers etc. The registers start at 4 byte boundary
- * but only the first byte is valid and remaining are not
- * used. Relaxed versions of readl/writel should be used.
- *
- * The link does not have any PHY specific registers.
- * Hence set motg->usb_phy_ctrl_reg to.
- */
- if (motg->pdata->phy_type == SNPS_FEMTO_PHY ||
- pdata->phy_type == QUSB_ULPI_PHY) {
- res = platform_get_resource_byname(pdev,
- IORESOURCE_MEM, "phy_csr");
- if (!res) {
- dev_err(&pdev->dev, "PHY CSR IOMEM missing!\n");
- ret = -ENODEV;
- goto free_regs;
- }
- motg->phy_csr_regs = devm_ioremap_resource(&pdev->dev, res);
- if (IS_ERR(motg->phy_csr_regs)) {
- ret = PTR_ERR(motg->phy_csr_regs);
- dev_err(&pdev->dev, "PHY CSR ioremap failed!\n");
- goto free_regs;
- }
- motg->usb_phy_ctrl_reg = 0;
- }
-
- motg->irq = platform_get_irq(pdev, 0);
- if (!motg->irq) {
- dev_err(&pdev->dev, "platform_get_irq failed\n");
- ret = -ENODEV;
- goto free_regs;
- }
-
- motg->async_irq = platform_get_irq_byname(pdev, "async_irq");
- if (motg->async_irq < 0) {
- dev_err(&pdev->dev, "platform_get_irq for async_int failed\n");
- motg->async_irq = 0;
- goto free_regs;
- }
-
- if (motg->xo_clk) {
- ret = clk_prepare_enable(motg->xo_clk);
- if (ret) {
- dev_err(&pdev->dev,
- "%s failed to vote for TCXO %d\n",
- __func__, ret);
- goto free_xo_handle;
- }
- }
-
-
- clk_prepare_enable(motg->pclk);
-
- hsusb_vdd = devm_regulator_get(motg->phy.dev, "hsusb_vdd_dig");
- if (IS_ERR(hsusb_vdd)) {
- hsusb_vdd = devm_regulator_get(motg->phy.dev, "HSUSB_VDDCX");
- if (IS_ERR(hsusb_vdd)) {
- dev_err(motg->phy.dev, "unable to get hsusb vddcx\n");
- ret = PTR_ERR(hsusb_vdd);
- goto devote_xo_handle;
- }
- }
-
- if (of_get_property(pdev->dev.of_node,
- "qcom,vdd-voltage-level",
- &len)){
- if (len == sizeof(tmp)) {
- of_property_read_u32_array(pdev->dev.of_node,
- "qcom,vdd-voltage-level",
- tmp, len/sizeof(*tmp));
- vdd_val[0] = tmp[0];
- vdd_val[1] = tmp[1];
- vdd_val[2] = tmp[2];
- } else {
- dev_dbg(&pdev->dev,
- "Using default hsusb vdd config.\n");
- goto devote_xo_handle;
- }
- } else {
- goto devote_xo_handle;
- }
-
- ret = msm_hsusb_config_vddcx(1);
- if (ret) {
- dev_err(&pdev->dev, "hsusb vddcx configuration failed\n");
- goto devote_xo_handle;
- }
-
- ret = regulator_enable(hsusb_vdd);
- if (ret) {
- dev_err(&pdev->dev, "unable to enable the hsusb vddcx\n");
- goto free_config_vddcx;
- }
-
- ret = msm_hsusb_ldo_init(motg, 1);
- if (ret) {
- dev_err(&pdev->dev, "hsusb vreg configuration failed\n");
- goto free_hsusb_vdd;
- }
-
- /* Get pinctrl if target uses pinctrl */
- motg->phy_pinctrl = devm_pinctrl_get(&pdev->dev);
- if (IS_ERR(motg->phy_pinctrl)) {
- if (of_property_read_bool(pdev->dev.of_node, "pinctrl-names")) {
- dev_err(&pdev->dev, "Error encountered while getting pinctrl");
- ret = PTR_ERR(motg->phy_pinctrl);
- goto free_ldo_init;
- }
- dev_dbg(&pdev->dev, "Target does not use pinctrl\n");
- motg->phy_pinctrl = NULL;
- }
-
- ret = msm_hsusb_ldo_enable(motg, USB_PHY_REG_ON);
- if (ret) {
- dev_err(&pdev->dev, "hsusb vreg enable failed\n");
- goto free_ldo_init;
- }
- clk_prepare_enable(motg->core_clk);
-
- /* Check if USB mem_type change is needed to workaround PNOC hw issue */
- msm_otg_pnoc_errata_fix(motg);
-
- writel_relaxed(0, USB_USBINTR);
- writel_relaxed(0, USB_OTGSC);
- /* Ensure that above STOREs are completed before enabling interrupts */
- mb();
-
- motg->id_state = USB_ID_FLOAT;
- set_bit(ID, &motg->inputs);
- INIT_WORK(&motg->sm_work, msm_otg_sm_work);
- INIT_DELAYED_WORK(&motg->chg_work, msm_chg_detect_work);
- INIT_DELAYED_WORK(&motg->id_status_work, msm_id_status_w);
- INIT_DELAYED_WORK(&motg->perf_vote_work, msm_otg_perf_vote_work);
- setup_timer(&motg->chg_check_timer, msm_otg_chg_check_timer_func,
- (unsigned long) motg);
- motg->otg_wq = alloc_ordered_workqueue("k_otg", 0);
- if (!motg->otg_wq) {
- pr_err("%s: Unable to create workqueue otg_wq\n",
- __func__);
- goto disable_core_clk;
- }
-
- ret = request_irq(motg->irq, msm_otg_irq, IRQF_SHARED,
- "msm_otg", motg);
- if (ret) {
- dev_err(&pdev->dev, "request irq failed\n");
- goto destroy_wq;
- }
-
- motg->phy_irq = platform_get_irq_byname(pdev, "phy_irq");
- if (motg->phy_irq < 0) {
- dev_dbg(&pdev->dev, "phy_irq is not present\n");
- motg->phy_irq = 0;
- } else {
-
- /* clear all interrupts before enabling the IRQ */
- writeb_relaxed(0xFF, USB2_PHY_USB_PHY_INTERRUPT_CLEAR0);
- writeb_relaxed(0xFF, USB2_PHY_USB_PHY_INTERRUPT_CLEAR1);
-
- writeb_relaxed(0x1, USB2_PHY_USB_PHY_IRQ_CMD);
- /*
- * Databook says 200 usec delay is required for
- * clearing the interrupts.
- */
- udelay(200);
- writeb_relaxed(0x0, USB2_PHY_USB_PHY_IRQ_CMD);
-
- ret = request_irq(motg->phy_irq, msm_otg_phy_irq_handler,
- IRQF_TRIGGER_RISING, "msm_otg_phy_irq", motg);
- if (ret < 0) {
- dev_err(&pdev->dev, "phy_irq request fail %d\n", ret);
- goto free_irq;
- }
- }
-
- ret = request_irq(motg->async_irq, msm_otg_irq,
- IRQF_TRIGGER_RISING, "msm_otg", motg);
- if (ret) {
- dev_err(&pdev->dev, "request irq failed (ASYNC INT)\n");
- goto free_phy_irq;
- }
- disable_irq(motg->async_irq);
-
- if (pdata->otg_control == OTG_PHY_CONTROL && pdata->mpm_otgsessvld_int)
- msm_mpm_enable_pin(pdata->mpm_otgsessvld_int, 1);
-
- if (pdata->mpm_dpshv_int)
- msm_mpm_enable_pin(pdata->mpm_dpshv_int, 1);
- if (pdata->mpm_dmshv_int)
- msm_mpm_enable_pin(pdata->mpm_dmshv_int, 1);
-
- phy->init = msm_otg_reset;
- phy->set_power = msm_otg_set_power;
- phy->set_suspend = msm_otg_set_suspend;
- phy->dbg_event = msm_otg_dbg_log_event;
-
- phy->io_ops = &msm_otg_io_ops;
-
- phy->otg->usb_phy = &motg->phy;
- phy->otg->set_host = msm_otg_set_host;
- phy->otg->set_peripheral = msm_otg_set_peripheral;
- if (pdata->dp_manual_pullup)
- phy->flags |= ENABLE_DP_MANUAL_PULLUP;
-
- if (pdata->enable_sec_phy)
- phy->flags |= ENABLE_SECONDARY_PHY;
-
- ret = usb_add_phy(&motg->phy, USB_PHY_TYPE_USB2);
- if (ret) {
- dev_err(&pdev->dev, "usb_add_phy failed\n");
- goto free_async_irq;
- }
-
- ret = usb_phy_regulator_init(motg);
- if (ret) {
- dev_err(&pdev->dev, "usb_phy_regulator_init failed\n");
- goto remove_phy;
- }
-
- if (motg->pdata->mode == USB_OTG &&
- motg->pdata->otg_control == OTG_PMIC_CONTROL &&
- !motg->phy_irq) {
-
- if (gpio_is_valid(motg->pdata->usb_id_gpio)) {
- /* usb_id_gpio request */
- ret = gpio_request(motg->pdata->usb_id_gpio,
- "USB_ID_GPIO");
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio req failed for id\n");
- motg->pdata->usb_id_gpio = 0;
- goto remove_phy;
- }
-
- /*
- * The following code implements switch between the HOST
- * mode to device mode when used different HW components
- * on the same port: USB HUB and the usb jack type B
- * for device mode In this case HUB should be gone
- * only once out of reset at the boot time and after
- * that always stay on
- */
- if (gpio_is_valid(motg->pdata->hub_reset_gpio)) {
- ret = devm_gpio_request(&pdev->dev,
- motg->pdata->hub_reset_gpio,
- "qcom,hub-reset-gpio");
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio req failed for hub reset\n");
- goto remove_phy;
- }
- gpio_direction_output(
- motg->pdata->hub_reset_gpio, 1);
- }
-
- if (gpio_is_valid(motg->pdata->switch_sel_gpio)) {
- ret = devm_gpio_request(&pdev->dev,
- motg->pdata->switch_sel_gpio,
- "qcom,sw-sel-gpio");
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio req failed for switch sel\n");
- goto remove_phy;
- }
- if (gpio_get_value(motg->pdata->usb_id_gpio))
- gpio_direction_input(
- motg->pdata->switch_sel_gpio);
-
- else
- gpio_direction_output(
- motg->pdata->switch_sel_gpio,
- 1);
- }
-
- /* usb_id_gpio to irq */
- id_irq = gpio_to_irq(motg->pdata->usb_id_gpio);
- motg->ext_id_irq = id_irq;
- } else if (motg->pdata->pmic_id_irq) {
- id_irq = motg->pdata->pmic_id_irq;
- }
-
- if (id_irq) {
- ret = request_irq(id_irq,
- msm_id_irq,
- IRQF_TRIGGER_RISING |
- IRQF_TRIGGER_FALLING,
- "msm_otg", motg);
- if (ret) {
- dev_err(&pdev->dev, "request irq failed for ID\n");
- goto remove_phy;
- }
- } else {
- /* PMIC does USB ID detection and notifies through
- * USB_OTG property of USB powersupply.
- */
- dev_dbg(&pdev->dev, "PMIC does ID detection\n");
- }
- }
-
- platform_set_drvdata(pdev, motg);
- device_init_wakeup(&pdev->dev, 1);
-
- ret = msm_otg_debugfs_init(motg);
- if (ret)
- dev_dbg(&pdev->dev, "mode debugfs file is not available\n");
-
- if (motg->pdata->otg_control == OTG_PMIC_CONTROL &&
- (!(motg->pdata->mode == USB_OTG) ||
- motg->pdata->pmic_id_irq || motg->ext_id_irq ||
- !motg->phy_irq))
- motg->caps = ALLOW_PHY_POWER_COLLAPSE | ALLOW_PHY_RETENTION;
-
- if (motg->pdata->otg_control == OTG_PHY_CONTROL || motg->phy_irq ||
- motg->pdata->enable_phy_id_pullup)
- motg->caps = ALLOW_PHY_RETENTION | ALLOW_PHY_REGULATORS_LPM;
-
- if (motg->pdata->mpm_dpshv_int || motg->pdata->mpm_dmshv_int)
- motg->caps |= ALLOW_HOST_PHY_RETENTION;
-
- device_create_file(&pdev->dev, &dev_attr_dpdm_pulldown_enable);
-
- if (motg->pdata->enable_lpm_on_dev_suspend)
- motg->caps |= ALLOW_LPM_ON_DEV_SUSPEND;
-
- if (motg->pdata->disable_retention_with_vdd_min)
- motg->caps |= ALLOW_VDD_MIN_WITH_RETENTION_DISABLED;
-
- /*
- * PHY DVDD is supplied by a always on PMIC LDO (unlike
- * vddcx/vddmx). PHY can keep D+ pull-up and D+/D-
- * pull-down during suspend without any additional
- * hardware re-work.
- */
- if (motg->pdata->phy_type == SNPS_FEMTO_PHY)
- motg->caps |= ALLOW_BUS_SUSPEND_WITHOUT_REWORK;
-
- pm_stay_awake(&pdev->dev);
- pm_runtime_set_active(&pdev->dev);
- pm_runtime_enable(&pdev->dev);
-
- if (motg->pdata->delay_lpm_on_disconnect) {
- pm_runtime_set_autosuspend_delay(&pdev->dev,
- lpm_disconnect_thresh);
- pm_runtime_use_autosuspend(&pdev->dev);
- }
-
- ret = msm_otg_setup_ext_chg_cdev(motg);
- if (ret)
- dev_dbg(&pdev->dev, "fail to setup cdev\n");
-
- if (pdev->dev.of_node) {
- ret = msm_otg_setup_devices(pdev, pdata->mode, true);
- if (ret) {
- dev_err(&pdev->dev, "devices setup failed\n");
- goto remove_cdev;
- }
- }
-
- psy = power_supply_get_by_name("usb");
- if (!psy) {
- dev_dbg(&pdev->dev, "Could not get usb power_supply\n");
- ret = -EPROBE_DEFER;
- goto otg_remove_devices;
- }
-
-
- ret = msm_otg_extcon_register(motg);
- if (ret)
- goto put_psy;
-
- if (motg->extcon_vbus) {
- ret = extcon_get_cable_state_(motg->extcon_vbus, EXTCON_USB);
- if (ret)
- set_bit(B_SESS_VLD, &motg->inputs);
- else
- clear_bit(B_SESS_VLD, &motg->inputs);
- }
-
- if (motg->extcon_id) {
- ret = extcon_get_cable_state_(motg->extcon_id, EXTCON_USB_HOST);
- if (ret)
- clear_bit(ID, &motg->inputs);
- else
- set_bit(ID, &motg->inputs);
- }
-
- if (gpio_is_valid(motg->pdata->hub_reset_gpio)) {
- ret = devm_gpio_request(&pdev->dev,
- motg->pdata->hub_reset_gpio,
- "HUB_RESET");
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio req failed for hub_reset\n");
- } else {
- gpio_direction_output(
- motg->pdata->hub_reset_gpio, 0);
- /* 5 microsecs reset signaling to usb hub */
- usleep_range(5, 10);
- gpio_direction_output(
- motg->pdata->hub_reset_gpio, 1);
- }
- }
-
- if (gpio_is_valid(motg->pdata->usbeth_reset_gpio)) {
- ret = devm_gpio_request(&pdev->dev,
- motg->pdata->usbeth_reset_gpio,
- "ETH_RESET");
- if (ret < 0) {
- dev_err(&pdev->dev, "gpio req failed for usbeth_reset\n");
- } else {
- gpio_direction_output(
- motg->pdata->usbeth_reset_gpio, 0);
- /* 100 microsecs reset signaling to usb-to-eth */
- usleep_range(100, 110);
- gpio_direction_output(
- motg->pdata->usbeth_reset_gpio, 1);
- }
- }
-
- motg->pm_notify.notifier_call = msm_otg_pm_notify;
- register_pm_notifier(&motg->pm_notify);
- msm_otg_dbg_log_event(phy, "OTG PROBE", motg->caps, motg->lpm_flags);
-
- return 0;
-
-put_psy:
- if (psy)
- power_supply_put(psy);
-otg_remove_devices:
- if (pdev->dev.of_node)
- msm_otg_setup_devices(pdev, motg->pdata->mode, false);
-remove_cdev:
- if (!motg->ext_chg_device) {
- device_destroy(motg->ext_chg_class, motg->ext_chg_dev);
- cdev_del(&motg->ext_chg_cdev);
- class_destroy(motg->ext_chg_class);
- unregister_chrdev_region(motg->ext_chg_dev, 1);
- }
-remove_phy:
- usb_remove_phy(&motg->phy);
-free_async_irq:
- free_irq(motg->async_irq, motg);
-free_phy_irq:
- if (motg->phy_irq)
- free_irq(motg->phy_irq, motg);
-free_irq:
- free_irq(motg->irq, motg);
-destroy_wq:
- destroy_workqueue(motg->otg_wq);
-disable_core_clk:
- clk_disable_unprepare(motg->core_clk);
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
-free_ldo_init:
- msm_hsusb_ldo_init(motg, 0);
-free_hsusb_vdd:
- regulator_disable(hsusb_vdd);
-free_config_vddcx:
- regulator_set_voltage(hsusb_vdd,
- vdd_val[VDD_NONE],
- vdd_val[VDD_MAX]);
-devote_xo_handle:
- clk_disable_unprepare(motg->pclk);
- if (motg->xo_clk)
- clk_disable_unprepare(motg->xo_clk);
-free_xo_handle:
- if (motg->xo_clk) {
- clk_put(motg->xo_clk);
- motg->xo_clk = NULL;
- }
-free_regs:
- iounmap(motg->regs);
-devote_bus_bw:
- if (motg->bus_perf_client) {
- msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
- msm_bus_scale_unregister_client(motg->bus_perf_client);
- }
-disable_phy_csr_clk:
- if (motg->phy_csr_clk)
- clk_disable_unprepare(motg->phy_csr_clk);
-disable_sleep_clk:
- if (motg->sleep_clk)
- clk_disable_unprepare(motg->sleep_clk);
-put_xo_clk:
- if (motg->xo_clk)
- clk_put(motg->xo_clk);
-put_pclk:
- if (motg->pclk)
- clk_put(motg->pclk);
-put_core_clk:
- if (motg->core_clk)
- clk_put(motg->core_clk);
-free_motg:
- kfree(motg);
- return ret;
-}
-
-static int msm_otg_remove(struct platform_device *pdev)
-{
- struct msm_otg *motg = platform_get_drvdata(pdev);
- struct usb_phy *phy = &motg->phy;
- int cnt = 0;
-
- if (phy->otg->host || phy->otg->gadget)
- return -EBUSY;
-
- unregister_pm_notifier(&motg->pm_notify);
-
- extcon_unregister_notifier(motg->extcon_id, EXTCON_USB_HOST,
- &motg->id_nb);
- extcon_unregister_notifier(motg->extcon_vbus, EXTCON_USB,
- &motg->vbus_nb);
-
- if (!motg->ext_chg_device) {
- device_destroy(motg->ext_chg_class, motg->ext_chg_dev);
- cdev_del(&motg->ext_chg_cdev);
- class_destroy(motg->ext_chg_class);
- unregister_chrdev_region(motg->ext_chg_dev, 1);
- }
-
- if (pdev->dev.of_node)
- msm_otg_setup_devices(pdev, motg->pdata->mode, false);
- if (psy)
- power_supply_put(psy);
- msm_otg_debugfs_cleanup();
- cancel_delayed_work_sync(&motg->chg_work);
- cancel_delayed_work_sync(&motg->id_status_work);
- cancel_delayed_work_sync(&motg->perf_vote_work);
- msm_otg_perf_vote_update(motg, false);
- cancel_work_sync(&motg->sm_work);
- destroy_workqueue(motg->otg_wq);
-
- pm_runtime_resume(&pdev->dev);
-
- device_init_wakeup(&pdev->dev, 0);
- pm_runtime_disable(&pdev->dev);
-
- if (motg->phy_irq)
- free_irq(motg->phy_irq, motg);
- if (motg->pdata->pmic_id_irq)
- free_irq(motg->pdata->pmic_id_irq, motg);
- usb_remove_phy(phy);
- free_irq(motg->irq, motg);
-
- if (motg->pdata->mpm_dpshv_int || motg->pdata->mpm_dmshv_int)
- device_remove_file(&pdev->dev,
- &dev_attr_dpdm_pulldown_enable);
- if (motg->pdata->otg_control == OTG_PHY_CONTROL &&
- motg->pdata->mpm_otgsessvld_int)
- msm_mpm_enable_pin(motg->pdata->mpm_otgsessvld_int, 0);
-
- if (motg->pdata->mpm_dpshv_int)
- msm_mpm_enable_pin(motg->pdata->mpm_dpshv_int, 0);
- if (motg->pdata->mpm_dmshv_int)
- msm_mpm_enable_pin(motg->pdata->mpm_dmshv_int, 0);
-
- /*
- * Put PHY in low power mode.
- */
- ulpi_read(phy, 0x14);
- ulpi_write(phy, 0x08, 0x09);
-
- writel_relaxed(readl_relaxed(USB_PORTSC) | PORTSC_PHCD, USB_PORTSC);
- while (cnt < PHY_SUSPEND_TIMEOUT_USEC) {
- if (readl_relaxed(USB_PORTSC) & PORTSC_PHCD)
- break;
- udelay(1);
- cnt++;
- }
- if (cnt >= PHY_SUSPEND_TIMEOUT_USEC)
- dev_err(phy->dev, "Unable to suspend PHY\n");
-
- clk_disable_unprepare(motg->pclk);
- clk_disable_unprepare(motg->core_clk);
- if (motg->phy_csr_clk)
- clk_disable_unprepare(motg->phy_csr_clk);
- if (motg->xo_clk) {
- clk_disable_unprepare(motg->xo_clk);
- clk_put(motg->xo_clk);
- }
-
- if (!IS_ERR(motg->sleep_clk))
- clk_disable_unprepare(motg->sleep_clk);
-
- msm_hsusb_ldo_enable(motg, USB_PHY_REG_OFF);
- msm_hsusb_ldo_init(motg, 0);
- regulator_disable(hsusb_vdd);
- regulator_set_voltage(hsusb_vdd,
- vdd_val[VDD_NONE],
- vdd_val[VDD_MAX]);
-
- iounmap(motg->regs);
- pm_runtime_set_suspended(&pdev->dev);
-
- clk_put(motg->pclk);
- clk_put(motg->core_clk);
-
- if (motg->bus_perf_client) {
- msm_otg_bus_vote(motg, USB_NO_PERF_VOTE);
- msm_bus_scale_unregister_client(motg->bus_perf_client);
- }
-
- return 0;
-}
-
-static void msm_otg_shutdown(struct platform_device *pdev)
-{
- struct msm_otg *motg = platform_get_drvdata(pdev);
-
- dev_dbg(&pdev->dev, "OTG shutdown\n");
- msm_hsusb_vbus_power(motg, 0);
-}
-
-#ifdef CONFIG_PM
-static int msm_otg_runtime_idle(struct device *dev)
-{
- struct msm_otg *motg = dev_get_drvdata(dev);
- struct usb_phy *phy = &motg->phy;
-
- dev_dbg(dev, "OTG runtime idle\n");
- msm_otg_dbg_log_event(phy, "RUNTIME IDLE",
- phy->otg->state, motg->ext_chg_active);
-
- if (phy->otg->state == OTG_STATE_UNDEFINED)
- return -EAGAIN;
-
- if (motg->ext_chg_active == DEFAULT) {
- dev_dbg(dev, "Deferring LPM\n");
- /*
- * Charger detection may happen in user space.
- * Delay entering LPM by 3 sec. Otherwise we
- * have to exit LPM when user space begins
- * charger detection.
- *
- * This timer will be canceled when user space
- * votes against LPM by incrementing PM usage
- * counter. We enter low power mode when
- * PM usage counter is decremented.
- */
- pm_schedule_suspend(dev, 3000);
- return -EAGAIN;
- }
-
- return 0;
-}
-
-static int msm_otg_runtime_suspend(struct device *dev)
-{
- struct msm_otg *motg = dev_get_drvdata(dev);
-
- dev_dbg(dev, "OTG runtime suspend\n");
- msm_otg_dbg_log_event(&motg->phy, "RUNTIME SUSPEND",
- get_pm_runtime_counter(dev), 0);
- return msm_otg_suspend(motg);
-}
-
-static int msm_otg_runtime_resume(struct device *dev)
-{
- struct msm_otg *motg = dev_get_drvdata(dev);
-
- dev_dbg(dev, "OTG runtime resume\n");
- msm_otg_dbg_log_event(&motg->phy, "RUNTIME RESUME",
- get_pm_runtime_counter(dev), 0);
-
- return msm_otg_resume(motg);
-}
-#endif
-
-#ifdef CONFIG_PM_SLEEP
-static int msm_otg_pm_suspend(struct device *dev)
-{
- struct msm_otg *motg = dev_get_drvdata(dev);
-
- dev_dbg(dev, "OTG PM suspend\n");
- msm_otg_dbg_log_event(&motg->phy, "PM SUSPEND START",
- get_pm_runtime_counter(dev),
- atomic_read(&motg->pm_suspended));
-
- /* flush any pending sm_work first */
- flush_work(&motg->sm_work);
- if (!atomic_read(&motg->in_lpm)) {
- dev_err(dev, "Abort PM suspend!! (USB is outside LPM)\n");
- return -EBUSY;
- }
- atomic_set(&motg->pm_suspended, 1);
-
- return 0;
-}
-
-static int msm_otg_pm_resume(struct device *dev)
-{
- int ret = 0;
- struct msm_otg *motg = dev_get_drvdata(dev);
-
- dev_dbg(dev, "OTG PM resume\n");
- msm_otg_dbg_log_event(&motg->phy, "PM RESUME START",
- get_pm_runtime_counter(dev), pm_runtime_suspended(dev));
-
- if (motg->resume_pending || motg->phy_irq_pending) {
- msm_otg_dbg_log_event(&motg->phy, "PM RESUME BY USB",
- motg->async_int, motg->resume_pending);
- /* sm work if pending will start in pm notify to exit LPM */
- }
-
- return ret;
-}
-#endif
-
-#ifdef CONFIG_PM
-static const struct dev_pm_ops msm_otg_dev_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(msm_otg_pm_suspend, msm_otg_pm_resume)
- SET_RUNTIME_PM_OPS(msm_otg_runtime_suspend, msm_otg_runtime_resume,
- msm_otg_runtime_idle)
-};
-#endif
-
-static const struct of_device_id msm_otg_dt_match[] = {
- { .compatible = "qcom,hsusb-otg",
- },
- {}
-};
-
-static struct platform_driver msm_otg_driver = {
- .probe = msm_otg_probe,
- .remove = msm_otg_remove,
- .shutdown = msm_otg_shutdown,
- .driver = {
- .name = DRIVER_NAME,
- .owner = THIS_MODULE,
-#ifdef CONFIG_PM
- .pm = &msm_otg_dev_pm_ops,
-#endif
- .of_match_table = msm_otg_dt_match,
- },
-};
-
-module_platform_driver(msm_otg_driver);
-
-MODULE_LICENSE("GPL v2");
-MODULE_DESCRIPTION("MSM USB transceiver driver");
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index caedb74..43783ef 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -59,7 +59,7 @@
extern u32 arch_timer_get_rate(void);
extern u64 (*arch_timer_read_counter)(void);
extern struct arch_timer_kvm_info *arch_timer_get_kvm_info(void);
-
+extern void arch_timer_mem_get_cval(u32 *lo, u32 *hi);
#else
static inline u32 arch_timer_get_rate(void)
@@ -72,6 +72,10 @@
return 0;
}
+static void arch_timer_mem_get_cval(u32 *lo, u32 *hi)
+{
+ *lo = *hi = ~0U;
+}
#endif
#endif
diff --git a/include/dt-bindings/regulator/qcom,rpmh-regulator.h b/include/dt-bindings/regulator/qcom,rpmh-regulator.h
index 3dad124..5d152f3 100644
--- a/include/dt-bindings/regulator/qcom,rpmh-regulator.h
+++ b/include/dt-bindings/regulator/qcom,rpmh-regulator.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -43,19 +43,35 @@
/*
* These mode constants may be used for qcom,supported-modes and qcom,init-mode
- * properties of an RPMh resource. Modes should be matched to the physical
- * PMIC regulator type (i.e. LDO, SMPS, or BOB).
+ * properties of an RPMh resource. Each type of regulator supports a subset of
+ * the possible modes.
+ *
+ * %RPMH_REGULATOR_MODE_PASS: Pass-through mode in which output is directly
+ * tied to input. This mode is only supported by
+ * BOB type regulators.
+ * %RPMH_REGULATOR_MODE_RET: Retention mode in which only an extremely small
+ * load current is allowed. This mode is supported
+ * by LDO and SMPS type regulators.
+ * %RPMH_REGULATOR_MODE_LPM: Low power mode in which a small load current is
+ * allowed. This mode corresponds to PFM for SMPS
+ * and BOB type regulators. This mode is supported
+ * by LDO, HFSMPS, BOB, and PMIC4 FTSMPS type
+ * regulators.
+ * %RPMH_REGULATOR_MODE_AUTO: Auto mode in which the regulator hardware
+ * automatically switches between LPM and HPM based
+ * upon the real-time load current. This mode is
+ * supported by HFSMPS, BOB, and PMIC4 FTSMPS type
+ * regulators.
+ * %RPMH_REGULATOR_MODE_HPM: High power mode in which the full rated current
+ * of the regulator is allowed. This mode
+ * corresponds to PWM for SMPS and BOB type
+ * regulators. This mode is supported by all types
+ * of regulators.
*/
-#define RPMH_REGULATOR_MODE_LDO_LPM 5
-#define RPMH_REGULATOR_MODE_LDO_HPM 7
-
-#define RPMH_REGULATOR_MODE_SMPS_PFM 5
-#define RPMH_REGULATOR_MODE_SMPS_AUTO 6
-#define RPMH_REGULATOR_MODE_SMPS_PWM 7
-
-#define RPMH_REGULATOR_MODE_BOB_PASS 0
-#define RPMH_REGULATOR_MODE_BOB_PFM 1
-#define RPMH_REGULATOR_MODE_BOB_AUTO 2
-#define RPMH_REGULATOR_MODE_BOB_PWM 3
+#define RPMH_REGULATOR_MODE_PASS 0
+#define RPMH_REGULATOR_MODE_RET 1
+#define RPMH_REGULATOR_MODE_LPM 2
+#define RPMH_REGULATOR_MODE_AUTO 3
+#define RPMH_REGULATOR_MODE_HPM 4
#endif
diff --git a/include/linux/input/synaptics_dsx.h b/include/linux/input/synaptics_dsx.h
new file mode 100644
index 0000000..56fe12e
--- /dev/null
+++ b/include/linux/input/synaptics_dsx.h
@@ -0,0 +1,113 @@
+/*
+ * Synaptics DSX touchscreen driver
+ *
+ * Copyright (C) 2012-2016 Synaptics Incorporated. All rights reserved.
+ *
+ * Copyright (C) 2012 Alexandra Chin <alexandra.chin@tw.synaptics.com>
+ * Copyright (C) 2012 Scott Lin <scott.lin@tw.synaptics.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED "AS-IS," AND SYNAPTICS
+ * EXPRESSLY DISCLAIMS ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING ANY
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE,
+ * AND ANY WARRANTIES OF NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHTS.
+ * IN NO EVENT SHALL SYNAPTICS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES ARISING OUT OF OR IN CONNECTION
+ * WITH THE USE OF THE INFORMATION CONTAINED IN THIS DOCUMENT, HOWEVER CAUSED
+ * AND BASED ON ANY THEORY OF LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * NEGLIGENCE OR OTHER TORTIOUS ACTION, AND EVEN IF SYNAPTICS WAS ADVISED OF
+ * THE POSSIBILITY OF SUCH DAMAGE. IF A TRIBUNAL OF COMPETENT JURISDICTION DOES
+ * NOT PERMIT THE DISCLAIMER OF DIRECT DAMAGES OR ANY OTHER DAMAGES, SYNAPTICS'
+ * TOTAL CUMULATIVE LIABILITY TO ANY PARTY SHALL NOT EXCEED ONE HUNDRED U.S.
+ * DOLLARS.
+ */
+
+#ifndef _SYNAPTICS_DSX_H_
+#define _SYNAPTICS_DSX_H_
+
+#define PLATFORM_DRIVER_NAME "synaptics_dsx"
+#define STYLUS_DRIVER_NAME "synaptics_dsx_stylus"
+#define ACTIVE_PEN_DRIVER_NAME "synaptics_dsx_active_pen"
+#define PROXIMITY_DRIVER_NAME "synaptics_dsx_proximity"
+#define GESTURE_DRIVER_NAME "synaptics_dsx_gesture"
+#define I2C_DRIVER_NAME "synaptics_dsx_i2c"
+#define SPI_DRIVER_NAME "synaptics_dsx_spi"
+
+/*
+ * struct synaptics_dsx_button_map - button map
+ * @nbuttons: number of buttons
+ * @map: pointer to array of button codes
+ */
+struct synaptics_dsx_button_map {
+ unsigned char nbuttons;
+ unsigned int *map;
+};
+
+/*
+ * struct synaptics_dsx_board_data - DSX board data
+ * @x_flip: x flip flag
+ * @y_flip: y flip flag
+ * @swap_axes: swap axes flag
+ * @irq_gpio: attention interrupt GPIO
+ * @irq_on_state: attention interrupt active state
+ * @power_gpio: power switch GPIO
+ * @power_on_state: power switch active state
+ * @reset_gpio: reset GPIO
+ * @reset_on_state: reset active state
+ * @max_y_for_2d: maximum y value for 2D area when virtual buttons are present
+ * @irq_flags: IRQ flags
+ * @i2c_addr: I2C slave address
+ * @ub_i2c_addr: microbootloader mode I2C slave address
+ * @device_descriptor_addr: HID device descriptor address
+ * @panel_x: x-axis resolution of display panel
+ * @panel_y: y-axis resolution of display panel
+ * @power_delay_ms: delay time to wait after powering up device
+ * @reset_delay_ms: delay time to wait after resetting device
+ * @reset_active_ms: reset active time
+ * @byte_delay_us: delay time between two bytes of SPI data
+ * @block_delay_us: delay time between two SPI transfers
+ * @addr_delay_us: delay time after sending address word
+ * @pwr_reg_name: pointer to name of regulator for power control
+ * @bus_reg_name: pointer to name of regulator for bus pullup control
+ * @cap_button_map: pointer to 0D button map
+ * @vir_button_map: pointer to virtual button map
+ */
+struct synaptics_dsx_board_data {
+ bool x_flip;
+ bool y_flip;
+ bool swap_axes;
+ int irq_gpio;
+ int irq_on_state;
+ int power_gpio;
+ int power_on_state;
+ int reset_gpio;
+ int reset_on_state;
+ int max_y_for_2d;
+ unsigned long irq_flags;
+ unsigned short i2c_addr;
+ unsigned short ub_i2c_addr;
+ unsigned short device_descriptor_addr;
+ unsigned int panel_x;
+ unsigned int panel_y;
+ unsigned int power_delay_ms;
+ unsigned int reset_delay_ms;
+ unsigned int reset_active_ms;
+ unsigned int byte_delay_us;
+ unsigned int block_delay_us;
+ unsigned int addr_delay_us;
+ const char *pwr_reg_name;
+ const char *bus_reg_name;
+ struct synaptics_dsx_button_map *cap_button_map;
+ struct synaptics_dsx_button_map *vir_button_map;
+};
+
+#endif
diff --git a/include/linux/regulator/cpr-regulator.h b/include/linux/regulator/cpr-regulator.h
new file mode 100644
index 0000000..7a04e70
--- /dev/null
+++ b/include/linux/regulator/cpr-regulator.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2013-2014, 2017, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __REGULATOR_CPR_REGULATOR_H__
+#define __REGULATOR_CPR_REGULATOR_H__
+
+#include <linux/init.h>
+
+#ifdef CONFIG_REGULATOR_CPR
+
+int __init cpr_regulator_init(void);
+
+#else
+
+static inline int __init cpr_regulator_init(void)
+{
+ return -ENODEV;
+}
+
+#endif /* CONFIG_REGULATOR_CPR */
+
+#endif /* __REGULATOR_CPR_REGULATOR_H__ */
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index a700e5f..52bc890 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -47,7 +47,7 @@
#define THERMAL_WEIGHT_DEFAULT 0
/* Max sensors that can be used for a single virtual thermalzone */
-#define THERMAL_MAX_VIRT_SENSORS 8
+#define THERMAL_MAX_VIRT_SENSORS 10
/* use value, which < 0K, to indicate an invalid/uninitialized temperature */
#define THERMAL_TEMP_INVALID -274000
diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h
index 200c3ab..972dabc 100644
--- a/include/linux/usb/gadget.h
+++ b/include/linux/usb/gadget.h
@@ -81,12 +81,18 @@
* @buf_len: Size of each individual buffer is determined based on aggregation
* negotiated as per the protocol. In case of no aggregation supported by
* the protocol, we use default values.
+ * @db_reg_phs_addr_lsb: IPA channel doorbell register's physical address LSB
+ * @mapped_db_reg_phs_addr_lsb: doorbell LSB IOVA address mapped with IOMMU
+ * @db_reg_phs_addr_msb: IPA channel doorbell register's physical address MSB
*/
struct usb_gsi_request {
void *buf_base_addr;
dma_addr_t dma;
size_t num_bufs;
size_t buf_len;
+ u32 db_reg_phs_addr_lsb;
+ dma_addr_t mapped_db_reg_phs_addr_lsb;
+ u32 db_reg_phs_addr_msb;
};
/*
@@ -468,9 +474,6 @@
* @deactivated: True if gadget is deactivated - in deactivated state it cannot
* be connected.
* @connected: True if gadget is connected.
- * @bam2bam_func_enabled; Indicates function using bam2bam is enabled or not.
- * @extra_buf_alloc: Extra allocation size for AXI prefetch so that out of
- * boundary access is protected.
*
* Gadgets have a mostly-portable "gadget driver" implementing device
* functions, handling all usb configurations and interfaces. Gadget
@@ -524,9 +527,6 @@
unsigned deactivated:1;
unsigned connected:1;
bool remote_wakeup;
- bool bam2bam_func_enabled;
- u32 extra_buf_alloc;
- bool l1_supported;
};
#define work_to_gadget(w) (container_of((w), struct usb_gadget, work))
diff --git a/include/linux/usb/msm_hsusb.h b/include/linux/usb/msm_hsusb.h
deleted file mode 100644
index 53d8458..0000000
--- a/include/linux/usb/msm_hsusb.h
+++ /dev/null
@@ -1,357 +0,0 @@
-/* include/linux/usb/msm_hsusb.h
- *
- * Copyright (C) 2008 Google, Inc.
- * Author: Brian Swetland <swetland@google.com>
- * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __ASM_ARCH_MSM_HSUSB_H
-#define __ASM_ARCH_MSM_HSUSB_H
-
-#include <linux/types.h>
-#include <linux/usb/ch9.h>
-#include <linux/usb/gadget.h>
-#include <linux/usb/otg.h>
-#include <linux/clk.h>
-#include <linux/pm_qos.h>
-#include <linux/hrtimer.h>
-#include <linux/power_supply.h>
-#include <linux/cdev.h>
-#include <linux/usb_bam.h>
-#include <linux/extcon.h>
-#include <linux/regulator/driver.h>
-/**
- * Requested USB votes for NOC frequency
- *
- * USB_NOC_NOM_VOTE Vote for NOM set of NOC frequencies
- * USB_NOC_SVS_VOTE Vote for SVS set of NOC frequencies
- *
- */
-enum usb_noc_mode {
- USB_NOC_NOM_VOTE = 0,
- USB_NOC_SVS_VOTE,
- USB_NOC_NUM_VOTE,
-};
-
-/**
- * Different states involved in USB charger detection.
- *
- * USB_CHG_STATE_UNDEFINED USB charger is not connected or detection
- * process is not yet started.
- * USB_CHG_STATE_IN_PROGRESS Charger detection in progress
- * USB_CHG_STATE_WAIT_FOR_DCD Waiting for Data pins contact.
- * USB_CHG_STATE_DCD_DONE Data pin contact is detected.
- * USB_CHG_STATE_PRIMARY_DONE Primary detection is completed (Detects
- * between SDP and DCP/CDP).
- * USB_CHG_STATE_SECONDARY_DONE Secondary detection is completed (Detects
- * between DCP and CDP).
- * USB_CHG_STATE_DETECTED USB charger type is determined.
- *
- */
-enum usb_chg_state {
- USB_CHG_STATE_UNDEFINED = 0,
- USB_CHG_STATE_IN_PROGRESS,
- USB_CHG_STATE_WAIT_FOR_DCD,
- USB_CHG_STATE_DCD_DONE,
- USB_CHG_STATE_PRIMARY_DONE,
- USB_CHG_STATE_SECONDARY_DONE,
- USB_CHG_STATE_DETECTED,
-};
-
-/**
- * USB charger types
- *
- * USB_INVALID_CHARGER Invalid USB charger.
- * USB_SDP_CHARGER Standard downstream port. Refers to a downstream port
- * on USB2.0 compliant host/hub.
- * USB_DCP_CHARGER Dedicated charger port (AC charger/ Wall charger).
- * USB_CDP_CHARGER Charging downstream port. Enumeration can happen and
- * IDEV_CHG_MAX can be drawn irrespective of USB state.
- * USB_NONCOMPLIANT_CHARGER A non-compliant charger pull DP and DM to specific
- * voltages between 2.0-3.3v for identification.
- *
- */
-enum usb_chg_type {
- USB_INVALID_CHARGER = 0,
- USB_SDP_CHARGER,
- USB_DCP_CHARGER,
- USB_CDP_CHARGER,
- USB_NONCOMPLIANT_CHARGER,
- USB_FLOATED_CHARGER,
-};
-
-/**
- * Maintain state for hvdcp external charger status
- * DEFAULT This is used when DCP is detected
- * ACTIVE This is used when ioctl is called to block LPM
- * INACTIVE This is used when ioctl is called to unblock LPM
- */
-
-enum usb_ext_chg_status {
- DEFAULT = 1,
- ACTIVE,
- INACTIVE,
-};
-
-/**
- * USB ID state
- */
-enum usb_id_state {
- USB_ID_GROUND = 0,
- USB_ID_FLOAT,
-};
-
-#define USB_NUM_BUS_CLOCKS 3
-
-/**
- * struct msm_otg: OTG driver data. Shared by HCD and DCD.
- * @otg: USB OTG Transceiver structure.
- * @pdata: otg device platform data.
- * @irq: IRQ number assigned for HSUSB controller.
- * @async_irq: IRQ number used by some controllers during low power state
- * @phy_irq: IRQ number assigned for PHY to notify events like id and line
- state changes.
- * @pclk: clock struct of iface_clk.
- * @core_clk: clock struct of core_bus_clk.
- * @sleep_clk: clock struct of sleep_clk for USB PHY.
- * @phy_reset_clk: clock struct of phy_reset_clk for USB PHY. This clock is
- a reset only clock and resets the PHY, ULPI bridge and
- CSR wrapper.
- * @phy_por_clk: clock struct of phy_por_clk for USB PHY. This clock is
- a reset only clock and resets only the PHY (POR).
- * @phy_csr_clk: clock struct of phy_csr_clk for USB PHY. This clock is
- required to access PHY CSR registers via AHB2PHY interface.
- * @bus_clks: bimc/snoc/pcnoc clock struct.
- * @core_reset: Reset control for core_clk
- * @phy_reset: Reset control for phy_reset_clk
- * @phy_por_reset: Reset control for phy_por_clk
- * @default_noc_mode: default frequency for NOC clocks - SVS or NOM
- * @core_clk_rate: core clk max frequency
- * @regs: ioremapped register base address.
- * @usb_phy_ctrl_reg: relevant PHY_CTRL_REG register base address.
- * @inputs: OTG state machine inputs(Id, SessValid etc).
- * @sm_work: OTG state machine work.
- * @sm_work_pending: OTG state machine work is pending, queued post pm_resume
- * @resume_pending: USB h/w lpm_exit pending. Done on next sm_work run
- * @pm_suspended: OTG device is system(PM) suspended.
- * @pm_notify: Notifier to receive system wide PM transition events.
- It is used to defer wakeup events processing until
- system is RESUMED.
- * @in_lpm: indicates low power mode (LPM) state.
- * @async_int: IRQ line on which ASYNC interrupt arrived in LPM.
- * @cur_power: The amount of mA available from downstream port.
- * @otg_wq: Strict order otg workqueue for OTG works (SM/ID/SUSPEND).
- * @chg_work: Charger detection work.
- * @chg_state: The state of charger detection process.
- * @chg_type: The type of charger attached.
- * @bus_perf_client: Bus performance client handle to request BUS bandwidth
- * @host_bus_suspend: indicates host bus suspend or not.
- * @device_bus_suspend: indicates device bus suspend or not.
- * @bus_clks_enabled: indicates pcnoc/snoc/bimc clocks are on or not.
- * @chg_check_timer: The timer used to implement the workaround to detect
- * very slow plug in of wall charger.
- * @bc1p2_current_max: Max charging current allowed as per bc1.2 chg detection
- * @typec_current_max: Max charging current allowed as per type-c chg detection
- * @is_ext_chg_dcp: To indicate whether charger detected by external entity
- SMB hardware is DCP charger or not.
- * @ext_id_irq: IRQ for ID interrupt.
- * @phy_irq_pending: Gets set when PHY IRQ arrives in LPM.
- * @id_state: Indicates USBID line status.
- * @rm_pulldown: Indicates pulldown status on D+ and D- data lines.
- * @extcon_vbus: Used for VBUS notification registration.
- * @extcon_id: Used for ID notification registration.
- * @vbus_nb: Notification callback for VBUS event.
- * @id_nb: Notification callback for ID event.
- * @dpdm_desc: Regulator descriptor for D+ and D- voting.
- * @dpdm_rdev: Regulator class device for dpdm regulator.
- * @dbg_idx: Dynamic debug buffer Index.
- * @dbg_lock: Dynamic debug buffer Lock.
- * @buf: Dynamic Debug Buffer.
- * @max_nominal_system_clk_rate: max freq at which system clock can run in
- nominal mode.
- */
-struct msm_otg {
- struct usb_phy phy;
- struct msm_otg_platform_data *pdata;
- struct platform_device *pdev;
- int irq;
- int async_irq;
- int phy_irq;
- struct clk *xo_clk;
- struct clk *pclk;
- struct clk *core_clk;
- struct clk *sleep_clk;
- struct clk *phy_reset_clk;
- struct clk *phy_por_clk;
- struct clk *phy_csr_clk;
- struct clk *bus_clks[USB_NUM_BUS_CLOCKS];
- struct clk *phy_ref_clk;
- struct reset_control *core_reset;
- struct reset_control *phy_reset;
- struct reset_control *phy_por_reset;
- long core_clk_rate;
- long core_clk_svs_rate;
- long core_clk_nominal_rate;
- enum usb_noc_mode default_noc_mode;
- struct resource *io_res;
- void __iomem *regs;
- void __iomem *phy_csr_regs;
- void __iomem *usb_phy_ctrl_reg;
-#define ID 0
-#define B_SESS_VLD 1
-#define A_BUS_SUSPEND 14
-#define B_FALSE_SDP 18
- unsigned long inputs;
- struct work_struct sm_work;
- bool sm_work_pending;
- bool resume_pending;
- atomic_t pm_suspended;
- struct notifier_block pm_notify;
- atomic_t in_lpm;
- bool err_event_seen;
- int async_int;
- unsigned int cur_power;
- struct workqueue_struct *otg_wq;
- struct delayed_work chg_work;
- struct delayed_work id_status_work;
- enum usb_chg_state chg_state;
- enum usb_chg_type chg_type;
- unsigned int dcd_time;
- unsigned long caps;
- uint32_t bus_perf_client;
- bool host_bus_suspend;
- bool device_bus_suspend;
- bool bus_clks_enabled;
- struct timer_list chg_check_timer;
- /*
- * Allowing PHY power collpase turns off the HSUSB 3.3v and 1.8v
- * analog regulators while going to low power mode.
- * Currently only 28nm PHY has the support to allowing PHY
- * power collapse since it doesn't have leakage currents while
- * turning off the power rails.
- */
-#define ALLOW_PHY_POWER_COLLAPSE BIT(0)
- /*
- * Allow PHY RETENTION mode before turning off the digital
- * voltage regulator(VDDCX).
- */
-#define ALLOW_PHY_RETENTION BIT(1)
- /*
- * Allow putting the core in Low Power mode, when
- * USB bus is suspended but cable is connected.
- */
-#define ALLOW_LPM_ON_DEV_SUSPEND BIT(2)
- /*
- * Allowing PHY regulators LPM puts the HSUSB 3.3v and 1.8v
- * analog regulators into LPM while going to USB low power mode.
- */
-#define ALLOW_PHY_REGULATORS_LPM BIT(3)
- /*
- * Allow PHY RETENTION mode before turning off the digital
- * voltage regulator(VDDCX) during host mode.
- */
-#define ALLOW_HOST_PHY_RETENTION BIT(4)
- /*
- * Allow VDD minimization without putting PHY into retention
- * for fixing PHY current leakage issue when LDOs ar turned off.
- */
-#define ALLOW_VDD_MIN_WITH_RETENTION_DISABLED BIT(5)
-
- /*
- * PHY can keep D+ pull-up during peripheral bus suspend and
- * D+/D- pull-down during host bus suspend without any
- * re-work. This is possible only when PHY DVDD is supplied
- * by a PMIC LDO (unlike VDDCX/VDDMX).
- */
-#define ALLOW_BUS_SUSPEND_WITHOUT_REWORK BIT(6)
- unsigned long lpm_flags;
-#define PHY_PWR_COLLAPSED BIT(0)
-#define PHY_RETENTIONED BIT(1)
-#define XO_SHUTDOWN BIT(2)
-#define CLOCKS_DOWN BIT(3)
-#define PHY_REGULATORS_LPM BIT(4)
- int reset_counter;
- unsigned int online;
- unsigned int host_mode;
- unsigned int bc1p2_current_max;
- unsigned int typec_current_max;
-
- dev_t ext_chg_dev;
- struct cdev ext_chg_cdev;
- struct class *ext_chg_class;
- struct device *ext_chg_device;
- bool ext_chg_opened;
- enum usb_ext_chg_status ext_chg_active;
- struct completion ext_chg_wait;
- struct pinctrl *phy_pinctrl;
- bool is_ext_chg_dcp;
- struct qpnp_vadc_chip *vadc_dev;
- int ext_id_irq;
- bool phy_irq_pending;
- enum usb_id_state id_state;
- bool rm_pulldown;
- struct extcon_dev *extcon_vbus;
- struct extcon_dev *extcon_id;
- struct notifier_block vbus_nb;
- struct notifier_block id_nb;
- struct regulator_desc dpdm_rdesc;
- struct regulator_dev *dpdm_rdev;
-/* Maximum debug message length */
-#define DEBUG_MSG_LEN 128UL
-/* Maximum number of messages */
-#define DEBUG_MAX_MSG 256UL
- unsigned int dbg_idx;
- rwlock_t dbg_lock;
-
- char (buf[DEBUG_MAX_MSG])[DEBUG_MSG_LEN]; /* buffer */
- unsigned int vbus_state;
- unsigned int usb_irq_count;
- int pm_qos_latency;
- struct pm_qos_request pm_qos_req_dma;
- struct delayed_work perf_vote_work;
-};
-
-struct ci13xxx_platform_data {
- u8 usb_core_id;
- /*
- * value of 2^(log2_itc-1) will be used as the interrupt threshold
- * (ITC), when log2_itc is between 1 to 7.
- */
- int log2_itc;
- bool l1_supported;
- bool enable_ahb2ahb_bypass;
- bool enable_streaming;
- bool enable_axi_prefetch;
-};
-
-#ifdef CONFIG_USB_BAM
-void msm_bam_set_usb_host_dev(struct device *dev);
-bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable);
-int msm_do_bam_disable_enable(enum usb_ctrl ctrl);
-#else
-static inline void msm_bam_set_usb_host_dev(struct device *dev) {}
-static inline bool msm_usb_bam_enable(enum usb_ctrl ctrl, bool bam_enable)
-{
- return true;
-}
-int msm_do_bam_disable_enable(enum usb_ctrl ctrl) { return true; }
-#endif
-#ifdef CONFIG_USB_CI13XXX_MSM
-void msm_hw_soft_reset(void);
-#else
-static inline void msm_hw_soft_reset(void)
-{
-}
-#endif
-
-#endif
diff --git a/include/linux/usb/msm_hsusb_hw.h b/include/linux/usb/msm_hsusb_hw.h
index b86f127..974c379 100644
--- a/include/linux/usb/msm_hsusb_hw.h
+++ b/include/linux/usb/msm_hsusb_hw.h
@@ -21,14 +21,10 @@
#define USB_AHBBURST (MSM_USB_BASE + 0x0090)
#define USB_AHBMODE (MSM_USB_BASE + 0x0098)
-#define USB_GENCONFIG (MSM_USB_BASE + 0x009C)
#define USB_GENCONFIG_2 (MSM_USB_BASE + 0x00a0)
#define ULPI_TX_PKT_EN_CLR_FIX BIT(19)
#define USB_CAPLENGTH (MSM_USB_BASE + 0x0100) /* 8 bit */
-#define USB_HS_APF_CTRL (MSM_USB_BASE + 0x0380)
-
-#define APF_CTRL_EN BIT(0)
#define USB_USBCMD (MSM_USB_BASE + 0x0140)
#define USB_PORTSC (MSM_USB_BASE + 0x0184)
@@ -38,32 +34,15 @@
#define USB_PHY_CTRL2 (MSM_USB_BASE + 0x0278)
#define GENCONFIG_2_SESS_VLD_CTRL_EN BIT(7)
-#define GENCONFIG_2_LINESTATE_DIFF_WAKEUP_EN BIT(12)
-#define GENCONFIG_2_DPSE_DMSE_HV_INTR_EN BIT(15)
#define USBCMD_SESS_VLD_CTRL BIT(25)
#define USBCMD_RESET 2
#define USB_USBINTR (MSM_USB_BASE + 0x0148)
-#define USB_L1_EP_CTRL (MSM_USB_BASE + 0x0250)
-#define USB_L1_CONFIG (MSM_USB_BASE + 0x0254)
-
-#define L1_CONFIG_LPM_EN BIT(4)
-#define L1_CONFIG_REMOTE_WAKEUP BIT(5)
-#define L1_CONFIG_GATE_SYS_CLK BIT(7)
-#define L1_CONFIG_PHY_LPM BIT(10)
-#define L1_CONFIG_PLL BIT(11)
-#define AHB2AHB_BYPASS BIT(31)
-#define AHB2AHB_BYPASS_BIT_MASK BIT(31)
-#define AHB2AHB_BYPASS_CLEAR (0 << 31)
-
#define PORTSC_PHCD (1 << 23) /* phy suspend mode */
#define PORTSC_PTS_MASK (3 << 30)
#define PORTSC_PTS_ULPI (2 << 30)
#define PORTSC_PTS_SERIAL (3 << 30)
-#define PORTSC_LS (3 << 10)
-#define PORTSC_LS_DM (1 << 10)
-#define PORTSC_CCS (1 << 0)
#define USB_ULPI_VIEWPORT (MSM_USB_BASE + 0x0170)
#define ULPI_RUN (1 << 30)
@@ -73,10 +52,6 @@
#define ULPI_DATA(n) ((n) & 255)
#define ULPI_DATA_READ(n) (((n) >> 8) & 255)
-#define GENCONFIG_BAM_DISABLE (1 << 13)
-#define GENCONFIG_TXFIFO_IDLE_FORCE_DISABLE (1 << 4)
-#define GENCONFIG_ULPI_SERIAL_EN (1 << 5)
-
/* synopsys 28nm phy registers */
#define ULPI_PWR_CLK_MNG_REG 0x88
#define OTG_COMP_DISABLE BIT(0)
@@ -88,16 +63,10 @@
#define ASYNC_INTR_CTRL (1 << 29) /* Enable async interrupt */
#define ULPI_STP_CTRL (1 << 30) /* Block communication with PHY */
#define PHY_RETEN (1 << 1) /* PHY retention enable/disable */
-#define PHY_IDHV_INTEN (1 << 8) /* PHY ID HV interrupt */
-#define PHY_OTGSESSVLDHV_INTEN (1 << 9) /* PHY Session Valid HV int. */
-#define PHY_CLAMP_DPDMSE_EN (1 << 21) /* PHY mpm DP DM clamp enable */
-#define PHY_POR_BIT_MASK BIT(0)
#define PHY_POR_ASSERT (1 << 0) /* USB2 28nm PHY POR ASSERT */
-#define PHY_POR_DEASSERT (0 << 0) /* USB2 28nm PHY POR DEASSERT */
/* OTG definitions */
#define OTGSC_INTSTS_MASK (0x7f << 16)
-#define OTGSC_IDPU (1 << 5)
#define OTGSC_ID (1 << 8)
#define OTGSC_BSV (1 << 11)
#define OTGSC_IDIS (1 << 16)
@@ -105,29 +74,4 @@
#define OTGSC_IDIE (1 << 24)
#define OTGSC_BSVIE (1 << 27)
-/* USB PHY CSR registers and bit definitions */
-
-#define USB_PHY_CSR_PHY_CTRL_COMMON0 (MSM_USB_PHY_CSR_BASE + 0x078)
-#define SIDDQ BIT(2)
-
-#define USB_PHY_CSR_PHY_CTRL1 (MSM_USB_PHY_CSR_BASE + 0x08C)
-#define ID_HV_CLAMP_EN_N BIT(1)
-
-#define USB_PHY_CSR_PHY_CTRL3 (MSM_USB_PHY_CSR_BASE + 0x094)
-#define CLAMP_MPM_DPSE_DMSE_EN_N BIT(2)
-
-#define USB2_PHY_USB_PHY_IRQ_CMD (MSM_USB_PHY_CSR_BASE + 0x0D0)
-#define USB2_PHY_USB_PHY_INTERRUPT_SRC_STATUS (MSM_USB_PHY_CSR_BASE + 0x05C)
-
-#define USB2_PHY_USB_PHY_INTERRUPT_CLEAR0 (MSM_USB_PHY_CSR_BASE + 0x0DC)
-#define USB2_PHY_USB_PHY_INTERRUPT_CLEAR1 (MSM_USB_PHY_CSR_BASE + 0x0E0)
-
-#define USB2_PHY_USB_PHY_INTERRUPT_MASK1 (MSM_USB_PHY_CSR_BASE + 0x0D8)
-
-#define USB_PHY_IDDIG_1_0 BIT(7)
-
-#define USB_PHY_IDDIG_RISE_MASK BIT(0)
-#define USB_PHY_IDDIG_FALL_MASK BIT(1)
-#define USB_PHY_ID_MASK (USB_PHY_IDDIG_RISE_MASK | USB_PHY_IDDIG_FALL_MASK)
-
#endif /* __LINUX_USB_GADGET_MSM72K_UDC_H__ */
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index d999b3c..64aa52e 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -58,7 +58,6 @@
OTG_STATE_B_SRP_INIT,
OTG_STATE_B_PERIPHERAL,
OTG_STATE_B_SUSPEND,
- OTG_STATE_B_CHARGER,
/* extra dual-role default-b states */
OTG_STATE_B_WAIT_ACON,
@@ -142,10 +141,6 @@
/* reset the PHY clocks */
int (*reset)(struct usb_phy *x);
-
- /* for notification of usb_phy_dbg_events */
- void (*dbg_event)(struct usb_phy *x,
- char *event, int msg1, int msg2);
int (*disable_chirp)(struct usb_phy *x, bool disable);
};
diff --git a/include/soc/qcom/memory_dump.h b/include/soc/qcom/memory_dump.h
index b4733d7..5bc50b5 100644
--- a/include/soc/qcom/memory_dump.h
+++ b/include/soc/qcom/memory_dump.h
@@ -86,6 +86,7 @@
MSM_DUMP_DATA_FCM = 0xEE,
MSM_DUMP_DATA_POWER_REGS = 0xED,
MSM_DUMP_DATA_TMC_ETF = 0xF0,
+ MSM_DUMP_DATA_TPDM_SWAO_MCMB = 0xF2,
MSM_DUMP_DATA_TMC_REG = 0x100,
MSM_DUMP_DATA_LOG_BUF = 0x110,
MSM_DUMP_DATA_LOG_BUF_FIRST_IDX = 0x111,
diff --git a/include/soc/qcom/msm_tz_smmu.h b/include/soc/qcom/msm_tz_smmu.h
index a83c9bd..1d47f1f 100644
--- a/include/soc/qcom/msm_tz_smmu.h
+++ b/include/soc/qcom/msm_tz_smmu.h
@@ -56,6 +56,15 @@
int msm_tz_set_cb_format(enum tz_smmu_device_id sec_id, int cbndx);
int msm_iommu_sec_pgtbl_init(void);
int register_iommu_sec_ptbl(void);
+bool arm_smmu_skip_write(void __iomem *addr);
+
+/* Donot write to smmu global space with CONFIG_MSM_TZ_SMMU */
+#undef writel_relaxed
+#define writel_relaxed(v, c) do { \
+ if (!arm_smmu_skip_write(c)) \
+ ((void)__raw_writel((__force u32)cpu_to_le32(v), (c))); \
+ } while (0)
+
#else
static inline int msm_tz_smmu_atos_start(struct device *dev, int cb_num)
diff --git a/include/soc/qcom/socinfo.h b/include/soc/qcom/socinfo.h
index 9e91e4b..505e82b 100644
--- a/include/soc/qcom/socinfo.h
+++ b/include/soc/qcom/socinfo.h
@@ -110,6 +110,8 @@
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,msm8953")
#define early_machine_is_sdm450() \
of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm450")
+#define early_machine_is_sdm632() \
+ of_flat_dt_is_compatible(of_get_flat_dt_root(), "qcom,sdm632")
#else
#define of_board_is_sim() 0
#define of_board_is_rumi() 0
@@ -154,6 +156,7 @@
#define early_machine_is_sda670() 0
#define early_machine_is_msm8953() 0
#define early_machine_is_sdm450() 0
+#define early_machine_is_sdm632() 0
#endif
#define PLATFORM_SUBTYPE_MDM 1
@@ -220,6 +223,8 @@
MSM_CPU_SDA670,
MSM_CPU_8953,
MSM_CPU_SDM450,
+ MSM_CPU_SDM632,
+ MSM_CPU_SDA632,
};
struct msm_soc_info {
diff --git a/include/soc/qcom/system_pm.h b/include/soc/qcom/system_pm.h
index 6d0993a..028c729 100644
--- a/include/soc/qcom/system_pm.h
+++ b/include/soc/qcom/system_pm.h
@@ -14,13 +14,15 @@
#define __SOC_QCOM_SYS_PM_H__
#ifdef CONFIG_QTI_SYSTEM_PM
-int system_sleep_enter(uint64_t sleep_val);
+int system_sleep_enter(void);
void system_sleep_exit(void);
bool system_sleep_allowed(void);
+
+int system_sleep_update_wakeup(void);
#else
-static inline int system_sleep_enter(uint64_t sleep_val)
+static inline int system_sleep_enter(void)
{ return -ENODEV; }
static inline void system_sleep_exit(void)
@@ -29,6 +31,9 @@
static inline bool system_sleep_allowed(void)
{ return false; }
+static inline int system_sleep_update_wakeup(void)
+{ return -ENODEV; }
+
#endif /* CONFIG_QTI_SYSTEM_PM */
#endif /* __SOC_QCOM_SYS_PM_H__ */
diff --git a/include/uapi/linux/msm_ipa.h b/include/uapi/linux/msm_ipa.h
index ef07f78..de3f890 100644
--- a/include/uapi/linux/msm_ipa.h
+++ b/include/uapi/linux/msm_ipa.h
@@ -165,6 +165,8 @@
#define IPA_FLT_MAC_DST_ADDR_L2TP (1ul << 22)
#define IPA_FLT_TCP_SYN (1ul << 23)
#define IPA_FLT_TCP_SYN_L2TP (1ul << 24)
+#define IPA_FLT_L2TP_INNER_IP_TYPE (1ul << 25)
+#define IPA_FLT_L2TP_INNER_IPV4_DST_ADDR (1ul << 26)
/**
* maximal number of NAT PDNs in the PDN config table
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index bbe783e..70f73ba 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -5100,6 +5100,14 @@
raw_spin_lock_irqsave(&p->pi_lock, flags);
cpumask_and(mask, &p->cpus_allowed, cpu_active_mask);
+
+ /* The userspace tasks are forbidden to run on
+ * isolated CPUs. So exclude isolated CPUs from
+ * the getaffinity.
+ */
+ if (!(p->flags & PF_KTHREAD))
+ cpumask_andnot(mask, mask, cpu_isolated_mask);
+
raw_spin_unlock_irqrestore(&p->pi_lock, flags);
out_unlock:
@@ -9614,11 +9622,11 @@
reset_task_stats(p);
p->ravg.mark_start = wallclock;
p->ravg.sum_history[0] = EXITING_TASK_MARKER;
- free_task_load_ptrs(p);
enqueue_task(rq, p, 0);
clear_ed_task(p, rq);
task_rq_unlock(rq, p, &rf);
+ free_task_load_ptrs(p);
}
#endif /* CONFIG_SCHED_WALT */
diff --git a/kernel/sched/walt.c b/kernel/sched/walt.c
index f941d92..fc7cab5 100644
--- a/kernel/sched/walt.c
+++ b/kernel/sched/walt.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1965,6 +1965,10 @@
p->misfit = false;
}
+/*
+ * kfree() may wakeup kswapd. So this function should NOT be called
+ * with any CPU's rq->lock acquired.
+ */
void free_task_load_ptrs(struct task_struct *p)
{
kfree(p->ravg.curr_window_cpu);
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index e26ecb0..e53e076 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -98,7 +98,7 @@
static atomic_t selinux_secmark_refcount = ATOMIC_INIT(0);
#ifdef CONFIG_SECURITY_SELINUX_DEVELOP
-int selinux_enforcing;
+int selinux_enforcing __aligned(0x1000) __attribute__((section(".bss_rtic")));
static int __init enforcing_setup(char *str)
{