| /* |
| * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. |
| * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) |
| * |
| * This program is free software; you can redistribute it and/or |
| * modify it under the terms of the GNU General Public License |
| * as published by the Free Software Foundation; either version 2 |
| * of the License, or (at your option) any later version. |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| * |
| * You should have received a copy of the GNU General Public License |
| * along with this program; if not, write to the Free Software |
| * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
| * MA 02110-1301, USA. |
| */ |
| |
| #ifndef __ASM_ARCH_MXC_H__ |
| #define __ASM_ARCH_MXC_H__ |
| |
| #ifndef __ASM_ARCH_MXC_HARDWARE_H__ |
| #error "Do not include directly." |
| #endif |
| |
| #define MXC_CPU_MX1 1 |
| #define MXC_CPU_MX21 21 |
| #define MXC_CPU_MX27 27 |
| #define MXC_CPU_MX31 31 |
| #define MXC_CPU_MX35 35 |
| |
| #ifndef __ASSEMBLY__ |
| extern unsigned int __mxc_cpu_type; |
| #endif |
| |
| #ifdef CONFIG_ARCH_MX1 |
| # ifdef mxc_cpu_type |
| # undef mxc_cpu_type |
| # define mxc_cpu_type __mxc_cpu_type |
| # else |
| # define mxc_cpu_type MXC_CPU_MX1 |
| # endif |
| # define cpu_is_mx1() (mxc_cpu_type == MXC_CPU_MX1) |
| #else |
| # define cpu_is_mx1() (0) |
| #endif |
| |
| #ifdef CONFIG_MACH_MX21 |
| # ifdef mxc_cpu_type |
| # undef mxc_cpu_type |
| # define mxc_cpu_type __mxc_cpu_type |
| # else |
| # define mxc_cpu_type MXC_CPU_MX21 |
| # endif |
| # define cpu_is_mx21() (mxc_cpu_type == MXC_CPU_MX21) |
| #else |
| # define cpu_is_mx21() (0) |
| #endif |
| |
| #ifdef CONFIG_MACH_MX27 |
| # ifdef mxc_cpu_type |
| # undef mxc_cpu_type |
| # define mxc_cpu_type __mxc_cpu_type |
| # else |
| # define mxc_cpu_type MXC_CPU_MX27 |
| # endif |
| # define cpu_is_mx27() (mxc_cpu_type == MXC_CPU_MX27) |
| #else |
| # define cpu_is_mx27() (0) |
| #endif |
| |
| #ifdef CONFIG_ARCH_MX31 |
| # ifdef mxc_cpu_type |
| # undef mxc_cpu_type |
| # define mxc_cpu_type __mxc_cpu_type |
| # else |
| # define mxc_cpu_type MXC_CPU_MX31 |
| # endif |
| # define cpu_is_mx31() (mxc_cpu_type == MXC_CPU_MX31) |
| #else |
| # define cpu_is_mx31() (0) |
| #endif |
| |
| #ifdef CONFIG_ARCH_MX35 |
| # ifdef mxc_cpu_type |
| # undef mxc_cpu_type |
| # define mxc_cpu_type __mxc_cpu_type |
| # else |
| # define mxc_cpu_type MXC_CPU_MX35 |
| # endif |
| # define cpu_is_mx35() (mxc_cpu_type == MXC_CPU_MX35) |
| #else |
| # define cpu_is_mx35() (0) |
| #endif |
| |
| #if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) |
| #define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10) |
| #define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x4) |
| #define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR) + n * 0x10 + 0x8) |
| #endif |
| |
| #define cpu_is_mx3() (cpu_is_mx31() || cpu_is_mx35()) |
| #define cpu_is_mx2() (cpu_is_mx21() || cpu_is_mx27()) |
| |
| #endif /* __ASM_ARCH_MXC_H__ */ |