| /* |
| * Samsung's Exynos5 SoC series common device tree source |
| * |
| * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. |
| * http://www.samsung.com |
| * |
| * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular |
| * SoCs from Exynos5 series can include this file and provide values for SoCs |
| * specfic bindings. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 as |
| * published by the Free Software Foundation. |
| */ |
| |
| #include "skeleton.dtsi" |
| |
| / { |
| interrupt-parent = <&gic>; |
| |
| aliases { |
| serial0 = &serial_0; |
| serial1 = &serial_1; |
| serial2 = &serial_2; |
| serial3 = &serial_3; |
| }; |
| |
| chipid@10000000 { |
| compatible = "samsung,exynos4210-chipid"; |
| reg = <0x10000000 0x100>; |
| }; |
| |
| sromc@12250000 { |
| compatible = "samsung,exynos-srom"; |
| reg = <0x12250000 0x14>; |
| }; |
| |
| combiner: interrupt-controller@10440000 { |
| compatible = "samsung,exynos4210-combiner"; |
| #interrupt-cells = <2>; |
| interrupt-controller; |
| samsung,combiner-nr = <32>; |
| reg = <0x10440000 0x1000>; |
| interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, |
| <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, |
| <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, |
| <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, |
| <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, |
| <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, |
| <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, |
| <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; |
| }; |
| |
| gic: interrupt-controller@10481000 { |
| compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; |
| #interrupt-cells = <3>; |
| interrupt-controller; |
| reg = <0x10481000 0x1000>, |
| <0x10482000 0x1000>, |
| <0x10484000 0x2000>, |
| <0x10486000 0x2000>; |
| interrupts = <1 9 0xf04>; |
| }; |
| |
| serial_0: serial@12C00000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x12C00000 0x100>; |
| interrupts = <0 51 0>; |
| }; |
| |
| serial_1: serial@12C10000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x12C10000 0x100>; |
| interrupts = <0 52 0>; |
| }; |
| |
| serial_2: serial@12C20000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x12C20000 0x100>; |
| interrupts = <0 53 0>; |
| }; |
| |
| serial_3: serial@12C30000 { |
| compatible = "samsung,exynos4210-uart"; |
| reg = <0x12C30000 0x100>; |
| interrupts = <0 54 0>; |
| }; |
| |
| rtc: rtc@101E0000 { |
| compatible = "samsung,s3c6410-rtc"; |
| reg = <0x101E0000 0x100>; |
| interrupts = <0 43 0>, <0 44 0>; |
| status = "disabled"; |
| }; |
| |
| poweroff: syscon-poweroff { |
| compatible = "syscon-poweroff"; |
| regmap = <&pmu_system_controller>; |
| offset = <0x330C>; /* PS_HOLD_CONTROL */ |
| mask = <0x5200>; /* reset value */ |
| }; |
| |
| reboot: syscon-reboot { |
| compatible = "syscon-reboot"; |
| regmap = <&pmu_system_controller>; |
| offset = <0x0400>; /* SWRESET */ |
| mask = <0x1>; |
| }; |
| |
| fimd: fimd@14400000 { |
| compatible = "samsung,exynos5250-fimd"; |
| interrupt-parent = <&combiner>; |
| reg = <0x14400000 0x40000>; |
| interrupt-names = "fifo", "vsync", "lcd_sys"; |
| interrupts = <18 4>, <18 5>, <18 6>; |
| samsung,sysreg = <&sysreg_system_controller>; |
| status = "disabled"; |
| }; |
| |
| dp: dp-controller@145B0000 { |
| compatible = "samsung,exynos5-dp"; |
| reg = <0x145B0000 0x1000>; |
| interrupts = <10 3>; |
| interrupt-parent = <&combiner>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| status = "disabled"; |
| }; |
| }; |