| /* |
| * Timings and Geometry for Samsung K3PE0E000B memory part |
| */ |
| |
| / { |
| samsung_K3PE0E000B: lpddr2 { |
| compatible = "Samsung,K3PE0E000B","jedec,lpddr2-s4"; |
| density = <4096>; |
| io-width = <32>; |
| |
| tRPab-min-tck = <3>; |
| tRCD-min-tck = <3>; |
| tWR-min-tck = <3>; |
| tRASmin-min-tck = <3>; |
| tRRD-min-tck = <2>; |
| tWTR-min-tck = <2>; |
| tXP-min-tck = <2>; |
| tRTP-min-tck = <2>; |
| tCKE-min-tck = <3>; |
| tCKESR-min-tck = <3>; |
| tFAW-min-tck = <8>; |
| |
| timings_samsung_K3PE0E000B_533MHz: lpddr2-timings@0 { |
| compatible = "jedec,lpddr2-timings"; |
| min-freq = <10000000>; |
| max-freq = <533333333>; |
| tRPab = <21000>; |
| tRCD = <18000>; |
| tWR = <15000>; |
| tRAS-min = <42000>; |
| tRRD = <10000>; |
| tWTR = <7500>; |
| tXP = <7500>; |
| tRTP = <7500>; |
| tCKESR = <15000>; |
| tDQSCK-max = <5500>; |
| tFAW = <50000>; |
| tZQCS = <90000>; |
| tZQCL = <360000>; |
| tZQinit = <1000000>; |
| tRAS-max-ns = <70000>; |
| tDQSCK-max-derated = <6000>; |
| }; |
| |
| timings_samsung_K3PE0E000B_266MHz: lpddr2-timings@1 { |
| compatible = "jedec,lpddr2-timings"; |
| min-freq = <10000000>; |
| max-freq = <266666666>; |
| tRPab = <21000>; |
| tRCD = <18000>; |
| tWR = <15000>; |
| tRAS-min = <42000>; |
| tRRD = <10000>; |
| tWTR = <7500>; |
| tXP = <7500>; |
| tRTP = <7500>; |
| tCKESR = <15000>; |
| tDQSCK-max = <5500>; |
| tFAW = <50000>; |
| tZQCS = <90000>; |
| tZQCL = <360000>; |
| tZQinit = <1000000>; |
| tRAS-max-ns = <70000>; |
| tDQSCK-max-derated = <6000>; |
| }; |
| }; |
| }; |