Merge "usb: dwc3: Drive a pulse on DP on CDP detection"
diff --git a/AndroidKernel.mk b/AndroidKernel.mk
index 1c2f92c..d48eecd 100644
--- a/AndroidKernel.mk
+++ b/AndroidKernel.mk
@@ -69,7 +69,11 @@
real_cc :=
ifeq ($(KERNEL_LLVM_SUPPORT),true)
-real_cc := REAL_CC=$(KERNEL_LLVM_BIN) CLANG_TRIPLE=aarch64-linux-gnu-
+ ifeq ($(KERNEL_ARCH), arm64)
+ real_cc := REAL_CC=$(KERNEL_LLVM_BIN) CLANG_TRIPLE=aarch64-linux-gnu-
+ else
+ real_cc := REAL_CC=$(KERNEL_LLVM_BIN) CLANG_TRIPLE=arm-linux-gnueabihf
+ endif
else
ifeq ($(strip $(KERNEL_GCC_NOANDROID_CHK)),0)
KERNEL_CFLAGS := KCFLAGS=-mno-android
diff --git a/Documentation/devicetree/bindings/arm/msm/msm.txt b/Documentation/devicetree/bindings/arm/msm/msm.txt
index be20231..36b7a57 100644
--- a/Documentation/devicetree/bindings/arm/msm/msm.txt
+++ b/Documentation/devicetree/bindings/arm/msm/msm.txt
@@ -110,6 +110,9 @@
- QRD1130
compatible = "qcom,sxr1130-qrd"
+- SMVWR1130
+ compatible = "qcom,sxr1130-smrtvwr"
+
- MSM8952
compatible = "qcom,msm8952"
@@ -217,6 +220,9 @@
- SVR device:
compatible = "qcom,svr"
+- SMVWR device:
+ compatible = "qcom,xr-smrtvwr"
+
- HDK device:
compatible = "qcom,hdk"
diff --git a/Documentation/devicetree/bindings/misc/tusb1064.txt b/Documentation/devicetree/bindings/misc/tusb1064.txt
new file mode 100644
index 0000000..30d2488
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/tusb1064.txt
@@ -0,0 +1,14 @@
+TUSB1064-MISC
+
+TUSB1064-MISC provides a way to configure TUSB1064 part.
+
+Required properties:
+- compatible : should be "ti,tubs1064"
+- reg : address of i2c of tusb1064.
+
+Optional properties:
+Example:
+ tusb1064@10 {
+ compatible = "ti,tusb1064";
+ reg = <0x10>;
+ };
diff --git a/Documentation/devicetree/bindings/misc/vxr7200.txt b/Documentation/devicetree/bindings/misc/vxr7200.txt
new file mode 100644
index 0000000..68ecc7f
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/vxr7200.txt
@@ -0,0 +1,14 @@
+VXR7200-MISC
+
+VXR7200-MISC provides a way to configure VXR7200 part.
+
+Required properties:
+- compatible : should be "synaptics,vxr7200"
+- reg : address of i2c of vxr7200.
+
+Optional properties:
+Example:
+ vxr7200@39 {
+ compatible = "synaptics,tvxr7200";
+ reg = <0x39>;
+ };
diff --git a/Documentation/devicetree/bindings/misc/xr-smrtvwr-misc.txt b/Documentation/devicetree/bindings/misc/xr-smrtvwr-misc.txt
new file mode 100644
index 0000000..f641b22
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/xr-smrtvwr-misc.txt
@@ -0,0 +1,12 @@
+XR-SMRTVWR-MISC
+
+XR-SMRTVWR-MISC provides a way to configure xrsmrtvwr-misc driver.
+
+Required properties:
+- compatible : should be "qcom,xr-smrtvwr-misc"
+
+Optional properties:
+Example:
+ qcom,xr-smrtvwr-misc {
+ compatible = "qcom,xr-smrtvwr-misc";
+ };
diff --git a/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt b/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt
index f8c79d4..dc868bf 100644
--- a/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt
+++ b/Documentation/devicetree/bindings/power/supply/qcom/qpnp-smb2.txt
@@ -210,6 +210,12 @@
Definition: Boolean flag which when present enables stepwise change in FCC.
The default stepping rate is 100mA/sec.
+- qcom,ufp-only-mode
+ Usage: optional
+ Value type: bool
+ Definition: Boolean flag which when present configure charger in SINK only
+ mode.
+
=============================================
Second Level Nodes - SMB2 Charger Peripherals
=============================================
diff --git a/arch/arm/configs/msm8909-minimal_defconfig b/arch/arm/configs/msm8909-minimal_defconfig
index 7862d2f..ecd8da2 100644
--- a/arch/arm/configs/msm8909-minimal_defconfig
+++ b/arch/arm/configs/msm8909-minimal_defconfig
@@ -241,12 +241,16 @@
CONFIG_SCSI_UFS_QCOM_ICE=y
CONFIG_SCSI_UFSHCD_CMD_LOGGING=y
CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_DEBUG=y
CONFIG_DM_CRYPT=y
+CONFIG_DM_REQ_CRYPT=y
CONFIG_DM_UEVENT=y
CONFIG_DM_VERITY=y
CONFIG_DM_VERITY_FEC=y
+CONFIG_DM_ANDROID_VERITY=y
CONFIG_NETDEVICES=y
CONFIG_DUMMY=y
CONFIG_TUN=y
@@ -573,6 +577,7 @@
CONFIG_CRYPTO_DEV_QCEDEV=y
CONFIG_CRYPTO_DEV_OTA_CRYPTO=y
CONFIG_CRYPTO_DEV_QCOM_ICE=y
+CONFIG_SYSTEM_TRUSTED_KEYS="verity.x509.pem"
CONFIG_ARM_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM_NEON=y
CONFIG_CRYPTO_SHA2_ARM_CE=y
diff --git a/arch/arm/configs/sa415m-perf_defconfig b/arch/arm/configs/sa415m-perf_defconfig
index ff8219a..b4f417c 100644
--- a/arch/arm/configs/sa415m-perf_defconfig
+++ b/arch/arm/configs/sa415m-perf_defconfig
@@ -337,6 +337,7 @@
CONFIG_QCOM_SPS_DMA=y
CONFIG_UIO=y
CONFIG_STAGING=y
+CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_ION_MSM=y
CONFIG_GSI=y
@@ -389,6 +390,7 @@
CONFIG_MSM_PIL=y
CONFIG_MSM_PIL_SSR_GENERIC=y
CONFIG_QCOM_COMMAND_DB=y
+CONFIG_QCOM_SMCINVOKE=y
CONFIG_MSM_PM=y
CONFIG_QCOM_DCC_V2=y
CONFIG_QTI_RPM_STATS_LOG=y
diff --git a/arch/arm/configs/sa415m_defconfig b/arch/arm/configs/sa415m_defconfig
index 72f4ea3..fb44473 100644
--- a/arch/arm/configs/sa415m_defconfig
+++ b/arch/arm/configs/sa415m_defconfig
@@ -354,6 +354,7 @@
CONFIG_QCOM_SPS_DMA=y
CONFIG_UIO=y
CONFIG_STAGING=y
+CONFIG_ASHMEM=y
CONFIG_ION=y
CONFIG_ION_MSM=y
CONFIG_GSI=y
diff --git a/arch/arm/configs/sdm429-bg-perf_defconfig b/arch/arm/configs/sdm429-bg-perf_defconfig
index 7bb5cf9..c18dadf 100644
--- a/arch/arm/configs/sdm429-bg-perf_defconfig
+++ b/arch/arm/configs/sdm429-bg-perf_defconfig
@@ -13,6 +13,8 @@
CONFIG_RCU_FAST_NO_HZ=y
CONFIG_RCU_NOCB_CPU=y
CONFIG_RCU_NOCB_CPU_ALL=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
@@ -54,29 +56,21 @@
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_MSM8937=y
-CONFIG_ARCH_MSM8917=y
-CONFIG_ARCH_SDM439=y
CONFIG_ARCH_SDM429=y
# CONFIG_VDSO is not set
CONFIG_SMP=y
CONFIG_SCHED_MC=y
-CONFIG_NR_CPUS=8
CONFIG_ARM_PSCI=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ARM_MODULE_PLTS=y
CONFIG_CMA=y
-CONFIG_CMA_DEBUGFS=y
CONFIG_ZSMALLOC=y
CONFIG_PROCESS_RECLAIM=y
CONFIG_SECCOMP=y
CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_BOOST=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
@@ -283,7 +277,6 @@
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
@@ -377,11 +370,6 @@
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_UHID=y
-CONFIG_HID_APPLE=y
-CONFIG_HID_ELECOM=y
-CONFIG_HID_MAGICMOUSE=y
-CONFIG_HID_MICROSOFT=y
-CONFIG_HID_MULTITOUCH=y
CONFIG_USB=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
@@ -392,6 +380,7 @@
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_RMNET_BAM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
@@ -404,6 +393,7 @@
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
+CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
# CONFIG_PWRSEQ_EMMC is not set
@@ -434,6 +424,8 @@
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ION=y
CONFIG_ION_MSM=y
+CONFIG_IPA=y
+CONFIG_RMNET_IPA=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_QPNP_REVID=y
@@ -449,6 +441,7 @@
CONFIG_MSM_L2_SPM=y
CONFIG_MSM_BOOT_STATS=y
CONFIG_QCOM_WATCHDOG_V2=y
+CONFIG_QPNP_PBS=y
CONFIG_QCOM_MEMORY_DUMP_V2=y
CONFIG_MSM_RPM_SMD=y
CONFIG_QCOM_BUS_SCALING=y
@@ -486,7 +479,6 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
-CONFIG_BIG_CLUSTER_MIN_FREQ_ADJUST=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_DEVFREQ_SIMPLE_DEV=y
@@ -526,6 +518,9 @@
CONFIG_DEBUG_FS=y
CONFIG_PANIC_TIMEOUT=5
# CONFIG_SCHED_DEBUG is not set
+CONFIG_PANIC_ON_SCHED_BUG=y
+CONFIG_PANIC_ON_RT_THROTTLING=y
+CONFIG_SCHED_STACK_END_CHECK=y
# CONFIG_DEBUG_PREEMPT is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_FTRACE is not set
diff --git a/arch/arm/configs/sdm429-bg_defconfig b/arch/arm/configs/sdm429-bg_defconfig
index f0aeb94..f7f2a4c 100644
--- a/arch/arm/configs/sdm429-bg_defconfig
+++ b/arch/arm/configs/sdm429-bg_defconfig
@@ -57,13 +57,10 @@
# CONFIG_IOSCHED_DEADLINE is not set
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_MSM8937=y
-CONFIG_ARCH_MSM8917=y
-CONFIG_ARCH_SDM439=y
CONFIG_ARCH_SDM429=y
# CONFIG_VDSO is not set
CONFIG_SMP=y
CONFIG_SCHED_MC=y
-CONFIG_NR_CPUS=8
CONFIG_ARM_PSCI=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
@@ -76,10 +73,6 @@
CONFIG_SECCOMP=y
CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_CPU_FREQ_GOV_ONDEMAND=y
-CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_BOOST=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_MSM=y
@@ -291,7 +284,6 @@
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
-CONFIG_INPUT_JOYSTICK=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_CORE_v26=y
CONFIG_TOUCHSCREEN_SYNAPTICS_DSX_RMI_DEV_v26=y
@@ -387,11 +379,6 @@
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_SOC=y
CONFIG_UHID=y
-CONFIG_HID_APPLE=y
-CONFIG_HID_ELECOM=y
-CONFIG_HID_MAGICMOUSE=y
-CONFIG_HID_MICROSOFT=y
-CONFIG_HID_MULTITOUCH=y
CONFIG_USB=y
CONFIG_DUAL_ROLE_USB_INTF=y
CONFIG_USB_GADGET=y
@@ -402,6 +389,7 @@
CONFIG_USB_CONFIGFS=y
CONFIG_USB_CONFIGFS_SERIAL=y
CONFIG_USB_CONFIGFS_NCM=y
+CONFIG_USB_CONFIGFS_RMNET_BAM=y
CONFIG_USB_CONFIGFS_MASS_STORAGE=y
CONFIG_USB_CONFIGFS_F_FS=y
CONFIG_USB_CONFIGFS_F_MTP=y
@@ -414,6 +402,7 @@
CONFIG_USB_CONFIGFS_F_DIAG=y
CONFIG_USB_CONFIGFS_F_CDEV=y
CONFIG_USB_CONFIGFS_F_CCID=y
+CONFIG_USB_CONFIGFS_F_QDSS=y
CONFIG_MMC=y
CONFIG_MMC_PERF_PROFILING=y
# CONFIG_PWRSEQ_EMMC is not set
@@ -445,6 +434,8 @@
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_ION=y
CONFIG_ION_MSM=y
+CONFIG_IPA=y
+CONFIG_RMNET_IPA=y
CONFIG_SPS=y
CONFIG_SPS_SUPPORT_NDP_BAM=y
CONFIG_QPNP_REVID=y
@@ -505,7 +496,6 @@
CONFIG_WCNSS_CORE=y
CONFIG_WCNSS_CORE_PRONTO=y
CONFIG_WCNSS_REGISTER_DUMP_ON_BITE=y
-CONFIG_BIG_CLUSTER_MIN_FREQ_ADJUST=y
CONFIG_QCOM_BIMC_BWMON=y
CONFIG_DEVFREQ_GOV_QCOM_BW_HWMON=y
CONFIG_DEVFREQ_SIMPLE_DEV=y
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index eed610c..9bf3a41 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -189,7 +189,8 @@
sxr1130-usbc-external-codec-pm660a-mtp-overlay.dtbo \
sxr1130-usbc-mtp-overlay.dtbo \
sxr1130-usbc-pm660a-mtp-overlay.dtbo \
- sxr1130-qrd-overlay.dtbo
+ sxr1130-qrd-overlay.dtbo \
+ sxr1130-svr-overlay.dtbo
sdm670-cdp-overlay.dtbo-base := sdm670.dtb
sdm670-mtp-overlay.dtbo-base := sdm670.dtb
@@ -264,6 +265,7 @@
sxr1130-usbc-mtp-overlay.dtbo-base := sxr1130.dtb
sxr1130-usbc-pm660a-mtp-overlay.dtbo-base := sxr1130.dtb
sxr1130-qrd-overlay.dtbo-base := sxr1130.dtb
+sxr1130-svr-overlay.dtbo-base := sxr1130.dtb
else
dtb-$(CONFIG_ARCH_SDM670) += sdm670-rumi.dtb \
@@ -335,7 +337,8 @@
sxr1130-usbc-external-codec-pm660a-mtp.dtb \
sxr1130-usbc-mtp.dtb \
sxr1130-usbc-pm660a-mtp.dtb \
- sxr1130-qrd.dtb
+ sxr1130-qrd.dtb \
+ sxr1130-svr.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
diff --git a/arch/arm64/boot/dts/qcom/dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi b/arch/arm64/boot/dts/qcom/dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi
new file mode 100644
index 0000000..e797a1d
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi
@@ -0,0 +1,97 @@
+/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&mdss_mdp {
+ dsi_dual_xrsmrtvwr_jdi_video: qcom,mdss_dsi_xrsmrtvwr_video_jdi {
+ qcom,mdss-dsi-panel-name =
+ "XR SMRTViewer LPM029M483AR63455 video jdi dual wth no DSC";
+ qcom,mdss-dsi-panel-type = "dsi_video_mode";
+ qcom,mdss-dsi-virtual-channel-id = <0>;
+ qcom,mdss-dsi-stream = <0>;
+ qcom,mdss-dsi-panel-hdr-enabled;
+ qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000
+ 17000 15500 30000 8000 3000>;
+ qcom,mdss-dsi-panel-peak-brightness = <4200000>;
+ qcom,mdss-dsi-panel-blackness-level = <3230>;
+ qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
+ qcom,mdss-dsi-bllp-eof-power-mode;
+ qcom,mdss-dsi-bllp-power-mode;
+ qcom,mdss-dsi-lane-0-state;
+ qcom,mdss-dsi-lane-1-state;
+ qcom,mdss-dsi-lane-2-state;
+ qcom,mdss-dsi-lane-3-state;
+ qcom,mdss-dsi-dma-trigger = "trigger_sw";
+ qcom,mdss-dsi-mdp-trigger = "none";
+ qcom,mdss-dsi-reset-sequence = <1 20>, <0 20>, <1 50>;
+ qcom,mdss-pan-physical-width-dimension = <52>;
+ qcom,mdss-pan-physical-height-dimension = <52>;
+ qcom,mdss-dsi-tx-eot-append;
+ qcom,mdss-dsi-color-order = "rgb_swap_rgb";
+ qcom,mdss-dsi-underflow-color = <0xff>;
+ qcom,mdss-dsi-border-color = <0>;
+ qcom,mdss-dsi-bpp = <24>;
+
+ qcom,mdss-dsi-display-timings {
+ timing@0{
+ qcom,mdss-dsi-panel-width = <1440>;
+ qcom,mdss-dsi-panel-height = <1440>;
+ qcom,mdss-dsi-h-front-porch = <40>;
+ qcom,mdss-dsi-h-back-porch = <40>;
+ qcom,mdss-dsi-h-pulse-width = <20>;
+ qcom,mdss-dsi-h-sync-skew = <0>;
+ qcom,mdss-dsi-v-back-porch = <16>;
+ qcom,mdss-dsi-v-front-porch = <322>;
+ qcom,mdss-dsi-v-pulse-width = <4>;
+ qcom,mdss-dsi-panel-framerate = <75>;
+ qcom,mdss-dsi-on-command = [
+ 29 01 00 00 00 00 02 B0 04
+ 29 01 00 00 00 00 02 D6 00
+ 29 01 00 00 00 00 0A B6 30 6B 80 06 33
+ 8A 00 1A 7A
+ 29 01 00 00 00 00 05 B7 54 00 00 00
+ 29 01 00 00 00 00 0D B9 00 85 01 BF 00
+ 00 00 00 00 85 01 BF
+ 29 01 00 00 00 00 09 C0 61 86 58 02 08
+ 70 04 EC
+ 29 01 00 00 00 00 02 F1 1E
+ 29 01 00 00 00 00 09 C6 A0 05 A0 05 43
+ 9F 05 43
+ 29 01 00 00 00 00 02 CD 11
+ 29 01 00 00 00 00 08 CF 00 00 80 46 61
+ 00 00
+ 29 01 00 00 00 00 07 EC 01 8E 00 00 00
+ 00
+ 39 01 00 00 00 00 02 03 00
+ 39 01 00 00 00 00 03 44 00 00
+ 39 01 00 00 00 00 02 35 00
+ 39 01 00 00 00 00 02 36 00
+ 39 01 00 00 00 00 02 3A 77
+ 05 01 00 00 02 00 02 29 00
+ 05 01 00 00 80 00 02 11 00
+ 29 01 00 00 00 00 02 D6 80
+ 29 01 00 00 00 00 02 B0 03
+ ];
+ qcom,mdss-dsi-off-command = [
+ 05 01 00 00 32 00 02 28 00
+ 05 01 00 00 32 00 02 34 00
+ 05 01 00 00 78 00 02 10 00
+ ];
+ qcom,mdss-dsi-on-command-state =
+ "dsi_lp_mode";
+ qcom,mdss-dsi-off-command-state =
+ "dsi_hs_mode";
+ qcom,mdss-dsi-h-sync-pulse = <0>;
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-1400mah.dtsi b/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-1400mah.dtsi
new file mode 100644
index 0000000..b95051a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/fg-gen3-batterydata-goertek-1400mah.dtsi
@@ -0,0 +1,80 @@
+/* Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+qcom,fg-gen3-batterydata-goertek-1400mah {
+ qcom,max-voltage-uv = <4350000>;
+ qcom,fg-cc-cv-threshold-mv = <4340>;
+ qcom,nom-batt-capacity-mah = <1400>;
+ qcom,batt-id-kohm = <10>;
+ qcom,battery-beta = <3440>;
+ qcom,battery-type = "fg-gen3-batterydata-goertek-1400mah";
+ qcom,checksum = <0xF519>;
+ qcom,gui-version = "PM660GUI - 0.0.0.45";
+ qcom,fg-profile-data = [
+ 79 21 F3 0D
+ 6A 0B 99 05
+ 0B 1D 8D FA
+ 37 FC 4F 02
+ D7 19 0E 22
+ C0 3C 8C 4B
+ 9E 00 00 00
+ 13 00 00 00
+ 00 00 DD CD
+ E1 C5 8D CA
+ 2F 00 08 00
+ 74 D3 AD 07
+ 42 06 B7 F2
+ CB EC C9 03
+ 37 FC 39 32
+ 1E 06 09 20
+ 27 00 14 00
+ AE 1F B4 05
+ 54 0A 6C 06
+ D4 1C A8 02
+ 97 0C A5 0B
+ DB 18 75 23
+ 59 44 AD 5A
+ 6E 00 00 00
+ 0E 00 00 00
+ 00 00 EB CC
+ 3E CA 02 B4
+ 2C 00 00 00
+ 62 F2 AD 07
+ 8F FC 9E 00
+ 99 CB C0 02
+ B5 0D D8 23
+ C6 33 CC FF
+ 07 10 00 00
+ BD 05 99 45
+ 2C 00 40 00
+ F4 00 0A FA
+ FF 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ 00 00 00 00
+ ];
+};
diff --git a/arch/arm64/boot/dts/qcom/pm660-rpm-regulator.dtsi b/arch/arm64/boot/dts/qcom/pm660-rpm-regulator.dtsi
index 5896615..ca12f71 100644
--- a/arch/arm64/boot/dts/qcom/pm660-rpm-regulator.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm660-rpm-regulator.dtsi
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,7 +16,7 @@
qcom,resource-name = "smpa";
qcom,resource-id = <1>;
qcom,regulator-type = <1>;
- qcom,hpm-min-load = <100000>;
+ qcom,hpm-min-load = <400000>;
status = "disabled";
regulator-s1 {
@@ -32,7 +32,7 @@
qcom,resource-name = "smpa";
qcom,resource-id = <2>;
qcom,regulator-type = <1>;
- qcom,hpm-min-load = <100000>;
+ qcom,hpm-min-load = <400000>;
status = "disabled";
regulator-s2 {
@@ -96,7 +96,7 @@
qcom,resource-name = "smpa";
qcom,resource-id = <6>;
qcom,regulator-type = <1>;
- qcom,hpm-min-load = <100000>;
+ qcom,hpm-min-load = <400000>;
status = "disabled";
regulator-s6 {
diff --git a/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi b/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
index 01cf661..3afddb1 100644
--- a/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs605-lc.dtsi
@@ -237,7 +237,9 @@
&gpu_cx_gdsc {
/delete-property/ parent-supply;
+ /delete-property/ vdd_parent-supply;
parent-supply = <&pm8005_s1_level>;
+ vdd_parent-supply = <&pm8005_s1_level>;
};
&gpu_gx_gdsc {
diff --git a/arch/arm64/boot/dts/qcom/sda429-bg-wdp-overlay.dts b/arch/arm64/boot/dts/qcom/sda429-bg-wdp-overlay.dts
index 0ddd81d..4058468 100644
--- a/arch/arm64/boot/dts/qcom/sda429-bg-wdp-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/sda429-bg-wdp-overlay.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019,2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -126,6 +126,8 @@
qcom,bg-rsb {
compatible = "qcom,bg-rsb";
vdd-ldo1-supply = <&pm660_l11>;
+ qcom,bg-rsb-gpio = <&tlmm 40 1>;
+ qcom,rsb-use-msm-gpio;
};
qcom,bg-daemon {
diff --git a/arch/arm64/boot/dts/qcom/sda429-bg-wdp.dts b/arch/arm64/boot/dts/qcom/sda429-bg-wdp.dts
index 9746c0c..a7aba4e 100644
--- a/arch/arm64/boot/dts/qcom/sda429-bg-wdp.dts
+++ b/arch/arm64/boot/dts/qcom/sda429-bg-wdp.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,10 +15,11 @@
#include "sdm429-spyro.dtsi"
#include "sdm429w-bg-pm660.dtsi"
+#include "sdm429-bg-memory.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. SDA429 QRD BG WDP Spyro";
- compatible = "qcom,sdm429w-qrd","qcom,sdm429w","qcom,sda429w";
+ model = "Qualcomm Technologies, Inc. SDA429 BG WDP";
+ compatible = "qcom,sdm429w-qrd","qcom,sda429w";
qcom,msm-id = <437 0x0>;
qcom,board-id = <0x00010b 9>;
qcom,pmic-id = <0x0002001b 0x0 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/sda429-bg-wtp-overlay.dts b/arch/arm64/boot/dts/qcom/sda429-bg-wtp-overlay.dts
index 8e98ded..4a3bde0 100644
--- a/arch/arm64/boot/dts/qcom/sda429-bg-wtp-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/sda429-bg-wtp-overlay.dts
@@ -126,6 +126,8 @@
qcom,bg-rsb {
compatible = "qcom,bg-rsb";
vdd-ldo1-supply = <&pm660_l11>;
+ qcom,bg-rsb-gpio = <&tlmm 40 1>;
+ qcom,rsb-use-msm-gpio;
};
qcom,bg-daemon {
diff --git a/arch/arm64/boot/dts/qcom/sda429-bg-wtp.dts b/arch/arm64/boot/dts/qcom/sda429-bg-wtp.dts
index 2312951..d755b0f 100644
--- a/arch/arm64/boot/dts/qcom/sda429-bg-wtp.dts
+++ b/arch/arm64/boot/dts/qcom/sda429-bg-wtp.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,10 +15,11 @@
#include "sdm429-spyro.dtsi"
#include "sdm429w-bg-pm660.dtsi"
+#include "sdm429-bg-memory.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. SDM429 QRD DVT Spyro";
- compatible = "qcom,sdm429w-qrd", "qcom,sdm429w", "qcom,qrd";
+ model = "Qualcomm Technologies, Inc. SDA429 BG WTP";
+ compatible = "qcom,sdm429w-qrd", "qcom,sda429w", "qcom,qrd";
qcom,msm-id = <437 0x0>;
qcom,board-id = <0x00010b 8>;
qcom,pmic-id = <0x0002001b 0x0 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-iot-wtp.dts b/arch/arm64/boot/dts/qcom/sdm429-bg-iot-wtp.dts
index 46c7469..70bc00a 100644
--- a/arch/arm64/boot/dts/qcom/sdm429-bg-iot-wtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-iot-wtp.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -16,9 +16,10 @@
#include "sdm429-spyro.dtsi"
#include "sdm429-spyro-qrd-evt.dtsi"
#include "sdm429w-bg-pm660.dtsi"
+#include "sdm429-bg-memory.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. SDM429W BG IOT WTP";
+ model = "Qualcomm Technologies, Inc. SDM429 BG IOT WTP";
compatible = "qcom,sdm429w-qrd", "qcom,sdm429w", "qcom,qrd";
qcom,msm-id = <416 0x0>;
qcom,board-id = <0x00010b 8>;
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-memory.dtsi b/arch/arm64/boot/dts/qcom/sdm429-bg-memory.dtsi
new file mode 100644
index 0000000..2ef9e9b
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-memory.dtsi
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&reserved_memory {
+ linux,cma {
+ compatible = "shared-dma-pool";
+ alloc-ranges = <0 0x00000000 0 0xa0000000>;
+ reusable;
+ alignment = <0 0x400000>;
+ size = <0 0x1000000>;
+ linux,cma-default;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-wdp-overlay.dts b/arch/arm64/boot/dts/qcom/sdm429-bg-wdp-overlay.dts
index d78655b..752ce07 100644
--- a/arch/arm64/boot/dts/qcom/sdm429-bg-wdp-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-wdp-overlay.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019,2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -126,6 +126,8 @@
qcom,bg-rsb {
compatible = "qcom,bg-rsb";
vdd-ldo1-supply = <&pm660_l11>;
+ qcom,bg-rsb-gpio = <&tlmm 40 1>;
+ qcom,rsb-use-msm-gpio;
};
qcom,bg-daemon {
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-wdp.dts b/arch/arm64/boot/dts/qcom/sdm429-bg-wdp.dts
index 26ed8a7..d945659 100644
--- a/arch/arm64/boot/dts/qcom/sdm429-bg-wdp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-wdp.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,9 +15,10 @@
#include "sdm429-spyro.dtsi"
#include "sdm429w-bg-pm660.dtsi"
+#include "sdm429-bg-memory.dtsi"
/ {
- model = "Qualcomm Technologies, Inc. SDM429 QRD BG WDP";
+ model = "Qualcomm Technologies, Inc. SDM429 BG WDP";
compatible = "qcom,sdm429w-qrd", "qcom,sdm429w", "qcom,qrd";
qcom,msm-id = <416 0x0>;
qcom,board-id = <0x01000b 9>;
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-wtp-overlay.dts b/arch/arm64/boot/dts/qcom/sdm429-bg-wtp-overlay.dts
index 10b5f48..89aba6f 100644
--- a/arch/arm64/boot/dts/qcom/sdm429-bg-wtp-overlay.dts
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-wtp-overlay.dts
@@ -126,6 +126,8 @@
qcom,bg-rsb {
compatible = "qcom,bg-rsb";
vdd-ldo1-supply = <&pm660_l11>;
+ qcom,bg-rsb-gpio = <&tlmm 40 1>;
+ qcom,rsb-use-msm-gpio;
};
qcom,bg-daemon {
diff --git a/arch/arm64/boot/dts/qcom/sdm429-bg-wtp.dts b/arch/arm64/boot/dts/qcom/sdm429-bg-wtp.dts
index 62294f0..abbbbce 100644
--- a/arch/arm64/boot/dts/qcom/sdm429-bg-wtp.dts
+++ b/arch/arm64/boot/dts/qcom/sdm429-bg-wtp.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2019 - 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -15,6 +15,7 @@
#include "sdm429-spyro.dtsi"
#include "sdm429w-bg-pm660.dtsi"
+#include "sdm429-bg-memory.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDM429 BG WTP";
diff --git a/arch/arm64/boot/dts/qcom/sdm450-camera-sensor-qrd.dtsi b/arch/arm64/boot/dts/qcom/sdm450-camera-sensor-qrd.dtsi
new file mode 100644
index 0000000..0d62d8c
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm450-camera-sensor-qrd.dtsi
@@ -0,0 +1,232 @@
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cci {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ actuator0: qcom,actuator@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,actuator";
+ qcom,cci-master = <0>;
+ cam_vaf-supply = <&pm8953_l17>;
+ qcom,cam-vreg-name = "cam_vaf";
+ qcom,cam-vreg-min-voltage = <2850000>;
+ qcom,cam-vreg-max-voltage = <2850000>;
+ qcom,cam-vreg-op-mode = <80000>;
+ };
+
+ eeprom0: qcom,eeprom@0 {
+ cell-index = <0>;
+ compatible = "qcom,eeprom";
+ qcom,cci-master = <0>;
+ reg = <0x0>;
+ cam_vio-supply = <&pm8953_l6>;
+ cam_vdig-supply = <&pm8953_l23>;
+ cam_vaf-supply = <&pm8953_l17>;
+ qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf";
+ qcom,cam-vreg-min-voltage = <0 1200000 2850000>;
+ qcom,cam-vreg-max-voltage = <0 1200000 2850000>;
+ qcom,cam-vreg-op-mode = <0 105000 100000>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_default
+ &cam_sensor_rear_default
+ &cam_sensor_rear_vana>;
+ pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep
+ &cam_sensor_rear_vana_sleep>;
+ gpios = <&tlmm 26 0>,
+ <&tlmm 40 0>,
+ <&tlmm 39 0>,
+ <&tlmm 134 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vana = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
+ "CAM_RESET0",
+ "CAM_STANDBY0",
+ "CAM_VANA";
+ status = "ok";
+ clocks = <&clock_gcc clk_mclk0_clk_src>,
+ <&clock_gcc clk_gcc_camss_mclk0_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ qcom,clock-rates = <19200000 0>;
+ };
+
+ eeprom2: qcom,eeprom@2 {
+ cell-index = <2>;
+ reg = <0x2>;
+ compatible = "qcom,eeprom";
+ qcom,cci-master = <1>;
+ cam_vdig-supply = <&pm8953_l23>;
+ cam_vana-supply = <&pm8953_l22>;
+ cam_vio-supply = <&pm8953_l6>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-min-voltage = <1200000 0 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2800000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk1_default
+ &cam_sensor_front1_default>;
+ pinctrl-1 = <&cam_sensor_mclk1_sleep &cam_sensor_front1_sleep>;
+ gpios = <&tlmm 27 0>,
+ <&tlmm 129 0>,
+ <&tlmm 130 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_RESET2",
+ "CAM_STANDBY2";
+ qcom,sensor-mode = <0>;
+ status = "ok";
+ clocks = <&clock_gcc clk_mclk1_clk_src>,
+ <&clock_gcc clk_gcc_camss_mclk1_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ qcom,clock-rates = <19200000 0>;
+ };
+
+ qcom,camera@0 {
+ cell-index = <0>;
+ compatible = "qcom,camera";
+ reg = <0x0>;
+ qcom,csiphy-sd-index = <0>;
+ qcom,csid-sd-index = <0>;
+ qcom,mount-angle = <90>;
+ qcom,led-flash-src = <&led_flash0>;
+ qcom,eeprom-src = <&eeprom0>;
+ qcom,actuator-src = <&actuator0>;
+ cam_vio-supply = <&pm8953_l6>;
+ cam_vdig-supply = <&pm8953_l23>;
+ cam_vaf-supply = <&pm8953_l17>;
+ cam_vana-supply = <&pm8953_l22>;
+ qcom,cam-vreg-name = "cam_vio", "cam_vdig", "cam_vaf",
+ "cam_vana";
+ qcom,cam-vreg-min-voltage = <0 1200000 2850000 2800000>;
+ qcom,cam-vreg-max-voltage = <0 1200000 2850000 2800000>;
+ qcom,cam-vreg-op-mode = <0 105000 100000 80000>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_default
+ &cam_sensor_rear_default
+ &cam_sensor_rear_vana>;
+ pinctrl-1 = <&cam_sensor_mclk0_sleep &cam_sensor_rear_sleep
+ &cam_sensor_rear_vana_sleep>;
+ gpios = <&tlmm 26 0>,
+ <&tlmm 40 0>,
+ <&tlmm 39 0>,
+ <&tlmm 134 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-vana = <3>;
+ qcom,gpio-req-tbl-num = <0 1 2 3>;
+ qcom,gpio-req-tbl-flags = <1 0 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK0",
+ "CAM_RESET0",
+ "CAM_STANDBY0",
+ "CAM_VANA";
+ qcom,sensor-position = <0>;
+ qcom,sensor-mode = <0>;
+ qcom,cci-master = <0>;
+ status = "ok";
+ clocks = <&clock_gcc clk_mclk0_clk_src>,
+ <&clock_gcc clk_gcc_camss_mclk0_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ qcom,clock-rates = <24000000 0>;
+ };
+
+ qcom,camera@1 {
+ cell-index = <1>;
+ compatible = "qcom,camera";
+ reg = <0x1>;
+ qcom,csiphy-sd-index = <1>;
+ qcom,csid-sd-index = <1>;
+ qcom,mount-angle = <90>;
+ cam_vdig-supply = <&pm8953_l23>;
+ cam_vana-supply = <&pm8953_l22>;
+ cam_vio-supply = <&pm8953_l6>;
+ cam_vaf-supply = <&pm8953_l17>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_vaf";
+ qcom,cam-vreg-min-voltage = <1200000 0 2800000 2850000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2800000 2850000>;
+ qcom,cam-vreg-op-mode = <200000 0 80000 100000>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk2_default
+ &cam_sensor_front_default>;
+ pinctrl-1 = <&cam_sensor_mclk2_sleep
+ &cam_sensor_front_sleep>;
+ gpios = <&tlmm 28 0>,
+ <&tlmm 131 0>,
+ <&tlmm 132 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK1",
+ "CAM_RESET1",
+ "CAM_STANDBY1";
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <0>;
+ qcom,cci-master = <0>;
+ status = "disabled";
+ clocks = <&clock_gcc clk_mclk2_clk_src>,
+ <&clock_gcc clk_gcc_camss_mclk2_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ qcom,clock-rates = <24000000 0>;
+ };
+
+ qcom,camera@2 {
+ cell-index = <2>;
+ compatible = "qcom,camera";
+ reg = <0x02>;
+ qcom,csiphy-sd-index = <2>;
+ qcom,csid-sd-index = <2>;
+ qcom,mount-angle = <270>;
+ qcom,eeprom-src = <&eeprom2>;
+ cam_vdig-supply = <&pm8953_l23>;
+ cam_vana-supply = <&pm8953_l22>;
+ cam_vio-supply = <&pm8953_l6>;
+ qcom,cam-vreg-name = "cam_vdig", "cam_vio", "cam_vana";
+ qcom,cam-vreg-min-voltage = <1200000 0 2800000>;
+ qcom,cam-vreg-max-voltage = <1200000 0 2800000>;
+ qcom,cam-vreg-op-mode = <105000 0 80000>;
+ qcom,gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk1_default
+ &cam_sensor_front1_default>;
+ pinctrl-1 = <&cam_sensor_mclk1_sleep
+ &cam_sensor_front1_sleep>;
+ gpios = <&tlmm 27 0>,
+ <&tlmm 129 0>,
+ <&tlmm 130 0>;
+ qcom,gpio-reset = <1>;
+ qcom,gpio-standby = <2>;
+ qcom,gpio-req-tbl-num = <0 1 2>;
+ qcom,gpio-req-tbl-flags = <1 0 0>;
+ qcom,gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_RESET2",
+ "CAM_STANDBY2";
+ qcom,sensor-position = <1>;
+ qcom,sensor-mode = <0>;
+ qcom,cci-master = <1>;
+ status = "ok";
+ clocks = <&clock_gcc clk_mclk1_clk_src>,
+ <&clock_gcc clk_gcc_camss_mclk1_clk>;
+ clock-names = "cam_src_clk", "cam_clk";
+ qcom,clock-rates = <24000000 0>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi
index 004411f..e5097e6 100644
--- a/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm450-qrd-sku4.dtsi
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -13,7 +13,7 @@
#include "msm8953-qrd.dtsi"
#include "msm8953-mdss-panels.dtsi"
-#include "msm8953-camera-sensor-qrd.dtsi"
+#include "sdm450-camera-sensor-qrd.dtsi"
&qusb_phy {
qcom,qusb-phy-init-seq = <0x78 0x80
diff --git a/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi
new file mode 100644
index 0000000..bdc13b4
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sdm670-camera-sensor-svr.dtsi
@@ -0,0 +1,497 @@
+/*
+ * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&soc {
+ led_flash_rear: qcom,camera-flash@0 {
+ cell-index = <0>;
+ reg = <0x00 0x00>;
+ compatible = "qcom,camera-flash";
+ flash-source = <&pm660l_flash0 &pm660l_flash1>;
+ torch-source = <&pm660l_torch0 &pm660l_torch1>;
+ switch-source = <&pm660l_switch0>;
+ status = "disabled";
+ };
+
+ led_flash_rear_aux: qcom,camera-flash@1 {
+ cell-index = <1>;
+ reg = <0x01 0x00>;
+ compatible = "qcom,camera-flash";
+ flash-source = <&pm660l_flash0 &pm660l_flash1>;
+ torch-source = <&pm660l_torch0 &pm660l_torch1>;
+ switch-source = <&pm660l_switch0>;
+ status = "disabled";
+ };
+
+ led_flash_front: qcom,camera-flash@2 {
+ cell-index = <2>;
+ reg = <0x02 0x00>;
+ compatible = "qcom,camera-flash";
+ flash-source = <&pm660l_flash2>;
+ torch-source = <&pm660l_torch2>;
+ switch-source = <&pm660l_switch1>;
+ status = "disabled";
+ };
+
+ actuator_regulator: gpio-regulator@0 {
+ compatible = "regulator-fixed";
+ reg = <0x00 0x00>;
+ regulator-name = "actuator_regulator";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-enable-ramp-delay = <100>;
+ enable-active-high;
+ gpio = <&tlmm 27 0>;
+ status = "disabled";
+ };
+
+ camera_ldo: gpio-regulator@2 {
+ compatible = "regulator-fixed";
+ reg = <0x02 0x00>;
+ regulator-name = "camera_ldo";
+ regulator-min-microvolt = <1352000>;
+ regulator-max-microvolt = <1352000>;
+ regulator-enable-ramp-delay = <233>;
+ enable-active-high;
+ gpio = <&pm660l_gpios 3 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&camera_dvdd_en_default>;
+ vin-supply = <&pm660_s6>;
+ status = "disabled";
+ };
+
+ camera_rear_ldo: gpio-regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <0x01 0x00>;
+ regulator-name = "camera_rear_ldo";
+ regulator-min-microvolt = <1352000>;
+ regulator-max-microvolt = <1352000>;
+ regulator-enable-ramp-delay = <135>;
+ enable-active-high;
+ gpio = <&pm660l_gpios 4 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&camera_rear_dvdd_en_default>;
+ vin-supply = <&pm660_s6>;
+ status = "disabled";
+ };
+
+ camera_vio_ldo: gpio-regulator@3 {
+ compatible = "regulator-fixed";
+ reg = <0x03 0x00>;
+ regulator-name = "camera_vio_ldo";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-enable-ramp-delay = <233>;
+ enable-active-high;
+ gpio = <&tlmm 29 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam_sensor_rear_vio>;
+ vin-supply = <&pm660_s4>;
+ status = "disabled";
+ };
+
+ camera_vana_ldo: gpio-regulator@4 {
+ compatible = "regulator-fixed";
+ reg = <0x04 0x00>;
+ regulator-name = "camera_vana_ldo";
+ regulator-min-microvolt = <2850000>;
+ regulator-max-microvolt = <2850000>;
+ regulator-enable-ramp-delay = <233>;
+ enable-active-high;
+ gpio = <&tlmm 8 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&cam_sensor_rear_vana>;
+ vin-supply = <&pm660l_bob>;
+ status = "disabled";
+ };
+};
+
+&cam_cci {
+ qcom,cam-res-mgr {
+ compatible = "qcom,cam-res-mgr";
+ status = "ok";
+ };
+
+ actuator_rear: qcom,actuator@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,actuator";
+ cci-master = <0>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <0>;
+ };
+
+ actuator_rear_aux: qcom,actuator@1 {
+ cell-index = <1>;
+ reg = <0x1>;
+ compatible = "qcom,actuator";
+ cci-master = <1>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <0>;
+ };
+
+ actuator_front: qcom,actuator@2 {
+ cell-index = <2>;
+ reg = <0x2>;
+ compatible = "qcom,actuator";
+ cci-master = <1>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <0>;
+ };
+
+ ois_rear: qcom,ois@0 {
+ cell-index = <0>;
+ reg = <0x0>;
+ compatible = "qcom,ois";
+ cci-master = <0>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <2800000>;
+ rgltr-max-voltage = <2800000>;
+ rgltr-load-current = <0>;
+ status = "disabled";
+ };
+
+ eeprom_rear: qcom,eeprom@0 {
+ cell-index = <0>;
+ reg = <0>;
+ compatible = "qcom,eeprom";
+ cam_vio-supply = <&camera_vio_ldo>;
+ cam_vana-supply = <&camera_vana_ldo>;
+ cam_vdig-supply = <&camera_rear_ldo>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk", "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1352000 0 2800000>;
+ rgltr-max-voltage = <1800000 2850000 1352000 0 2800000>;
+ rgltr-load-current = <0 80000 105000 0 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_active
+ &cam_sensor_rear2_active>;
+ pinctrl-1 = <&cam_sensor_mclk0_suspend
+ &cam_sensor_rear2_suspend>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 28 0>;
+ gpio-reset = <1>;
+ gpio-req-tbl-num = <0 1>;
+ gpio-req-tbl-flags = <1 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK0",
+ "CAM_RESET0";
+ sensor-mode = <0>;
+ cci-master = <0>;
+ status = "disabled";
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ eeprom_rear_aux: qcom,eeprom@1 {
+ cell-index = <1>;
+ reg = <0x1>;
+ compatible = "qcom,eeprom";
+ cam_vio-supply = <&camera_vio_ldo>;
+ cam_vana-supply = <&camera_vana_ldo>;
+ cam_vdig-supply = <&camera_ldo>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_clk", "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1352000 1800000 2850000 0 2800000>;
+ rgltr-max-voltage = <1352000 1800000 2850000 0 2800000>;
+ rgltr-load-current = <105000 0 80000 0 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk1_active
+ &cam_sensor_rear2_active>;
+ pinctrl-1 = <&cam_sensor_mclk1_suspend
+ &cam_sensor_rear2_suspend>;
+ gpios = <&tlmm 14 0>,
+ <&tlmm 28 0>;
+ gpio-reset = <1>;
+ gpio-req-tbl-num = <0 1>;
+ gpio-req-tbl-flags = <1 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK1",
+ "CAM_RESET1";
+ sensor-position = <0>;
+ sensor-mode = <0>;
+ cci-master = <1>;
+ status = "disabled";
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ eeprom_front: qcom,eeprom@2 {
+ cell-index = <2>;
+ reg = <0x2>;
+ compatible = "qcom,eeprom";
+ cam_vio-supply = <&camera_vio_ldo>;
+ cam_vana-supply = <&camera_vana_ldo>;
+ cam_vdig-supply = <&camera_ldo>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ cam_vaf-supply = <&actuator_regulator>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk", "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1352000 0 2800000>;
+ rgltr-max-voltage = <1800000 2850000 1352000 0 2800000>;
+ rgltr-load-current = <0 80000 105000 0 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk2_active
+ &cam_sensor_front_active>;
+ pinctrl-1 = <&cam_sensor_mclk2_suspend
+ &cam_sensor_front_suspend>;
+ gpios = <&tlmm 15 0>,
+ <&tlmm 9 0>;
+ gpio-reset = <1>;
+ gpio-req-tbl-num = <0 1>;
+ gpio-req-tbl-flags = <1 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_RESET2";
+ sensor-mode = <0>;
+ cci-master = <1>;
+ status = "disabled";
+ clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ /* RGB R RGB R- MCLK0(GPIO13), RESET(GPIO 27) CCI1*/
+ qcom,cam-sensor@0 {
+ cell-index = <0>;
+ compatible = "qcom,cam-sensor";
+ reg = <0x0>;
+ csiphy-sd-index = <0>;
+ sensor-position-roll = <270>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <180>;
+ cam_vio-supply = <&pm660_l14>;
+ cam_vana-supply = <&pm660l_l3>;
+ cam_vdig-supply = <&pm660_l7>;
+ cam_vaf-supply = <&pm660_l12>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig","cam_clk",
+ "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1200000 0 1800000>;
+ rgltr-max-voltage = <1800000 2850000 1200000 0 1800000>;
+ rgltr-load-current = <60000 80000 105000 0 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_active
+ &cam_sensor_rgbr_active>;
+ pinctrl-1 = <&cam_sensor_mclk0_suspend
+ &cam_sensor_rgbr_suspend>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 27 0>,
+ <&tlmm 30 0>,
+ <&tlmm 8 0>,
+ <&tlmm 29 0>,
+ <&tlmm 12 0>;
+ gpio-reset = <1>;
+ gpio-vana = <2>;
+ gpio-vio = <3>;
+ gpio-vdig = <4>;
+ gpio-vaf = <5>;
+ gpio-req-tbl-num = <0 1 2 3 4 5>;
+ gpio-req-tbl-flags = <1 0 0 0 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK",
+ "CAM_RESET",
+ "CAM_VANA",
+ "CAM_VIO",
+ "CAM_VDIG",
+ "CAM_VAF";
+ sensor-mode = <0>;
+ cci-master = <1>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ /* 6211(GPIO 107 high), MCLK3(GPIO 16), RESET(GPIO 25), GPIO 107(SEL),*/
+ /* GPIO 23(Strobe), LED_1V2_EN(GPIO 0), LED_3V3-EN(GPIO 1) */
+ /* EYE T CCI1 */
+ qcom,cam-sensor@1 {
+ cell-index = <1>;
+ compatible = "qcom,cam-sensor";
+ reg = <0x1>;
+ csiphy-sd-index = <1>;
+ sensor-position-roll = <270>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <180>;
+ cam_vio-supply = <&pm660_l14>;
+ cam_vana-supply = <&pm660l_l3>;
+ cam_vdig-supply = <&pm660_l12>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1800000 0>;
+ rgltr-max-voltage = <1800000 2850000 1800000 0>;
+ rgltr-load-current = <60000 80000 105000 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk3_active
+ &cam_sensor_eyet_active>;
+ pinctrl-1 = <&cam_sensor_mclk3_suspend
+ &cam_sensor_eyet_suspend>;
+ gpios = <&tlmm 16 0>,
+ <&tlmm 25 0>,
+ <&tlmm 11 0>,
+ <&tlmm 12 0>,
+ <&tlmm 107 0>;
+ gpio-reset = <1>;
+ gpio-vana = <2>;
+ gpio-vdig = <3>;
+ gpio-vio = <4>;
+ gpio-req-tbl-num = <0 1 2 3 4>;
+ gpio-req-tbl-flags = <1 0 0 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK3",
+ "CAM_RESET3",
+ "CAM_VANA3",
+ "CAM_VIO3",
+ "CAM_VDIG3";
+ sensor-mode = <0>;
+ cci-master = <1>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ /* 9282 CCI0 */
+ qcom,cam-sensor@2 {
+ cell-index = <2>;
+ compatible = "qcom,cam-sensor";
+ reg = <0x02>;
+ csiphy-sd-index = <2>;
+ sensor-position-roll = <270>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <0>;
+ cam_vio-supply = <&pm660_l14>;
+ cam_vana-supply = <&pm660l_l3>;
+ cam_vdig-supply = <&pm660_l7>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1200000 0>;
+ rgltr-max-voltage = <1800000 2850000 1200000 0>;
+ rgltr-load-current = <60000 80000 105000 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk2_active
+ &cam_sensor_6dof_active>;
+ pinctrl-1 = <&cam_sensor_mclk2_suspend
+ &cam_sensor_6dof_suspend>;
+ gpios = <&tlmm 15 0>,
+ <&tlmm 24 0>,
+ <&tlmm 145 0>,
+ <&tlmm 144 0>,
+ <&tlmm 143 0>;
+ gpio-reset = <1>;
+ gpio-vana = <2>;
+ gpio-vdig = <3>;
+ gpio-vio = <4>;
+ gpio-req-tbl-num = <0 1 2 3 4>;
+ gpio-req-tbl-flags = <1 0 0 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK2",
+ "CAM_RESET2",
+ "CAM_VANA2",
+ "CAM_VDIG2",
+ "CAM_VIO2";
+ sensor-mode = <0>;
+ cci-master = <0>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+
+ /*RGB L(Default)- MCLK1(GPIO14), RESET(GPIO 28), CCI0*/
+ qcom,cam-sensor@3 {
+ cell-index = <3>;
+ compatible = "qcom,cam-sensor";
+ reg = <0x03>;
+ csiphy-sd-index = <1>;
+ sensor-position-roll = <270>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <0>;
+ cam_vio-supply = <&pm660_l14>;
+ cam_vana-supply = <&pm660l_l3>;
+ cam_vdig-supply = <&pm660_l7>;
+ cam_vaf-supply = <&pm660_l12>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ regulator-names = "cam_vio", "cam_vana", "cam_vdig",
+ "cam_clk", "cam_vaf";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1800000 2850000 1200000 0 1800000>;
+ rgltr-max-voltage = <1800000 2850000 1200000 0 1800000>;
+ rgltr-load-current = <60000 80000 105000 0 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk1_active
+ &cam_sensor_rgbl_active>;
+ pinctrl-1 = <&cam_sensor_mclk1_suspend
+ &cam_sensor_rgbl_suspend>;
+ gpios = <&tlmm 14 0>,
+ <&tlmm 28 0>,
+ <&tlmm 30 0>,
+ <&tlmm 8 0>,
+ <&tlmm 29 0>,
+ <&tlmm 12 0>;
+ gpio-reset = <1>;
+ gpio-vana = <2>;
+ gpio-vio = <3>;
+ gpio-vdig = <4>;
+ gpio-vaf = <5>;
+ gpio-req-tbl-num = <0 1 2 3 4 5>;
+ gpio-req-tbl-flags = <1 0 0 0 0 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK1",
+ "CAM_RESET1",
+ "CAM_VANA1",
+ "CAM_VIO1",
+ "CAM_VDIG1",
+ "CAM_VCAF1";
+ sensor-mode = <0>;
+ cci-master = <0>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi b/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
index 92eb4e8..4da450e 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-pinctrl.dtsi
@@ -1077,7 +1077,6 @@
};
};
};
-
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
qupv3_se13_spi_active: qupv3_se13_spi_active {
mux {
@@ -1526,6 +1525,7 @@
pins = "gpio11";
function = "gpio";
};
+
config {
pins = "gpio11";
drive-strength = <2>;
@@ -1539,9 +1539,38 @@
pins = "gpio11";
function = "gpio";
};
+
config {
pins = "gpio11";
drive-strength = <8>;
+ bias-disable;
+ output-low;
+ };
+ };
+
+ cdc_xr_reset_sleep: cdc_xr_reset_sleep {
+ mux {
+ pins = "gpio89";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio89";
+ drive-strength = <2>;
+ bias-disable;
+ output-low;
+ };
+ };
+
+ cdc_xr_reset_active:cdc_xr_reset_active {
+ mux {
+ pins = "gpio89";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio89";
+ drive-strength = <8>;
bias-pull-down;
output-high;
};
@@ -2046,6 +2075,129 @@
};
};
+ sde_led_5v_en_active: sde_led_5v_en_active {
+ mux {
+ pins = "gpio134";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio134";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_led_5v_en_suspend: sde_led_5v_en_suspend {
+ mux {
+ pins = "gpio134";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio134";
+ bias-pull-down;
+ drive-strength = <2>;
+ };
+ };
+
+ sde_selb_gpio: sde_selb_gpio {
+ mux {
+ pins = "gpio105";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio105";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_oenb_gpio: sde_oenb_gpio {
+ mux {
+ pins = "gpio106";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio106";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_sela_gpio: sde_sela_gpio {
+ mux {
+ pins = "gpio0";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio0";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_oena_gpio: sde_oena_gpio {
+ mux {
+ pins = "gpio1";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio1";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_1p8_en_gpio: sde_1p8_en_gpio {
+ mux {
+ pins = "gpio2";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio2";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_led_driver_en1_gpio: sde_led_driver_en1_gpio {
+ mux {
+ pins = "gpio110";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio110";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_led_driver_en2_gpio: sde_led_driver_en2_gpio {
+ mux {
+ pins = "gpio111";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio111";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
+ sde_switch_pwer_gpio: sde_switch_pwer_gpio {
+ mux {
+ pins = "gpio112";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio108";
+ bias-pull-down;
+ drive-strength = <16>;
+ };
+ };
+
cci0_active: cci0_active {
mux {
/* CLK, DATA */
@@ -2102,6 +2254,35 @@
};
};
+ cam_sensor_rgbr_active: cam_sensor_rgbr_active {
+ /* RESET */
+ mux {
+ pins = "gpio27";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio27";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_rgbr_suspend: cam_sensor_rgbr_suspend {
+ /* RESET */
+ mux {
+ pins = "gpio27";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio27";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <2>; /* 2 MA */
+ output-low;
+ };
+ };
+
cam_sensor_rear_active: cam_sensor_rear_active {
/* RESET */
mux {
@@ -2145,6 +2326,130 @@
};
};
+ cam_sensor_rgbr_vana: cam_sensor_rgbr_vana {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio8";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio8";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_rgbr_vdig: cam_sensor_rgbr_vdig {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio29";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio29";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_rgbr_vio: cam_sensor_rgbr_vio {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio30";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio30";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_eyet_vio: cam_sensor_eyet_vio {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio107";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio107";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+ cam_sensor_eyet_vana: cam_sensor_eyet_vana {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio11";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio11";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+ cam_sensor_eyet_vdig: cam_sensor_eyet_vdig {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio12";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio12";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_6dof_vana: cam_sensor_6dof_vana {
+ /* AVDD LDO */
+ mux {
+ pins = "gpio145";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio145";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_6dof_vdig: cam_sensor_6dof_vdig {
+ /* VDIG LDO */
+ mux {
+ pins = "gpio144";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio144";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_6dof_vio: cam_sensor_6dof_vio {
+ /* VIO LDO */
+ mux {
+ pins = "gpio143";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio143";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
cam_sensor_rear_vio: cam_sensor_rear_vio {
/* DOVDD LDO */
mux {
@@ -2216,6 +2521,62 @@
};
};
+ cam_sensor_6dof_active: cam_sensor_6dof_active {
+ /* RESET */
+ mux {
+ pins = "gpio24";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio24";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_6dof_suspend: cam_sensor_6dof_suspend {
+ /* RESET */
+ mux {
+ pins = "gpio24";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio24";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <2>; /* 2 MA */
+ output-low;
+ };
+ };
+ cam_sensor_eyet_active: cam_sensor_eyet_active {
+ /* RESET */
+ mux {
+ pins = "gpio25";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio25";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+ cam_sensor_eyet_suspend: cam_sensor_eyet_suspend {
+ /* RESET */
+ mux {
+ pins = "gpio25";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio25";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <2>; /* 2 MA */
+ output-low;
+ };
+ };
+
cam_sensor_rear2_active: cam_sensor_rear2_active {
/* RESET */
mux {
@@ -2245,6 +2606,35 @@
};
};
+ cam_sensor_rgbl_active: cam_sensor_rgbl_active {
+ /* RESET */
+ mux {
+ pins = "gpio28";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio28";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_rgbl_suspend: cam_sensor_rgbl_suspend {
+ /* RESET */
+ mux {
+ pins = "gpio28";
+ function = "gpio";
+ };
+
+ config {
+ pins = "gpio28";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <2>; /* 2 MA */
+ output-low;
+ };
+ };
+
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
/* MCLK1 */
mux {
@@ -2345,6 +2735,35 @@
input-enable;
};
};
+
+ cam_sensor_mclk3_active: cam_sensor_mclk3_active {
+ /* MCLK3 */
+ mux {
+ pins = "gpio16";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio16";
+ bias-disable; /* No PULL */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
+ cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend {
+ /* MCLK3 */
+ mux {
+ pins = "gpio16";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio16";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <2>; /* 2 MA */
+ };
+ };
+
};
};
@@ -2396,6 +2815,16 @@
output-low;
};
+ key_home {
+ key_home_default: key_home_default {
+ pins = "gpio5";
+ function = "normal";
+ input-enable;
+ bias-pull-up;
+ power-source = <0>;
+ };
+ };
+
key_vol_up {
key_vol_up_default: key_vol_up_default {
pins = "gpio7";
diff --git a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
index 400f5f7..9747adc 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-sde-display.dtsi
@@ -30,6 +30,7 @@
#include "dsi-panel-nt36850-truly-dualmipi-wqhd-cmd.dtsi"
#include "dsi-panel-hx8399-truly-singlemipi-fhd-video.dtsi"
#include "dsi-panel-hx83112a-truly-singlemipi-fhd-video.dtsi"
+#include "dsi-panel-xrsmrtvwr-jdi-dual-video.dtsi"
#include <dt-bindings/clock/mdss-10nm-pll-clk.h>
&soc {
@@ -599,6 +600,28 @@
ibb-supply = <&lcdb_ncp_vreg>;
};
+ dsi_dual_xrsmrtvwr_jdi_video_display: qcom,dsi-display@21 {
+ compatible = "qcom,dsi-display";
+ label = "dsi_dual_xrsmrtvwr_jdi_video_display";
+ qcom,display-type = "primary";
+
+ qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
+ qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
+ clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
+ <&mdss_dsi0_pll PCLK_MUX_0_CLK>;
+ clock-names = "mux_byte_clk", "mux_pixel_clk";
+
+ pinctrl-names = "panel_active", "panel_suspend";
+ pinctrl-0 = <&sde_dsi_active &sde_te_active>;
+ pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+
+ qcom,dsi-panel = <&dsi_dual_xrsmrtvwr_jdi_video>;
+ vddio-supply = <&pm660_l11>;
+ eab-supply = <&lcdb_ldo_vreg>;
+ ibb-supply = <&lcdb_ncp_vreg>;
+ };
sde_wb: qcom,wb-display@0 {
compatible = "qcom,wb-display";
@@ -631,6 +654,30 @@
connectors = <&sde_rscc &sde_wb &sde_dp>;
};
+&dsi_dual_xrsmrtvwr_jdi_video {
+ qcom,mdss-dsi-t-clk-post = <0x10>;
+ qcom,mdss-dsi-t-clk-pre = <0x3D>;
+ qcom,mdss-dsi-min-refresh-rate = <53>;
+ qcom,mdss-dsi-max-refresh-rate = <80>;
+ qcom,esd-check-enabled;
+ qcom,mdss-dsi-panel-status-check-mode = "te_signal_check";
+ qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0a];
+ qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
+ qcom,mdss-dsi-panel-status-value = <0x9c>;
+ qcom,mdss-dsi-panel-on-check-value = <0x9c>;
+ qcom,mdss-dsi-panel-status-read-length = <1>;
+ qcom,mdss-dsi-display-timings {
+ timing@0{
+ qcom,mdss-dsi-panel-phy-timings = [00 29 0A 0B 27 26
+ 0A 0B 07 02 04 00];
+ qcom,display-topology = <2 0 2>,
+ <1 0 2>;
+ qcom,default-topology-index = <0>;
+ };
+ };
+};
+
+
&dsi_dual_nt35597_truly_video {
qcom,mdss-dsi-t-clk-post = <0x0D>;
qcom,mdss-dsi-t-clk-pre = <0x2D>;
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index 1e25e3b..7dddef5 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -2988,6 +2988,7 @@
&gpu_cx_gdsc {
parent-supply = <&pm660l_s3_level>;
+ vdd_parent-supply = <&pm660l_s3_level>;
status = "ok";
};
diff --git a/arch/arm64/boot/dts/qcom/sxr1130-svr-overlay.dts b/arch/arm64/boot/dts/qcom/sxr1130-svr-overlay.dts
new file mode 100644
index 0000000..bbcdba6
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sxr1130-svr-overlay.dts
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/qcom,gcc-sdm845.h>
+#include <dt-bindings/clock/qcom,camcc-sdm845.h>
+#include <dt-bindings/clock/qcom,dispcc-sdm845.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+#include "sdm670-external-codec.dtsi"
+#include "sxr1130-svr.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SXR1130 SMART VIEWER";
+ compatible = "qcom,sxr1130-smrtvwr", "qcom,sxr1130", "qcom,xr-smrtvwr";
+ qcom,msm-id = <371 0x0>;
+ qcom,board-id = <8 0x0A>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0102001a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sxr1130-svr-pinctrl-overlay.dtsi b/arch/arm64/boot/dts/qcom/sxr1130-svr-pinctrl-overlay.dtsi
new file mode 100644
index 0000000..54eed81
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sxr1130-svr-pinctrl-overlay.dtsi
@@ -0,0 +1,124 @@
+/* Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+&cam_sensor_mclk0_active {
+ /* MCLK0 */
+ mux {
+ pins = "gpio13";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio13";
+ bias-disable; /* No PULL */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk0_suspend {
+ /* MCLK0 */
+ mux {
+ pins = "gpio13";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio13";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk1_active {
+ /* MCLK1 */
+ mux {
+ pins = "gpio14";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio14";
+ bias-disable; /* No PULL */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk1_suspend {
+ /* MCLK1 */
+ mux {
+ pins = "gpio14";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio14";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk2_active {
+ /* MCLK2 */
+ mux {
+ pins = "gpio15";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio15";
+ bias-disable; /* No PULL */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk2_suspend {
+ /* MCLK2 */
+ mux {
+ pins = "gpio15";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio15";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk3_active {
+ /* MCLK3 */
+ mux {
+ pins = "gpio16";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio16";
+ bias-disable; /* No PULL */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
+&cam_sensor_mclk3_suspend {
+ /* MCLK3 */
+ mux {
+ pins = "gpio16";
+ function = "cam_mclk";
+ };
+
+ config {
+ pins = "gpio16";
+ bias-pull-down; /* PULL DOWN */
+ drive-strength = <16>; /* 16 MA */
+ };
+};
+
diff --git a/arch/arm64/boot/dts/qcom/sxr1130-svr.dts b/arch/arm64/boot/dts/qcom/sxr1130-svr.dts
new file mode 100644
index 0000000..2fdbdce
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sxr1130-svr.dts
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2019, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+
+/dts-v1/;
+
+#include "sxr1130.dtsi"
+#include "sdm670-audio-overlay.dtsi"
+#include "sxr1130-svr.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. SXR1130 SMART VIEWER";
+ compatible = "qcom,sxr1130-smrtvwr", "qcom,sxr1130", "qcom,xr-smrtvwr";
+ qcom,board-id = <8 0x0A>;
+ qcom,pmic-id = <0x0001001b 0x0101011a 0x0 0x0>,
+ <0x0001001b 0x0102001a 0x0 0x0>,
+ <0x0001001b 0x0201011a 0x0 0x0>;
+};
+
+&cam_cci {
+ /delete-node/ qcom,cam-sensor@1;
+ qcom,cam-sensor@1 {
+ cell-index = <1>;
+ compatible = "qcom,cam-sensor";
+ reg = <0x1>;
+ csiphy-sd-index = <1>;
+ sensor-position-roll = <90>;
+ sensor-position-pitch = <0>;
+ sensor-position-yaw = <180>;
+ eeprom-src = <&eeprom_rear_aux>;
+ cam_vio-supply = <&camera_vio_ldo>;
+ cam_vana-supply = <&camera_vana_ldo>;
+ cam_vdig-supply = <&camera_ldo>;
+ cam_clk-supply = <&titan_top_gdsc>;
+ regulator-names = "cam_vdig", "cam_vio", "cam_vana",
+ "cam_clk";
+ rgltr-cntrl-support;
+ rgltr-min-voltage = <1352000 1800000 2850000 0>;
+ rgltr-max-voltage = <1352000 1800000 2850000 0>;
+ rgltr-load-current = <105000 0 80000 0>;
+ gpio-no-mux = <0>;
+ pinctrl-names = "cam_default", "cam_suspend";
+ pinctrl-0 = <&cam_sensor_mclk0_active
+ &cam_sensor_rear2_active>;
+ pinctrl-1 = <&cam_sensor_mclk0_suspend
+ &cam_sensor_rear2_suspend>;
+ gpios = <&tlmm 13 0>,
+ <&tlmm 28 0>;
+ gpio-reset = <1>;
+ gpio-req-tbl-num = <0 1>;
+ gpio-req-tbl-flags = <1 0>;
+ gpio-req-tbl-label = "CAMIF_MCLK0",
+ "CAM_RESET1";
+ sensor-mode = <0>;
+ cci-master = <1>;
+ status = "ok";
+ clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
+ clock-names = "cam_clk";
+ clock-cntl-level = "turbo";
+ clock-rates = <24000000>;
+ };
+};
diff --git a/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi b/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi
new file mode 100644
index 0000000..bc242b0
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sxr1130-svr.dtsi
@@ -0,0 +1,495 @@
+/* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include "sxr1130-svr-pinctrl-overlay.dtsi"
+#include "sdm670-pmic-overlay.dtsi"
+#include "sdm670-sde-display.dtsi"
+#include "sdm670-camera-sensor-svr.dtsi"
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+
+&qupv3_se10_i2c {
+#include "smb1355.dtsi"
+};
+
+&ufsphy_mem {
+ compatible = "qcom,ufs-phy-qmp-v3";
+
+ vdda-phy-supply = <&pm660l_l1>; /* 0.88v */
+ vdda-pll-supply = <&pm660_l1>; /* 1.2v */
+ vdda-phy-max-microamp = <62900>;
+ vdda-pll-max-microamp = <18300>;
+
+ status = "ok";
+};
+
+&ufshc_mem {
+ vdd-hba-supply = <&ufs_phy_gdsc>;
+ vdd-hba-fixed-regulator;
+ vcc-supply = <&pm660l_l4>;
+ vcc-voltage-level = <2960000 2960000>;
+ vccq2-supply = <&pm660_l8>;
+ vcc-max-microamp = <600000>;
+ vccq2-max-microamp = <600000>;
+
+ qcom,vddp-ref-clk-supply = <&pm660_l1>;
+ qcom,vddp-ref-clk-max-microamp = <100>;
+
+ status = "ok";
+};
+
+&pm660l_switch1 {
+ pinctrl-names = "led_enable", "led_disable";
+ pinctrl-0 = <&flash_led3_front_en>;
+ pinctrl-1 = <&flash_led3_front_dis>;
+};
+
+&qupv3_se9_2uart {
+ status = "disabled";
+};
+
+&qupv3_se12_2uart {
+ status = "ok";
+};
+
+&qupv3_se8_spi {
+ status = "disabled";
+};
+
+&qupv3_se3_i2c {
+ status = "disabled";
+ nq@28 {
+ compatible = "qcom,nq-nci";
+ reg = <0x28>;
+ qcom,nq-irq = <&tlmm 44 0x00>;
+ qcom,nq-ven = <&tlmm 12 0x00>;
+ qcom,nq-firm = <&tlmm 43 0x00>;
+ qcom,nq-clkreq = <&pm660_gpios 4 0x00>;
+ qcom,nq-esepwr = <&tlmm 116 0x00>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <44 0>;
+ interrupt-names = "nfc_irq";
+ pinctrl-names = "nfc_active", "nfc_suspend";
+ pinctrl-0 = <&nfc_int_active
+ &nfc_enable_active
+ &nfc_clk_default>;
+ pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>;
+ };
+};
+
+&qupv3_se9_i2c {
+ status = "ok";
+ tusb1064@10 {
+ compatible = "ti,tusb1064";
+ reg = <0x10>;
+ ti,tiusb-dp-3v3-en = <&tlmm 142 0x00>;
+ };
+
+ vxr7200@39 {
+ compatible = "synaptics,vxr7200";
+ reg = <0x39>;
+ qcom,vxr_3v3_en = <&tlmm 138 0x00>;
+ qcom,led-5v-en-gpio = <&tlmm 134 0x00>;
+ qcom,led-driver-en1-gpio = <&tlmm 110 0x00>;
+ qcom,led-driver-en2-gpio = <&tlmm 111 0x00>;
+ qcom,1p8-en-gpio = <&tlmm 2 0x00>;
+ qcom,switch-power-gpio = <&tlmm 112 0x00>;
+ qcom,selab-gpio = <&tlmm 105 0>;/* Low for DP */
+ qcom,oenab-gpio = <&tlmm 106 0>; /*Low for DP */
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ };
+};
+
+
+&qupv3_se10_i2c {
+ status = "ok";
+};
+
+&qupv3_se6_4uart {
+ status = "ok";
+};
+
+&sdhc_1 {
+ vdd-supply = <&pm660l_l4>;
+ qcom,vdd-voltage-level = <2960000 2960000>;
+ qcom,vdd-current-level = <0 570000>;
+
+ vdd-io-supply = <&pm660_l8>;
+ qcom,vdd-io-always-on;
+ qcom,vdd-io-lpm-sup;
+ qcom,vdd-io-voltage-level = <1800000 1800000>;
+ qcom,vdd-io-current-level = <0 325000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
+ pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
+
+ status = "ok";
+};
+
+&sdhc_2 {
+ vdd-supply = <&pm660l_l5>;
+ qcom,vdd-voltage-level = <2960000 2960000>;
+ qcom,vdd-current-level = <0 800000>;
+
+ vdd-io-supply = <&pm660l_l2>;
+ qcom,vdd-io-voltage-level = <1800000 2960000>;
+ qcom,vdd-io-current-level = <0 22000>;
+
+ pinctrl-names = "active", "sleep";
+ pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;
+ pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;
+
+ cd-gpios = <&tlmm 96 0x1>;
+
+ status = "ok";
+};
+
+&vendor {
+ svr_batterydata: qcom,battery-data {
+ qcom,batt-id-range-pct = <15>;
+ #include "fg-gen3-batterydata-goertek-1400mah.dtsi"
+ };
+};
+
+&pm660_fg {
+ qcom,battery-data = <&svr_batterydata>;
+};
+
+&pm660_charger {
+ qcom,battery-data = <&svr_batterydata>;
+};
+
+&tlmm {
+ smb_int_default: smb_int_default {
+ mux {
+ pins = "gpio54";
+ function = "gpio";
+ };
+ config {
+ pins = "gpio54";
+ drive-strength = <2>;
+ bias-pull-up;
+ input-enable;
+ };
+ };
+};
+
+&smb1355_0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb_int_default
+ &smb_shutdown_default>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <54 IRQ_TYPE_LEVEL_LOW>;
+ smb1355_charger_0: qcom,smb1355-charger@1000 {
+ io-channels = <&pm660_rradc 2>,
+ <&pm660_rradc 12>;
+ io-channel-names = "charger_temp",
+ "charger_temp_max";
+ status ="ok";
+ };
+};
+
+&smb1355_1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&smb_int_default
+ &smb_shutdown_default>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <54 IRQ_TYPE_LEVEL_LOW>;
+ smb1355_charger_1: qcom,smb1355-charger@1000 {
+ io-channels = <&pm660_rradc 2>,
+ <&pm660_rradc 12>;
+ io-channel-names = "charger_temp",
+ "charger_temp_max";
+ status ="ok";
+ };
+};
+
+&soc {
+ gpio_keys {
+ compatible = "gpio-keys";
+ label = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&key_home_default
+ &key_cam_focus_default
+ &key_vol_up_default>;
+
+ home {
+ label = "home"; /* BACK Key*/
+ gpios = <&pm660l_gpios 5 GPIO_ACTIVE_LOW>;
+ linux,input-type = <1>;
+ linux,code = <158>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ linux,can-disable;
+ };
+
+ cam_focus {
+ label = "cam_focus";
+ gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
+ linux,input-type = <1>;
+ linux,code = <528>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ linux,can-disable;
+ };
+
+ vol_up {
+ label = "volume_up";
+ gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
+ linux,input-type = <1>;
+ linux,code = <115>;
+ gpio-key,wakeup;
+ debounce-interval = <15>;
+ linux,can-disable;
+ };
+ };
+
+ qcom,xr-smrtvwr-misc {
+ compatible = "qcom,xr-smrtvwr-misc";
+ };
+
+ rpmh-regulator-ldoa14 {
+ pm660_l14: regulator-pm660-l14 {
+ qcom,init-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+};
+
+
+
+&dsi_dual_xrsmrtvwr_jdi_video {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+ qcom,panel-mode-gpio = <&tlmm 79 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,led-5v-en-gpio = <&tlmm 134 0>;
+ qcom,selab-gpio = <&tlmm 105 0>;/* High for DSI */
+ qcom,oenab-gpio = <&tlmm 106 0>; /*Low for DSI */
+ qcom,1p8-en-gpio = <&tlmm 2 0>;
+ qcom,led-driver-en1-gpio = <&tlmm 110 0>;
+ qcom,led-driver-en2-gpio = <&tlmm 111 0>;
+ qcom,switch-power-gpio = <&tlmm 112 0>;
+};
+
+
+&dsi_dual_nt35597_truly_video {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_dual_nt35597_truly_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_nt35597_truly_dsc_video {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_nt35597_truly_dsc_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_sim_vid {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 90 0>;
+};
+
+&dsi_dual_sim_vid {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_sim_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_dual_sim_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_sim_dsc_375_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_dual_sim_dsc_375_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_dual_nt35597_video {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_dual_nt35597_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "dual_port";
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_rm67195_amoled_fhd_cmd {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply_labibb_amoled>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_nt35695b_truly_fhd_video {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+};
+
+&dsi_nt35695b_truly_fhd_cmd {
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+};
+
+&dsi_hx8399_truly_cmd {
+ qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
+ qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_wled";
+ qcom,mdss-dsi-bl-min-level = <1>;
+ qcom,mdss-dsi-bl-max-level = <4095>;
+ qcom,platform-reset-gpio = <&tlmm 75 0>;
+ qcom,platform-te-gpio = <&tlmm 10 0>;
+ qcom,panel-mode-gpio = <&tlmm 76 0>;
+ qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
+};
+
+&pm660l_wled {
+ status = "okay";
+ qcom,led-strings-list = [01 02];
+};
+
+&mdss_mdp {
+ #cooling-cells = <2>;
+};
+
+&thermal_zones {
+ xo-therm-step {
+ status = "disabled";
+ };
+};
+
+&tavil_snd {
+ qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>;
+ qcom,audio-routing =
+ "AIF4 VI", "MCLK",
+ "RX_BIAS", "MCLK",
+ "MADINPUT", "MCLK",
+ "hifi amp", "LINEOUT1",
+ "hifi amp", "LINEOUT2",
+ "AMIC2", "MIC BIAS2",
+ "MIC BIAS2", "Headset Mic",
+ "AMIC3", "MIC BIAS2",
+ "MIC BIAS2", "ANCRight Headset Mic",
+ "AMIC4", "MIC BIAS2",
+ "MIC BIAS2", "ANCLeft Headset Mic",
+ "AMIC5", "MIC BIAS3",
+ "MIC BIAS3", "Handset Mic",
+ "DMIC0", "MIC BIAS1",
+ "MIC BIAS1", "Digital Mic0",
+ "DMIC1", "MIC BIAS1",
+ "MIC BIAS1", "Digital Mic1",
+ "DMIC2", "MIC BIAS4",
+ "MIC BIAS4", "Digital Mic2",
+ "DMIC3", "MIC BIAS4",
+ "MIC BIAS4", "Digital Mic3",
+ "DMIC4", "MIC BIAS3",
+ "MIC BIAS3", "Digital Mic4",
+ "DMIC5", "MIC BIAS3",
+ "MIC BIAS3", "Digital Mic5",
+ "SpkrLeft IN", "SPK1 OUT",
+ "SpkrRight IN", "SPK2 OUT";
+ qcom,msm-mbhc-hphl-swh = <1>;
+ qcom,msm-mbhc-gnd-swh = <1>;
+ qcom,hph-en0-gpio = <&tavil_hph_en0>;
+ qcom,hph-en1-gpio = <&tavil_hph_en1>;
+ qcom,msm-mclk-freq = <9600000>;
+ asoc-codec = <&stub_codec>, <&ext_disp_audio_codec>;
+ asoc-codec-names = "msm-stub-codec.1", "msm-ext-disp-audio-codec-rx";
+ qcom,wsa-max-devs = <2>;
+ qcom,wsa-devs = <&wsa881x_0211>, <&wsa881x_0212>,
+ <&wsa881x_0213>, <&wsa881x_0214>;
+ qcom,wsa-aux-dev-prefix = "SpkrLeft", "SpkrRight",
+ "SpkrLeft", "SpkrRight";
+};
+
+&wcd_rst_gpio {
+ status = "ok";
+ pinctrl-0 = <&cdc_xr_reset_active>;
+ pinctrl-1 = <&cdc_xr_reset_sleep>;
+};
+
+&dsi_dual_xrsmrtvwr_jdi_video_display {
+ qcom,dsi-display-active;
+};
+
+&pm660_charger {
+ qcom,ufp-only-mode;
+};
diff --git a/drivers/bus/mhi/core/mhi_internal.h b/drivers/bus/mhi/core/mhi_internal.h
index d0bc74b..a2a4359 100644
--- a/drivers/bus/mhi/core/mhi_internal.h
+++ b/drivers/bus/mhi/core/mhi_internal.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -879,22 +879,9 @@
irqreturn_t mhi_intvec_handlr(int irq_number, void *dev);
void mhi_ev_task(unsigned long data);
-#ifdef CONFIG_MHI_DEBUG
-
-#define MHI_ASSERT(cond, msg) do { \
+#define MHI_ASSERT(cond, fmt, ...) do { \
if (cond) \
- panic(msg); \
+ panic(fmt); \
} while (0)
-#else
-
-#define MHI_ASSERT(cond, msg) do { \
- if (cond) { \
- MHI_ERR(msg); \
- WARN_ON(cond); \
- } \
-} while (0)
-
-#endif
-
#endif /* _MHI_INT_H */
diff --git a/drivers/bus/mhi/core/mhi_main.c b/drivers/bus/mhi/core/mhi_main.c
index 7404b8e..82a5081 100644
--- a/drivers/bus/mhi/core/mhi_main.c
+++ b/drivers/bus/mhi/core/mhi_main.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -961,7 +961,8 @@
mhi_cntrl->unmap_single(mhi_cntrl, buf_info);
result.buf_addr = buf_info->cb_buf;
- result.bytes_xferd = xfer_len;
+ result.bytes_xferd = min_t(u16, xfer_len,
+ buf_info->len);
mhi_del_ring_element(mhi_cntrl, buf_ring);
mhi_del_ring_element(mhi_cntrl, tre_ring);
local_rp = tre_ring->rp;
@@ -1110,6 +1111,10 @@
complete(&mhi_tsync->completion);
} else {
chan = MHI_TRE_GET_CMD_CHID(cmd_pkt);
+ if (chan >= mhi_cntrl->max_chan) {
+ MHI_ERR("invalid channel id %u\n", chan);
+ break;
+ }
mhi_chan = &mhi_cntrl->mhi_chan[chan];
write_lock_bh(&mhi_chan->lock);
mhi_chan->ccs = MHI_TRE_GET_EV_CODE(tre);
diff --git a/drivers/gpu/msm/adreno_snapshot.c b/drivers/gpu/msm/adreno_snapshot.c
index 1b43282..1783691 100644
--- a/drivers/gpu/msm/adreno_snapshot.c
+++ b/drivers/gpu/msm/adreno_snapshot.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2019 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -910,17 +910,34 @@
* The problem is that IB size from the register is the unprocessed size
* of the buffer not the original size, so if we didn't catch this
* buffer being directly used in the RB, then we might not be able to
- * dump the whole thing. Print a warning message so we can try to
+ * dump the whole thing. Try to dump the maximum possible size from the
+ * IB1 base address till the end of memdesc size so that we dont miss
+ * what we are interested in. Print a warning message so we can try to
* figure how often this really happens.
*/
if (-ENOENT == find_object(snapshot->ib1base, snapshot->process) &&
snapshot->ib1size) {
- kgsl_snapshot_push_object(snapshot->process, snapshot->ib1base,
- snapshot->ib1size);
- KGSL_CORE_ERR(
- "CP_IB1_BASE not found in the ringbuffer.Dumping %x dwords of the buffer.\n",
- snapshot->ib1size);
+ struct kgsl_mem_entry *entry;
+ u64 ibsize;
+
+ entry = kgsl_sharedmem_find(snapshot->process,
+ snapshot->ib1base);
+ if (entry == NULL) {
+ KGSL_CORE_ERR(
+ "Can't find a memory entry containing IB1BASE %16llx\n",
+ snapshot->ib1base);
+ } else {
+ ibsize = entry->memdesc.size -
+ (snapshot->ib1base - entry->memdesc.gpuaddr);
+ kgsl_mem_entry_put(entry);
+
+ kgsl_snapshot_push_object(snapshot->process,
+ snapshot->ib1base, ibsize >> 2);
+ KGSL_CORE_ERR(
+ "CP_IB1_BASE is not found in the ringbuffer. Dumping %llx dwords of the buffer\n",
+ ibsize >> 2);
+ }
}
/*
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
index 9971fcd..8f3b264 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
@@ -398,7 +398,7 @@
/* bit[12], Low-power state behavior override bit */
if ((config->mode & ETM_MODE_LPOVERRIDE) &&
- (drvdata->lpoverride == true))
+ (drvdata->lpoverride == true) && !drvdata->tupwr_disable)
config->eventctrl1 |= BIT(12);
else
config->eventctrl1 &= ~BIT(12);
diff --git a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
index 0634c0f..c65b78a 100644
--- a/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
+++ b/drivers/media/platform/msm/camera_v2/isp/msm_isp_stats_util.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -550,10 +550,10 @@
stream_info->buffer_offset[i] = stream_info->buffer_offset[k];
}
+ stream_info->num_isp--;
stream_info->vfe_dev[stream_info->num_isp] = NULL;
stream_info->stream_handle[stream_info->num_isp] = 0;
stream_info->buffer_offset[stream_info->num_isp] = 0;
- stream_info->num_isp--;
stream_info->vfe_mask &= ~(1 << vfe_dev->pdev->id);
if (stream_info->num_isp == 0)
stream_info->state = STATS_AVAILABLE;
diff --git a/drivers/media/platform/msm/vidc/venus_hfi.c b/drivers/media/platform/msm/vidc/venus_hfi.c
index 4b51846..5c0419d 100644
--- a/drivers/media/platform/msm/vidc/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc/venus_hfi.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -2893,23 +2893,22 @@
return rc;
}
-static void __process_sys_error(struct venus_hfi_device *device)
+static void print_sfr_message(struct venus_hfi_device *device)
{
struct hfi_sfr_struct *vsfr = NULL;
+ u32 vsfr_size = 0;
+ void *p = NULL;
if (__halt_axi(device))
dprintk(VIDC_WARN, "Failed to halt AXI after SYS_ERROR\n");
vsfr = (struct hfi_sfr_struct *)device->sfr.align_virtual_addr;
if (vsfr) {
- void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
- /*
- * SFR isn't guaranteed to be NULL terminated
- * since SYS_ERROR indicates that Venus is in the
- * process of crashing.
- */
+ vsfr_size = vsfr->bufSize - sizeof(u32);
+ p = memchr(vsfr->rg_data, '\0', vsfr_size);
+ /* SFR isn't guaranteed to be NULL terminated */
if (p == NULL)
- vsfr->rg_data[vsfr->bufSize - 1] = '\0';
+ vsfr->rg_data[vsfr_size - 1] = '\0';
dprintk(VIDC_ERR, "SFR Message from FW: %s\n",
vsfr->rg_data);
@@ -3051,8 +3050,6 @@
}
if (device->intr_status & VIDC_WRAPPER_INTR_CLEAR_A2HWD_BMSK) {
- struct hfi_sfr_struct *vsfr = (struct hfi_sfr_struct *)
- device->sfr.align_virtual_addr;
struct msm_vidc_cb_info info = {
.response_type = HAL_SYS_WATCHDOG_TIMEOUT,
.response.cmd = {
@@ -3060,9 +3057,7 @@
}
};
- if (vsfr)
- dprintk(VIDC_ERR, "SFR Message from FW: %s\n",
- vsfr->rg_data);
+ print_sfr_message(device);
dprintk(VIDC_ERR, "Received watchdog timeout\n");
packets[packet_count++] = info;
@@ -3088,7 +3083,7 @@
/* Process the packet types that we're interested in */
switch (info->response_type) {
case HAL_SYS_ERROR:
- __process_sys_error(device);
+ print_sfr_message(device);
break;
case HAL_SYS_RELEASE_RESOURCE_DONE:
dprintk(VIDC_DBG, "Received SYS_RELEASE_RESOURCE\n");
diff --git a/drivers/media/platform/msm/vidc_3x/venus_hfi.c b/drivers/media/platform/msm/vidc_3x/venus_hfi.c
index 550e060..2cb7e31 100644
--- a/drivers/media/platform/msm/vidc_3x/venus_hfi.c
+++ b/drivers/media/platform/msm/vidc_3x/venus_hfi.c
@@ -1,4 +1,5 @@
-/* Copyright (c) 2012-2016, 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2016, 2018-2020, The Linux Foundation.
+ * All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -3306,9 +3307,11 @@
dprintk(VIDC_ERR, "VIDC_CPU_CS_SCIACMDARG0: 0x%x\n", reg);
}
-static void __process_sys_error(struct venus_hfi_device *device)
+static void print_sfr_message(struct venus_hfi_device *device)
{
struct hfi_sfr_struct *vsfr = NULL;
+ u32 vsfr_size = 0;
+ void *p = NULL;
/* Once SYS_ERROR received from HW, it is safe to halt the AXI.
* With SYS_ERROR, Venus FW may have crashed and HW might be
@@ -3320,13 +3323,11 @@
vsfr = (struct hfi_sfr_struct *)device->sfr.align_virtual_addr;
if (vsfr) {
- void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
- /* SFR isn't guaranteed to be NULL terminated
- * since SYS_ERROR indicates that Venus is in the
- * process of crashing.
- */
+ vsfr_size = vsfr->bufSize - sizeof(u32);
+ p = memchr(vsfr->rg_data, '\0', vsfr_size);
+ /* SFR isn't guaranteed to be NULL terminated */
if (p == NULL)
- vsfr->rg_data[vsfr->bufSize - 1] = '\0';
+ vsfr->rg_data[vsfr_size - 1] = '\0';
dprintk(VIDC_ERR, "SFR Message from FW: %s\n",
vsfr->rg_data);
@@ -3440,8 +3441,6 @@
}
if (device->intr_status & VIDC_WRAPPER_INTR_CLEAR_A2HWD_BMSK) {
- struct hfi_sfr_struct *vsfr = (struct hfi_sfr_struct *)
- device->sfr.align_virtual_addr;
struct msm_vidc_cb_info info = {
.response_type = HAL_SYS_WATCHDOG_TIMEOUT,
.response.cmd = {
@@ -3449,9 +3448,7 @@
}
};
- if (vsfr)
- dprintk(VIDC_ERR, "SFR Message from FW: %s\n",
- vsfr->rg_data);
+ print_sfr_message(device);
__dump_venus_debug_registers(device);
dprintk(VIDC_ERR, "Received watchdog timeout\n");
@@ -3479,7 +3476,7 @@
switch (info->response_type) {
case HAL_SYS_ERROR:
__dump_venus_debug_registers(device);
- __process_sys_error(device);
+ print_sfr_message(device);
break;
case HAL_SYS_RELEASE_RESOURCE_DONE:
dprintk(VIDC_DBG, "Received SYS_RELEASE_RESOURCE\n");
diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
index c84c2d0..d08cf0b 100644
--- a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
+++ b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, 2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -1231,7 +1231,8 @@
if (!stop_in_proc)
goto exit;
- if (remove_delay && ep->ep_delay_set == true) {
+ /* Remove delay only if stop channel success*/
+ if (remove_delay && ep->ep_delay_set == true && !stop_in_proc) {
memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
ep_cfg_ctrl.ipa_ep_delay = false;
result = ipa3_cfg_ep_ctrl(clnt_hdl,
@@ -1312,7 +1313,7 @@
if (should_force_clear)
ipa3_disable_force_clear(qmi_req_id);
exit:
- if (remove_delay && ep->ep_delay_set == true) {
+ if (remove_delay && ep->ep_delay_set == true && !stop_in_proc) {
memset(&ep_cfg_ctrl, 0, sizeof(struct ipa_ep_cfg_ctrl));
ep_cfg_ctrl.ipa_ep_delay = false;
result = ipa3_cfg_ep_ctrl(clnt_hdl,
diff --git a/drivers/platform/msm/mhi_dev/mhi.c b/drivers/platform/msm/mhi_dev/mhi.c
index 905f13a..f1134f8 100644
--- a/drivers/platform/msm/mhi_dev/mhi.c
+++ b/drivers/platform/msm/mhi_dev/mhi.c
@@ -63,6 +63,10 @@
#define TR_RING_ELEMENT_SZ sizeof(struct mhi_dev_transfer_ring_element)
#define RING_ELEMENT_TYPE_SZ sizeof(union mhi_dev_ring_element_type)
+#define MHI_DEV_CH_CLOSE_TIMEOUT_MIN 5000
+#define MHI_DEV_CH_CLOSE_TIMEOUT_MAX 5100
+#define MHI_DEV_CH_CLOSE_TIMEOUT_COUNT 30
+
uint32_t bhi_imgtxdb;
enum mhi_msg_level mhi_msg_lvl = MHI_MSG_ERROR;
enum mhi_msg_level mhi_ipc_msg_lvl = MHI_MSG_VERBOSE;
@@ -913,7 +917,7 @@
return 0;
} else if (mhi->ch_ctx_cache[ch_id].ch_type ==
MHI_DEV_CH_TYPE_INBOUND_CHANNEL &&
- mhi->ch[ch_id].wr_request_active) {
+ (mhi->ch[ch_id].pend_wr_count > 0)) {
mhi_log(MHI_MSG_INFO, "Pending inbound transaction\n");
return 0;
}
@@ -1453,9 +1457,23 @@
rd_offset = req->rd_offset;
ch->curr_ereq->context = ch;
+ if (mhi->ch_ctx_cache[ch->ch_id].ch_type ==
+ MHI_DEV_CH_TYPE_INBOUND_CHANNEL)
+ ch->pend_wr_count--;
+
dma_unmap_single(&mhi_ctx->pdev->dev, req->dma,
req->len, DMA_FROM_DEVICE);
+ /*
+ * Channel got closed with transfers pending
+ * Do not trigger callback or send cmpl to host
+ */
+ if (ch->state == MHI_DEV_CH_CLOSED) {
+ mhi_log(MHI_MSG_DBG, "Ch %d closed with %d writes pending\n",
+ ch->ch_id, ch->pend_wr_count + 1);
+ return;
+ }
+
/* Trigger client call back */
req->client_cb(req);
@@ -2009,18 +2027,49 @@
}
EXPORT_SYMBOL(mhi_dev_channel_isempty);
+bool mhi_dev_channel_has_pending_write(struct mhi_dev_client *handle)
+{
+ struct mhi_dev_channel *ch;
+
+ if (!handle) {
+ mhi_log(MHI_MSG_ERROR, "Invalid channel access\n");
+ return -EINVAL;
+ }
+
+ ch = handle->channel;
+ if (!ch)
+ return -EINVAL;
+
+ return ch->pend_wr_count ? true : false;
+}
+EXPORT_SYMBOL(mhi_dev_channel_has_pending_write);
+
int mhi_dev_close_channel(struct mhi_dev_client *handle)
{
struct mhi_dev_channel *ch;
+ int count = 0;
int rc = 0;
ch = handle->channel;
+ do {
+ if (ch->pend_wr_count) {
+ usleep_range(MHI_DEV_CH_CLOSE_TIMEOUT_MIN,
+ MHI_DEV_CH_CLOSE_TIMEOUT_MAX);
+ } else
+ break;
+ } while (++count < MHI_DEV_CH_CLOSE_TIMEOUT_COUNT);
+
mutex_lock(&ch->ch_lock);
+
+ if (ch->pend_wr_count)
+ mhi_log(MHI_MSG_ERROR, "%d writes pending for channel %d\n",
+ ch->pend_wr_count, ch->ch_id);
+
if (ch->state != MHI_DEV_CH_PENDING_START) {
- if (ch->ch_type == MHI_DEV_CH_TYPE_OUTBOUND_CHANNEL &&
- !mhi_dev_channel_isempty(handle)) {
- mhi_log(MHI_MSG_ERROR,
+ if ((ch->ch_type == MHI_DEV_CH_TYPE_OUTBOUND_CHANNEL &&
+ !mhi_dev_channel_isempty(handle)) || ch->tre_loc) {
+ mhi_log(MHI_MSG_DBG,
"Trying to close an active channel (%d)\n",
ch->ch_id);
rc = -EAGAIN;
@@ -2237,6 +2286,7 @@
size_t bytes_to_write = 0;
size_t bytes_written = 0;
uint32_t tre_len = 0, suspend_wait_timeout = 0;
+ bool async_wr_sched = false;
if (!wreq || !wreq->client || !wreq->buf) {
pr_err("%s: invalid parameters\n", __func__);
@@ -2280,12 +2330,12 @@
handle_client = wreq->client;
ch = handle_client->channel;
- ch->wr_request_active = true;
ring = ch->ring;
mutex_lock(&ch->ch_lock);
+ ch->pend_wr_count++;
if (ch->state == MHI_DEV_CH_STOPPED) {
mhi_log(MHI_MSG_ERROR,
"channel %d already stopped\n", wreq->chan);
@@ -2336,7 +2386,8 @@
"Error while writing chan (%d) rc %d\n",
wreq->chan, rc);
goto exit;
- }
+ } else if (wreq->mode == DMA_ASYNC)
+ async_wr_sched = true;
bytes_written += bytes_to_write;
usr_buf_remaining -= bytes_to_write;
@@ -2376,7 +2427,8 @@
}
}
exit:
- ch->wr_request_active = false;
+ if (wreq->mode == DMA_SYNC || !async_wr_sched)
+ ch->pend_wr_count--;
mutex_unlock(&ch->ch_lock);
mutex_unlock(&mhi_ctx->mhi_write_test);
return bytes_written;
diff --git a/drivers/platform/msm/mhi_dev/mhi.h b/drivers/platform/msm/mhi_dev/mhi.h
index 4b6af8f..8f7a8e3 100644
--- a/drivers/platform/msm/mhi_dev/mhi.h
+++ b/drivers/platform/msm/mhi_dev/mhi.h
@@ -461,7 +461,7 @@
uint32_t tre_bytes_left;
/* td size being read/written from/to so far */
uint32_t td_size;
- bool wr_request_active;
+ uint32_t pend_wr_count;
bool skip_td;
};
diff --git a/drivers/platform/msm/mhi_dev/mhi_uci.c b/drivers/platform/msm/mhi_dev/mhi_uci.c
index d045d59..e3221e3 100644
--- a/drivers/platform/msm/mhi_dev/mhi_uci.c
+++ b/drivers/platform/msm/mhi_dev/mhi_uci.c
@@ -47,6 +47,10 @@
#define MHI_UCI_AT_CTRL_READ_TIMEOUT msecs_to_jiffies(1000)
#define MHI_UCI_WRITE_REQ_AVAIL_TIMEOUT msecs_to_jiffies(1000)
+#define MHI_UCI_RELEASE_TIMEOUT_MIN 5000
+#define MHI_UCI_RELEASE_TIMEOUT_MAX 5100
+#define MHI_UCI_RELEASE_TIMEOUT_COUNT 30
+
enum uci_dbg_level {
UCI_DBG_VERBOSE = 0x0,
UCI_DBG_INFO = 0x1,
@@ -907,41 +911,56 @@
struct file *file_handle)
{
struct uci_client *uci_handle = file_handle->private_data;
- int rc = 0;
+ int count = 0;
if (!uci_handle)
return -EINVAL;
- if (atomic_sub_return(1, &uci_handle->ref_count) == 0) {
- uci_log(UCI_DBG_DBG,
- "Last client left, closing channel 0x%x\n",
- iminor(mhi_inode));
- if (atomic_read(&uci_handle->mhi_chans_open)) {
- atomic_set(&uci_handle->mhi_chans_open, 0);
-
- if (!(uci_handle->f_flags & O_SYNC))
- kfree(uci_handle->wreqs);
- mutex_lock(&uci_handle->out_chan_lock);
- rc = mhi_dev_close_channel(uci_handle->out_handle);
- wake_up(&uci_handle->write_wq);
- mutex_unlock(&uci_handle->out_chan_lock);
-
- mutex_lock(&uci_handle->in_chan_lock);
- rc = mhi_dev_close_channel(uci_handle->in_handle);
- wake_up(&uci_handle->read_wq);
- mutex_unlock(&uci_handle->in_chan_lock);
-
- }
- atomic_set(&uci_handle->read_data_ready, 0);
- atomic_set(&uci_handle->write_data_ready, 0);
- file_handle->private_data = NULL;
- } else {
- uci_log(UCI_DBG_DBG,
- "Client close chan %d, ref count 0x%x\n",
+ if (atomic_sub_return(1, &uci_handle->ref_count)) {
+ uci_log(UCI_DBG_DBG, "Client close chan %d, ref count 0x%x\n",
iminor(mhi_inode),
atomic_read(&uci_handle->ref_count));
+ return 0;
}
- return rc;
+
+ uci_log(UCI_DBG_DBG,
+ "Last client left, closing channel 0x%x\n",
+ iminor(mhi_inode));
+
+ do {
+ if (mhi_dev_channel_has_pending_write(uci_handle->out_handle))
+ usleep_range(MHI_UCI_RELEASE_TIMEOUT_MIN,
+ MHI_UCI_RELEASE_TIMEOUT_MAX);
+ else
+ break;
+ } while (++count < MHI_UCI_RELEASE_TIMEOUT_COUNT);
+
+ if (count == MHI_UCI_RELEASE_TIMEOUT_COUNT) {
+ uci_log(UCI_DBG_DBG, "Channel %d has pending writes\n",
+ iminor(mhi_inode));
+ }
+
+ if (atomic_read(&uci_handle->mhi_chans_open)) {
+ atomic_set(&uci_handle->mhi_chans_open, 0);
+
+ if (!(uci_handle->f_flags & O_SYNC))
+ kfree(uci_handle->wreqs);
+ mutex_lock(&uci_handle->out_chan_lock);
+ mhi_dev_close_channel(uci_handle->out_handle);
+ wake_up(&uci_handle->write_wq);
+ mutex_unlock(&uci_handle->out_chan_lock);
+
+ mutex_lock(&uci_handle->in_chan_lock);
+ mhi_dev_close_channel(uci_handle->in_handle);
+ wake_up(&uci_handle->read_wq);
+ mutex_unlock(&uci_handle->in_chan_lock);
+ }
+
+ atomic_set(&uci_handle->read_data_ready, 0);
+ atomic_set(&uci_handle->write_data_ready, 0);
+ file_handle->private_data = NULL;
+
+ return 0;
}
static void mhi_parse_state(char *buf, int *nbytes, uint32_t info)
diff --git a/drivers/power/supply/qcom/qpnp-smb2.c b/drivers/power/supply/qcom/qpnp-smb2.c
index 049ee44..bf1c192 100644
--- a/drivers/power/supply/qcom/qpnp-smb2.c
+++ b/drivers/power/supply/qcom/qpnp-smb2.c
@@ -344,6 +344,9 @@
chg->fcc_stepper_enable = of_property_read_bool(node,
"qcom,fcc-stepping-enable");
+ chg->ufp_only_mode = of_property_read_bool(node,
+ "qcom,ufp-only-mode");
+
return 0;
}
@@ -1896,6 +1899,7 @@
{
struct smb_charger *chg = &chip->chg;
int rc;
+ u8 stat;
/* In case the usb path is suspended, we would have missed disabling
* the icl change interrupt because the interrupt could have been
@@ -1903,13 +1907,36 @@
*/
rerun_election(chg->usb_icl_votable);
- /* configure power role for dual-role */
- rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
- TYPEC_POWER_ROLE_CMD_MASK, 0);
- if (rc < 0) {
- dev_err(chg->dev,
- "Couldn't configure power role for DRP rc=%d\n", rc);
- return rc;
+ /* Force charger in Sink Only mode */
+ if (chg->ufp_only_mode) {
+ rc = smblib_read(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ &stat);
+ if (rc < 0) {
+ dev_err(chg->dev,
+ "Couldn't read SOFTWARE_CTRL_REG rc=%d\n", rc);
+ return rc;
+ }
+
+ if (!(stat & UFP_EN_CMD_BIT)) {
+ /* configure charger in UFP only mode */
+ rc = smblib_force_ufp(chg);
+ if (rc < 0) {
+ dev_err(chg->dev,
+ "Couldn't force UFP mode rc=%d\n", rc);
+ return rc;
+ }
+ }
+ } else {
+ /* configure power role for dual-role */
+ rc = smblib_masked_write(chg,
+ TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ TYPEC_POWER_ROLE_CMD_MASK, 0);
+ if (rc < 0) {
+ dev_err(chg->dev,
+ "Couldn't configure power role for DRP rc=%d\n",
+ rc);
+ return rc;
+ }
}
rerun_election(chg->usb_irq_enable_votable);
@@ -2574,8 +2601,9 @@
/* disable all interrupts */
smb2_disable_interrupts(chg);
- /* configure power role for UFP */
- smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ if (!chg->ufp_only_mode)
+ /* configure power role for UFP */
+ smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
TYPEC_POWER_ROLE_CMD_MASK, UFP_EN_CMD_BIT);
/* force HVDCP to 5V */
diff --git a/drivers/power/supply/qcom/smb-lib.c b/drivers/power/supply/qcom/smb-lib.c
index 391813e..52c7eeb 100644
--- a/drivers/power/supply/qcom/smb-lib.c
+++ b/drivers/power/supply/qcom/smb-lib.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
+/* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -506,6 +506,43 @@
/********************
* HELPER FUNCTIONS *
********************/
+
+int smblib_force_ufp(struct smb_charger *chg)
+{
+ int rc;
+
+ /* force FSM in IDLE state */
+ rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ TYPEC_DISABLE_CMD_BIT, TYPEC_DISABLE_CMD_BIT);
+ if (rc < 0) {
+ smblib_err(chg, "Couldn't put FSM in idle rc=%d\n", rc);
+ return rc;
+ }
+
+ /* wait for FSM to enter idle state */
+ msleep(200);
+
+ rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ VCONN_EN_VALUE_BIT | UFP_EN_CMD_BIT, UFP_EN_CMD_BIT);
+ if (rc < 0) {
+ smblib_err(chg, "Couldn't force UFP mode rc=%d\n", rc);
+ return rc;
+ }
+
+ /* wait for mode change before enabling FSM */
+ usleep_range(10000, 11000);
+
+ /* release FSM from idle state */
+ rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
+ TYPEC_DISABLE_CMD_BIT, 0);
+ if (rc < 0) {
+ smblib_err(chg, "Couldn't release FSM from idle rc=%d\n", rc);
+ return rc;
+ }
+
+ return 0;
+}
+
static int smblib_request_dpdm(struct smb_charger *chg, bool enable)
{
int rc = 0;
@@ -1124,6 +1161,11 @@
return -EINVAL;
}
+ if (power_role != TYPEC_DISABLE_CMD_BIT) {
+ if (chg->ufp_only_mode)
+ power_role = UFP_EN_CMD_BIT;
+ }
+
if (chg->wa_flags & TYPEC_PBS_WA_BIT) {
if (power_role == UFP_EN_CMD_BIT) {
/* disable PBS workaround when forcing sink mode */
@@ -1143,7 +1185,7 @@
}
rc = smblib_masked_write(chg, TYPE_C_INTRPT_ENB_SOFTWARE_CTRL_REG,
- TYPEC_POWER_ROLE_CMD_MASK, power_role);
+ TYPEC_POWER_ROLE_CMD_MASK, power_role);
if (rc < 0) {
smblib_err(chg, "Couldn't write 0x%02x to TYPE_C_INTRPT_ENB_SOFTWARE_CTRL rc=%d\n",
power_role, rc);
@@ -5271,6 +5313,8 @@
rc = PTR_ERR(chg->disable_power_role_switch);
return rc;
}
+ vote(chg->disable_power_role_switch, DEFAULT_VOTER,
+ chg->ufp_only_mode, 0);
return rc;
}
diff --git a/drivers/power/supply/qcom/smb-lib.h b/drivers/power/supply/qcom/smb-lib.h
index 490bb38..ea8729e 100644
--- a/drivers/power/supply/qcom/smb-lib.h
+++ b/drivers/power/supply/qcom/smb-lib.h
@@ -359,6 +359,7 @@
bool disable_stat_sw_override;
bool in_chg_lock;
bool fcc_stepper_enable;
+ bool ufp_only_mode;
/* workaround flag */
u32 wa_flags;
@@ -552,6 +553,7 @@
int smblib_stat_sw_override_cfg(struct smb_charger *chg, bool override);
void smblib_usb_typec_change(struct smb_charger *chg);
int smblib_toggle_stat(struct smb_charger *chg, int reset);
+int smblib_force_ufp(struct smb_charger *chg);
int smblib_init(struct smb_charger *chg);
int smblib_deinit(struct smb_charger *chg);
diff --git a/drivers/soc/qcom/bg_rsb.c b/drivers/soc/qcom/bg_rsb.c
index c35e385..c0ed484 100644
--- a/drivers/soc/qcom/bg_rsb.c
+++ b/drivers/soc/qcom/bg_rsb.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2019,2020 The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -26,6 +26,9 @@
#include <linux/delay.h>
#include <linux/wait.h>
#include <linux/sched.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
#include <linux/regulator/consumer.h>
#include <soc/qcom/subsystem_restart.h>
#include <soc/qcom/subsystem_notif.h>
@@ -59,10 +62,10 @@
};
enum ldo_task {
- BGRSB_ENABLE_LDO11,
- BGRSB_ENABLE_LDO15,
- BGRSB_DISABLE_LDO11,
- BGRSB_DISABLE_LDO15,
+ BGRSB_HW_TURN_ON,
+ BGRSB_ENABLE_WHEEL_EVENTS,
+ BGRSB_HW_TURN_OFF,
+ BGRSB_DISABLE_WHEEL_EVENTS,
BGRSB_NO_ACTION
};
@@ -145,6 +148,8 @@
static void *bgrsb_drv;
static int bgrsb_enable(struct bgrsb_priv *dev, bool enable);
static bool is_in_twm;
+static int msmrsb_gpio;
+static bool rsb_use_msm_gpio;
int bgrsb_send_input(struct event *evnt)
{
@@ -349,9 +354,10 @@
static int bgrsb_ldo_work(struct bgrsb_priv *dev, enum ldo_task ldo_action)
{
int ret = 0;
+ bool value;
switch (ldo_action) {
- case BGRSB_ENABLE_LDO11:
+ case BGRSB_HW_TURN_ON:
ret = regulator_set_voltage(dev->rgltr.regldo11,
BGRSB_LDO11_VTG_MIN_UV, BGRSB_LDO11_VTG_MAX_UV);
if (ret) {
@@ -365,20 +371,39 @@
}
break;
- case BGRSB_ENABLE_LDO15:
- ret = regulator_set_voltage(dev->rgltr.regldo15,
+ case BGRSB_ENABLE_WHEEL_EVENTS:
+ if (rsb_use_msm_gpio == true) {
+ if (!gpio_is_valid(msmrsb_gpio)) {
+ pr_err("gpio %d is not valid\n", msmrsb_gpio);
+ return -ENXIO;
+ }
+
+ /* Sleep 50ms for h/w to detect signal */
+ msleep(50);
+
+ gpio_set_value(msmrsb_gpio, 1);
+ value = gpio_get_value(msmrsb_gpio);
+ if (value == true)
+ pr_debug("gpio %d set properly\n", msmrsb_gpio);
+ else {
+ pr_err("gpio %d set failed\n", msmrsb_gpio);
+ return -ENXIO;
+ }
+ } else {
+ ret = regulator_set_voltage(dev->rgltr.regldo15,
BGRSB_LDO15_VTG_MIN_UV, BGRSB_LDO15_VTG_MAX_UV);
- if (ret) {
- pr_err("Failed to request LDO-15 voltage.\n");
- goto err_ret;
- }
- ret = regulator_enable(dev->rgltr.regldo15);
- if (ret) {
- pr_err("Failed to enable LDO-15 %d\n", ret);
- goto err_ret;
+ if (ret) {
+ pr_err("Failed to request LDO-15 voltage.\n");
+ goto err_ret;
+ }
+ ret = regulator_enable(dev->rgltr.regldo15);
+ if (ret) {
+ pr_err("Failed to enable LDO-15 %d\n", ret);
+ goto err_ret;
+ }
}
break;
- case BGRSB_DISABLE_LDO11:
+ case BGRSB_HW_TURN_OFF:
ret = regulator_disable(dev->rgltr.regldo11);
if (ret) {
pr_err("Failed to disable LDO-11 %d\n", ret);
@@ -386,13 +411,23 @@
}
break;
- case BGRSB_DISABLE_LDO15:
+ case BGRSB_DISABLE_WHEEL_EVENTS:
+ if (rsb_use_msm_gpio == true) {
+ if (!gpio_is_valid(msmrsb_gpio)) {
+ pr_err("gpio %d is not valid\n", msmrsb_gpio);
+ return -ENXIO;
+ }
+ /* Sleep 50ms for h/w to detect signal */
+ msleep(50);
+ gpio_set_value(msmrsb_gpio, 0);
+ } else {
ret = regulator_disable(dev->rgltr.regldo15);
- if (ret) {
- pr_err("Failed to disable LDO-15 %d\n", ret);
- goto err_ret;
+ if (ret) {
+ pr_err("Failed to disable LDO-15 %d\n", ret);
+ goto err_ret;
+ }
+ regulator_set_load(dev->rgltr.regldo15, 0);
}
- regulator_set_load(dev->rgltr.regldo15, 0);
break;
default:
ret = -EINVAL;
@@ -410,14 +445,14 @@
mutex_lock(&dev->rsb_state_mutex);
if (dev->bgrsb_current_state == BGRSB_STATE_RSB_ENABLED) {
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO15) == 0)
+ if (bgrsb_ldo_work(dev, BGRSB_DISABLE_WHEEL_EVENTS) == 0)
dev->bgrsb_current_state = BGRSB_STATE_RSB_CONFIGURED;
else
pr_err("Failed to unvote LDO-15 on BG down\n");
}
if (dev->bgrsb_current_state == BGRSB_STATE_RSB_CONFIGURED) {
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO11) == 0)
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_OFF) == 0)
dev->bgrsb_current_state = BGRSB_STATE_INIT;
else
pr_err("Failed to unvote LDO-11 on BG down\n");
@@ -451,7 +486,7 @@
goto unlock;
}
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO15) != 0) {
+ if (bgrsb_ldo_work(dev, BGRSB_DISABLE_WHEEL_EVENTS) != 0) {
pr_err("Failed to un-vote LDO-15\n");
goto unlock;
}
@@ -461,7 +496,7 @@
}
if (dev->bgrsb_current_state == BGRSB_STATE_RSB_CONFIGURED) {
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO11) == 0)
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_OFF) == 0)
dev->bgrsb_current_state = BGRSB_STATE_INIT;
else
pr_err("Failed to unvote LDO-11 on BG Glink down\n");
@@ -487,7 +522,6 @@
if (!dev->chnl_state)
return -ENODEV;
-
__pm_stay_awake(&dev->bgrsb_ws);
mutex_lock(&dev->glink_mutex);
init_completion(&dev->tx_done);
@@ -569,7 +603,7 @@
bg_up_work);
mutex_lock(&dev->rsb_state_mutex);
- if (bgrsb_ldo_work(dev, BGRSB_ENABLE_LDO11) == 0) {
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_ON) == 0) {
rc = wait_event_timeout(dev->link_state_wait,
(dev->chnl_state == true),
@@ -581,7 +615,7 @@
rc = bgrsb_configr_rsb(dev, true);
if (rc != 0) {
pr_err("BG failed to configure RSB %d\n", rc);
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO11) == 0)
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_OFF) == 0)
dev->bgrsb_current_state = BGRSB_STATE_INIT;
goto unlock;
}
@@ -603,7 +637,7 @@
rsb_glink_up_work);
mutex_lock(&dev->rsb_state_mutex);
- if (bgrsb_ldo_work(dev, BGRSB_ENABLE_LDO11) == 0) {
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_ON) == 0) {
INIT_WORK(&dev->glink_work, bgrsb_glink_open_work);
queue_work(dev->bgrsb_event_wq, &dev->glink_work);
@@ -618,7 +652,7 @@
rc = bgrsb_configr_rsb(dev, true);
if (rc != 0) {
pr_err("BG Glink failed to configure RSB %d\n", rc);
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO11) == 0)
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_OFF) == 0)
dev->bgrsb_current_state = BGRSB_STATE_INIT;
goto unlock;
}
@@ -644,7 +678,6 @@
{
struct bgrsb_priv *dev = container_of(bgrsb_drv,
struct bgrsb_priv, lhndl);
-
switch (opcode) {
case SUBSYS_BEFORE_SHUTDOWN:
if (dev->bgrsb_current_state == BGRSB_STATE_RSB_ENABLED)
@@ -703,12 +736,12 @@
goto unlock;
}
- if (bgrsb_ldo_work(dev, BGRSB_ENABLE_LDO15) == 0) {
+ if (bgrsb_ldo_work(dev, BGRSB_ENABLE_WHEEL_EVENTS) == 0) {
rc = bgrsb_enable(dev, true);
if (rc != 0) {
pr_err("Failed to send enable command to BG\n");
- bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO15);
+ bgrsb_ldo_work(dev, BGRSB_DISABLE_WHEEL_EVENTS);
dev->bgrsb_current_state = BGRSB_STATE_RSB_CONFIGURED;
goto unlock;
}
@@ -742,7 +775,7 @@
goto unlock;
}
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO15) != 0)
+ if (bgrsb_ldo_work(dev, BGRSB_DISABLE_WHEEL_EVENTS) != 0)
goto unlock;
dev->bgrsb_current_state = BGRSB_STATE_RSB_CONFIGURED;
@@ -1010,7 +1043,11 @@
{
struct bgrsb_priv *dev;
struct input_dev *input;
+ struct device_node *node;
int rc;
+ unsigned int rsb_gpio;
+
+ node = pdev->dev.of_node;
dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
if (!dev)
@@ -1057,13 +1094,40 @@
goto err_ret_inp;
}
dev_set_drvdata(&pdev->dev, dev);
+
+ rsb_use_msm_gpio = of_property_read_bool(node, "qcom,rsb-use-msm-gpio");
+
+ if (rsb_use_msm_gpio == true) {
+ rsb_gpio = of_get_named_gpio(node, "qcom,bg-rsb-gpio", 0);
+ pr_err("gpio %d is configured\n", rsb_gpio);
+
+ if (!gpio_is_valid(rsb_gpio)) {
+ pr_err("gpio %d found is not valid\n", rsb_gpio);
+ goto err_ret;
+ }
+
+ if (gpio_request(rsb_gpio, "msm_rsb_gpio")) {
+ pr_err("gpio %d request failed\n", rsb_gpio);
+ goto err_ret;
+ }
+
+ if (gpio_direction_output(rsb_gpio, 1)) {
+ pr_err("gpio %d direction not set\n", rsb_gpio);
+ goto err_ret;
+ }
+ pr_info("rsb gpio successfully requested\n");
+ msmrsb_gpio = rsb_gpio;
+ }
+
rc = bgrsb_init_regulators(&pdev->dev);
if (rc) {
pr_err("Failed to set regulators\n");
goto err_ret_inp;
}
+ pr_err("RSB probe successfully\n");
return 0;
-
+err_ret:
+ return 0;
err_ret_inp:
input_free_device(input);
@@ -1095,7 +1159,7 @@
if (dev->bgrsb_current_state == BGRSB_STATE_INIT) {
if (dev->is_cnfgrd &&
- bgrsb_ldo_work(dev, BGRSB_ENABLE_LDO11) == 0) {
+ bgrsb_ldo_work(dev, BGRSB_HW_TURN_ON) == 0) {
dev->bgrsb_current_state = BGRSB_STATE_RSB_CONFIGURED;
pr_debug("RSB Cofigured\n");
goto ret_success;
@@ -1120,11 +1184,11 @@
goto ret_success;
if (dev->bgrsb_current_state == BGRSB_STATE_RSB_ENABLED) {
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO15) != 0)
+ if (bgrsb_ldo_work(dev, BGRSB_DISABLE_WHEEL_EVENTS) != 0)
goto ret_err;
}
- if (bgrsb_ldo_work(dev, BGRSB_DISABLE_LDO11) == 0) {
+ if (bgrsb_ldo_work(dev, BGRSB_HW_TURN_OFF) == 0) {
dev->bgrsb_current_state = BGRSB_STATE_INIT;
pr_debug("RSB Init\n");
goto ret_success;
diff --git a/drivers/soc/qcom/bgcom_interface.c b/drivers/soc/qcom/bgcom_interface.c
index f2ec132..91f6fed 100644
--- a/drivers/soc/qcom/bgcom_interface.c
+++ b/drivers/soc/qcom/bgcom_interface.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -44,11 +44,13 @@
#define BGDAEMON_LDO03_NPM_VTG 10000
#define MPPS_DOWN_EVENT_TO_BG_TIMEOUT 3000
+#define ADSP_DOWN_EVENT_TO_BG_TIMEOUT 3000
#define SLEEP_FOR_SPI_BUS 2000
enum {
SSR_DOMAIN_BG,
SSR_DOMAIN_MODEM,
+ SSR_DOMAIN_ADSP,
SSR_DOMAIN_MAX,
};
@@ -83,6 +85,7 @@
static char *ssr_domains[] = {
"bg-wear",
"modem",
+ "adsp",
};
static struct bgdaemon_priv *dev;
@@ -98,6 +101,7 @@
static bool bg_app_running;
static struct bgcom_open_config_type config_type;
static DECLARE_COMPLETION(bg_modem_down_wait);
+static DECLARE_COMPLETION(bg_adsp_down_wait);
/**
* send_uevent(): send events to user space
@@ -334,6 +338,12 @@
return 0;
}
+static int adsp_down2_bg(void)
+{
+ complete(&bg_adsp_down_wait);
+ return 0;
+}
+
static long bg_com_ioctl(struct file *filp,
unsigned int ui_bgcom_cmd, unsigned long arg)
{
@@ -378,6 +388,8 @@
case BG_MODEM_DOWN2_BG_DONE:
ret = modem_down2_bg();
break;
+ case BG_ADSP_DOWN2_BG_DONE:
+ ret = adsp_down2_bg();
case BG_TWM_EXIT:
twm_exit = true;
ret = 0;
@@ -584,7 +596,29 @@
}
return NOTIFY_DONE;
}
+static int ssr_adsp_cb(struct notifier_block *this,
+ unsigned long opcode, void *data)
+{
+ struct bg_event adspe;
+ int ret;
+ switch (opcode) {
+ case SUBSYS_BEFORE_SHUTDOWN:
+ adspe.e_type = ADSP_BEFORE_POWER_DOWN;
+ reinit_completion(&bg_adsp_down_wait);
+ send_uevent(&adspe);
+ ret = wait_for_completion_timeout(&bg_adsp_down_wait,
+ msecs_to_jiffies(ADSP_DOWN_EVENT_TO_BG_TIMEOUT));
+ if (!ret)
+ pr_err("Time out on adsp down event\n");
+ break;
+ case SUBSYS_AFTER_POWERUP:
+ adspe.e_type = ADSP_AFTER_POWER_UP;
+ send_uevent(&adspe);
+ break;
+ }
+ return NOTIFY_DONE;
+}
bool is_twm_exit(void)
{
if (twm_exit) {
@@ -610,12 +644,17 @@
.priority = 0,
};
+static struct notifier_block ssr_adsp_nb = {
+ .notifier_call = ssr_adsp_cb,
+ .priority = 0,
+};
+
static struct notifier_block ssr_bg_nb = {
.notifier_call = ssr_bg_cb,
.priority = 0,
};
-static struct service_info service_data[2] = {
+static struct service_info service_data[3] = {
{
.name = "SSR_BG",
.domain_id = SSR_DOMAIN_BG,
@@ -628,6 +667,12 @@
.nb = &ssr_modem_nb,
.handle = NULL,
},
+ {
+ .name = "SSR_ADSP",
+ .domain_id = SSR_DOMAIN_ADSP,
+ .nb = &ssr_adsp_nb,
+ .handle = NULL,
+ },
};
/**
diff --git a/drivers/soc/qcom/rpm_master_stat.c b/drivers/soc/qcom/rpm_master_stat.c
index efbe033..bf4f5ec 100644
--- a/drivers/soc/qcom/rpm_master_stat.c
+++ b/drivers/soc/qcom/rpm_master_stat.c
@@ -416,7 +416,7 @@
if (!pdata->masters[i])
goto err;
strlcpy(pdata->masters[i], master_name,
- strlen(pdata->masters[i]) + 1);
+ strlen(master_name) + 1);
}
return pdata;
err:
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index ac5b101..2daa8ef 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2735,17 +2735,15 @@
struct dwc3_trb *trb;
dma_addr_t offset;
+ /*
+ * Doorbell needs to be rung with the next TRB that is going to be
+ * processed by hardware.
+ * So, if 'n'th TRB got completed then ring doorbell with (n+1) TRB.
+ */
+ dwc3_ep_inc_trb(dep, &dep->trb_dequeue);
trb = &dep->trb_pool[dep->trb_dequeue];
- while (trb->ctrl & DWC3_TRBCTL_LINK_TRB) {
- dwc3_ep_inc_trb(dep, &dep->trb_dequeue);
- trb = &dep->trb_pool[dep->trb_dequeue];
- }
-
- if (!(trb->ctrl & DWC3_TRB_CTRL_HWO)) {
- offset = dwc3_trb_dma_offset(dep, trb);
- usb_gsi_ep_op(ep, (void *)&offset, GSI_EP_OP_UPDATE_DB);
- dwc3_ep_inc_trb(dep, &dep->trb_dequeue);
- }
+ offset = dwc3_trb_dma_offset(dep, trb);
+ usb_gsi_ep_op(ep, (void *)&offset, GSI_EP_OP_UPDATE_DB);
}
static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
diff --git a/drivers/usb/gadget/function/f_gsi.c b/drivers/usb/gadget/function/f_gsi.c
index 51413dc..f252d32 100644
--- a/drivers/usb/gadget/function/f_gsi.c
+++ b/drivers/usb/gadget/function/f_gsi.c
@@ -2429,9 +2429,12 @@
{
struct f_gsi *gsi = func_to_gsi(f);
struct f_gsi *gsi_rmnet_v2x = __gsi[USB_PROT_RMNET_V2X_IPA];
+ struct f_gsi *gsi_ecm = __gsi[USB_PROT_ECM_IPA];
struct usb_composite_dev *cdev = f->config->cdev;
struct net_device *net;
int ret;
+ int in_intr_num = 0;
+ int out_intr_num = 0;
log_event_dbg("intf=%u, alt=%u", intf, alt);
@@ -2504,21 +2507,49 @@
}
/*
- * Configure EPs for GSI. Note that when both RmNet LTE
- * (or ECM) and RmNet V2X instances are enabled in a
- * composition, configure HW accelerated EPs for V2X
- * instance and normal EPs for LTE (or ECM).
+ * Configure EPs for GSI. Note that:
+ * 1. In general, configure HW accelerated EPs for all
+ * instances.
+ * 2. If both RmNet LTE and RmNet V2X instances are
+ * enabled in a composition, configure HW accelerated
+ * EPs for V2X and normal EPs for LTE.
+ * 3. If RmNet V2X, ECM and ADPL instances are enabled
+ * in a composition, configure HW accelerated EPs in
+ * both directions for V2X and IN direction for ECM.
+ * Configure normal EPs for ECM OUT and ADPL.
*/
+ switch (gsi->prot_id) {
+ case USB_PROT_RMNET_IPA:
+ if (!gsi_rmnet_v2x->function.fs_descriptors) {
+ in_intr_num = 2;
+ out_intr_num = 1;
+ }
+ break;
+ case USB_PROT_ECM_IPA:
+ /* If v2x is used then only IN/DL uses GSI EP */
+ if (gsi_rmnet_v2x->function.fs_descriptors) {
+ in_intr_num = 3;
+ out_intr_num = 0;
+ } else {
+ in_intr_num = 2;
+ out_intr_num = 1;
+ }
+ break;
+ case USB_PROT_DIAG_IPA:
+ /* DPL to use normal EP if used with ECM+cv2x */
+ if (!(gsi_ecm->function.fs_descriptors &&
+ gsi_rmnet_v2x->function.fs_descriptors))
+ in_intr_num = 3;
+ break;
+ default:
+ in_intr_num = 2;
+ out_intr_num = 1;
+ }
+
+ /* gsi_configure_ep required only for GSI-IPA EPs */
if (gsi->d_port.in_ep &&
gsi->prot_id <= USB_PROT_RMNET_V2X_IPA) {
- if (gsi->prot_id == USB_PROT_DIAG_IPA)
- gsi->d_port.in_ep->ep_intr_num = 3;
- else if ((gsi->prot_id == USB_PROT_RMNET_IPA ||
- gsi->prot_id == USB_PROT_ECM_IPA) &&
- gsi_rmnet_v2x->function.fs_descriptors)
- gsi->d_port.in_ep->ep_intr_num = 0;
- else
- gsi->d_port.in_ep->ep_intr_num = 2;
+ gsi->d_port.in_ep->ep_intr_num = in_intr_num;
usb_gsi_ep_op(gsi->d_port.in_ep,
&gsi->d_port.in_request,
GSI_EP_OP_CONFIG);
@@ -2526,12 +2557,7 @@
if (gsi->d_port.out_ep &&
gsi->prot_id <= USB_PROT_RMNET_V2X_IPA) {
- if ((gsi->prot_id == USB_PROT_RMNET_IPA ||
- gsi->prot_id == USB_PROT_ECM_IPA) &&
- gsi_rmnet_v2x->function.fs_descriptors)
- gsi->d_port.out_ep->ep_intr_num = 0;
- else
- gsi->d_port.out_ep->ep_intr_num = 1;
+ gsi->d_port.out_ep->ep_intr_num = out_intr_num;
usb_gsi_ep_op(gsi->d_port.out_ep,
&gsi->d_port.out_request,
GSI_EP_OP_CONFIG);
diff --git a/drivers/usb/phy/phy-msm-qusb-v2.c b/drivers/usb/phy/phy-msm-qusb-v2.c
index cf46d21..cd7a768 100644
--- a/drivers/usb/phy/phy-msm-qusb-v2.c
+++ b/drivers/usb/phy/phy-msm-qusb-v2.c
@@ -134,7 +134,6 @@
int efuse_num_of_bits;
int power_enabled_ref;
- bool clocks_enabled;
bool cable_connected;
bool suspended;
bool dpdm_enable;
@@ -236,10 +235,9 @@
static void qusb_phy_enable_clocks(struct qusb_phy *qphy, bool on)
{
- dev_dbg(qphy->phy.dev, "%s(): clocks_enabled:%d on:%d\n",
- __func__, qphy->clocks_enabled, on);
+ dev_dbg(qphy->phy.dev, "%s(): on:%d\n", __func__, on);
- if (!qphy->clocks_enabled && on) {
+ if (on) {
clk_prepare_enable(qphy->ref_clk_src);
if (qphy->ref_clk)
clk_prepare_enable(qphy->ref_clk);
@@ -247,10 +245,7 @@
if (qphy->cfg_ahb_clk)
clk_prepare_enable(qphy->cfg_ahb_clk);
- qphy->clocks_enabled = true;
- }
-
- if (qphy->clocks_enabled && !on) {
+ } else {
if (qphy->cfg_ahb_clk)
clk_disable_unprepare(qphy->cfg_ahb_clk);
@@ -258,11 +253,7 @@
clk_disable_unprepare(qphy->ref_clk);
clk_disable_unprepare(qphy->ref_clk_src);
- qphy->clocks_enabled = false;
}
-
- dev_dbg(qphy->phy.dev, "%s(): clocks_enabled:%d\n", __func__,
- qphy->clocks_enabled);
}
static int qusb_phy_config_vdd(struct qusb_phy *qphy, int high)
@@ -597,8 +588,6 @@
if (ret)
return ret;
- qusb_phy_enable_clocks(qphy, true);
-
qusb_phy_reset(qphy);
if (qphy->qusb_phy_host_init_seq && qphy->phy.flags & PHY_HOST_MODE) {
@@ -760,7 +749,7 @@
struct qusb_phy *qphy = container_of(phy, struct qusb_phy, phy);
u32 linestate = 0, intr_mask = 0;
- if (qphy->suspended && suspend) {
+ if (qphy->suspended == suspend) {
dev_dbg(phy->dev, "%s: USB PHY is already suspended\n",
__func__);
return 0;
@@ -1429,6 +1418,7 @@
if (ret)
usb_remove_phy(&qphy->phy);
+ qphy->suspended = true;
qusb_phy_create_debugfs(qphy);
return ret;
@@ -1439,8 +1429,8 @@
struct qusb_phy *qphy = platform_get_drvdata(pdev);
usb_remove_phy(&qphy->phy);
- qusb_phy_enable_clocks(qphy, false);
- qusb_phy_enable_power(qphy, false);
+ qphy->cable_connected = false;
+ qusb_phy_set_suspend(&qphy->phy, true);
debugfs_remove_recursive(qphy->root);
return 0;
diff --git a/drivers/usb/phy/phy-msm-qusb.c b/drivers/usb/phy/phy-msm-qusb.c
index 47db12b..9d66366 100644
--- a/drivers/usb/phy/phy-msm-qusb.c
+++ b/drivers/usb/phy/phy-msm-qusb.c
@@ -147,7 +147,6 @@
int tune2_efuse_correction;
bool power_enabled;
- bool clocks_enabled;
bool cable_connected;
bool suspended;
bool ulpi_mode;
@@ -172,19 +171,15 @@
static void qusb_phy_enable_clocks(struct qusb_phy *qphy, bool on)
{
- dev_dbg(qphy->phy.dev, "%s(): clocks_enabled:%d on:%d\n",
- __func__, qphy->clocks_enabled, on);
+ dev_dbg(qphy->phy.dev, "%s(): on:%d\n", __func__, on);
- if (!qphy->clocks_enabled && on) {
+ if (on) {
clk_prepare_enable(qphy->ref_clk_src);
clk_prepare_enable(qphy->ref_clk);
clk_prepare_enable(qphy->iface_clk);
clk_prepare_enable(qphy->core_clk);
clk_prepare_enable(qphy->cfg_ahb_clk);
- qphy->clocks_enabled = true;
- }
-
- if (qphy->clocks_enabled && !on) {
+ } else {
clk_disable_unprepare(qphy->cfg_ahb_clk);
/*
* FSM depedency beween iface_clk and core_clk.
@@ -194,11 +189,8 @@
clk_disable_unprepare(qphy->iface_clk);
clk_disable_unprepare(qphy->ref_clk);
clk_disable_unprepare(qphy->ref_clk_src);
- qphy->clocks_enabled = false;
}
- dev_dbg(qphy->phy.dev, "%s(): clocks_enabled:%d\n", __func__,
- qphy->clocks_enabled);
}
static int qusb_phy_gdsc(struct qusb_phy *qphy, bool on)
@@ -441,8 +433,6 @@
if (ret)
return ret;
- qusb_phy_enable_clocks(qphy, true);
-
/*
* ref clock is enabled by default after power on reset. Linux clock
* driver will disable this clock as part of late init if peripheral
@@ -646,7 +636,7 @@
struct qusb_phy *qphy = container_of(phy, struct qusb_phy, phy);
u32 linestate = 0, intr_mask = 0;
- if (qphy->suspended && suspend) {
+ if (qphy->suspended == suspend) {
dev_dbg(phy->dev, "%s: USB PHY is already suspended\n",
__func__);
return 0;
@@ -1227,6 +1217,8 @@
if (qphy->tcsr_clamp_dig_n)
writel_relaxed(0x0, qphy->tcsr_clamp_dig_n);
+ qphy->suspended = true;
+
return ret;
}
@@ -1235,15 +1227,8 @@
struct qusb_phy *qphy = platform_get_drvdata(pdev);
usb_remove_phy(&qphy->phy);
-
- if (qphy->clocks_enabled) {
- clk_disable_unprepare(qphy->cfg_ahb_clk);
- clk_disable_unprepare(qphy->ref_clk);
- clk_disable_unprepare(qphy->ref_clk_src);
- qphy->clocks_enabled = false;
- }
-
- qusb_phy_enable_power(qphy, false);
+ qphy->cable_connected = false;
+ qusb_phy_set_suspend(&qphy->phy, true);
return 0;
}
diff --git a/drivers/video/fbdev/msm/mdss.h b/drivers/video/fbdev/msm/mdss.h
index 6fa7906..3ad5311 100644
--- a/drivers/video/fbdev/msm/mdss.h
+++ b/drivers/video/fbdev/msm/mdss.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -489,6 +489,7 @@
u32 min_prefill_lines; /* this changes within different chipsets */
u32 props;
+ bool twm_en;
int handoff_pending;
bool idle_pc;
struct mdss_perf_tune perf_tune;
diff --git a/drivers/video/fbdev/msm/mdss_mdp.c b/drivers/video/fbdev/msm/mdss_mdp.c
index 24f7521..924cf6b 100644
--- a/drivers/video/fbdev/msm/mdss_mdp.c
+++ b/drivers/video/fbdev/msm/mdss_mdp.c
@@ -1,7 +1,7 @@
/*
* MDSS MDP Interface (used by framebuffer core)
*
- * Copyright (c) 2007-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2007-2018, 2020, The Linux Foundation. All rights reserved.
* Copyright (C) 2007 Google Incorporated
*
* This software is licensed under the terms of the GNU General Public
@@ -2632,13 +2632,55 @@
return len;
}
+static ssize_t mdss_mdp_store_twm(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t len)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+ u32 data = -1;
+ ssize_t rc = 0;
+
+ if (!mdata) {
+ pr_err("Invalid mdata structure\n");
+ return -EINVAL;
+ }
+
+ rc = kstrtoint(buf, 10, &data);
+ if (rc) {
+ pr_err("kstrtoint failed. rc=%zd\n", rc);
+ return rc;
+ }
+ mdata->twm_en = data ? true : false;
+ pr_err("TWM : %s\n", (mdata->twm_en) ?
+ "ENABLED" : "DISABLED");
+ return len;
+}
+
+static ssize_t mdss_mdp_show_twm(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+ ssize_t ret = 0;
+
+ if (!mdata) {
+ pr_err("Invalid mdata structure\n");
+ return -EINVAL;
+ }
+
+ pr_err("TWM : %s\n", (mdata->twm_en) ?
+ "ENABLED" : "DISABLED");
+ ret = snprintf(buf, PAGE_SIZE, "%d\n", mdata->twm_en);
+ return ret;
+}
+
static DEVICE_ATTR(caps, 0444, mdss_mdp_show_capabilities, NULL);
static DEVICE_ATTR(bw_mode_bitmap, 0664,
mdss_mdp_read_max_limit_bw, mdss_mdp_store_max_limit_bw);
+static DEVICE_ATTR(twm_enable, 0664, mdss_mdp_show_twm, mdss_mdp_store_twm);
static struct attribute *mdp_fs_attrs[] = {
&dev_attr_caps.attr,
&dev_attr_bw_mode_bitmap.attr,
+ &dev_attr_twm_enable.attr,
NULL
};
diff --git a/drivers/video/fbdev/msm/mdss_mdp_overlay.c b/drivers/video/fbdev/msm/mdss_mdp_overlay.c
index 7c8a273..b70db4f 100644
--- a/drivers/video/fbdev/msm/mdss_mdp_overlay.c
+++ b/drivers/video/fbdev/msm/mdss_mdp_overlay.c
@@ -1,4 +1,4 @@
-/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2018, 2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -6566,6 +6566,13 @@
pr_debug("Signaled (%d) pending retire fence\n", retire_cnt);
}
+static bool mdss_mdp_is_twm_en(void)
+{
+ struct mdss_data_type *mdata = mdss_mdp_get_mdata();
+
+ return (mdata && mdata->twm_en);
+}
+
int mdss_mdp_overlay_init(struct msm_fb_data_type *mfd)
{
struct device *dev = mfd->fbi->dev;
@@ -6613,7 +6620,7 @@
mdp5_interface->configure_panel = mdss_mdp_update_panel_info;
mdp5_interface->input_event_handler = mdss_mdp_input_event_handler;
mdp5_interface->signal_retire_fence = mdss_mdp_signal_retire_fence;
- mdp5_interface->is_twm_en = NULL;
+ mdp5_interface->is_twm_en = mdss_mdp_is_twm_en;
if (mfd->panel_info->type == WRITEBACK_PANEL) {
mdp5_interface->atomic_validate =
diff --git a/include/linux/msm_mhi_dev.h b/include/linux/msm_mhi_dev.h
index f717c10..1605687 100644
--- a/include/linux/msm_mhi_dev.h
+++ b/include/linux/msm_mhi_dev.h
@@ -18,6 +18,8 @@
#define IPA_DMA_SYNC 1
#define IPA_DMA_ASYNC 0
+#define DMA_SYNC 1
+#define DMA_ASYNC 0
enum cb_reason {
MHI_DEV_TRE_AVAILABLE = 0,
@@ -197,6 +199,13 @@
int mhi_dev_channel_isempty(struct mhi_dev_client *handle);
/**
+* mhi_dev_channel_has_pending_write() - Checks if there are any pending writes
+* to be completed on inbound channel
+* @handle_client: Client Handle issued during mhi_dev_open_channel
+*/
+bool mhi_dev_channel_has_pending_write(struct mhi_dev_client *handle);
+
+/**
* mhi_ctrl_state_info() - Provide MHI state info
* @idx: Channel number idx. Look at channel_state_info and
* pass the index for the corresponding channel.
@@ -246,6 +255,12 @@
return -EINVAL;
};
+static inline bool mhi_dev_channel_has_pending_write
+ (struct mhi_dev_client *handle)
+{
+ return false;
+}
+
static inline int mhi_ctrl_state_info(uint32_t idx, uint32_t *info)
{
return -EINVAL;
diff --git a/include/uapi/linux/bgcom_interface.h b/include/uapi/linux/bgcom_interface.h
index 25219f7..904ec69 100644
--- a/include/uapi/linux/bgcom_interface.h
+++ b/include/uapi/linux/bgcom_interface.h
@@ -1,4 +1,4 @@
-/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
@@ -21,6 +21,7 @@
#define BGCOM_MODEM_DOWN2_BG 7
#define BGCOM_TWM_EXIT 8
#define BGCOM_BG_APP_RUNNING 9
+#define BGCOM_ADSP_DOWN2_BG 10
#define EXCHANGE_CODE 'V'
struct bg_ui_data {
@@ -36,6 +37,8 @@
BG_AFTER_POWER_UP,
MODEM_BEFORE_POWER_DOWN,
MODEM_AFTER_POWER_UP,
+ ADSP_BEFORE_POWER_DOWN,
+ ADSP_AFTER_POWER_UP,
};
#define REG_READ \
@@ -68,4 +71,7 @@
#define BG_MODEM_DOWN2_BG_DONE \
_IOWR(EXCHANGE_CODE, BGCOM_MODEM_DOWN2_BG, \
struct bg_ui_data)
+#define BG_ADSP_DOWN2_BG_DONE \
+ _IOWR(EXCHANGE_CODE, BGCOM_ADSP_DOWN2_BG, \
+ struct bg_ui_data)
#endif