| # |
| # PINCTRL infrastructure and drivers |
| # |
| |
| config PINCTRL |
| bool |
| |
| if PINCTRL |
| |
| menu "Pin controllers" |
| depends on PINCTRL |
| |
| config PINMUX |
| bool "Support pin multiplexing controllers" |
| |
| config PINCONF |
| bool "Support pin configuration controllers" |
| |
| config GENERIC_PINCONF |
| bool |
| select PINCONF |
| |
| config DEBUG_PINCTRL |
| bool "Debug PINCTRL calls" |
| depends on DEBUG_KERNEL |
| help |
| Say Y here to add some extra checks and diagnostics to PINCTRL calls. |
| |
| config PINCTRL_PXA3xx |
| bool |
| select PINMUX |
| |
| config PINCTRL_MMP2 |
| bool "MMP2 pin controller driver" |
| depends on ARCH_MMP |
| select PINCTRL_PXA3xx |
| select PINCONF |
| |
| config PINCTRL_NOMADIK |
| bool "Nomadik pin controller driver" |
| depends on ARCH_U8500 |
| select PINMUX |
| select PINCONF |
| |
| config PINCTRL_DB8500 |
| bool "DB8500 pin controller driver" |
| depends on PINCTRL_NOMADIK && ARCH_U8500 |
| |
| config PINCTRL_PXA168 |
| bool "PXA168 pin controller driver" |
| depends on ARCH_MMP |
| select PINCTRL_PXA3xx |
| select PINCONF |
| |
| config PINCTRL_PXA910 |
| bool "PXA910 pin controller driver" |
| depends on ARCH_MMP |
| select PINCTRL_PXA3xx |
| select PINCONF |
| |
| config PINCTRL_SIRF |
| bool "CSR SiRFprimaII pin controller driver" |
| depends on ARCH_PRIMA2 |
| select PINMUX |
| |
| config PINCTRL_TEGRA |
| bool |
| |
| config PINCTRL_TEGRA20 |
| bool |
| select PINMUX |
| select PINCONF |
| select PINCTRL_TEGRA |
| |
| config PINCTRL_TEGRA30 |
| bool |
| select PINMUX |
| select PINCONF |
| select PINCTRL_TEGRA |
| |
| config PINCTRL_U300 |
| bool "U300 pin controller driver" |
| depends on ARCH_U300 |
| select PINMUX |
| select GENERIC_PINCONF |
| |
| config PINCTRL_COH901 |
| bool "ST-Ericsson U300 COH 901 335/571 GPIO" |
| depends on GPIOLIB && ARCH_U300 && PINMUX_U300 |
| help |
| Say yes here to support GPIO interface on ST-Ericsson U300. |
| The names of the two IP block variants supported are |
| COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 |
| ports of 8 GPIO pins each. |
| |
| endmenu |
| |
| endif |