| /* |
| * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| tlmm: pinctrl@1000000 { |
| compatible = "qcom,msm8917-pinctrl"; |
| reg = <0x1000000 0x300000>; |
| reg-names = "pinctrl_regs"; |
| interrupts-extended = <&wakegic GIC_SPI 208 IRQ_TYPE_NONE>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| interrupt-parent = <&wakegpio>; |
| #interrupt-cells = <2>; |
| |
| #include "msm8917-camera-pinctrl.dtsi" |
| /* add pingrp for touchscreen */ |
| pmx_ts_int_active { |
| ts_int_active: ts_int_active { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| pmx_ts_int_suspend { |
| ts_int_suspend: ts_int_suspend { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pmx_ts_reset_active { |
| ts_reset_active: ts_reset_active { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| pmx_ts_reset_suspend { |
| ts_reset_suspend: ts_reset_suspend { |
| mux { |
| pins = "gpio64"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio64"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pmx_ts_release { |
| ts_release: ts_release { |
| mux { |
| pins = "gpio65", "gpio64"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio64"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pmx-uartconsole { |
| uart_console_active: uart_console_active { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| uart_console_sleep: uart_console_sleep { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "blsp_uart2"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| }; |
| |
| blsp1_uart1 { |
| blsp1_uart1_active: blsp1_uart1_active { |
| mux { |
| pins = "gpio0", "gpio1", |
| "gpio2", "gpio3"; |
| function = "blsp_uart1"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", |
| "gpio2", "gpio3"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| blsp1_uart1_sleep: blsp1_uart1_sleep { |
| mux { |
| pins = "gpio0", "gpio1", |
| "gpio2", "gpio3"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", |
| "gpio2", "gpio3"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| wcnss_pmux_5wire { |
| /* Active configuration of bus pins */ |
| wcnss_default: wcnss_default { |
| wcss_wlan2 { |
| pins = "gpio76"; |
| function = "wcss_wlan2"; |
| }; |
| wcss_wlan1 { |
| pins = "gpio77"; |
| function = "wcss_wlan1"; |
| }; |
| wcss_wlan0 { |
| pins = "gpio78"; |
| function = "wcss_wlan0"; |
| }; |
| wcss_wlan { |
| pins = "gpio79", "gpio80"; |
| function = "wcss_wlan"; |
| }; |
| |
| config { |
| pins = "gpio76", "gpio77", |
| "gpio78", "gpio79", |
| "gpio80"; |
| drive-strength = <6>; /* 6 MA */ |
| bias-pull-up; /* PULL UP */ |
| }; |
| }; |
| |
| wcnss_sleep: wcnss_sleep { |
| wcss_wlan2 { |
| pins = "gpio76"; |
| function = "wcss_wlan2"; |
| }; |
| wcss_wlan1 { |
| pins = "gpio77"; |
| function = "wcss_wlan1"; |
| }; |
| wcss_wlan0 { |
| pins = "gpio78"; |
| function = "wcss_wlan0"; |
| }; |
| wcss_wlan { |
| pins = "gpio79", "gpio80"; |
| function = "wcss_wlan"; |
| }; |
| |
| config { |
| pins = "gpio76", "gpio77", |
| "gpio78", "gpio79", |
| "gpio80"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-down; /* PULL Down */ |
| }; |
| }; |
| }; |
| |
| wcnss_pmux_gpio: wcnss_pmux_gpio { |
| wcnss_gpio_default: wcnss_gpio_default { |
| /* Active configuration of bus pins */ |
| mux { |
| /* Uses general purpose pins */ |
| pins = "gpio76", "gpio77", |
| "gpio78", "gpio79", |
| "gpio80"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio76", "gpio77", |
| "gpio78", "gpio79", |
| "gpio80"; |
| drive-strength = <6>; /* 6 MA */ |
| bias-pull-up; /* PULL UP */ |
| }; |
| }; |
| }; |
| |
| cdc_mclk2_pin { |
| cdc_mclk2_sleep: cdc_mclk2_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s"; |
| }; |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| cdc_mclk2_active: cdc_mclk2_active { |
| mux { |
| pins = "gpio66"; |
| function = "pri_mi2s"; |
| }; |
| config { |
| pins = "gpio66"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pmx_mdss: pmx_mdss { |
| mdss_dsi_active: mdss_dsi_active { |
| mux { |
| pins = "gpio60", "gpio98"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60", "gpio98"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable = <0>; /* no pull */ |
| output-high; |
| }; |
| }; |
| mdss_dsi_suspend: mdss_dsi_suspend { |
| mux { |
| pins = "gpio60", "gpio98"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio60", "gpio98"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| }; |
| |
| pmx_mdss_te { |
| mdss_te_active: mdss_te_active { |
| mux { |
| pins = "gpio24"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio24"; |
| drive-strength = <2>; /* 8 mA */ |
| bias-pull-down; /* pull down*/ |
| }; |
| }; |
| mdss_te_suspend: mdss_te_suspend { |
| mux { |
| pins = "gpio24"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio24"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_clk { |
| qdsd_clk_sdcard: clk_sdcard { |
| config { |
| pins = "qdsd_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| qdsd_clk_trace: clk_trace { |
| config { |
| pins = "qdsd_clk"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_clk_swdtrc: clk_swdtrc { |
| config { |
| pins = "qdsd_clk"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_clk_spmi: clk_spmi { |
| config { |
| pins = "qdsd_clk"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_cmd { |
| qdsd_cmd_sdcard: cmd_sdcard { |
| config { |
| pins = "qdsd_cmd"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_cmd_trace: cmd_trace { |
| config { |
| pins = "qdsd_cmd"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_cmd_swduart: cmd_uart { |
| config { |
| pins = "qdsd_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_cmd_swdtrc: cmd_swdtrc { |
| config { |
| pins = "qdsd_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_cmd_jtag: cmd_jtag { |
| config { |
| pins = "qdsd_cmd"; |
| bias-disable; /* NO pull */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_cmd_spmi: cmd_spmi { |
| config { |
| pins = "qdsd_cmd"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_data0 { |
| qdsd_data0_sdcard: data0_sdcard { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data0_trace: data0_trace { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data0_swduart: data0_uart { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data0_swdtrc: data0_swdtrc { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data0_jtag: data0_jtag { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data0_spmi: data0_spmi { |
| config { |
| pins = "qdsd_data0"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_data1 { |
| qdsd_data1_sdcard: data1_sdcard { |
| config { |
| pins = "qdsd_data1"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data1_trace: data1_trace { |
| config { |
| pins = "qdsd_data1"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data1_swduart: data1_uart { |
| config { |
| pins = "qdsd_data1"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data1_swdtrc: data1_swdtrc { |
| config { |
| pins = "qdsd_data1"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data1_jtag: data1_jtag { |
| config { |
| pins = "qdsd_data1"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_data2 { |
| qdsd_data2_sdcard: data2_sdcard { |
| config { |
| pins = "qdsd_data2"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data2_trace: data2_trace { |
| config { |
| pins = "qdsd_data2"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data2_swduart: data2_uart { |
| config { |
| pins = "qdsd_data2"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data2_swdtrc: data2_swdtrc { |
| config { |
| pins = "qdsd_data2"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data2_jtag: data2_jtag { |
| config { |
| pins = "qdsd_data2"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_qdsd_data3 { |
| qdsd_data3_sdcard: data3_sdcard { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data3_trace: data3_trace { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| qdsd_data3_swduart: data3_uart { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data3_swdtrc: data3_swdtrc { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data3_jtag: data3_jtag { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| qdsd_data3_spmi: data3_spmi { |
| config { |
| pins = "qdsd_data3"; |
| bias-pull-down; /* pull down */ |
| drive-strength = <8>; /* 8 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc1_rclk { |
| sdc1_rclk_on: sdc1_rclk_on { |
| config { |
| pins = "sdc1_rclk"; |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| sdc1_rclk_off: sdc1_rclk_off { |
| config { |
| pins = "sdc1_rclk"; |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc1_clk { |
| sdc1_clk_on: sdc1_clk_on { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc1_clk_off: sdc1_clk_off { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc1_cmd { |
| sdc1_cmd_on: sdc1_cmd_on { |
| config { |
| pins = "sdc1_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_cmd_off: sdc1_cmd_off { |
| config { |
| pins = "sdc1_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc1_data { |
| sdc1_data_on: sdc1_data_on { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_data_off: sdc1_data_off { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| sdhc2_cd_pin { |
| sdc2_cd_on: cd_on { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| sdc2_cd_off: cd_off { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| pmx_sdc2_clk { |
| sdc2_clk_on: sdc2_clk_on { |
| config { |
| pins = "sdc2_clk"; |
| drive-strength = <16>; /* 16 MA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| sdc2_clk_off: sdc2_clk_off { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc2_cmd { |
| sdc2_cmd_on: sdc2_cmd_on { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_off: sdc2_cmd_off { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| pmx_sdc2_data { |
| sdc2_data_on: sdc2_data_on { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_off: sdc2_data_off { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| }; |
| |
| sdc2_wlan_gpio { |
| sdc2_wlan_gpio_active: sdc2_wlan_gpio_active { |
| config { |
| pins = "gpio99"; |
| output-high; |
| drive-strength = <8>; |
| bias-pull-up; |
| }; |
| }; |
| sdc2_wlan_gpio_sleep: sdc2_wlan_gpio_sleep { |
| config { |
| pins = "gpio99"; |
| output-low; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| wcd9xxx_intr { |
| wcd_intr_default: wcd_intr_default{ |
| mux { |
| pins = "gpio73"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio73"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_mclk_b_lines { |
| pri_mi2s_mclk_b_default: pri_mi2s_mclk_default { |
| mux { |
| pins = "gpio69"; |
| function = "pri_mi2s_mclk_b"; |
| }; |
| config { |
| pins = "gpio69"; |
| drive-strength = <8>; |
| bias-disable; |
| input-enable; |
| }; |
| }; |
| }; |
| |
| sec_mi2s_mclk_a_lines { |
| sec_mi2s_mclk_a_active: sec_mi2s_mclk_a_active { |
| mux { |
| pins = "gpio25"; |
| function = "sec_mi2s_mclk_a"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| drive-strength = <8>; /* 8 MA */ |
| output-high; |
| bias-disable; |
| }; |
| }; |
| |
| sec_mi2s_mclk_a_sleep: sec_mi2s_mclk_a_sleep { |
| mux { |
| pins = "gpio25"; |
| function = "sec_mi2s_mclk_a"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| cdc_reset_ctrl { |
| cdc_reset_sleep: cdc_reset_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio68"; |
| drive-strength = <16>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| cdc_reset_active:cdc_reset_active { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio68"; |
| drive-strength = <16>; |
| bias-pull-down; |
| output-high; |
| }; |
| }; |
| }; |
| |
| cdc-pdm-2-lines { |
| cdc_pdm_lines_2_act: pdm_lines_2_on { |
| mux { |
| pins = "gpio70", "gpio71", "gpio72"; |
| function = "cdc_pdm0"; |
| }; |
| |
| config { |
| pins = "gpio70", "gpio71", "gpio72"; |
| drive-strength = <8>; |
| }; |
| }; |
| |
| cdc_pdm_lines_2_sus: pdm_lines_2_off { |
| mux { |
| pins = "gpio70", "gpio71", "gpio72"; |
| function = "cdc_pdm0"; |
| }; |
| |
| config { |
| pins = "gpio70", "gpio71", "gpio72"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| cdc-pdm-lines { |
| cdc_pdm_lines_act: pdm_lines_on { |
| mux { |
| pins = "gpio69", "gpio73", "gpio74"; |
| function = "cdc_pdm0"; |
| }; |
| |
| config { |
| pins = "gpio69", "gpio73", "gpio74"; |
| drive-strength = <8>; |
| }; |
| }; |
| cdc_pdm_lines_sus: pdm_lines_off { |
| mux { |
| pins = "gpio69", "gpio73", "gpio74"; |
| function = "cdc_pdm0"; |
| }; |
| |
| config { |
| pins = "gpio69", "gpio73", "gpio74"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| cross-conn-det { |
| cross_conn_det_act: lines_on { |
| mux { |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <8>; |
| output-low; |
| bias-pull-down; |
| }; |
| }; |
| |
| cross_conn_det_sus: lines_off { |
| mux { |
| pins = "gpio63"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio63"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| /* WSA VI sense */ |
| wsa-vi { |
| wsa_vi_on: wsa_vi_on { |
| mux { |
| pins = "gpio94", "gpio95"; |
| function = "wsa_io"; |
| }; |
| |
| config { |
| pins = "gpio94", "gpio95"; |
| drive-strength = <8>; /* 8 MA */ |
| bias-disable; /* NO pull */ |
| }; |
| }; |
| |
| wsa_vi_off: wsa_vi_off { |
| mux { |
| pins = "gpio94", "gpio95"; |
| function = "wsa_io"; |
| }; |
| |
| config { |
| pins = "gpio94", "gpio95"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| /* WSA Reset */ |
| wsa_reset { |
| wsa_reset_on: wsa_reset_on { |
| mux { |
| pins = "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio96"; |
| drive-strength = <2>; /* 2 MA */ |
| output-high; |
| }; |
| }; |
| |
| wsa_reset_off: wsa_reset_off { |
| mux { |
| pins = "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio96"; |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| }; |
| |
| /* WSA CLK */ |
| wsa_clk { |
| wsa_clk_on: wsa_clk_on { |
| mux { |
| pins = "gpio25"; |
| function = "pri_mi2s_mclk_a"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| drive-strength = <8>; /* 8 MA */ |
| output-high; |
| }; |
| }; |
| |
| wsa_clk_off: wsa_clk_off { |
| mux { |
| pins = "gpio25"; |
| function = "pri_mi2s_mclk_a"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pri-tlmm-lines { |
| pri_tlmm_lines_act: pri_tlmm_lines_act { |
| mux { |
| pins = "gpio85", "gpio88"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio88"; |
| drive-strength = <8>; |
| }; |
| }; |
| |
| pri_tlmm_lines_sus: pri_tlmm_lines_sus { |
| mux { |
| pins = "gpio85", "gpio88"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio88"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| pri-tlmm-ws-lines { |
| pri_tlmm_ws_act: pri_tlmm_ws_act { |
| mux { |
| pins = "gpio87"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio87"; |
| drive-strength = <16>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| |
| pri_tlmm_ws_sus: pri_tlmm_ws_sus { |
| mux { |
| pins = "gpio87"; |
| function = "pri_mi2s_ws"; |
| }; |
| |
| config { |
| pins = "gpio87"; |
| drive-strength = <2>; |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| }; |
| |
| spi3 { |
| spi3_default: spi3_default { |
| /* active state */ |
| mux { |
| /* MOSI, MISO, CLK */ |
| pins = "gpio8", "gpio9", "gpio11"; |
| function = "blsp_spi3"; |
| }; |
| |
| config { |
| pins = "gpio8", "gpio9", "gpio11"; |
| drive-strength = <12>; /* 12 MA */ |
| bias-disable = <0>; /* No PULL */ |
| }; |
| }; |
| |
| spi3_sleep: spi3_sleep { |
| /* suspended state */ |
| mux { |
| /* MOSI, MISO, CLK */ |
| pins = "gpio8", "gpio9", "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8", "gpio9", "gpio11"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-down; /* PULL Down */ |
| }; |
| }; |
| |
| spi3_cs0_active: cs0_active { |
| /* CS */ |
| mux { |
| pins = "gpio10"; |
| function = "blsp_spi3"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; |
| bias-disable = <0>; |
| }; |
| }; |
| |
| spi3_cs0_sleep: cs0_sleep { |
| /* CS */ |
| mux { |
| pins = "gpio10"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; |
| bias-disable = <0>; |
| }; |
| }; |
| }; |
| |
| spi6 { |
| spi6_default: spi6_default { |
| /* active state */ |
| mux { |
| /* MOSI, MISO, CLK */ |
| pins = "gpio20", "gpio21", "gpio23"; |
| function = "blsp_spi6"; |
| }; |
| |
| config { |
| pins = "gpio20", "gpio21", "gpio23"; |
| drive-strength = <16>; /* 16 MA */ |
| bias-disable = <0>; /* No PULL */ |
| }; |
| }; |
| |
| spi6_sleep: spi6_sleep { |
| /* suspended state */ |
| mux { |
| /* MOSI, MISO, CLK */ |
| pins = "gpio20", "gpio21", "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio20", "gpio21", "gpio23"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-down; /* PULL Down */ |
| }; |
| }; |
| |
| spi6_cs0_active: cs0_active { |
| /* CS */ |
| mux { |
| pins = "gpio47"; |
| function = "blsp6_spi"; |
| }; |
| |
| config { |
| pins = "gpio47"; |
| drive-strength = <16>; |
| bias-disable = <0>; |
| }; |
| }; |
| |
| spi6_cs0_sleep: cs0_sleep { |
| /* CS */ |
| mux { |
| pins = "gpio47"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio47"; |
| drive-strength = <2>; |
| bias-disable = <0>; |
| }; |
| }; |
| |
| spi6_cs1_active: cs1_active { |
| /* CS */ |
| mux { |
| pins = "gpio22"; |
| function = "blsp_spi6"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <16>; |
| bias-disable = <0>; |
| }; |
| }; |
| |
| spi6_cs1_sleep: cs1_sleep { |
| /* CS */ |
| mux { |
| pins = "gpio22"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22"; |
| drive-strength = <2>; |
| bias-disable = <0>; |
| }; |
| }; |
| }; |
| |
| fpc_reset_int { |
| fpc_reset_low: reset_low { |
| mux { |
| pins = "gpio124"; |
| function = "fpc_reset_gpio_low"; |
| }; |
| |
| config { |
| pins = "gpio124"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| fpc_reset_high: reset_high { |
| mux { |
| pins = "gpio124"; |
| function = "fpc_reset_gpio_high"; |
| }; |
| |
| config { |
| pins = "gpio124"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| |
| fpc_int_low: int_low { |
| mux { |
| pins = "gpio48"; |
| }; |
| config { |
| pins = "gpio48"; |
| drive-strength = <2>; |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| }; |
| |
| |
| i2c_2 { |
| i2c_2_active: i2c_2_active { |
| /* active state */ |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "blsp_i2c2"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_2_sleep: i2c_2_sleep { |
| /* suspended state */ |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| i2c_3 { |
| i2c_3_active: i2c_3_active { |
| /* active state */ |
| mux { |
| pins = "gpio10", "gpio11"; |
| function = "blsp_i2c3"; |
| }; |
| |
| config { |
| pins = "gpio10", "gpio11"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_3_sleep: i2c_3_sleep { |
| /* suspended state */ |
| mux { |
| pins = "gpio10", "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio10", "gpio11"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* IO Expander SX150xq */ |
| i2c_4 { |
| i2c_4_active: i2c_4_active { |
| /* active state */ |
| mux { |
| pins = "gpio14", "gpio15"; |
| function = "blsp_i2c4"; |
| }; |
| |
| config { |
| pins = "gpio14", "gpio15"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_4_sleep: i2c_4_sleep { |
| /* suspended state */ |
| mux { |
| pins = "gpio14", "gpio15"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio14", "gpio15"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| i2c_5 { |
| i2c_5_active: i2c_5_active { |
| /* active state */ |
| mux { |
| pins = "gpio18", "gpio19"; |
| function = "blsp_i2c5"; |
| }; |
| |
| config { |
| pins = "gpio18", "gpio19"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_5_sleep: i2c_5_sleep { |
| /* suspended state */ |
| mux { |
| pins = "gpio18", "gpio19"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio18", "gpio19"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| i2c_6 { |
| i2c_6_active: i2c_6_active { |
| /* active state */ |
| mux { |
| pins = "gpio22", "gpio23"; |
| function = "blsp_i2c6"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio23"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| i2c_6_sleep: i2c_6_sleep { |
| /* suspended state */ |
| mux { |
| pins = "gpio22", "gpio23"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio23"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| nfc { |
| nfc_int_active: nfc_int_active { |
| /* active state */ |
| mux { |
| /* GPIO 17 NFC Read Interrupt */ |
| pins = "gpio17"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_int_suspend: nfc_int_suspend { |
| /* sleep state */ |
| mux { |
| /* GPIO 17 NFC Read Interrupt */ |
| pins = "gpio17"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_disable_active: nfc_disable_active { |
| /* active state */ |
| mux { |
| /* 16: NFC ENABLE 130: FW DNLD */ |
| pins = "gpio16", "gpio130"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio16", "gpio130"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_disable_suspend: nfc_disable_suspend { |
| /* sleep state */ |
| mux { |
| /* 16: NFC ENABLE 130: FW DNLD */ |
| pins = "gpio16", "gpio130"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio16", "gpio130"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| tlmm_gpio_key { |
| gpio_key_active: gpio_key_active { |
| mux { |
| pins = "gpio91", "gpio127", "gpio128"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| gpio_key_suspend: gpio_key_suspend { |
| mux { |
| pins = "gpio91", "gpio127", "gpio128"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| tlmm_pmi_flash_led { |
| rear_flash_led_enable: rear_flash_led_enable { |
| mux { |
| pins = "gpio33"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio33"; |
| drive-strength = <16>; |
| output-high; |
| }; |
| }; |
| |
| rear_flash_led_disable: rear_flash_led_disable { |
| mux { |
| pins = "gpio33"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio33"; |
| drive-strength = <2>; |
| output-low; |
| }; |
| }; |
| |
| front_flash_led_enable: front_flash_led_enable { |
| mux { |
| pins = "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio50"; |
| drive-strength = <16>; |
| output-high; |
| }; |
| }; |
| |
| front_flash_led_disable: front_flash_led_disable { |
| mux { |
| pins = "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio50"; |
| drive-strength = <2>; |
| output-low; |
| }; |
| }; |
| }; |
| |
| usbc_int_default: usbc_int_default { |
| mux { |
| pins = "gpio97", "gpio131"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio97", "gpio131"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| pri_mi2s_sck { |
| pri_mi2s_sck_sleep: pri_mi2s_sck_sleep { |
| mux { |
| pins = "gpio85"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio85"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sck_active: pri_mi2s_sck_active { |
| mux { |
| pins = "gpio85"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio85"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd0 { |
| pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio88"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio88"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| |
| pri_mi2s_sd0_active: pri_mi2s_sd0_active { |
| mux { |
| pins = "gpio88"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio88"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| pri_mi2s_sd1 { |
| pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio86"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio86"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| pri_mi2s_sd1_active: pri_mi2s_sd1_active { |
| mux { |
| pins = "gpio86"; |
| function = "pri_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio86"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| sec_mi2s_ws { |
| sec_mi2s_ws_sleep: sec_mi2s_ws_sleep { |
| mux { |
| pins = "gpio95"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio95"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| sec_mi2s_ws_active: sec_mi2s_ws_active { |
| mux { |
| pins = "gpio95"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio95"; |
| drive-strength = <16>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| sec_mi2s_sck { |
| sec_mi2s_sck_sleep: sec_mi2s_sck_sleep { |
| mux { |
| pins = "gpio94"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio94"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| sec_mi2s_sck_active: sec_mi2s_sck_active { |
| mux { |
| pins = "gpio94"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio94"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd0 { |
| sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep { |
| mux { |
| pins = "gpio12"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| sec_mi2s_sd0_active: sec_mi2s_sd0_active { |
| mux { |
| pins = "gpio12"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| sec_mi2s_sd1 { |
| sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep { |
| mux { |
| pins = "gpio13"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| input-enable; |
| }; |
| }; |
| sec_mi2s_sd1_active: sec_mi2s_sd1_active { |
| mux { |
| pins = "gpio13"; |
| function = "sec_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; /* NO PULL */ |
| }; |
| }; |
| }; |
| |
| usb_mode_select: usb_mode_select { |
| mux { |
| pins = "gpio130"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio130"; |
| drive-strength = <2>; |
| bias-disable; |
| input-enable; |
| }; |
| }; |
| |
| usb2533_hub_reset: usb2533_hub_reset { |
| mux { |
| pins = "gpio100"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio100"; |
| drive-strength = <2>; |
| output-low; |
| }; |
| }; |
| }; |
| }; |