| /* |
| * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include "msm8937.dtsi" |
| #include "sdm439-pm8953.dtsi" |
| #include "sdm439-audio.dtsi" |
| #include "sdm439-pmi632.dtsi" |
| |
| &pm8953_s5 { |
| regulator-min-microvolt = <1155000>; |
| regulator-max-microvolt = <1350000>; |
| }; |
| |
| &pm8953_s5_limit { |
| regulator-min-microvolt = <1155000>; |
| regulator-max-microvolt = <1350000>; |
| }; |
| |
| &soc { |
| qcom,csiphy@1b34000 { |
| compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy"; |
| }; |
| qcom,csiphy@1b35000 { |
| compatible = "qcom,csiphy-v3.4.2", "qcom,csiphy"; |
| }; |
| qcom,csid@1b30000 { |
| qcom,mipi-csi-vdd-supply = <&pm8953_l2>; |
| }; |
| qcom,csid@1b30400 { |
| qcom,mipi-csi-vdd-supply = <&pm8953_l2>; |
| }; |
| qcom,csid@1b30800 { |
| qcom,mipi-csi-vdd-supply = <&pm8953_l2>; |
| }; |
| |
| mem_acc_vreg_corner: regulator@01946004 { |
| compatible = "qcom,mem-acc-regulator"; |
| regulator-name = "mem_acc_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <3>; |
| |
| qcom,acc-reg-addr-list = |
| <0x01942138 0x01942130 0x01942120 |
| 0x01942124 0x01946000 0x01946004>; |
| |
| qcom,acc-init-reg-config = <1 0xff>, <2 0x5555>, <6 0x55>; |
| |
| qcom,num-acc-corners = <3>; |
| qcom,boot-acc-corner = <2>; |
| qcom,corner1-reg-config = |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>, |
| < 3 0x0>, < 4 0x0>, < 5 0x0>; |
| |
| qcom,corner2-reg-config = |
| /* NOM => SVS+ */ |
| < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 3 0x0>, < 4 0x0>, < 5 0x0>; |
| |
| qcom,corner3-reg-config = |
| /* TURBO/NOM+ => SVS+ */ |
| < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>, |
| < 3 0x30c30c3>, < 4 0x30c3>, < 5 0x6060606>, |
| /* TURBO/NOM+ => NOM */ |
| < 3 0x1041041>, < 4 0x1041>, < 5 0x2020202>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>; |
| }; |
| |
| apc_vreg_corner: regulator@b018000 { |
| compatible = "qcom,cpr-regulator"; |
| reg = <0xb018000 0x1000>, <0xb011064 4>, <0xa4000 0x1000>; |
| reg-names = "rbcpr", "rbcpr_clk", "efuse_addr"; |
| interrupts = <0 15 0>; |
| regulator-name = "apc_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <7>; |
| |
| qcom,cpr-fuse-corners = <3>; |
| qcom,cpr-voltage-ceiling = <1155000 1225000 1350000>; |
| qcom,cpr-voltage-floor = <1050000 1050000 1090000>; |
| vdd-apc-supply = <&pm8953_s5>; |
| |
| mem-acc-supply = <&mem_acc_vreg_corner>; |
| |
| qcom,cpr-ref-clk = <19200>; |
| qcom,cpr-timer-delay = <5000>; |
| qcom,cpr-timer-cons-up = <0>; |
| qcom,cpr-timer-cons-down = <2>; |
| qcom,cpr-irq-line = <0>; |
| qcom,cpr-step-quotient = <10>; |
| qcom,cpr-up-threshold = <2>; |
| qcom,cpr-down-threshold = <4>; |
| qcom,cpr-idle-clocks = <15>; |
| qcom,cpr-gcnt-time = <1>; |
| qcom,vdd-apc-step-up-limit = <1>; |
| qcom,vdd-apc-step-down-limit = <1>; |
| qcom,cpr-apc-volt-step = <5000>; |
| |
| qcom,cpr-fuse-row = <67 0>; |
| qcom,cpr-fuse-target-quot = <42 24 6>; |
| qcom,cpr-fuse-ro-sel = <60 57 54>; |
| qcom,cpr-init-voltage-ref = <1155000 1225000 1350000>; |
| qcom,cpr-fuse-init-voltage = |
| <67 36 6 0>, |
| <67 18 6 0>, |
| <67 0 6 0>; |
| qcom,cpr-fuse-quot-offset = |
| <71 26 6 0>, |
| <71 20 6 0>, |
| <70 54 7 0>; |
| qcom,cpr-fuse-quot-offset-scale = <5 5 5>; |
| qcom,cpr-init-voltage-step = <10000>; |
| qcom,cpr-corner-map = <1 2 3 3 3 3 3>; |
| qcom,cpr-corner-frequency-map = |
| <1 960000000>, |
| <2 1094400000>, |
| <3 1209600000>, |
| <4 1248000000>, |
| <5 1344000000>, |
| <6 1401000000>, |
| <7 1497600000>; |
| qcom,speed-bin-fuse-sel = <37 34 3 0>; |
| qcom,cpr-speed-bin-max-corners = |
| <0 0 1 2 6>, |
| <1 0 1 2 7>, |
| <2 0 1 2 3>; |
| qcom,cpr-fuse-revision = <69 39 3 0>; |
| qcom,cpr-quot-adjust-scaling-factor-max = <0 1400 1400>; |
| qcom,cpr-voltage-scaling-factor-max = <0 2000 2000>; |
| qcom,cpr-scaled-init-voltage-as-ceiling; |
| qcom,cpr-fuse-version-map = |
| <0 (-1) 1 (-1) (-1) (-1)>, |
| <(-1) (-1) 2 (-1) (-1) (-1)>, |
| <(-1) (-1) 3 (-1) (-1) (-1)>, |
| <(-1) (-1) (-1) (-1) (-1) (-1)>; |
| qcom,cpr-quotient-adjustment = |
| <(-20) (-40) (-20)>, |
| <0 (-40) (20)>, |
| <0 0 (20)>, |
| <0 0 0>; |
| qcom,cpr-init-voltage-adjustment = |
| <0 0 0>, |
| <(10000) (15000) (20000)>, |
| <0 0 0>, |
| <0 0 0>; |
| qcom,cpr-enable; |
| }; |
| |
| qcom,cpu-clock-8939@b111050 { |
| vdd-c0-supply = <&apc_vreg_corner>; |
| vdd-c1-supply = <&apc_vreg_corner>; |
| vdd-cci-supply = <&apc_vreg_corner>; |
| }; |
| }; |
| |
| &mdss_dsi { |
| vdda-supply = <&pm8953_l2>; |
| vddio-supply = <&pm8953_l6>; |
| }; |