| /* |
| * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| #include "skeleton64.dtsi" |
| #include "msm8937.dtsi" |
| |
| / { |
| model = "Qualcomm Technologies, Inc. MSM8940"; |
| compatible = "qcom,msm8940"; |
| qcom,msm-id = <313 0x0>; |
| |
| soc: soc { }; |
| |
| }; |
| |
| &usb_otg { |
| |
| /delete-property/ clocks; |
| clocks = <&clock_gcc clk_gcc_usb_hs_ahb_clk>, |
| <&clock_gcc clk_gcc_usb_hs_system_clk>, |
| <&clock_gcc clk_gcc_usb2a_phy_sleep_clk>, |
| <&clock_gcc clk_bimc_usb_clk>, |
| <&clock_gcc clk_snoc_usb_clk>, |
| <&clock_gcc clk_pnoc_usb_clk>, |
| <&clock_gcc clk_gcc_qusb2_phy_clk>, |
| <&clock_gcc clk_gcc_usb2_hs_phy_only_clk>, |
| <&clock_gcc clk_gcc_usb_hs_phy_cfg_ahb_clk>, |
| <&clock_gcc clk_xo_otg_clk>; |
| |
| qcom,usbbam@78c4000 { |
| /delete-property/ qcom,reset-bam-on-disconnect; |
| /delete-node/ qcom,pipe0; |
| qcom,pipe0 { |
| label = "hsusb-ipa-out-0"; |
| qcom,usb-bam-mem-type = <1>; |
| qcom,dir = <0>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <1>; |
| qcom,src-bam-pipe-index = <1>; |
| qcom,data-fifo-size = <0x8000>; |
| qcom,descriptor-fifo-size = <0x2000>; |
| }; |
| qcom,pipe1 { |
| label = "hsusb-ipa-in-0"; |
| qcom,usb-bam-mem-type = <1>; |
| qcom,dir = <1>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <1>; |
| qcom,dst-bam-pipe-index = <0>; |
| qcom,data-fifo-size = <0x8000>; |
| qcom,descriptor-fifo-size = <0x2000>; |
| }; |
| qcom,pipe2 { |
| label = "hsusb-qdss-in-0"; |
| qcom,usb-bam-mem-type = <2>; |
| qcom,dir = <1>; |
| qcom,pipe-num = <0>; |
| qcom,peer-bam = <0>; |
| qcom,peer-bam-physical-address = <0x6044000>; |
| qcom,src-bam-pipe-index = <0>; |
| qcom,dst-bam-pipe-index = <2>; |
| qcom,data-fifo-offset = <0x0>; |
| qcom,data-fifo-size = <0xe00>; |
| qcom,descriptor-fifo-offset = <0xe00>; |
| qcom,descriptor-fifo-size = <0x200>; |
| }; |
| qcom,pipe3 { |
| label = "hsusb-dpl-ipa-in-1"; |
| qcom,usb-bam-mem-type = <1>; |
| qcom,dir = <1>; |
| qcom,pipe-num = <1>; |
| qcom,peer-bam = <1>; |
| qcom,dst-bam-pipe-index = <3>; |
| qcom,data-fifo-size = <0x8000>; |
| qcom,descriptor-fifo-size = <0x2000>; |
| }; |
| }; |
| }; |
| |
| &ad_hoc_bus { |
| mas_ipa: mas-ipa { |
| cell-id = <MSM_BUS_MASTER_IPA>; |
| label = "mas-ipa"; |
| qcom,buswidth = <8>; |
| qcom,agg-ports = <1>; |
| qcom,ap-owned; |
| qcom,qport = <14>; |
| qcom,qos-mode = "fixed"; |
| qcom,connections = <&snoc_int_1 &slv_snoc_bimc_1>; |
| qcom,prio1 = <0>; |
| qcom,prio0 = <0>; |
| qcom,bus-dev = <&fab_snoc>; |
| qcom,mas-rpm-id = <ICBID_MASTER_IPA>; |
| }; |
| }; |
| |
| &soc { |
| devfreq_spdm_cpu { |
| compatible = "qcom,devfreq_spdm"; |
| qcom,bw-dwnstep = <4000>; |
| qcom,max-vote = <4000>; |
| }; |
| |
| /delete-node/ funnel@6120000; |
| funnel_right: funnel@6120000 { |
| compatible = "arm,primecell"; |
| arm,primecell-periphid = <0x0003b908>; |
| |
| reg = <0x6120000 0x1000>; |
| reg-names = "funnel-base"; |
| |
| coresight-name = "coresight-funnel-right"; |
| |
| clocks = <&clock_gcc clk_qdss_clk>, |
| <&clock_gcc clk_qdss_a_clk>; |
| clock-names = "apb_pclk"; |
| |
| ports { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| port@0 { |
| funnel_right_out_funnel_in0: endpoint { |
| remote-endpoint = |
| <&funnel_in0_in_funnel_right>; |
| }; |
| }; |
| |
| port@1 { |
| reg = <1>; |
| funnel_right_in_modem_etm1: endpoint { |
| slave-mode; |
| remote-endpoint = |
| <&modem_etm1_out_funnel_right>; |
| }; |
| }; |
| |
| port@2 { |
| reg = <2>; |
| funnel_right_in_modem_etm0: endpoint { |
| slave-mode; |
| remote-endpoint = |
| <&modem_etm0_out_funnel_right>; |
| }; |
| }; |
| |
| port@3 { |
| reg = <3>; |
| funnel_right_in_funnel_apss: endpoint { |
| slave-mode; |
| remote-endpoint = |
| <&funnel_apss_out_funnel_right>; |
| }; |
| }; |
| }; |
| }; |
| |
| /delete-node/ cti@6124000; |
| cti_modem_cpu0: cti@6128000{ |
| compatible = "arm,primecell"; |
| arm,primecell-periphid = <0x0003b966>; |
| |
| reg = <0x6128000 0x1000>; |
| reg-names = "cti-base"; |
| coresight-name = "coresight-cti-modem-cpu0"; |
| |
| clocks = <&clock_gcc clk_qdss_clk>, |
| <&clock_gcc clk_qdss_a_clk>; |
| clock-names = "apb_pclk"; |
| }; |
| |
| |
| cti_modem_cpu1: cti@6124000{ |
| compatible = "arm,primecell"; |
| arm,primecell-periphid = <0x0003b966>; |
| |
| reg = <0x6124000 0x1000>; |
| reg-names = "cti-base"; |
| coresight-name = "coresight-cti-modem-cpu1"; |
| |
| clocks = <&clock_gcc clk_qdss_clk>, |
| <&clock_gcc clk_qdss_a_clk>; |
| clock-names = "apb_pclk"; |
| }; |
| |
| modem_etm1 { |
| compatible = "qcom,coresight-remote-etm"; |
| coresight-name = "coresight-modem-etm1"; |
| qcom,inst-id = <11>; |
| |
| port { |
| modem_etm1_out_funnel_right: endpoint { |
| remote-endpoint = <&funnel_right_in_modem_etm1>; |
| }; |
| }; |
| }; |
| |
| }; |
| |
| &clock_gcc { |
| compatible = "qcom,gcc-8940"; |
| }; |
| |
| &clock_debug { |
| compatible = "qcom,cc-debug-8940"; |
| }; |
| |
| &clock_gcc_mdss { |
| compatible = "qcom,gcc-mdss-8940"; |
| }; |
| |
| &bam_dmux { |
| status = "disabled"; |
| }; |
| |
| &soc { |
| ipa_hw: qcom,ipa@07900000 { |
| compatible = "qcom,ipa"; |
| reg = <0x07900000 0x4effc>, <0x07904000 0x26934>; |
| reg-names = "ipa-base", "bam-base"; |
| interrupts = <0 228 0>, |
| <0 230 0>; |
| interrupt-names = "ipa-irq", "bam-irq"; |
| qcom,ipa-hw-ver = <6>; /* IPA core version = IPAv2.6L */ |
| qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */ |
| qcom,wan-rx-ring-size = <192>; /* IPA WAN-rx-ring-size*/ |
| qcom,lan-rx-ring-size = <192>; /* IPA LAN-rx-ring-size*/ |
| clock-names = "core_clk"; |
| clocks = <&clock_gcc clk_ipa_clk>; |
| qcom,ee = <0>; |
| qcom,use-ipa-tethering-bridge; |
| qcom,modem-cfg-emb-pipe-flt; |
| qcom,msm-bus,name = "ipa"; |
| qcom,msm-bus,num-cases = <3>; |
| qcom,msm-bus,num-paths = <1>; |
| qcom,msm-bus,vectors-KBps = |
| <90 512 0 0>, /* No BIMC vote (ab=0 Mbps, ib=0 Mbps ~ 0MHZ) */ |
| <90 512 100000 800000>, /* SVS (ab=100, ib=800 ~ 50MHz) */ |
| <90 512 100000 1200000>; /* PERF (ab=100, ib=1200 ~ 75MHz) */ |
| qcom,bus-vector-names = "MIN", "SVS", "PERF"; |
| qcom,rx-polling-sleep-ms = <2>; /* Polling sleep interval */ |
| qcom,ipa-polling-iteration = <5>; /* Polling Iteration */ |
| }; |
| |
| qcom,rmnet-ipa { |
| compatible = "qcom,rmnet-ipa"; |
| qcom,rmnet-ipa-ssr; |
| qcom,ipa-loaduC; |
| qcom,ipa-advertise-sg-support; |
| }; |
| |
| qcom,rmtfs_sharedmem@00000000 { |
| reg = <0x00000000 0x00180000>; |
| }; |
| |
| /* remove 8937 MEM ACC node */ |
| /delete-node/ regulator@01946004; |
| |
| mem_acc_vreg_corner: regulator@01946004 { |
| compatible = "qcom,mem-acc-regulator"; |
| reg = <0xa4000 0x1000>; |
| reg-names = "efuse_addr"; |
| regulator-name = "mem_acc_corner"; |
| regulator-min-microvolt = <1>; |
| regulator-max-microvolt = <3>; |
| |
| qcom,acc-reg-addr-list = |
| <0x01942138 0x01942130 0x01942120 |
| 0x01942124 0x01942128>; |
| |
| qcom,acc-init-reg-config = <1 0xfff>; |
| |
| qcom,num-acc-corners = <3>; |
| qcom,boot-acc-corner = <2>; |
| qcom,corner1-reg-config = |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x0>, < 4 0x0>, |
| < 5 0x0>; |
| |
| qcom,corner2-reg-config = |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x0>, < 4 0x0>, |
| < 5 0x0>; |
| |
| qcom,corner3-reg-config = |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>; |
| |
| qcom,override-acc-range-fuse-list = |
| <37 40 3 0>, /* foundry id */ |
| <36 30 8 0>, /* iddq apc on */ |
| <67 0 6 0>; /* turbo targ volt */ |
| |
| qcom,override-fuse-range-map = |
| <0 0>, < 0 0>, <49 63>, |
| <1 1>, < 0 0>, <50 63>, |
| <5 5>, < 0 0>, <51 63>, |
| <0 1>, < 95 255>, < 0 63>, |
| <5 5>, <100 255>, < 0 63>; |
| |
| qcom,override-corner1-addr-val-map = |
| /* 1st fuse version tuple matched */ |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 2nd fuse version tuple matched */ |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 3rd fuse version tuple matched */ |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 4th fuse version tuple matched */ |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 5th fuse version tuple matched */ |
| /* SVS+ => SVS+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* SVS+ => TURBO/NOM+ */ |
| < 2 0x555555 >, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>; |
| |
| qcom,override-corner2-addr-val-map = |
| /* 1st fuse version tuple matched */ |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 2nd fuse version tuple matched */ |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 3rd fuse version tuple matched */ |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 4th fuse version tuple matched */ |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>, |
| |
| /* 5th fuse version tuple matched */ |
| /* NOM => SVS+ */ |
| < 2 0x555555>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* NOM => NOM */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* NOM => TURBO/NOM+ */ |
| < 2 0x555555>, < 3 0x1>, < 4 0x1000>, |
| < 5 0x0>; |
| |
| qcom,override-corner3-addr-val-map = |
| /* 1st fuse version tuple matched */ |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| |
| /* 2nd fuse version tuple matched */ |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| |
| /* 3rd fuse version tuple matched */ |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| |
| /* 4th fuse version tuple matched */ |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| |
| /* 5th fuse version tuple matched */ |
| /* TURBO/NOM+ => SVS+ */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, < 3 0x30C30C3>, < 4 0x30C30C3>, |
| < 5 0x00000C3>, |
| /* TURBO/NOM+ => NOM */ |
| < 2 0x555555>, < 3 0x1041041>, < 4 0x1041041>, |
| < 5 0x0000041>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, |
| /* TURBO/NOM+ => TURBO/NOM+ */ |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>, <(-1) (-1)>, <(-1) (-1)>, |
| <(-1) (-1)>; |
| }; |
| }; |
| |
| &apc_vreg_corner { |
| /delete-property/ qcom,cpr-fuse-version-map; |
| /delete-property/ qcom,cpr-quotient-adjustment; |
| /delete-property/ qcom,cpr-init-voltage-adjustment; |
| /delete-property/ qcom,cpr-enable; |
| |
| qcom,pvs-version-fuse-sel = <37 40 3 0>; /* foundry */ |
| qcom,cpr-speed-bin-max-corners = |
| <0 (-1) 1 2 6>, |
| <1 (-1) 1 2 7>; |
| |
| qcom,cpr-fuse-version-map = |
| < 0 0 (-1) (-1) (-1) (-1)>, |
| < 0 1 (-1) (-1) (-1) (-1)>, |
| < 0 5 (-1) (-1) (-1) (-1)>, |
| < 1 0 (-1) (-1) (-1) (-1)>, |
| < 1 1 (-1) (-1) (-1) (-1)>, |
| < 1 5 (-1) (-1) (-1) (-1)>; |
| |
| qcom,cpr-init-voltage-adjustment = |
| <0 0 0>, |
| <0 0 20000>, |
| <0 0 20000>, |
| <0 0 20000>, |
| <0 0 20000>, |
| <0 0 25000>; |
| |
| qcom,cpr-quotient-adjustment = |
| <0 0 0>, |
| <38 0 28>, /* SVSP(20mv); TURBO(15mv); KV(1.9) */ |
| <0 0 28>, /* TURBO(15mv); KV(1.9) */ |
| <0 0 28>, /* TURBO(15mv); KV(1.9) */ |
| <38 0 28>, /* SVSP(20mv); TURBO(15mv); KV(1.9) */ |
| <0 0 38>; /* TURBO(20mv); KV(1.9) */ |
| |
| qcom,cpr-enable; |
| }; |
| |
| &mdss_mdp { |
| qcom,vbif-settings = <0x0d0 0x00000020>; |
| }; |
| |
| &modem_mem { |
| reg = <0x0 0x86800000 0x0 0x6a00000>; |
| }; |
| |
| &adsp_fw_mem { |
| reg = <0x0 0x8d200000 0x0 0x1100000>; |
| }; |
| |
| &wcnss_fw_mem { |
| reg = <0x0 0x8e300000 0x0 0x700000>; |
| }; |
| |
| &pil_mss { |
| /delete-property/ qcom,qdsp6v56-1-8-inrush-current; |
| qcom,qdsp6v56-1-8; |
| }; |
| |
| /* GPU overrides */ |
| &msm_gpu { |
| |
| qcom,restrict-pwrlevel = <1>; |
| /delete-property/qcom,gpu-speed-bin; |
| qcom,gpu-speed-bin = <0x0174 0x80000000 31>; |
| |
| /delete-property/qcom,initial-pwrlevel; |
| /delete-node/qcom,gpu-pwrlevel-bins; |
| /delete-node/qcom,gpu-pwrlevels; |
| |
| qcom,gpu-pwrlevel-bins { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| compatible="qcom,gpu-pwrlevel-bins"; |
| |
| /* Power levels */ |
| qcom,gpu-pwrlevels-0 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| qcom,speed-bin = <0>; |
| qcom,initial-pwrlevel = <3>; |
| |
| /* SUPER TURBO */ |
| qcom,gpu-pwrlevel@0 { |
| reg = <0>; |
| qcom,gpu-freq = <475000000>; |
| qcom,bus-freq = <10>; |
| qcom,bus-min = <10>; |
| qcom,bus-max = <10>; |
| }; |
| |
| /* TURBO */ |
| qcom,gpu-pwrlevel@1 { |
| reg = <1>; |
| qcom,gpu-freq = <450000000>; |
| qcom,bus-freq = <9>; |
| qcom,bus-min = <9>; |
| qcom,bus-max = <10>; |
| }; |
| |
| /* NOM+ */ |
| qcom,gpu-pwrlevel@2 { |
| reg = <2>; |
| qcom,gpu-freq = <400000000>; |
| qcom,bus-freq = <7>; |
| qcom,bus-min = <6>; |
| qcom,bus-max = <9>; |
| }; |
| |
| /* NOM */ |
| qcom,gpu-pwrlevel@3 { |
| reg = <3>; |
| qcom,gpu-freq = <375000000>; |
| qcom,bus-freq = <6>; |
| qcom,bus-min = <5>; |
| qcom,bus-max = <8>; |
| }; |
| |
| /* SVS+ */ |
| qcom,gpu-pwrlevel@4 { |
| reg = <4>; |
| qcom,gpu-freq = <300000000>; |
| qcom,bus-freq = <5>; |
| qcom,bus-min = <4>; |
| qcom,bus-max = <7>; |
| }; |
| |
| /* SVS */ |
| qcom,gpu-pwrlevel@5 { |
| reg = <5>; |
| qcom,gpu-freq = <216000000>; |
| qcom,bus-freq = <3>; |
| qcom,bus-min = <1>; |
| qcom,bus-max = <4>; |
| }; |
| |
| /* XO */ |
| qcom,gpu-pwrlevel@6 { |
| reg = <6>; |
| qcom,gpu-freq = <19200000>; |
| qcom,bus-freq = <0>; |
| qcom,bus-min = <0>; |
| qcom,bus-max = <0>; |
| }; |
| }; |
| |
| /* Power levels */ |
| qcom,gpu-pwrlevels-1 { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| qcom,speed-bin = <1>; |
| qcom,initial-pwrlevel = <3>; |
| |
| /* SUPER TURBO */ |
| qcom,gpu-pwrlevel@0 { |
| reg = <0>; |
| qcom,gpu-freq = <500000000>; |
| qcom,bus-freq = <10>; |
| qcom,bus-min = <10>; |
| qcom,bus-max = <10>; |
| }; |
| |
| /* TURBO */ |
| qcom,gpu-pwrlevel@1 { |
| reg = <1>; |
| qcom,gpu-freq = <450000000>; |
| qcom,bus-freq = <9>; |
| qcom,bus-min = <9>; |
| qcom,bus-max = <10>; |
| }; |
| |
| /* NOM+ */ |
| qcom,gpu-pwrlevel@2 { |
| reg = <2>; |
| qcom,gpu-freq = <400000000>; |
| qcom,bus-freq = <7>; |
| qcom,bus-min = <6>; |
| qcom,bus-max = <9>; |
| }; |
| |
| /* NOM */ |
| qcom,gpu-pwrlevel@3 { |
| reg = <3>; |
| qcom,gpu-freq = <375000000>; |
| qcom,bus-freq = <6>; |
| qcom,bus-min = <5>; |
| qcom,bus-max = <8>; |
| }; |
| |
| /* SVS+ */ |
| qcom,gpu-pwrlevel@4 { |
| reg = <4>; |
| qcom,gpu-freq = <300000000>; |
| qcom,bus-freq = <5>; |
| qcom,bus-min = <4>; |
| qcom,bus-max = <7>; |
| }; |
| |
| /* SVS */ |
| qcom,gpu-pwrlevel@5 { |
| reg = <5>; |
| qcom,gpu-freq = <216000000>; |
| qcom,bus-freq = <3>; |
| qcom,bus-min = <1>; |
| qcom,bus-max = <4>; |
| }; |
| |
| /* XO */ |
| qcom,gpu-pwrlevel@6 { |
| reg = <6>; |
| qcom,gpu-freq = <19200000>; |
| qcom,bus-freq = <0>; |
| qcom,bus-min = <0>; |
| qcom,bus-max = <0>; |
| }; |
| }; |
| |
| }; |
| }; |
| |
| &tsens0 { |
| qcom,temp1-offset = <0 (-2) (-5) (-3) (-1) (-1) (-1) 0 1 (-1) (-6)>; |
| qcom,temp2-offset = <1 1 (-7) 5 4 7 6 2 3 1 7>; |
| }; |
| |
| /* CAMSS_CPHY */ |
| &soc { |
| qcom,csiphy@1b34000 { |
| status = "ok"; |
| compatible = "qcom,csiphy-v3.4.2.1", "qcom,csiphy"; |
| }; |
| |
| qcom,csiphy@1b35000 { |
| status = "ok"; |
| compatible = "qcom,csiphy-v3.4.2.1", "qcom,csiphy"; |
| }; |
| }; |