| /* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify |
| * it under the terms of the GNU General Public License version 2 and |
| * only version 2 as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope that it will be useful, |
| * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| * GNU General Public License for more details. |
| */ |
| |
| &soc { |
| tlmm: pinctrl@03400000 { |
| compatible = "qcom,sdm670-pinctrl"; |
| reg = <0x03400000 0xc00000>, <0x179900F0 0x60>; |
| reg-names = "pinctrl_regs", "spi_cfg_regs"; |
| interrupts = <0 208 0>; |
| gpio-controller; |
| #gpio-cells = <2>; |
| interrupt-controller; |
| #interrupt-cells = <2>; |
| interrupt-parent = <&pdc>; |
| |
| ufs_dev_reset_assert: ufs_dev_reset_assert { |
| config { |
| pins = "ufs_reset"; |
| bias-pull-down; /* default: pull down */ |
| /* |
| * UFS_RESET driver strengths are having |
| * different values/steps compared to typical |
| * GPIO drive strengths. |
| * |
| * Following table clarifies: |
| * |
| * HDRV value | UFS_RESET | Typical GPIO |
| * (dec) | (mA) | (mA) |
| * 0 | 0.8 | 2 |
| * 1 | 1.55 | 4 |
| * 2 | 2.35 | 6 |
| * 3 | 3.1 | 8 |
| * 4 | 3.9 | 10 |
| * 5 | 4.65 | 12 |
| * 6 | 5.4 | 14 |
| * 7 | 6.15 | 16 |
| * |
| * POR value for UFS_RESET HDRV is 3 which means |
| * 3.1mA and we want to use that. Hence just |
| * specify 8mA to "drive-strength" binding and |
| * that should result into writing 3 to HDRV |
| * field. |
| */ |
| drive-strength = <8>; /* default: 3.1 mA */ |
| output-low; /* active low reset */ |
| }; |
| }; |
| |
| ufs_dev_reset_deassert: ufs_dev_reset_deassert { |
| config { |
| pins = "ufs_reset"; |
| bias-pull-down; /* default: pull down */ |
| /* |
| * default: 3.1 mA |
| * check comments under ufs_dev_reset_assert |
| */ |
| drive-strength = <8>; |
| output-high; /* active low reset */ |
| }; |
| }; |
| |
| /* QUPv3 South SE mappings */ |
| /* SE 0 pin mappings */ |
| qupv3_se0_i2c_pins: qupv3_se0_i2c_pins { |
| qupv3_se0_i2c_active: qupv3_se0_i2c_active { |
| mux { |
| pins = "gpio0", "gpio1"; |
| function = "qup0"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep { |
| mux { |
| pins = "gpio0", "gpio1"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| micbias_supply_en_pins: micbias_supply_en_pins { |
| micbias_supply_en_active: micbias_supply_en_active { |
| mux { |
| pins = "gpio126"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio126"; |
| drive-strength = <16>; |
| output-high; |
| }; |
| }; |
| |
| micbias_supply_en_sleep: micbias_supply_en_sleep { |
| mux { |
| pins = "gpio126"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio126"; |
| drive-strength = <16>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| }; |
| |
| qupv3_se0_spi_pins: qupv3_se0_spi_pins { |
| qupv3_se0_spi_active: qupv3_se0_spi_active { |
| mux { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| function = "qup0"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se0_spi_sleep: qupv3_se0_spi_sleep { |
| mux { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio0", "gpio1", "gpio2", |
| "gpio3"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 1 pin mappings */ |
| qupv3_se1_i2c_pins: qupv3_se1_i2c_pins { |
| qupv3_se1_i2c_active: qupv3_se1_i2c_active { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "qup1"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep { |
| mux { |
| pins = "gpio17", "gpio18"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se1_spi_pins: qupv3_se1_spi_pins { |
| qupv3_se1_spi_active: qupv3_se1_spi_active { |
| mux { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| function = "qup1"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se1_spi_sleep: qupv3_se1_spi_sleep { |
| mux { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio17", "gpio18", "gpio19", |
| "gpio20"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 2 pin mappings */ |
| qupv3_se2_i2c_pins: qupv3_se2_i2c_pins { |
| qupv3_se2_i2c_active: qupv3_se2_i2c_active { |
| mux { |
| pins = "gpio27", "gpio28"; |
| function = "qup2"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep { |
| mux { |
| pins = "gpio27", "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se2_spi_pins: qupv3_se2_spi_pins { |
| qupv3_se2_spi_active: qupv3_se2_spi_active { |
| mux { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| function = "qup2"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se2_spi_sleep: qupv3_se2_spi_sleep { |
| mux { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27", "gpio28", "gpio29", |
| "gpio30"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 3 pin mappings */ |
| qupv3_se3_i2c_pins: qupv3_se3_i2c_pins { |
| qupv3_se3_i2c_active: qupv3_se3_i2c_active { |
| mux { |
| pins = "gpio41", "gpio42"; |
| function = "qup3"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep { |
| mux { |
| pins = "gpio41", "gpio42"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se3_spi_pins: qupv3_se3_spi_pins { |
| qupv3_se3_spi_active: qupv3_se3_spi_active { |
| mux { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| function = "qup3"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se3_spi_sleep: qupv3_se3_spi_sleep { |
| mux { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio41", "gpio42", "gpio43", |
| "gpio44"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 4 pin mappings */ |
| qupv3_se4_i2c_pins: qupv3_se4_i2c_pins { |
| qupv3_se4_i2c_active: qupv3_se4_i2c_active { |
| mux { |
| pins = "gpio89", "gpio90"; |
| function = "qup4"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep { |
| mux { |
| pins = "gpio89", "gpio90"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se4_spi_pins: qupv3_se4_spi_pins { |
| qupv3_se4_spi_active: qupv3_se4_spi_active { |
| mux { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| function = "qup4"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se4_spi_sleep: qupv3_se4_spi_sleep { |
| mux { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89", "gpio90", "gpio91", |
| "gpio92"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 5 pin mappings */ |
| qupv3_se5_i2c_pins: qupv3_se5_i2c_pins { |
| qupv3_se5_i2c_active: qupv3_se5_i2c_active { |
| mux { |
| pins = "gpio85", "gpio86"; |
| function = "qup5"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep { |
| mux { |
| pins = "gpio85", "gpio86"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se5_spi_pins: qupv3_se5_spi_pins { |
| qupv3_se5_spi_active: qupv3_se5_spi_active { |
| mux { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| function = "qup5"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se5_spi_sleep: qupv3_se5_spi_sleep { |
| mux { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio85", "gpio86", "gpio87", |
| "gpio88"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 6 pin mappings */ |
| qupv3_se6_i2c_pins: qupv3_se6_i2c_pins { |
| qupv3_se6_i2c_active: qupv3_se6_i2c_active { |
| mux { |
| pins = "gpio45", "gpio46"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep { |
| mux { |
| pins = "gpio45", "gpio46"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se6_4uart_pins: qupv3_se6_4uart_pins { |
| qupv3_se6_ctsrx: qupv3_se6_ctsrx { |
| mux { |
| pins = "gpio45", "gpio48"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio48"; |
| drive-strength = <2>; |
| bias-no-pull; |
| }; |
| }; |
| |
| qupv3_se6_rts: qupv3_se6_rts { |
| mux { |
| pins = "gpio46"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio46"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| |
| qupv3_se6_tx: qupv3_se6_tx { |
| mux { |
| pins = "gpio47"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio47"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se6_spi_pins: qupv3_se6_spi_pins { |
| qupv3_se6_spi_active: qupv3_se6_spi_active { |
| mux { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| function = "qup6"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se6_spi_sleep: qupv3_se6_spi_sleep { |
| mux { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio45", "gpio46", "gpio47", |
| "gpio48"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 7 pin mappings */ |
| qupv3_se7_i2c_pins: qupv3_se7_i2c_pins { |
| qupv3_se7_i2c_active: qupv3_se7_i2c_active { |
| mux { |
| pins = "gpio93", "gpio94"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep { |
| mux { |
| pins = "gpio93", "gpio94"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se7_4uart_pins: qupv3_se7_4uart_pins { |
| qupv3_se7_4uart_active: qupv3_se7_4uart_active { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_4uart_sleep: qupv3_se7_4uart_sleep { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se7_spi_pins: qupv3_se7_spi_pins { |
| qupv3_se7_spi_active: qupv3_se7_spi_active { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "qup7"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se7_spi_sleep: qupv3_se7_spi_sleep { |
| mux { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio93", "gpio94", "gpio95", |
| "gpio96"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* QUPv3 North instances */ |
| /* SE 8 pin mappings */ |
| qupv3_se8_i2c_pins: qupv3_se8_i2c_pins { |
| qupv3_se8_i2c_active: qupv3_se8_i2c_active { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "qup8"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep { |
| mux { |
| pins = "gpio65", "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se8_spi_pins: qupv3_se8_spi_pins { |
| qupv3_se8_spi_active: qupv3_se8_spi_active { |
| mux { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| function = "qup8"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se8_spi_sleep: qupv3_se8_spi_sleep { |
| mux { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65", "gpio66", "gpio67", |
| "gpio68"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 9 pin mappings */ |
| qupv3_se9_i2c_pins: qupv3_se9_i2c_pins { |
| qupv3_se9_i2c_active: qupv3_se9_i2c_active { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep { |
| mux { |
| pins = "gpio6", "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio6", "gpio7"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se9_2uart_pins: qupv3_se9_2uart_pins { |
| qupv3_se9_2uart_active: qupv3_se9_2uart_active { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_2uart_sleep: qupv3_se9_2uart_sleep { |
| mux { |
| pins = "gpio4", "gpio5"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se9_spi_pins: qupv3_se9_spi_pins { |
| qupv3_se9_spi_active: qupv3_se9_spi_active { |
| mux { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| function = "qup9"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se9_spi_sleep: qupv3_se9_spi_sleep { |
| mux { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio4", "gpio5", "gpio6", |
| "gpio7"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 10 pin mappings */ |
| qupv3_se10_i2c_pins: qupv3_se10_i2c_pins { |
| qupv3_se10_i2c_active: qupv3_se10_i2c_active { |
| mux { |
| pins = "gpio55", "gpio56"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio55", "gpio56"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep { |
| mux { |
| pins = "gpio55", "gpio56"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio55", "gpio56"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se10_2uart_pins: qupv3_se10_2uart_pins { |
| qupv3_se10_2uart_active: qupv3_se10_2uart_active { |
| mux { |
| pins = "gpio53", "gpio54"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_2uart_sleep: qupv3_se10_2uart_sleep { |
| mux { |
| pins = "gpio53", "gpio54"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| qupv3_se10_spi_pins: qupv3_se10_spi_pins { |
| qupv3_se10_spi_active: qupv3_se10_spi_active { |
| mux { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| function = "qup10"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se10_spi_sleep: qupv3_se10_spi_sleep { |
| mux { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio53", "gpio54", "gpio55", |
| "gpio56"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 11 pin mappings */ |
| qupv3_se11_i2c_pins: qupv3_se11_i2c_pins { |
| qupv3_se11_i2c_active: qupv3_se11_i2c_active { |
| mux { |
| pins = "gpio31", "gpio32"; |
| function = "qup11"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep { |
| mux { |
| pins = "gpio31", "gpio32"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se11_spi_pins: qupv3_se11_spi_pins { |
| qupv3_se11_spi_active: qupv3_se11_spi_active { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "qup11"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se11_spi_sleep: qupv3_se11_spi_sleep { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 12 pin mappings */ |
| qupv3_se12_i2c_pins: qupv3_se12_i2c_pins { |
| qupv3_se12_i2c_active: qupv3_se12_i2c_active { |
| mux { |
| pins = "gpio49", "gpio50"; |
| function = "qup12"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep { |
| mux { |
| pins = "gpio49", "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se12_2uart_pins: qupv3_se12_2uart_pins { |
| qupv3_se12_2uart_active: qupv3_se12_2uart_active { |
| mux { |
| pins = "gpio51", "gpio52"; |
| function = "qup12"; |
| }; |
| |
| config { |
| pins = "gpio51", "gpio52"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep { |
| mux { |
| pins = "gpio51", "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio51", "gpio52"; |
| drive-strength = <2>; |
| bias-pull-down; |
| }; |
| }; |
| }; |
| |
| qupv3_se12_spi_pins: qupv3_se12_spi_pins { |
| qupv3_se12_spi_active: qupv3_se12_spi_active { |
| mux { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| function = "qup12"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se12_spi_sleep: qupv3_se12_spi_sleep { |
| mux { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49", "gpio50", "gpio51", |
| "gpio52"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 13 pin mappings */ |
| qupv3_se13_i2c_pins: qupv3_se13_i2c_pins { |
| qupv3_se13_i2c_active: qupv3_se13_i2c_active { |
| mux { |
| pins = "gpio105", "gpio106"; |
| function = "qup13"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep { |
| mux { |
| pins = "gpio105", "gpio106"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| qupv3_se13_spi_pins: qupv3_se13_spi_pins { |
| qupv3_se13_spi_active: qupv3_se13_spi_active { |
| mux { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| function = "qup13"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se13_spi_sleep: qupv3_se13_spi_sleep { |
| mux { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio105", "gpio106", "gpio107", |
| "gpio108"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 14 pin mappings */ |
| qupv3_se14_i2c_pins: qupv3_se14_i2c_pins { |
| qupv3_se14_i2c_active: qupv3_se14_i2c_active { |
| mux { |
| pins = "gpio33", "gpio34"; |
| function = "qup14"; |
| }; |
| |
| config { |
| pins = "gpio33", "gpio34"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep { |
| mux { |
| pins = "gpio33", "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio33", "gpio34"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se14_spi_pins: qupv3_se14_spi_pins { |
| qupv3_se14_spi_active: qupv3_se14_spi_active { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "qup14"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se14_spi_sleep: qupv3_se14_spi_sleep { |
| mux { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio31", "gpio32", "gpio33", |
| "gpio34"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* SE 15 pin mappings */ |
| qupv3_se15_i2c_pins: qupv3_se15_i2c_pins { |
| qupv3_se15_i2c_active: qupv3_se15_i2c_active { |
| mux { |
| pins = "gpio81", "gpio82"; |
| function = "qup15"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se15_i2c_sleep: qupv3_se15_i2c_sleep { |
| mux { |
| pins = "gpio81", "gpio82"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| }; |
| |
| qupv3_se15_spi_pins: qupv3_se15_spi_pins { |
| qupv3_se15_spi_active: qupv3_se15_spi_active { |
| mux { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| function = "qup15"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| |
| qupv3_se15_spi_sleep: qupv3_se15_spi_sleep { |
| mux { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio81", "gpio82", "gpio83", |
| "gpio84"; |
| drive-strength = <6>; |
| bias-disable; |
| }; |
| }; |
| }; |
| /* SDC pin type */ |
| sdc1_clk_on: sdc1_clk_on { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc1_clk_off: sdc1_clk_off { |
| config { |
| pins = "sdc1_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_cmd_on: sdc1_cmd_on { |
| config { |
| pins = "sdc1_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_cmd_off: sdc1_cmd_off { |
| config { |
| pins = "sdc1_cmd"; |
| num-grp-pins = <1>; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_data_on: sdc1_data_on { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc1_data_off: sdc1_data_off { |
| config { |
| pins = "sdc1_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc1_rclk_on: sdc1_rclk_on { |
| config { |
| pins = "sdc1_rclk"; |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| sdc1_rclk_off: sdc1_rclk_off { |
| config { |
| pins = "sdc1_rclk"; |
| bias-pull-down; /* pull down */ |
| }; |
| }; |
| |
| sdc2_clk_on: sdc2_clk_on { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <16>; /* 16 MA */ |
| }; |
| }; |
| |
| sdc2_clk_off: sdc2_clk_off { |
| config { |
| pins = "sdc2_clk"; |
| bias-disable; /* NO pull */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_on: sdc2_cmd_on { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_cmd_off: sdc2_cmd_off { |
| config { |
| pins = "sdc2_cmd"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_data_on: sdc2_data_on { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <10>; /* 10 MA */ |
| }; |
| }; |
| |
| sdc2_data_off: sdc2_data_off { |
| config { |
| pins = "sdc2_data"; |
| bias-pull-up; /* pull up */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| sdc2_cd_on: cd_on { |
| mux { |
| pins = "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio96"; |
| drive-strength = <2>; |
| bias-pull-up; |
| }; |
| }; |
| |
| sdc2_cd_off: cd_off { |
| mux { |
| pins = "gpio96"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio96"; |
| drive-strength = <2>; |
| bias-disable; |
| }; |
| }; |
| |
| /* USB C analog configuration */ |
| wcd_usbc_analog_en1 { |
| wcd_usbc_analog_en1_idle: wcd_usbc_ana_en1_idle { |
| mux { |
| pins = "gpio49"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_usbc_analog_en1_active: wcd_usbc_ana_en1_active { |
| mux { |
| pins = "gpio49"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio49"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| sdw_clk_pin { |
| sdw_clk_sleep: sdw_clk_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "wsa_clk"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; |
| bias-bus-hold; |
| }; |
| }; |
| |
| sdw_clk_active: sdw_clk_active { |
| mux { |
| pins = "gpio65"; |
| function = "wsa_clk"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; |
| bias-bus-hold; |
| }; |
| }; |
| }; |
| |
| sdw_data_pin { |
| sdw_data_sleep: sdw_data_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "wsa_data"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <4>; |
| bias-bus-hold; |
| }; |
| }; |
| |
| sdw_data_active: sdw_data_active { |
| mux { |
| pins = "gpio66"; |
| function = "wsa_data"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <4>; |
| bias-bus-hold; |
| }; |
| }; |
| }; |
| |
| nfc { |
| nfc_int_active: nfc_int_active { |
| /* active state */ |
| mux { |
| /* GPIO 44 NFC Read Interrupt */ |
| pins = "gpio44"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio44"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_int_suspend: nfc_int_suspend { |
| /* sleep state */ |
| mux { |
| /* GPIO 44 NFC Read Interrupt */ |
| pins = "gpio44"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio44"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_enable_active: nfc_enable_active { |
| /* active state */ |
| mux { |
| /* 12: NFC ENABLE 43: FW DNLD */ |
| /* 116: ESE Enable */ |
| pins = "gpio12", "gpio43", "gpio116"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12", "gpio43", "gpio116"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-pull-up; |
| }; |
| }; |
| |
| nfc_enable_suspend: nfc_enable_suspend { |
| /* sleep state */ |
| mux { |
| /* 12: NFC ENABLE 43: FW DNLD */ |
| /* 116: ESE Enable */ |
| pins = "gpio12", "gpio43", "gpio116"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12", "gpio43", "gpio116"; |
| drive-strength = <2>; /* 2 MA */ |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| cdc_reset_ctrl { |
| cdc_reset_sleep: cdc_reset_sleep { |
| mux { |
| pins = "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_reset_active:cdc_reset_active { |
| mux { |
| pins = "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| drive-strength = <8>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_xr_reset_sleep: cdc_xr_reset_sleep { |
| mux { |
| pins = "gpio89"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89"; |
| drive-strength = <2>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| |
| cdc_xr_reset_active:cdc_xr_reset_active { |
| mux { |
| pins = "gpio89"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio89"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-high; |
| }; |
| }; |
| }; |
| |
| /* WSA speaker reset pins */ |
| spkr_1_sd_n { |
| spkr_1_sd_n_sleep: spkr_1_sd_n_sleep { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| |
| spkr_1_sd_n_active: spkr_1_sd_n_active { |
| mux { |
| pins = "gpio67"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio67"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| spkr_2_sd_n { |
| spkr_2_sd_n_sleep: spkr_2_sd_n_sleep { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| |
| spkr_2_sd_n_active: spkr_2_sd_n_active { |
| mux { |
| pins = "gpio68"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio68"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| /* Tasha WSA speaker reset pins */ |
| tasha_spkr_1_sd_n { |
| tasha_spkr_1_sd_n_sleep: tasha_spkr_1_sd_n_sleep { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| |
| tasha_spkr_1_sd_n_active: tasha_spkr_1_sd_n_active { |
| mux { |
| pins = "gpio66"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio66"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| tasha_spkr_2_sd_n { |
| tasha_spkr_2_sd_n_sleep: tasha_spkr_2_sd_n_sleep { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; |
| input-enable; |
| }; |
| }; |
| |
| tasha_spkr_2_sd_n_active: tasha_spkr_2_sd_n_active { |
| mux { |
| pins = "gpio65"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio65"; |
| drive-strength = <16>; /* 16 mA */ |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| wcd_buck_vsel { |
| wcd_buck_vsel_default: wcd_buck_vsel_default{ |
| mux { |
| pins = "gpio94"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio94"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-pull-down; /* pull down */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| wcd_usbc_analog_en2 { |
| wcd_usbc_analog_en2_idle: wcd_usbc_ana_en2_idle { |
| mux { |
| pins = "gpio40"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio40"; |
| drive-strength = <2>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| |
| wcd_usbc_analog_en2_active: wcd_usbc_ana_en2_active { |
| mux { |
| pins = "gpio40"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio40"; |
| drive-strength = <2>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| wcd9xxx_intr { |
| wcd_intr_default: wcd_intr_default{ |
| mux { |
| pins = "gpio80"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| gpio_jack_det_line_in { |
| jack_det_linein_default: jack_det_linein_default { |
| mux { |
| pins = "gpio124"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio124"; |
| bias-pull-up; /* pull up */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| gpio_jack_det_line_out { |
| jack_det_lineout_default: jack_det_lineout_default { |
| mux { |
| pins = "gpio125"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio125"; |
| bias-pull-up; /* pull up */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| flash_led3_front { |
| flash_led3_front_en: flash_led3_front_en { |
| mux { |
| pins = "gpio21"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive_strength = <2>; |
| output-high; |
| bias-disable; |
| }; |
| }; |
| |
| flash_led3_front_dis: flash_led3_front_dis { |
| mux { |
| pins = "gpio21"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio21"; |
| drive_strength = <2>; |
| output-low; |
| bias-disable; |
| }; |
| }; |
| }; |
| |
| /* Pinctrl setting for CAMERA GPIO key */ |
| key_cam_snapshot { |
| key_cam_snapshot_default: key_cam_snapshot_default { |
| pins = "gpio91"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| key_cam_focus { |
| key_cam_focus_default: key_cam_focus_default { |
| pins = "gpio92"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| aqt_intr { |
| aqt_intr_default: aqt_intr_default{ |
| mux { |
| pins = "gpio79"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio79"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* pull down */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| aqt_rst_gpio { |
| aqt_rst_idle: aqt_rst_idle{ |
| mux { |
| pins = "gpio80"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80"; |
| drive-strength = <8>; |
| bias-pull-down; |
| output-low; |
| }; |
| }; |
| aqt_rst_active: aqt_rst_active{ |
| mux { |
| pins = "gpio80"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio80"; |
| drive-strength = <8>; |
| bias-disable; |
| output-high; |
| }; |
| }; |
| }; |
| |
| ter_i2s_sck_ws { |
| ter_i2s_sck_sleep: ter_i2s_sck_sleep { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| }; |
| }; |
| |
| ter_i2s_sck_active: ter_i2s_sck_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| ter_i2s_data0 { |
| ter_i2s_data0_sleep: ter_i2s_data0_sleep { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <2>; /* 2 mA */ |
| }; |
| }; |
| |
| ter_i2s_data0_active: ter_i2s_data0_active { |
| mux { |
| pins = "gpio77"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio77"; |
| drive-strength = <8>; /* 8 mA */ |
| input-enable; |
| }; |
| }; |
| }; |
| |
| ter_i2s_data1 { |
| ter_i2s_data1_sleep: ter_i2s_data1_sleep { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <2>; /* 2 mA */ |
| }; |
| }; |
| |
| ter_i2s_data1_active: ter_i2s_data1_active { |
| mux { |
| pins = "gpio78"; |
| function = "ter_mi2s"; |
| }; |
| |
| config { |
| pins = "gpio78"; |
| drive-strength = <8>; /* 8 mA */ |
| output-high; |
| }; |
| }; |
| }; |
| |
| pmx_sde: pmx_sde { |
| sde_dsi_active: sde_dsi_active { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <8>; /* 8 mA */ |
| bias-disable = <0>; /* no pull */ |
| }; |
| }; |
| sde_dsi_suspend: sde_dsi_suspend { |
| mux { |
| pins = "gpio75", "gpio76"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio75", "gpio76"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| }; |
| |
| pmx_sde_te { |
| sde_te_active: sde_te_active { |
| mux { |
| pins = "gpio10"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| |
| sde_te_suspend: sde_te_suspend { |
| mux { |
| pins = "gpio10"; |
| function = "mdp_vsync"; |
| }; |
| |
| config { |
| pins = "gpio10"; |
| drive-strength = <2>; /* 2 mA */ |
| bias-pull-down; /* PULL DOWN */ |
| }; |
| }; |
| }; |
| |
| sde_dp_aux_active: sde_dp_aux_active { |
| mux { |
| pins = "gpio40", "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio40", "gpio50"; |
| bias-disable = <0>; /* no pull */ |
| drive-strength = <8>; |
| }; |
| }; |
| |
| sde_dp_aux_suspend: sde_dp_aux_suspend { |
| mux { |
| pins = "gpio40", "gpio50"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio40", "gpio50"; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| sde_dp_usbplug_cc_active: sde_dp_usbplug_cc_active { |
| mux { |
| pins = "gpio38"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio38"; |
| bias-disable; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_dp_usbplug_cc_suspend: sde_dp_usbplug_cc_suspend { |
| mux { |
| pins = "gpio38"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio38"; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| sde_led_5v_en_active: sde_led_5v_en_active { |
| mux { |
| pins = "gpio134"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio134"; |
| bias-disable; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_led_5v_en_suspend: sde_led_5v_en_suspend { |
| mux { |
| pins = "gpio134"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio134"; |
| bias-pull-down; |
| drive-strength = <2>; |
| }; |
| }; |
| |
| sde_selb_gpio: sde_selb_gpio { |
| mux { |
| pins = "gpio105"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio105"; |
| bias-disable; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_oenb_gpio: sde_oenb_gpio { |
| mux { |
| pins = "gpio106"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio106"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_sela_gpio: sde_sela_gpio { |
| mux { |
| pins = "gpio0"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio0"; |
| bias-disable; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_oena_gpio: sde_oena_gpio { |
| mux { |
| pins = "gpio1"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio1"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_1p8_en_gpio: sde_1p8_en_gpio { |
| mux { |
| pins = "gpio2"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio2"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_led_driver_en1_gpio: sde_led_driver_en1_gpio { |
| mux { |
| pins = "gpio110"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio110"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_led_driver_en2_gpio: sde_led_driver_en2_gpio { |
| mux { |
| pins = "gpio111"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio111"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| sde_switch_pwer_gpio: sde_switch_pwer_gpio { |
| mux { |
| pins = "gpio112"; |
| function = "gpio"; |
| }; |
| config { |
| pins = "gpio108"; |
| bias-pull-down; |
| drive-strength = <16>; |
| }; |
| }; |
| |
| cci0_active: cci0_active { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio17","gpio18"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio17","gpio18"; |
| bias-pull-up; /* PULL UP*/ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci0_suspend: cci0_suspend { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio17","gpio18"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio17","gpio18"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci1_active: cci1_active { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio19","gpio20"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio19","gpio20"; |
| bias-pull-up; /* PULL UP*/ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cci1_suspend: cci1_suspend { |
| mux { |
| /* CLK, DATA */ |
| pins = "gpio19","gpio20"; |
| function = "cci_i2c"; |
| }; |
| |
| config { |
| pins = "gpio19","gpio20"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbr_active: cam_sensor_rgbr_active { |
| /* RESET */ |
| mux { |
| pins = "gpio27"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbr_suspend: cam_sensor_rgbr_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio27"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio27"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_rear_active: cam_sensor_rear_active { |
| /* RESET */ |
| mux { |
| pins = "gpio30"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio30"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear_suspend: cam_sensor_rear_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio30"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio30"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_rear_vana: cam_sensor_rear_vana { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbr_vana: cam_sensor_rgbr_vana { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio8"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio8"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbr_vdig: cam_sensor_rgbr_vdig { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio29"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio29"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbr_vio: cam_sensor_rgbr_vio { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio30"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio30"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_eyet_vio: cam_sensor_eyet_vio { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio107"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio107"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| cam_sensor_eyet_vana: cam_sensor_eyet_vana { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio11"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio11"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| cam_sensor_eyet_vdig: cam_sensor_eyet_vdig { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio12"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio12"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_6dof_vana: cam_sensor_6dof_vana { |
| /* AVDD LDO */ |
| mux { |
| pins = "gpio145"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio145"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_6dof_vdig: cam_sensor_6dof_vdig { |
| /* VDIG LDO */ |
| mux { |
| pins = "gpio144"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio144"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_6dof_vio: cam_sensor_6dof_vio { |
| /* VIO LDO */ |
| mux { |
| pins = "gpio143"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio143"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear_vio: cam_sensor_rear_vio { |
| /* DOVDD LDO */ |
| mux { |
| pins = "gpio29"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio29"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk0_active: cam_sensor_mclk0_active { |
| /* MCLK0 */ |
| mux { |
| pins = "gpio13"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { |
| /* MCLK0 */ |
| mux { |
| pins = "gpio13"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio13"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_front_active: cam_sensor_front_active { |
| /* RESET */ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_front_suspend: cam_sensor_front_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio9"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio9"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_6dof_active: cam_sensor_6dof_active { |
| /* RESET */ |
| mux { |
| pins = "gpio24"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio24"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_6dof_suspend: cam_sensor_6dof_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio24"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio24"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| cam_sensor_eyet_active: cam_sensor_eyet_active { |
| /* RESET */ |
| mux { |
| pins = "gpio25"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| cam_sensor_eyet_suspend: cam_sensor_eyet_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio25"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio25"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_rear2_active: cam_sensor_rear2_active { |
| /* RESET */ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rear2_suspend: cam_sensor_rear2_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_rgbl_active: cam_sensor_rgbl_active { |
| /* RESET */ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_rgbl_suspend: cam_sensor_rgbl_suspend { |
| /* RESET */ |
| mux { |
| pins = "gpio28"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio28"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| output-low; |
| }; |
| }; |
| |
| cam_sensor_mclk1_active: cam_sensor_mclk1_active { |
| /* MCLK1 */ |
| mux { |
| pins = "gpio14"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { |
| /* MCLK1 */ |
| mux { |
| pins = "gpio14"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio14"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk2_active: cam_sensor_mclk2_active { |
| /* MCLK2 */ |
| mux { |
| pins = "gpio15"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { |
| /* MCLK2 */ |
| mux { |
| pins = "gpio15"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio15"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_ir_led_on: cam_sensor_ir_led_on { |
| /*IR_LED*/ |
| mux { |
| pins = "gpio22", "gpio141", "gpio142", |
| "gpio107", "gpio110"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio141", "gpio142", |
| "gpio107", "gpio110"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_ir_led_off: cam_sensor_ir_led_off { |
| /*IR_LED*/ |
| mux { |
| pins = "gpio22", "gpio141", "gpio142", |
| "gpio107", "gpio110"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio22", "gpio141", "gpio142", |
| "gpio107", "gpio110"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| nx30p6093_intr_default: nx30p6093_intr_default { |
| mux { |
| pins = "gpio5"; |
| function = "gpio"; |
| }; |
| |
| config { |
| pins = "gpio5"; |
| bias-disable; |
| input-enable; |
| }; |
| }; |
| |
| cam_sensor_mclk3_active: cam_sensor_mclk3_active { |
| /* MCLK3 */ |
| mux { |
| pins = "gpio16"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| bias-disable; /* No PULL */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { |
| /* MCLK3 */ |
| mux { |
| pins = "gpio16"; |
| function = "cam_mclk"; |
| }; |
| |
| config { |
| pins = "gpio16"; |
| bias-pull-down; /* PULL DOWN */ |
| drive-strength = <2>; /* 2 MA */ |
| }; |
| }; |
| |
| }; |
| }; |
| |
| &pm660_gpios { |
| tasha_mclk { |
| tasha_mclk_default: tasha_mclk_default{ |
| pins = "gpio3"; |
| function = "func1"; |
| qcom,drive-strength = <2>; |
| power-source = <0>; |
| bias-disable; |
| output-low; |
| }; |
| }; |
| }; |
| |
| &pm660l_gpios { |
| camera_rear_dvdd_en { |
| camera_rear_dvdd_en_default: camera_rear_dvdd_en_default { |
| pins = "gpio4"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| |
| camera_dvdd_en { |
| camera_dvdd_en_default: camera_dvdd_en_default { |
| pins = "gpio3"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| }; |
| }; |
| |
| &pm660l_gpios { |
| camera0_dvdd_en_default: camera0_dvdd_en_default { |
| pins = "gpio3"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| |
| camera1_dvdd_en_default: camera1_dvdd_en_default { |
| pins = "gpio4"; |
| function = "normal"; |
| power-source = <0>; |
| output-low; |
| }; |
| |
| key_home { |
| key_home_default: key_home_default { |
| pins = "gpio5"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| |
| key_vol_up { |
| key_vol_up_default: key_vol_up_default { |
| pins = "gpio7"; |
| function = "normal"; |
| input-enable; |
| bias-pull-up; |
| power-source = <0>; |
| }; |
| }; |
| }; |
| |
| &pm660_gpios { |
| nfc_clk { |
| nfc_clk_default: nfc_clk_default { |
| pins = "gpio4"; |
| function = "normal"; |
| input-enable; |
| power-source = <1>; |
| }; |
| }; |
| smb_shutdown_default: smb_shutdown_default { |
| pins = "gpio11"; |
| function = "normal"; |
| power-source = <0>; |
| qcom,drive-strength = <3>; |
| output-high; |
| }; |
| }; |