ARM: dts: msm: Add support for speed-bin 4 for SDM439/429
Add speed-bin 4 to support the fmax of 2.016GHz for cpu clock.
Change-Id: I8d32e926fa1eace84bcfa654927fa2c7dffa8a77
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm429.dtsi b/arch/arm64/boot/dts/qcom/sdm429.dtsi
index 8366032..06c54a1 100644
--- a/arch/arm64/boot/dts/qcom/sdm429.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm429.dtsi
@@ -60,7 +60,8 @@
< 1497600 >,
< 1708800 >,
< 1804800 >,
- < 1958400 >;
+ < 1958400 >,
+ < 2016000 >;
};
/delete-node/ devfreq-cpufreq;
@@ -73,7 +74,8 @@
< 1497600 5712 >,
< 1708800 6445 >,
< 1804800 7104 >,
- < 1958400 7104 >;
+ < 1958400 7104 >,
+ < 2016000 7104 >;
};
cci-cpufreq {
@@ -84,7 +86,8 @@
< 1497600 400000 >,
< 1708800 533000 >,
< 1804800 576000 >,
- < 1958400 576000 >;
+ < 1958400 576000 >,
+ < 2016000 576000 >;
};
mincpubw-cpufreq {
@@ -203,6 +206,20 @@
< 400000000 1>,
< 533333333 3>;
+ qcom,speed4-bin-v0-c1 =
+ < 0 0>,
+ < 960000000 1>,
+ < 1305600000 1>,
+ < 1497600000 2>,
+ < 1708800000 3>,
+ < 1958400000 5>,
+ < 2016000000 6>;
+
+ qcom,speed4-bin-v0-cci =
+ < 0 0>,
+ < 400000000 1>,
+ < 533333333 3>;
+
#clock-cells = <1>;
};
diff --git a/arch/arm64/boot/dts/qcom/sdm439.dtsi b/arch/arm64/boot/dts/qcom/sdm439.dtsi
index dc651d3..a59b457 100644
--- a/arch/arm64/boot/dts/qcom/sdm439.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm439.dtsi
@@ -55,7 +55,8 @@
< 1497600 >,
< 1708800 >,
< 1804800 >,
- < 1958400 >;
+ < 1958400 >,
+ < 2016000 >;
qcom,cpufreq-table-4 =
< 768000 >,
@@ -128,7 +129,8 @@
< 1497600 5712 >,
< 1708800 6445 >,
< 1804800 7104 >,
- < 1958400 7104 >;
+ < 1958400 7104 >,
+ < 2016000 7104 >;
cpu-to-dev-map-4 =
< 768000 2929 >,
< 998400 5053 >,
@@ -145,7 +147,8 @@
< 1497600 400000 >,
< 1708800 533000 >,
< 1804800 576000 >,
- < 1958400 576000 >;
+ < 1958400 576000 >,
+ < 2016000 576000 >;
cpu-to-dev-map-4 =
< 768000 400000 >,
< 998400 400000 >,
@@ -325,6 +328,28 @@
< 0 0>,
< 400000000 1>,
< 533333333 3>;
+
+ qcom,speed4-bin-v0-c0 =
+ < 0 0>,
+ < 768000000 1>,
+ < 998400000 1>,
+ < 1171200000 2>,
+ < 1305600000 3>,
+ < 1459200000 5>;
+
+ qcom,speed4-bin-v0-c1 =
+ < 0 0>,
+ < 960000000 1>,
+ < 1305600000 1>,
+ < 1497600000 2>,
+ < 1708800000 3>,
+ < 1958400000 5>,
+ < 2016000000 6>;
+
+ qcom,speed4-bin-v0-cci =
+ < 0 0>,
+ < 400000000 1>,
+ < 533333333 3>;
};
&clock_gcc {