| commit | f142e5eeb724cfbedd203b32b3b542d78dbe2545 | [log] [tgz] |
|---|---|---|
| author | Marc Zyngier <marc.zyngier@arm.com> | Tue Jun 11 18:05:25 2013 +0100 |
| committer | Marc Zyngier <marc.zyngier@arm.com> | Fri Aug 09 13:19:28 2013 +0100 |
| tree | 59f6c4d3927ecceecb9541d194e4ec9c8a12db0b | |
| parent | 1bbd80549810637b7381ab0649ba7c7d62f1342a [diff] |
arm64: KVM: add missing dsb before invalidating Stage-2 TLBs When performing a Stage-2 TLB invalidation, it is necessary to make sure the write to the page tables is observable by all CPUs. For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa and __kvm_flush_vm_context before doing the TLB invalidation itself. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>