| /* |
| * Device Tree Source for the Wheat board |
| * |
| * Copyright (C) 2016 Renesas Electronics Corporation |
| * Copyright (C) 2016 Cogent Embedded, Inc. |
| * |
| * This file is licensed under the terms of the GNU General Public License |
| * version 2. This program is licensed "as is" without any warranty of any |
| * kind, whether express or implied. |
| */ |
| |
| /dts-v1/; |
| #include "r8a7792.dtsi" |
| #include <dt-bindings/gpio/gpio.h> |
| #include <dt-bindings/input/input.h> |
| |
| / { |
| model = "Wheat"; |
| compatible = "renesas,wheat", "renesas,r8a7792"; |
| |
| aliases { |
| serial0 = &scif0; |
| }; |
| |
| chosen { |
| bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; |
| stdout-path = "serial0:115200n8"; |
| }; |
| |
| memory@40000000 { |
| device_type = "memory"; |
| reg = <0 0x40000000 0 0x40000000>; |
| }; |
| |
| d3_3v: regulator-3v3 { |
| compatible = "regulator-fixed"; |
| regulator-name = "D3.3V"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| regulator-boot-on; |
| regulator-always-on; |
| }; |
| |
| ethernet@18000000 { |
| compatible = "smsc,lan89218", "smsc,lan9115"; |
| reg = <0 0x18000000 0 0x100>; |
| phy-mode = "mii"; |
| interrupt-parent = <&irqc>; |
| interrupts = <0 IRQ_TYPE_EDGE_FALLING>; |
| smsc,irq-push-pull; |
| smsc,save-mac-address; |
| reg-io-width = <4>; |
| vddvario-supply = <&d3_3v>; |
| vdd33a-supply = <&d3_3v>; |
| |
| pinctrl-0 = <&lan89218_pins>; |
| pinctrl-names = "default"; |
| }; |
| |
| keyboard { |
| compatible = "gpio-keys"; |
| |
| key-a { |
| linux,code = <KEY_A>; |
| label = "SW2"; |
| wakeup-source; |
| debounce-interval = <20>; |
| gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; |
| }; |
| key-b { |
| linux,code = <KEY_B>; |
| label = "SW3"; |
| wakeup-source; |
| debounce-interval = <20>; |
| gpios = <&gpio11 2 GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| vcc_sdhi0: regulator-vcc-sdhi0 { |
| compatible = "regulator-fixed"; |
| |
| regulator-name = "SDHI0 Vcc"; |
| regulator-min-microvolt = <3300000>; |
| regulator-max-microvolt = <3300000>; |
| |
| gpio = <&gpio11 12 GPIO_ACTIVE_HIGH>; |
| enable-active-high; |
| }; |
| }; |
| |
| &extal_clk { |
| clock-frequency = <20000000>; |
| }; |
| |
| &pfc { |
| scif0_pins: scif0 { |
| groups = "scif0_data"; |
| function = "scif0"; |
| }; |
| |
| lan89218_pins: lan89218 { |
| intc { |
| groups = "intc_irq0"; |
| function = "intc"; |
| }; |
| lbsc { |
| groups = "lbsc_ex_cs0"; |
| function = "lbsc"; |
| }; |
| }; |
| |
| can0_pins: can0 { |
| groups = "can0_data"; |
| function = "can0"; |
| }; |
| |
| can1_pins: can1 { |
| groups = "can1_data"; |
| function = "can1"; |
| }; |
| |
| sdhi0_pins: sdhi0 { |
| groups = "sdhi0_data4", "sdhi0_ctrl"; |
| function = "sdhi0"; |
| }; |
| |
| qspi_pins: qspi { |
| groups = "qspi_ctrl", "qspi_data4"; |
| function = "qspi"; |
| }; |
| }; |
| |
| &scif0 { |
| pinctrl-0 = <&scif0_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &can0 { |
| pinctrl-0 = <&can0_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &can1 { |
| pinctrl-0 = <&can1_pins>; |
| pinctrl-names = "default"; |
| |
| status = "okay"; |
| }; |
| |
| &sdhi0 { |
| pinctrl-0 = <&sdhi0_pins>; |
| pinctrl-names = "default"; |
| |
| vmmc-supply = <&vcc_sdhi0>; |
| cd-gpios = <&gpio11 11 GPIO_ACTIVE_LOW>; |
| status = "okay"; |
| }; |
| |
| &qspi { |
| pinctrl-0 = <&qspi_pins>; |
| pinctrl-names = "default"; |
| status = "okay"; |
| |
| flash@0 { |
| compatible = "spansion,s25fl512s", "jedec,spi-nor"; |
| reg = <0>; |
| spi-max-frequency = <30000000>; |
| spi-tx-bus-width = <4>; |
| spi-rx-bus-width = <4>; |
| spi-cpol; |
| spi-cpha; |
| m25p,fast-read; |
| |
| partitions { |
| compatible = "fixed-partitions"; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| partition@0 { |
| label = "loader"; |
| reg = <0x00000000 0x00040000>; |
| read-only; |
| }; |
| partition@40000 { |
| label = "user"; |
| reg = <0x00040000 0x00400000>; |
| read-only; |
| }; |
| partition@440000 { |
| label = "flash"; |
| reg = <0x00440000 0x03bc0000>; |
| }; |
| }; |
| }; |
| }; |