| Byungho Min | 8acd1ad | 2009-06-23 21:40:15 +0900 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s5pc100/cpu.c |
| 2 | * |
| 3 | * Copyright 2009 Samsung Electronics Co. |
| 4 | * Byungho Min <bhmin@samsung.com> |
| 5 | * |
| 6 | * Based on mach-s3c6410/cpu.c |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/types.h> |
| 15 | #include <linux/interrupt.h> |
| 16 | #include <linux/list.h> |
| 17 | #include <linux/timer.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/clk.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/sysdev.h> |
| 22 | #include <linux/serial_core.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | |
| 25 | #include <asm/mach/arch.h> |
| 26 | #include <asm/mach/map.h> |
| 27 | #include <asm/mach/irq.h> |
| 28 | |
| 29 | #include <mach/hardware.h> |
| 30 | #include <mach/map.h> |
| 31 | #include <asm/irq.h> |
| 32 | |
| 33 | #include <plat/cpu-freq.h> |
| 34 | #include <plat/regs-serial.h> |
| 35 | |
| 36 | #include <plat/cpu.h> |
| 37 | #include <plat/devs.h> |
| 38 | #include <plat/clock.h> |
| 39 | #include <plat/sdhci.h> |
| 40 | #include <plat/iic-core.h> |
| 41 | #include <plat/s5pc100.h> |
| 42 | |
| 43 | /* Initial IO mappings */ |
| 44 | |
| 45 | static struct map_desc s5pc100_iodesc[] __initdata = { |
| 46 | }; |
| 47 | |
| 48 | /* s5pc100_map_io |
| 49 | * |
| 50 | * register the standard cpu IO areas |
| 51 | */ |
| 52 | |
| 53 | void __init s5pc100_map_io(void) |
| 54 | { |
| 55 | iotable_init(s5pc100_iodesc, ARRAY_SIZE(s5pc100_iodesc)); |
| 56 | |
| 57 | /* initialise device information early */ |
| 58 | } |
| 59 | |
| 60 | void __init s5pc100_init_clocks(int xtal) |
| 61 | { |
| 62 | printk(KERN_DEBUG "%s: initialising clocks\n", __func__); |
| 63 | s3c24xx_register_baseclocks(xtal); |
| 64 | s5pc1xx_register_clocks(); |
| 65 | s5pc100_register_clocks(); |
| 66 | s5pc100_setup_clocks(); |
| 67 | } |
| 68 | |
| 69 | void __init s5pc100_init_irq(void) |
| 70 | { |
| 71 | u32 vic_valid[] = {~0, ~0, ~0}; |
| 72 | |
| 73 | /* VIC0, VIC1, and VIC2 are fully populated. */ |
| 74 | s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid)); |
| 75 | } |
| 76 | |
| 77 | struct sysdev_class s5pc100_sysclass = { |
| 78 | .name = "s5pc100-core", |
| 79 | }; |
| 80 | |
| 81 | static struct sys_device s5pc100_sysdev = { |
| 82 | .cls = &s5pc100_sysclass, |
| 83 | }; |
| 84 | |
| 85 | static int __init s5pc100_core_init(void) |
| 86 | { |
| 87 | return sysdev_class_register(&s5pc100_sysclass); |
| 88 | } |
| 89 | |
| 90 | core_initcall(s5pc100_core_init); |
| 91 | |
| 92 | int __init s5pc100_init(void) |
| 93 | { |
| 94 | printk(KERN_DEBUG "S5PC100: Initialising architecture\n"); |
| 95 | |
| 96 | return sysdev_register(&s5pc100_sysdev); |
| 97 | } |