blob: 6646adb1fb174ca883f548368a94cd168fb558ac [file] [log] [blame]
Paul Zimmerman99882e32013-03-11 17:48:01 -07001/*
2 * pci.c - DesignWare HS OTG Controller PCI driver
3 *
4 * Copyright (C) 2004-2013 Synopsys, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
18 *
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
22 * later version.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 */
36
37/*
38 * Provides the initialization and cleanup entry points for the DWC_otg PCI
39 * driver
40 */
41#include <linux/kernel.h>
42#include <linux/module.h>
43#include <linux/moduleparam.h>
44#include <linux/spinlock.h>
45#include <linux/interrupt.h>
46#include <linux/io.h>
47#include <linux/slab.h>
48#include <linux/pci.h>
49#include <linux/usb.h>
50
51#include <linux/usb/hcd.h>
52#include <linux/usb/ch11.h>
53
54#include "core.h"
55#include "hcd.h"
56
Paul Zimmerman99882e32013-03-11 17:48:01 -070057#define PCI_PRODUCT_ID_HAPS_HSOTG 0xabc0
58
Matthijs Kooijman050232a2013-04-11 18:43:46 +020059static const char dwc2_driver_name[] = "dwc2";
Paul Zimmerman99882e32013-03-11 17:48:01 -070060
Stephen Warren90dbcea2013-04-29 19:49:08 +000061static const struct dwc2_core_params dwc2_module_params = {
Paul Zimmerman99882e32013-03-11 17:48:01 -070062 .otg_cap = -1,
63 .otg_ver = -1,
64 .dma_enable = -1,
65 .dma_desc_enable = 0,
66 .speed = -1,
67 .enable_dynamic_fifo = -1,
68 .en_multiple_tx_fifo = -1,
69 .host_rx_fifo_size = 1024,
70 .host_nperio_tx_fifo_size = 256,
71 .host_perio_tx_fifo_size = 1024,
72 .max_transfer_size = 65535,
73 .max_packet_count = 511,
74 .host_channels = -1,
75 .phy_type = -1,
Matthijs Kooijmande4a1932013-08-30 18:45:22 +020076 .phy_utmi_width = -1,
Paul Zimmerman99882e32013-03-11 17:48:01 -070077 .phy_ulpi_ddr = -1,
78 .phy_ulpi_ext_vbus = -1,
79 .i2c_enable = -1,
80 .ulpi_fs_ls = -1,
81 .host_support_fs_ls_low_power = -1,
82 .host_ls_low_power_phy_clk = -1,
83 .ts_dline = -1,
84 .reload_ctl = -1,
Paul Zimmerman4d3190e2013-07-16 12:22:12 -070085 .ahbcfg = -1,
Dom Cobley20f2eb92013-09-23 14:23:34 -070086 .uframe_sched = -1,
Paul Zimmerman99882e32013-03-11 17:48:01 -070087};
88
89/**
90 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
91 * DWC_otg driver
92 *
93 * @dev: Bus device
94 *
95 * This routine is called, for example, when the rmmod command is executed. The
96 * device may or may not be electrically present. If it is present, the driver
97 * stops device processing. Any resources used on behalf of this device are
98 * freed.
99 */
100static void dwc2_driver_remove(struct pci_dev *dev)
101{
102 struct dwc2_hsotg *hsotg = pci_get_drvdata(dev);
103
Paul Zimmermane62662c2013-03-25 17:03:35 -0700104 dwc2_hcd_remove(hsotg);
Paul Zimmerman99882e32013-03-11 17:48:01 -0700105 pci_disable_device(dev);
106}
107
108/**
109 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
110 * driver
111 *
112 * @dev: Bus device
113 *
114 * This routine creates the driver components required to control the device
115 * (core, HCD, and PCD) and initializes the device. The driver components are
116 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
117 * in the device private data. This allows the driver to access the dwc2_hsotg
118 * structure on subsequent calls to driver methods for this device.
119 */
120static int dwc2_driver_probe(struct pci_dev *dev,
121 const struct pci_device_id *id)
122{
123 struct dwc2_hsotg *hsotg;
124 int retval;
125
Paul Zimmerman99882e32013-03-11 17:48:01 -0700126 hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
127 if (!hsotg)
128 return -ENOMEM;
129
Paul Zimmermane62662c2013-03-25 17:03:35 -0700130 hsotg->dev = &dev->dev;
Laurent Navet1b6cb292013-05-02 13:23:17 +0200131 hsotg->regs = devm_ioremap_resource(&dev->dev, &dev->resource[0]);
132 if (IS_ERR(hsotg->regs))
133 return PTR_ERR(hsotg->regs);
Paul Zimmerman99882e32013-03-11 17:48:01 -0700134
135 dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
136 (unsigned long)pci_resource_start(dev, 0), hsotg->regs);
137
138 if (pci_enable_device(dev) < 0)
139 return -ENODEV;
140
141 pci_set_master(dev);
142
Dinh Nguyendb8178c2014-11-11 11:13:37 -0600143 retval = devm_request_irq(hsotg->dev, dev->irq,
144 dwc2_handle_common_intr, IRQF_SHARED,
145 dev_name(hsotg->dev), hsotg);
146 if (retval)
147 return retval;
148
Dinh Nguyen117777b2014-11-11 11:13:34 -0600149 spin_lock_init(&hsotg->lock);
Paul Zimmermane62662c2013-03-25 17:03:35 -0700150 retval = dwc2_hcd_init(hsotg, dev->irq, &dwc2_module_params);
Paul Zimmerman99882e32013-03-11 17:48:01 -0700151 if (retval) {
152 pci_disable_device(dev);
153 return retval;
154 }
155
156 pci_set_drvdata(dev, hsotg);
Paul Zimmerman99882e32013-03-11 17:48:01 -0700157
Paul Zimmerman99882e32013-03-11 17:48:01 -0700158 return retval;
159}
160
Jingoo Han41e043f2013-12-03 08:26:00 +0900161static const struct pci_device_id dwc2_pci_ids[] = {
Paul Zimmerman99882e32013-03-11 17:48:01 -0700162 {
163 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, PCI_PRODUCT_ID_HAPS_HSOTG),
164 },
Federico Vaga25f73e62013-05-13 19:54:12 +0200165 {
166 PCI_DEVICE(PCI_VENDOR_ID_STMICRO,
167 PCI_DEVICE_ID_STMICRO_USB_OTG),
168 },
Paul Zimmerman99882e32013-03-11 17:48:01 -0700169 { /* end: all zeroes */ }
170};
171MODULE_DEVICE_TABLE(pci, dwc2_pci_ids);
172
173static struct pci_driver dwc2_pci_driver = {
174 .name = dwc2_driver_name,
175 .id_table = dwc2_pci_ids,
176 .probe = dwc2_driver_probe,
177 .remove = dwc2_driver_remove,
178};
179
180module_pci_driver(dwc2_pci_driver);
181
182MODULE_DESCRIPTION("DESIGNWARE HS OTG PCI Bus Glue");
183MODULE_AUTHOR("Synopsys, Inc.");
184MODULE_LICENSE("Dual BSD/GPL");