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Koro Chenee0bcaf2015-06-15 22:38:02 +08001/*
2 * mtk_afe_common.h -- Mediatek audio driver common definitions
3 *
4 * Copyright (c) 2015 MediaTek Inc.
5 * Author: Koro Chen <koro.chen@mediatek.com>
6 * Sascha Hauer <s.hauer@pengutronix.de>
7 * Hidalgo Huang <hidalgo.huang@mediatek.com>
8 * Ir Lian <ir.lian@mediatek.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 and
12 * only version 2 as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#ifndef _MTK_AFE_COMMON_H_
21#define _MTK_AFE_COMMON_H_
22
23#include <linux/clk.h>
24#include <linux/regmap.h>
25
26enum {
27 MTK_AFE_MEMIF_DL1,
28 MTK_AFE_MEMIF_DL2,
29 MTK_AFE_MEMIF_VUL,
30 MTK_AFE_MEMIF_DAI,
31 MTK_AFE_MEMIF_AWB,
32 MTK_AFE_MEMIF_MOD_DAI,
33 MTK_AFE_MEMIF_HDMI,
34 MTK_AFE_MEMIF_NUM,
35 MTK_AFE_IO_MOD_PCM1 = MTK_AFE_MEMIF_NUM,
36 MTK_AFE_IO_MOD_PCM2,
37 MTK_AFE_IO_PMIC,
38 MTK_AFE_IO_I2S,
39 MTK_AFE_IO_2ND_I2S,
40 MTK_AFE_IO_HW_GAIN1,
41 MTK_AFE_IO_HW_GAIN2,
42 MTK_AFE_IO_MRG_O,
43 MTK_AFE_IO_MRG_I,
44 MTK_AFE_IO_DAIBT,
45 MTK_AFE_IO_HDMI,
46};
47
48enum {
49 MTK_AFE_IRQ_1,
50 MTK_AFE_IRQ_2,
51 MTK_AFE_IRQ_3,
52 MTK_AFE_IRQ_4,
53 MTK_AFE_IRQ_5,
54 MTK_AFE_IRQ_6,
55 MTK_AFE_IRQ_7,
56 MTK_AFE_IRQ_8,
57 MTK_AFE_IRQ_NUM,
58};
59
60enum {
61 MTK_CLK_INFRASYS_AUD,
62 MTK_CLK_TOP_PDN_AUD,
63 MTK_CLK_TOP_PDN_AUD_BUS,
64 MTK_CLK_I2S0_M,
65 MTK_CLK_I2S1_M,
66 MTK_CLK_I2S2_M,
67 MTK_CLK_I2S3_M,
68 MTK_CLK_I2S3_B,
69 MTK_CLK_BCK0,
70 MTK_CLK_BCK1,
71 MTK_CLK_NUM
72};
73
74struct mtk_afe;
75struct snd_pcm_substream;
76
77struct mtk_afe_memif_data {
78 int id;
79 const char *name;
80 int reg_ofs_base;
81 int reg_ofs_cur;
82 int fs_shift;
83 int mono_shift;
84 int enable_shift;
85 int irq_reg_cnt;
86 int irq_cnt_shift;
87 int irq_en_shift;
88 int irq_fs_shift;
89 int irq_clr_shift;
PC Liaofcde5a72016-01-12 14:33:42 +080090 int msb_shift;
Koro Chenee0bcaf2015-06-15 22:38:02 +080091};
92
93struct mtk_afe_memif {
94 unsigned int phys_buf_addr;
95 int buffer_size;
Koro Chenee0bcaf2015-06-15 22:38:02 +080096 struct snd_pcm_substream *substream;
97 const struct mtk_afe_memif_data *data;
98 const struct mtk_afe_irq_data *irqdata;
99};
100
Koro Chenee0bcaf2015-06-15 22:38:02 +0800101#endif