blob: cdfa6c2b7626f3a761364ac072fc359b5f02592a [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001config ARM
2 bool
3 default y
Catalin Marinas74634492012-07-30 14:41:09 -07004 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
Dan Williams21266be2015-11-19 18:19:29 -08005 select ARCH_HAS_DEVMEM_IS_ALLOWED
Kees Cook2b68f6c2015-04-14 15:48:00 -07006 select ARCH_HAS_ELF_RANDOMIZE
Mark Rutland3d067702012-10-30 12:13:42 +00007 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
Russell King171b3f02013-09-12 21:24:42 +01008 select ARCH_HAVE_CUSTOM_GPIO_H
Riku Voipio957e3fa2014-12-12 16:57:44 -08009 select ARCH_HAS_GCOV_PROFILE_ALL
Mark Salterd7018842013-10-07 22:07:58 -040010 select ARCH_MIGHT_HAVE_PC_PARPORT
Peter Zijlstra4badad32014-06-06 19:53:16 +020011 select ARCH_SUPPORTS_ATOMIC_RMW
Kim Phillips017f1612013-11-06 05:15:24 +010012 select ARCH_USE_BUILTIN_BSWAP
Will Deacon0cbad9c2013-10-09 17:19:22 +010013 select ARCH_USE_CMPXCHG_LOCKREF
Russell Kingb1b3f492012-10-06 17:12:25 +010014 select ARCH_WANT_IPC_PARSE_VERSION
Stephen Boydee951c62012-10-29 19:19:34 +010015 select BUILDTIME_EXTABLE_SORT if MMU
Russell King171b3f02013-09-12 21:24:42 +010016 select CLONE_BACKWARDS
Russell Kingb1b3f492012-10-06 17:12:25 +010017 select CPU_PM if (SUSPEND || CPU_IDLE)
Will Deacondce5c9e2013-12-17 19:50:16 +010018 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS
Borislav Petkovb01aec92015-05-21 19:59:31 +020019 select EDAC_SUPPORT
20 select EDAC_ATOMIC_SCRUB
Laura Abbott36d0fd22014-10-09 15:26:42 -070021 select GENERIC_ALLOCATOR
Uwe Kleine-König4477ca42013-03-21 21:02:37 +010022 select GENERIC_ATOMIC64 if (CPU_V7M || CPU_V6 || !CPU_32v6K || !AEABI)
Russell Kingb1b3f492012-10-06 17:12:25 +010023 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
Ard Biesheuvel29373672015-09-01 08:59:28 +020024 select GENERIC_EARLY_IOREMAP
Russell King171b3f02013-09-12 21:24:42 +010025 select GENERIC_IDLE_POLL_SETUP
Russell Kingb1b3f492012-10-06 17:12:25 +010026 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
Geert Uytterhoeven7c070052015-04-01 13:37:11 +010028 select GENERIC_IRQ_SHOW_LEVEL
Russell Kingb1b3f492012-10-06 17:12:25 +010029 select GENERIC_PCI_IOMAP
Stephen Boyd38ff87f2013-06-01 23:39:40 -070030 select GENERIC_SCHED_CLOCK
Russell Kingb1b3f492012-10-06 17:12:25 +010031 select GENERIC_SMP_IDLE_THREAD
32 select GENERIC_STRNCPY_FROM_USER
33 select GENERIC_STRNLEN_USER
Marc Zyngiera71b0922014-08-26 11:03:18 +010034 select HANDLE_DOMAIN_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010035 select HARDIRQS_SW_RESEND
AKASHI Takahiro7a017722014-02-25 18:16:24 +090036 select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT)
Yalin Wang0b7857d2015-01-16 02:45:55 +010037 select HAVE_ARCH_BITREVERSE if (CPU_32v7M || CPU_32v7) && !CPU_32v6
Arnd Bergmann437682ee2015-11-19 13:30:42 +010038 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU
39 select HAVE_ARCH_KGDB if !CPU_ENDIAN_BE32 && MMU
Daniel Cashmane0c25d92016-01-14 15:19:57 -080040 select HAVE_ARCH_MMAP_RND_BITS if MMU
Kees Cook91702172013-11-09 00:51:56 +010041 select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT)
Wade Farnsworth0693bf62012-04-04 16:19:47 +010042 select HAVE_ARCH_TRACEHOOK
Jens Wiklanderb329f952016-01-04 15:42:55 +010043 select HAVE_ARM_SMCCC if CPU_V7
Russell Kingb1b3f492012-10-06 17:12:25 +010044 select HAVE_BPF_JIT
Russell King51aaf812014-04-22 22:26:27 +010045 select HAVE_CC_STACKPROTECTOR
Russell King171b3f02013-09-12 21:24:42 +010046 select HAVE_CONTEXT_TRACKING
Russell Kingb1b3f492012-10-06 17:12:25 +010047 select HAVE_C_RECORDMCOUNT
48 select HAVE_DEBUG_KMEMLEAK
49 select HAVE_DMA_API_DEBUG
Russell Kingb1b3f492012-10-06 17:12:25 +010050 select HAVE_DMA_CONTIGUOUS if MMU
Arnd Bergmann437682ee2015-11-19 13:30:42 +010051 select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) && !CPU_ENDIAN_BE32 && MMU
Will Deacondce5c9e2013-12-17 19:50:16 +010052 select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU
Russell Kingb1b3f492012-10-06 17:12:25 +010053 select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
54 select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
55 select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
56 select HAVE_GENERIC_DMA_COHERENT
Russell Kingb1b3f492012-10-06 17:12:25 +010057 select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
58 select HAVE_IDE if PCI || ISA || PCMCIA
Russell King87c46b62013-05-04 14:38:59 +010059 select HAVE_IRQ_TIME_ACCOUNTING
Russell Kingb1b3f492012-10-06 17:12:25 +010060 select HAVE_KERNEL_GZIP
Kyungsik Leef9b493a2013-07-08 16:01:48 -070061 select HAVE_KERNEL_LZ4
Russell Kingb1b3f492012-10-06 17:12:25 +010062 select HAVE_KERNEL_LZMA
63 select HAVE_KERNEL_LZO
64 select HAVE_KERNEL_XZ
Arnd Bergmanncb1293e2015-05-26 15:40:44 +010065 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
Ananth N Mavinakayanahalli9edddaa2008-03-04 14:28:37 -080066 select HAVE_KRETPROBES if (HAVE_KPROBES)
Russell Kingb1b3f492012-10-06 17:12:25 +010067 select HAVE_MEMBLOCK
Ard Biesheuvel7d485f62014-11-24 16:54:35 +010068 select HAVE_MOD_ARCH_SPECIFIC
Russell Kingb1b3f492012-10-06 17:12:25 +010069 select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
Wang Nan0dc016d2015-01-09 14:37:36 +080070 select HAVE_OPTPROBES if !THUMB2_KERNEL
Jamie Iles7ada1892010-02-02 20:24:58 +010071 select HAVE_PERF_EVENTS
Will Deacon49863892013-09-26 12:36:35 +010072 select HAVE_PERF_REGS
73 select HAVE_PERF_USER_STACK_DUMP
Steve Cappera0ad5492014-10-09 15:29:18 -070074 select HAVE_RCU_TABLE_FREE if (SMP && ARM_LPAE)
Will Deacone513f8b2010-06-25 12:24:53 +010075 select HAVE_REGS_AND_STACK_ACCESS_API
Russell Kingb1b3f492012-10-06 17:12:25 +010076 select HAVE_SYSCALL_TRACEPOINTS
Catalin Marinasaf1839e2012-10-08 16:28:08 -070077 select HAVE_UID16
Kevin Hilman31c1fc82013-09-16 15:28:22 -070078 select HAVE_VIRT_CPU_ACCOUNTING_GEN
Thomas Gleixnerda0ec6f2013-08-14 20:43:17 +010079 select IRQ_FORCED_THREADING
Russell King171b3f02013-09-12 21:24:42 +010080 select MODULES_USE_ELF_REL
Santosh Shilimkar84f452b2013-06-30 00:28:46 -040081 select NO_BOOTMEM
Arnd Bergmannaa7d5f12015-11-19 13:20:54 +010082 select OF_EARLY_FLATTREE if OF
83 select OF_RESERVED_MEM if OF
Russell King171b3f02013-09-12 21:24:42 +010084 select OLD_SIGACTION
85 select OLD_SIGSUSPEND3
Russell Kingb1b3f492012-10-06 17:12:25 +010086 select PERF_USE_VMALLOC
87 select RTC_LIB
88 select SYS_SUPPORTS_APM_EMULATION
Russell King171b3f02013-09-12 21:24:42 +010089 # Above selects are sorted alphabetically; please add new ones
90 # according to that. Thanks.
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 help
92 The ARM series is a line of low-power-consumption RISC chip designs
Martin Michlmayrf6c89652006-02-08 21:09:07 +000093 licensed by ARM Ltd and targeted at embedded applications and
Linus Torvalds1da177e2005-04-16 15:20:36 -070094 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
Martin Michlmayrf6c89652006-02-08 21:09:07 +000095 manufactured, but legacy ARM-based PC hardware remains popular in
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 Europe. There is an ARM Linux project with a web page at
97 <http://www.arm.linux.org.uk/>.
98
Russell King74facff2011-06-02 11:16:22 +010099config ARM_HAS_SG_CHAIN
Laura Abbott308c09f2014-08-08 14:23:25 -0700100 select ARCH_HAS_SG_CHAIN
Russell King74facff2011-06-02 11:16:22 +0100101 bool
102
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200103config NEED_SG_DMA_LENGTH
104 bool
105
106config ARM_DMA_USE_IOMMU
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200107 bool
Russell Kingb1b3f492012-10-06 17:12:25 +0100108 select ARM_HAS_SG_CHAIN
109 select NEED_SG_DMA_LENGTH
Marek Szyprowski4ce63fc2012-05-16 15:48:21 +0200110
Seung-Woo Kim60460ab2013-02-06 13:21:14 +0900111if ARM_DMA_USE_IOMMU
112
113config ARM_DMA_IOMMU_ALIGNMENT
114 int "Maximum PAGE_SIZE order of alignment for DMA IOMMU buffers"
115 range 4 9
116 default 8
117 help
118 DMA mapping framework by default aligns all buffers to the smallest
119 PAGE_SIZE order which is greater than or equal to the requested buffer
120 size. This works well for buffers up to a few hundreds kilobytes, but
121 for larger buffers it just a waste of address space. Drivers which has
122 relatively small addressing window (like 64Mib) might run out of
123 virtual space with just a few allocations.
124
125 With this parameter you can specify the maximum PAGE_SIZE order for
126 DMA IOMMU buffers. Larger buffers will be aligned only to this
127 specified order. The order is expressed as a power of two multiplied
128 by the PAGE_SIZE.
129
130endif
131
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100132config MIGHT_HAVE_PCI
133 bool
134
Ralf Baechle75e71532007-02-09 17:08:58 +0000135config SYS_SUPPORTS_APM_EMULATION
136 bool
137
Linus Walleijbc581772009-09-15 17:30:37 +0100138config HAVE_TCM
139 bool
140 select GENERIC_ALLOCATOR
141
Russell Kinge119bff2010-01-10 17:23:29 +0000142config HAVE_PROC_CPU
143 bool
144
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700145config NO_IOPORT_MAP
Al Viro5ea81762007-02-11 15:41:31 +0000146 bool
Al Viro5ea81762007-02-11 15:41:31 +0000147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148config EISA
149 bool
150 ---help---
151 The Extended Industry Standard Architecture (EISA) bus was
152 developed as an open alternative to the IBM MicroChannel bus.
153
154 The EISA bus provided some of the features of the IBM MicroChannel
155 bus while maintaining backward compatibility with cards made for
156 the older ISA bus. The EISA bus saw limited use between 1988 and
157 1995 when it was made obsolete by the PCI bus.
158
159 Say Y here if you are building a kernel for an EISA-based machine.
160
161 Otherwise, say N.
162
163config SBUS
164 bool
165
Russell Kingf16fb1e2007-04-28 09:59:37 +0100166config STACKTRACE_SUPPORT
167 bool
168 default y
169
170config LOCKDEP_SUPPORT
171 bool
172 default y
173
Russell King7ad1bcb2006-08-27 12:07:02 +0100174config TRACE_IRQFLAGS_SUPPORT
175 bool
Arnd Bergmanncb1293e2015-05-26 15:40:44 +0100176 default !CPU_V7M
Russell King7ad1bcb2006-08-27 12:07:02 +0100177
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178config RWSEM_XCHGADD_ALGORITHM
179 bool
Will Deacon8a874112014-05-02 17:06:19 +0100180 default y
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181
David Howellsf0d1b0b2006-12-08 02:37:49 -0800182config ARCH_HAS_ILOG2_U32
183 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800184
185config ARCH_HAS_ILOG2_U64
186 bool
David Howellsf0d1b0b2006-12-08 02:37:49 -0800187
Eduardo Valentin4a1b5732013-06-13 22:58:52 +0100188config ARCH_HAS_BANDGAP
189 bool
190
Stefan Agnera5f4c562015-08-13 00:01:52 +0100191config FIX_EARLYCON_MEM
192 def_bool y if MMU
193
Akinobu Mitab89c3b12006-03-26 01:39:19 -0800194config GENERIC_HWEIGHT
195 bool
196 default y
197
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198config GENERIC_CALIBRATE_DELAY
199 bool
200 default y
201
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100202config ARCH_MAY_HAVE_PC_FDC
203 bool
204
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800205config ZONE_DMA
206 bool
Christoph Lameter5ac6da62007-02-10 01:43:14 -0800207
FUJITA Tomonoriccd7ab72010-03-10 15:23:23 -0800208config NEED_DMA_MAP_STATE
209 def_bool y
210
David A. Longc7edc9e2014-03-07 11:23:04 -0500211config ARCH_SUPPORTS_UPROBES
212 def_bool y
213
Rob Herring58af4a22012-03-20 14:33:01 -0500214config ARCH_HAS_DMA_SET_COHERENT_MASK
215 bool
216
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217config GENERIC_ISA_DMA
218 bool
219
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220config FIQ
221 bool
222
Rob Herring13a50452012-02-07 09:28:22 -0600223config NEED_RET_TO_USER
224 bool
225
Al Viro034d2f52005-12-19 16:27:59 -0500226config ARCH_MTD_XIP
227 bool
228
Hyok S. Choic760fc12006-03-27 15:18:50 +0100229config VECTORS_BASE
230 hex
Hyok S. Choi6afd6fa2006-09-28 21:46:34 +0900231 default 0xffff0000 if MMU || CPU_HIGH_VECTOR
Hyok S. Choic760fc12006-03-27 15:18:50 +0100232 default DRAM_BASE if REMAP_VECTORS_TO_RAM
233 default 0x00000000
234 help
Russell King19accfd2013-07-04 11:40:32 +0100235 The base address of exception vectors. This must be two pages
236 in size.
Hyok S. Choic760fc12006-03-27 15:18:50 +0100237
Russell Kingdc21af92011-01-04 19:09:43 +0000238config ARM_PATCH_PHYS_VIRT
Russell Kingc1beced2011-08-10 10:23:45 +0100239 bool "Patch physical to virtual translations at runtime" if EMBEDDED
240 default y
Nicolas Pitreb511d752011-02-21 06:53:35 +0100241 depends on !XIP_KERNEL && MMU
Russell Kingdc21af92011-01-04 19:09:43 +0000242 help
Russell King111e9a52011-05-12 10:02:42 +0100243 Patch phys-to-virt and virt-to-phys translation functions at
244 boot and module load time according to the position of the
245 kernel in system memory.
Russell Kingdc21af92011-01-04 19:09:43 +0000246
Russell King111e9a52011-05-12 10:02:42 +0100247 This can only be used with non-XIP MMU kernels where the base
Nicolas Pitredaece592011-08-12 00:14:29 +0100248 of physical memory is at a 16MB boundary.
Russell Kingdc21af92011-01-04 19:09:43 +0000249
Russell Kingc1beced2011-08-10 10:23:45 +0100250 Only disable this option if you know that you do not require
251 this feature (eg, building a kernel for a single machine) and
252 you need to shrink the kernel to the minimal size.
253
Rob Herringc334bc12012-03-04 22:03:33 -0600254config NEED_MACH_IO_H
255 bool
256 help
257 Select this when mach/io.h is required to provide special
258 definitions for this platform. The need for mach/io.h should
259 be avoided when possible.
260
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400261config NEED_MACH_MEMORY_H
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400262 bool
Russell King111e9a52011-05-12 10:02:42 +0100263 help
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400264 Select this when mach/memory.h is required to provide special
265 definitions for this platform. The need for mach/memory.h should
266 be avoided when possible.
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400267
268config PHYS_OFFSET
Nicolas Pitre974c0722011-12-02 23:09:42 +0100269 hex "Physical address of main memory" if MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100270 depends on !ARM_PATCH_PHYS_VIRT
Nicolas Pitre974c0722011-12-02 23:09:42 +0100271 default DRAM_BASE if !MMU
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100272 default 0x00000000 if ARCH_EBSA110 || \
Uwe Kleine-Königc6f54a92014-07-23 20:37:43 +0100273 ARCH_FOOTBRIDGE || \
274 ARCH_INTEGRATOR || \
275 ARCH_IOP13XX || \
276 ARCH_KS8695 || \
277 (ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET)
278 default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
279 default 0x20000000 if ARCH_S5PV210
280 default 0x70000000 if REALVIEW_HIGH_PHYS_OFFSET
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700281 default 0xc0000000 if ARCH_SA1100
Nicolas Pitre1b9f95f2011-07-05 22:52:51 -0400282 help
283 Please provide the physical address corresponding to the
284 location of main memory in your system.
Russell Kingcada3c02011-01-04 19:39:29 +0000285
Simon Glass87e040b2011-08-16 23:44:26 +0100286config GENERIC_BUG
287 def_bool y
288 depends on BUG
289
Kirill A. Shutemov1bcad262015-04-14 15:45:42 -0700290config PGTABLE_LEVELS
291 int
292 default 3 if ARM_LPAE
293 default 2
294
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295source "init/Kconfig"
296
Matt Helsleydc52ddc2008-10-18 20:27:21 -0700297source "kernel/Kconfig.freezer"
298
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299menu "System Type"
300
Hyok S. Choi3c427972009-07-24 12:35:00 +0100301config MMU
302 bool "MMU-based Paged Memory Management Support"
303 default y
304 help
305 Select if you want MMU-based virtualised addressing space
306 support by paged memory management. If unsure, say 'Y'.
307
Daniel Cashmane0c25d92016-01-14 15:19:57 -0800308config ARCH_MMAP_RND_BITS_MIN
309 default 8
310
311config ARCH_MMAP_RND_BITS_MAX
312 default 14 if PAGE_OFFSET=0x40000000
313 default 15 if PAGE_OFFSET=0x80000000
314 default 16
315
Russell Kingccf50e22010-03-15 19:03:06 +0000316#
317# The "ARM system type" choice list is ordered alphabetically by option
318# text. Please add new entries in the option alphabetic order.
319#
Linus Torvalds1da177e2005-04-16 15:20:36 -0700320choice
321 prompt "ARM system type"
Arnd Bergmann70722802015-12-17 17:45:47 +0100322 default ARM_SINGLE_ARMV7M if !MMU
Arnd Bergmann1420b222013-02-14 13:33:36 +0100323 default ARCH_MULTIPLATFORM if MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324
Rob Herring387798b2012-09-06 13:41:12 -0500325config ARCH_MULTIPLATFORM
326 bool "Allow multiple platforms to be selected"
Russell Kingb1b3f492012-10-06 17:12:25 +0100327 depends on MMU
Rob Herringddb902c2013-11-22 09:29:37 -0600328 select ARCH_WANT_OPTIONAL_GPIOLIB
Olof Johansson42dc8362014-03-09 12:46:59 -0700329 select ARM_HAS_SG_CHAIN
Rob Herring387798b2012-09-06 13:41:12 -0500330 select ARM_PATCH_PHYS_VIRT
331 select AUTO_ZRELADDR
Rob Herring6d0add42014-04-16 08:42:13 -0500332 select CLKSRC_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600333 select COMMON_CLK
Rob Herringddb902c2013-11-22 09:29:37 -0600334 select GENERIC_CLOCKEVENTS
Will Deacon08d38be2014-05-27 23:26:35 +0100335 select MIGHT_HAVE_PCI
Rob Herring387798b2012-09-06 13:41:12 -0500336 select MULTI_IRQ_HANDLER
Dinh Nguyen66314222012-07-18 16:07:18 -0600337 select SPARSE_IRQ
338 select USE_OF
Dinh Nguyen66314222012-07-18 16:07:18 -0600339
Stefan Agner9c77bc42015-05-20 00:03:51 +0200340config ARM_SINGLE_ARMV7M
341 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
342 depends on !MMU
343 select ARCH_WANT_OPTIONAL_GPIOLIB
344 select ARM_NVIC
Stefan Agner499f1642015-05-21 00:35:44 +0200345 select AUTO_ZRELADDR
Stefan Agner9c77bc42015-05-20 00:03:51 +0200346 select CLKSRC_OF
347 select COMMON_CLK
348 select CPU_V7M
349 select GENERIC_CLOCKEVENTS
350 select NO_IOPORT_MAP
351 select SPARSE_IRQ
352 select USE_OF
353
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100354
Russell King93e22562012-10-12 14:20:52 +0100355config ARCH_CLPS711X
356 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
Alexander Shiyana3b8d4a2012-10-09 20:05:56 +0400357 select ARCH_REQUIRE_GPIOLIB
Alexander Shiyanea7d1bc2012-11-17 17:57:11 +0400358 select AUTO_ZRELADDR
Alexander Shiyanc99f72a2013-05-13 21:07:32 +0400359 select CLKSRC_MMIO
Russell King93e22562012-10-12 14:20:52 +0100360 select COMMON_CLK
361 select CPU_ARM720T
Alexander Shiyan4a8355c2012-10-10 19:45:27 +0400362 select GENERIC_CLOCKEVENTS
Alexander Shiyan65976192013-05-13 21:07:36 +0400363 select MFD_SYSCON
Alexander Shiyane4e3a372014-08-19 16:31:15 +0400364 select SOC_BUS
Russell King93e22562012-10-12 14:20:52 +0100365 help
366 Support for Cirrus Logic 711x/721x/731x based boards.
367
Russell King788c9702009-04-26 14:21:59 +0100368config ARCH_GEMINI
369 bool "Cortina Systems Gemini"
Russell King788c9702009-04-26 14:21:59 +0100370 select ARCH_REQUIRE_GPIOLIB
Linus Walleijf3372c02013-10-01 12:57:20 +0200371 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100372 select CPU_FA526
Linus Walleijf3372c02013-10-01 12:57:20 +0200373 select GENERIC_CLOCKEVENTS
Russell King788c9702009-04-26 14:21:59 +0100374 help
375 Support for the Cortina Systems Gemini family SoCs
376
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377config ARCH_EBSA110
378 bool "EBSA-110"
Russell Kingb1b3f492012-10-06 17:12:25 +0100379 select ARCH_USES_GETTIMEOFFSET
Russell Kingc7508152008-10-26 10:55:14 +0000380 select CPU_SA110
Russell Kingf7e68bb2005-05-05 14:49:01 +0100381 select ISA
Rob Herringc334bc12012-03-04 22:03:33 -0600382 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400383 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700384 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385 help
386 This is an evaluation board for the StrongARM processor available
Martin Michlmayrf6c89652006-02-08 21:09:07 +0000387 from Digital. It has limited hardware on-board, including an
Linus Torvalds1da177e2005-04-16 15:20:36 -0700388 Ethernet interface, two PCMCIA sockets, two serial ports and a
389 parallel port.
390
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000391config ARCH_EP93XX
392 bool "EP93xx-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100393 select ARCH_HAS_HOLES_MEMORYMODEL
394 select ARCH_REQUIRE_GPIOLIB
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000395 select ARM_AMBA
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700396 select ARM_PATCH_PHYS_VIRT
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000397 select ARM_VIC
H Hartley Sweetenb8824c92015-06-15 10:35:06 -0700398 select AUTO_ZRELADDR
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100399 select CLKDEV_LOOKUP
Linus Walleij000bc172015-06-15 14:34:03 +0200400 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100401 select CPU_ARM920T
Linus Walleij000bc172015-06-15 14:34:03 +0200402 select GENERIC_CLOCKEVENTS
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000403 help
404 This enables support for the Cirrus EP93xx series of CPUs.
405
Linus Torvalds1da177e2005-04-16 15:20:36 -0700406config ARCH_FOOTBRIDGE
407 bool "FootBridge"
Russell Kingc7508152008-10-26 10:55:14 +0000408 select CPU_SA110
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 select FOOTBRIDGE
Russell King4e8d7632011-01-28 21:00:39 +0000410 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200411 select HAVE_IDE
Rob Herring8ef6e622012-03-01 20:48:12 -0600412 select NEED_MACH_IO_H if !MMU
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400413 select NEED_MACH_MEMORY_H
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000414 help
415 Support for systems based on the DC21285 companion chip
416 ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100418config ARCH_NETX
419 bool "Hilscher NetX based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100420 select ARM_VIC
Russell King234b6ced2011-05-08 14:09:47 +0100421 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000422 select CPU_ARM926T
Uwe Kleine-König2fcfe6b2008-12-09 21:57:24 +0100423 select GENERIC_CLOCKEVENTS
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000424 help
Deepak Saxena4af6fee2006-06-20 21:30:44 +0100425 This enables support for systems based on the Hilscher NetX Soc
426
Russell King3b938be2007-05-12 11:25:44 +0100427config ARCH_IOP13XX
428 bool "IOP13xx-based"
429 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100430 select CPU_XSC3
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400431 select NEED_MACH_MEMORY_H
Rob Herring13a50452012-02-07 09:28:22 -0600432 select NEED_RET_TO_USER
Russell Kingb1b3f492012-10-06 17:12:25 +0100433 select PCI
434 select PLAT_IOP
435 select VMSPLIT_1G
Thomas Gleixner37ebbcf2014-05-07 15:44:04 +0000436 select SPARSE_IRQ
Russell King3b938be2007-05-12 11:25:44 +0100437 help
438 Support for Intel's IOP13XX (XScale) family of processors.
439
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100440config ARCH_IOP32X
441 bool "IOP32x-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100442 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100443 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000444 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200445 select GPIO_IOP
Rob Herring13a50452012-02-07 09:28:22 -0600446 select NEED_RET_TO_USER
Russell Kingf7e68bb2005-05-05 14:49:01 +0100447 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100448 select PLAT_IOP
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000449 help
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100450 Support for Intel's 80219 and IOP32X (XScale) family of
451 processors.
452
453config ARCH_IOP33X
454 bool "IOP33x-based"
455 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100456 select ARCH_REQUIRE_GPIOLIB
Russell Kingc7508152008-10-26 10:55:14 +0000457 select CPU_XSCALE
Linus Walleije9004f52013-09-09 11:59:51 +0200458 select GPIO_IOP
Rob Herring13a50452012-02-07 09:28:22 -0600459 select NEED_RET_TO_USER
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100460 select PCI
Russell Kingb1b3f492012-10-06 17:12:25 +0100461 select PLAT_IOP
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100462 help
463 Support for Intel's IOP33X (XScale) family of processors.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464
Russell King3b938be2007-05-12 11:25:44 +0100465config ARCH_IXP4XX
466 bool "IXP4xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100467 depends on MMU
Rob Herring58af4a22012-03-20 14:33:01 -0500468 select ARCH_HAS_DMA_SET_COHERENT_MASK
Russell Kingb1b3f492012-10-06 17:12:25 +0100469 select ARCH_REQUIRE_GPIOLIB
Russell King51aaf812014-04-22 22:26:27 +0100470 select ARCH_SUPPORTS_BIG_ENDIAN
Russell King234b6ced2011-05-08 14:09:47 +0100471 select CLKSRC_MMIO
Russell Kingc7508152008-10-26 10:55:14 +0000472 select CPU_XSCALE
Russell Kingb1b3f492012-10-06 17:12:25 +0100473 select DMABOUNCE if PCI
Russell King3b938be2007-05-12 11:25:44 +0100474 select GENERIC_CLOCKEVENTS
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +0100475 select MIGHT_HAVE_PCI
Rob Herringc334bc12012-03-04 22:03:33 -0600476 select NEED_MACH_IO_H
Florian Fainelli9296d942013-04-09 14:29:26 +0200477 select USB_EHCI_BIG_ENDIAN_DESC
Russell King171b3f02013-09-12 21:24:42 +0100478 select USB_EHCI_BIG_ENDIAN_MMIO
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100479 help
Russell King3b938be2007-05-12 11:25:44 +0100480 Support for Intel's IXP4XX (XScale) family of processors.
Lennert Buytenhekc4713072006-03-28 21:18:54 +0100481
Saeed Bisharaedabd382009-08-06 15:12:43 +0300482config ARCH_DOVE
483 bool "Marvell Dove"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300484 select ARCH_REQUIRE_GPIOLIB
Sebastian Hesselbarth756b2532013-05-02 19:56:12 +0100485 select CPU_PJ4
Saeed Bisharaedabd382009-08-06 15:12:43 +0300486 select GENERIC_CLOCKEVENTS
Russell King0f81bd42012-09-09 20:34:13 +0100487 select MIGHT_HAVE_PCI
Arnd Bergmannb8cd3372015-12-02 22:27:04 +0100488 select MULTI_IRQ_HANDLER
Russell King171b3f02013-09-12 21:24:42 +0100489 select MVEBU_MBUS
Sebastian Hesselbarth9139acd2012-11-19 10:39:55 +0100490 select PINCTRL
491 select PINCTRL_DOVE
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200492 select PLAT_ORION_LEGACY
Arnd Bergmann5cdbe5d2015-12-02 22:27:05 +0100493 select SPARSE_IRQ
Russell Kingc5d431e2015-12-08 10:58:09 +0000494 select PM_GENERIC_DOMAINS if PM
Saeed Bisharaedabd382009-08-06 15:12:43 +0300495 help
496 Support for the Marvell Dove SoC 88AP510
497
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100498config ARCH_KS8695
499 bool "Micrel/Kendin KS8695"
Hartley Sweeten98830bc2010-05-17 17:18:10 +0100500 select ARCH_REQUIRE_GPIOLIB
Linus Walleijc7e783d2012-08-29 20:27:22 +0200501 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100502 select CPU_ARM922T
Linus Walleijc7e783d2012-08-29 20:27:22 +0200503 select GENERIC_CLOCKEVENTS
Russell Kingb1b3f492012-10-06 17:12:25 +0100504 select NEED_MACH_MEMORY_H
Andrew Victorc53c9cf2007-05-11 21:01:28 +0100505 help
506 Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
507 System-on-Chip devices.
508
Russell King788c9702009-04-26 14:21:59 +0100509config ARCH_W90X900
510 bool "Nuvoton W90X900 CPU"
wanzongshunc52d3d62009-06-10 15:49:32 +0100511 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100512 select CLKDEV_LOOKUP
Russell King6fa5d5f2011-05-08 15:34:39 +0100513 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100514 select CPU_ARM926T
wanzongshun58b53692009-08-14 15:36:44 +0100515 select GENERIC_CLOCKEVENTS
Lennert Buytenhek777f9be2008-06-22 22:45:02 +0200516 help
wanzongshuna8bc4ea2009-08-14 15:38:29 +0100517 Support for Nuvoton (Winbond logic dept.) ARM9 processor,
518 At present, the w90x900 has been renamed nuc900, regarding
519 the ARM series product line, you can login the following
520 link address to know more.
521
522 <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
523 ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400524
Russell King93e22562012-10-12 14:20:52 +0100525config ARCH_LPC32XX
526 bool "NXP LPC32XX"
527 select ARCH_REQUIRE_GPIOLIB
528 select ARM_AMBA
Russell King40737232011-01-06 22:32:52 +0000529 select CLKDEV_LOOKUP
Vladimir Zapolskiyc227f122015-11-20 03:05:10 +0200530 select CLKSRC_LPC32XX
531 select COMMON_CLK
Russell King93e22562012-10-12 14:20:52 +0100532 select CPU_ARM926T
533 select GENERIC_CLOCKEVENTS
Russell King93e22562012-10-12 14:20:52 +0100534 select USE_OF
535 help
536 Support for the NXP LPC32XX family of processors
537
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538config ARCH_PXA
eric miao2c8086a2007-09-11 19:13:17 -0700539 bool "PXA2xx/PXA3xx-based"
Russell Kinga4f7e762006-06-28 12:52:41 +0100540 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100541 select ARCH_MTD_XIP
542 select ARCH_REQUIRE_GPIOLIB
543 select ARM_CPU_SUSPEND if PM
544 select AUTO_ZRELADDR
Robert Jarzmika1c0a6a2015-02-07 22:54:03 +0100545 select COMMON_CLK
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100546 select CLKDEV_LOOKUP
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200547 select CLKSRC_PXA
Russell King234b6ced2011-05-08 14:09:47 +0100548 select CLKSRC_MMIO
Robert Jarzmik6f6caea2014-07-14 18:52:03 +0200549 select CLKSRC_OF
Arnd Bergmann2f202862016-01-29 15:06:29 +0100550 select CPU_XSCALE if !CPU_XSC3
Eric Miao981d0f32007-07-24 01:22:43 +0100551 select GENERIC_CLOCKEVENTS
Haojian Zhuang157d2642011-10-17 20:37:52 +0800552 select GPIO_PXA
Russell Kingb1b3f492012-10-06 17:12:25 +0100553 select HAVE_IDE
Robert Jarzmikd6cf30c2015-02-14 22:41:56 +0100554 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100555 select MULTI_IRQ_HANDLER
Eric Miaobd5ce432009-01-20 12:06:01 +0800556 select PLAT_PXA
Haojian Zhuang6ac6b812010-08-20 15:23:59 +0800557 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000558 help
eric miao2c8086a2007-09-11 19:13:17 -0700559 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560
561config ARCH_RPC
562 bool "RiscPC"
Russell King868e87c2015-09-28 10:31:50 +0100563 depends on MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -0700564 select ARCH_ACORN
viro@ZenIV.linux.org.uka08b6b72005-09-06 01:48:42 +0100565 select ARCH_MAY_HAVE_PC_FDC
Russell King07f841b2008-10-01 17:11:06 +0100566 select ARCH_SPARSEMEM_ENABLE
John Stultz5cfc8ee2010-03-24 00:22:36 +0000567 select ARCH_USES_GETTIMEOFFSET
Arnd Bergmannfa04e202014-02-26 17:39:12 +0100568 select CPU_SA110
Russell Kingb1b3f492012-10-06 17:12:25 +0100569 select FIQ
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200570 select HAVE_IDE
Russell Kingb1b3f492012-10-06 17:12:25 +0100571 select HAVE_PATA_PLATFORM
572 select ISA_DMA_API
Rob Herringc334bc12012-03-04 22:03:33 -0600573 select NEED_MACH_IO_H
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400574 select NEED_MACH_MEMORY_H
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -0700575 select NO_IOPORT_MAP
Linus Torvalds1da177e2005-04-16 15:20:36 -0700576 help
577 On the Acorn Risc-PC, Linux can support the internal IDE disk and
578 CD-ROM interface, serial and parallel port, and the floppy drive.
579
580config ARCH_SA1100
581 bool "SA1100-based"
Russell Kingb1b3f492012-10-06 17:12:25 +0100582 select ARCH_MTD_XIP
Michael Buesch7444a722008-07-25 01:46:11 -0700583 select ARCH_REQUIRE_GPIOLIB
Russell Kingb1b3f492012-10-06 17:12:25 +0100584 select ARCH_SPARSEMEM_ENABLE
585 select CLKDEV_LOOKUP
586 select CLKSRC_MMIO
Daniel Lezcano389d9b52015-10-09 15:48:38 +0200587 select CLKSRC_PXA
588 select CLKSRC_OF if OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100589 select CPU_FREQ
590 select CPU_SA1100
591 select GENERIC_CLOCKEVENTS
Arnd Bergmannd0ee9f42011-10-01 21:10:32 +0200592 select HAVE_IDE
Dmitry Eremin-Solenikov1eca42b2014-11-28 15:56:54 +0100593 select IRQ_DOMAIN
Russell Kingb1b3f492012-10-06 17:12:25 +0100594 select ISA
Dmitry Eremin-Solenikovaffcab32014-11-28 15:55:16 +0100595 select MULTI_IRQ_HANDLER
Nicolas Pitre0cdc8b92011-09-02 22:26:55 -0400596 select NEED_MACH_MEMORY_H
Russell King375dec92012-02-23 14:29:33 +0100597 select SPARSE_IRQ
Martin Michlmayrf999b8b2006-02-08 21:09:05 +0000598 help
599 Support for StrongARM 11x0 based boards.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900601config ARCH_S3C24XX
602 bool "Samsung S3C24XX SoCs"
Kukjin Kim53650432013-04-04 09:04:30 +0900603 select ARCH_REQUIRE_GPIOLIB
Arnd Bergmann335cce72014-03-13 14:11:16 +0100604 select ATAGS
Russell Kingb1b3f492012-10-06 17:12:25 +0100605 select CLKDEV_LOOKUP
Tomasz Figa42805062013-04-28 02:25:01 +0200606 select CLKSRC_SAMSUNG_PWM
Romain Naour7f78b6e2013-01-09 18:47:04 -0800607 select GENERIC_CLOCKEVENTS
Tomasz Figa880cf072013-06-19 01:22:20 +0900608 select GPIO_SAMSUNG
Kukjin Kim20676c12010-11-13 16:08:32 +0900609 select HAVE_S3C2410_I2C if I2C
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900610 select HAVE_S3C2410_WATCHDOG if WATCHDOG
Russell Kingb1b3f492012-10-06 17:12:25 +0100611 select HAVE_S3C_RTC if RTC_CLASS
Heiko Stuebner17453dd2013-03-07 12:38:25 +0900612 select MULTI_IRQ_HANDLER
Rob Herringc334bc12012-03-04 22:03:33 -0600613 select NEED_MACH_IO_H
Tomasz Figacd8dc7a2013-06-15 09:01:49 +0900614 select SAMSUNG_ATAGS
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 help
Kukjin Kimb130d5c2012-02-03 14:29:23 +0900616 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
617 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
618 (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
619 Samsung SMDK2410 development board (and derivatives).
Ben Dooks63b1f512010-04-30 16:32:26 +0900620
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100621config ARCH_DAVINCI
622 bool "TI DaVinci"
Russell Kingb1b3f492012-10-06 17:12:25 +0100623 select ARCH_HAS_HOLES_MEMORYMODEL
David Brownelldce11152008-09-07 23:41:04 -0700624 select ARCH_REQUIRE_GPIOLIB
Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +0100625 select CLKDEV_LOOKUP
Arnd Bergmannce32c5c2016-02-01 21:35:57 +0100626 select CPU_ARM926T
David Brownell20e99692009-05-07 09:31:42 -0700627 select GENERIC_ALLOCATOR
Russell Kingb1b3f492012-10-06 17:12:25 +0100628 select GENERIC_CLOCKEVENTS
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100629 select GENERIC_IRQ_CHIP
Russell Kingb1b3f492012-10-06 17:12:25 +0100630 select HAVE_IDE
Sekhar Nori689e3312012-08-28 15:27:52 +0530631 select USE_OF
Russell Kingb1b3f492012-10-06 17:12:25 +0100632 select ZONE_DMA
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100633 help
634 Support for TI's DaVinci platform.
635
Tony Lindgrena0694862013-01-11 11:24:20 -0800636config ARCH_OMAP1
637 bool "TI OMAP1"
Arnd Bergmann00a36692012-06-07 18:50:51 -0600638 depends on MMU
Russell Kingb1b3f492012-10-06 17:12:25 +0100639 select ARCH_HAS_HOLES_MEMORYMODEL
Tony Lindgrena0694862013-01-11 11:24:20 -0800640 select ARCH_OMAP
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100641 select ARCH_REQUIRE_GPIOLIB
Tony Priske9a91de2012-08-03 21:00:06 +1200642 select CLKDEV_LOOKUP
viresh kumarcee37e52010-04-01 12:31:05 +0100643 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100644 select GENERIC_CLOCKEVENTS
Tony Lindgrena0694862013-01-11 11:24:20 -0800645 select GENERIC_IRQ_CHIP
Tony Lindgrena0694862013-01-11 11:24:20 -0800646 select HAVE_IDE
647 select IRQ_DOMAIN
Tony Lindgrenb6943312015-05-20 09:01:21 -0700648 select MULTI_IRQ_HANDLER
Tony Lindgrena0694862013-01-11 11:24:20 -0800649 select NEED_MACH_IO_H if PCCARD
650 select NEED_MACH_MEMORY_H
Tony Lindgren685e2d02015-05-20 09:01:21 -0700651 select SPARSE_IRQ
Alexey Charkov21f47fb2010-12-23 13:11:21 +0100652 help
Tony Lindgrena0694862013-01-11 11:24:20 -0800653 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
Binghua Duan02c981c2011-07-08 17:40:12 +0800654
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655endchoice
656
Rob Herring387798b2012-09-06 13:41:12 -0500657menu "Multiple platform selection"
658 depends on ARCH_MULTIPLATFORM
659
660comment "CPU Core family selection"
661
Arnd Bergmannf8afae42014-03-25 22:19:00 +0100662config ARCH_MULTI_V4
663 bool "ARMv4 based platforms (FA526)"
664 depends on !ARCH_MULTI_V6_V7
665 select ARCH_MULTI_V4_V5
666 select CPU_FA526
667
Rob Herring387798b2012-09-06 13:41:12 -0500668config ARCH_MULTI_V4T
669 bool "ARMv4T based platforms (ARM720T, ARM920T, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500670 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100671 select ARCH_MULTI_V4_V5
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200672 select CPU_ARM920T if !(CPU_ARM7TDMI || CPU_ARM720T || \
673 CPU_ARM740T || CPU_ARM9TDMI || CPU_ARM922T || \
674 CPU_ARM925T || CPU_ARM940T)
Rob Herring387798b2012-09-06 13:41:12 -0500675
676config ARCH_MULTI_V5
677 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)"
Rob Herring387798b2012-09-06 13:41:12 -0500678 depends on !ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100679 select ARCH_MULTI_V4_V5
Andrew Lunn12567bb2014-02-22 20:14:54 +0100680 select CPU_ARM926T if !(CPU_ARM946E || CPU_ARM1020 || \
Arnd Bergmann24e860f2013-06-03 15:38:58 +0200681 CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || \
682 CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_FEROCEON)
Rob Herring387798b2012-09-06 13:41:12 -0500683
684config ARCH_MULTI_V4_V5
685 bool
686
687config ARCH_MULTI_V6
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800688 bool "ARMv6 based platforms (ARM11)"
Rob Herring387798b2012-09-06 13:41:12 -0500689 select ARCH_MULTI_V6_V7
Rob Herring42f47542014-01-31 14:26:04 -0600690 select CPU_V6K
Rob Herring387798b2012-09-06 13:41:12 -0500691
692config ARCH_MULTI_V7
Stephen Boyd8dda05c2013-03-04 15:19:19 -0800693 bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
Rob Herring387798b2012-09-06 13:41:12 -0500694 default y
695 select ARCH_MULTI_V6_V7
Russell Kingb1b3f492012-10-06 17:12:25 +0100696 select CPU_V7
Rob Herring90bc8ac2014-01-31 15:32:02 -0600697 select HAVE_SMP
Rob Herring387798b2012-09-06 13:41:12 -0500698
699config ARCH_MULTI_V6_V7
700 bool
Rob Herring9352b052014-01-31 15:36:10 -0600701 select MIGHT_HAVE_CACHE_L2X0
Rob Herring387798b2012-09-06 13:41:12 -0500702
703config ARCH_MULTI_CPU_AUTO
704 def_bool !(ARCH_MULTI_V4 || ARCH_MULTI_V4T || ARCH_MULTI_V6_V7)
705 select ARCH_MULTI_V5
706
707endmenu
708
Rob Herring05e2a3d2013-12-05 10:04:54 -0600709config ARCH_VIRT
Masahiro Yamadae3246542015-11-16 12:06:10 +0900710 bool "Dummy Virtual Machine"
711 depends on ARCH_MULTI_V7
Rob Herring4b8b5f22013-12-05 10:10:34 -0600712 select ARM_AMBA
Rob Herring05e2a3d2013-12-05 10:04:54 -0600713 select ARM_GIC
Pavel Fedin0e2f91e2015-11-27 12:56:26 +0100714 select ARM_GIC_V2M if PCI_MSI
Jean-Philippe Brucker0b28f1d2015-10-01 13:47:18 +0100715 select ARM_GIC_V3
Rob Herring05e2a3d2013-12-05 10:04:54 -0600716 select ARM_PSCI
Rob Herring4b8b5f22013-12-05 10:10:34 -0600717 select HAVE_ARM_ARCH_TIMER
Rob Herring05e2a3d2013-12-05 10:04:54 -0600718
Russell Kingccf50e22010-03-15 19:03:06 +0000719#
720# This is sorted alphabetically by mach-* pathname. However, plat-*
721# Kconfigs may be included either alphabetically (according to the
722# plat- suffix) or along side the corresponding mach-* source.
723#
Gregory CLEMENT3e93a222012-06-04 18:38:56 +0200724source "arch/arm/mach-mvebu/Kconfig"
725
Tsahee Zidenberg445d9b32015-03-12 13:53:00 +0200726source "arch/arm/mach-alpine/Kconfig"
727
Lars Persson590b4602016-02-11 17:06:19 +0100728source "arch/arm/mach-artpec/Kconfig"
729
Oleksij Rempeld9bfc862014-11-24 12:08:27 +0100730source "arch/arm/mach-asm9260/Kconfig"
731
Russell King95b8f202010-01-14 11:43:54 +0000732source "arch/arm/mach-at91/Kconfig"
733
Anders Berg1d22924e2014-05-23 11:08:35 +0200734source "arch/arm/mach-axxia/Kconfig"
735
Christian Daudt8ac49e02012-11-19 09:46:10 -0800736source "arch/arm/mach-bcm/Kconfig"
737
Sebastian Hesselbarth1c37fa12013-09-09 14:36:19 +0200738source "arch/arm/mach-berlin/Kconfig"
739
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740source "arch/arm/mach-clps711x/Kconfig"
741
Anton Vorontsovd94f9442010-03-25 17:12:41 +0300742source "arch/arm/mach-cns3xxx/Kconfig"
743
Russell King95b8f202010-01-14 11:43:54 +0000744source "arch/arm/mach-davinci/Kconfig"
745
Baruch Siachdf8d7422015-01-14 10:40:30 +0200746source "arch/arm/mach-digicolor/Kconfig"
747
Russell King95b8f202010-01-14 11:43:54 +0000748source "arch/arm/mach-dove/Kconfig"
749
Lennert Buytenheke7736d42006-03-20 17:10:13 +0000750source "arch/arm/mach-ep93xx/Kconfig"
751
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752source "arch/arm/mach-footbridge/Kconfig"
753
Paulius Zaleckas59d3a192009-03-26 10:06:08 +0200754source "arch/arm/mach-gemini/Kconfig"
755
Rob Herring387798b2012-09-06 13:41:12 -0500756source "arch/arm/mach-highbank/Kconfig"
757
Haojian Zhuang389ee0c2013-12-20 10:52:56 +0800758source "arch/arm/mach-hisi/Kconfig"
759
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760source "arch/arm/mach-integrator/Kconfig"
761
Lennert Buytenhek3f7e5812006-09-18 23:10:26 +0100762source "arch/arm/mach-iop32x/Kconfig"
763
764source "arch/arm/mach-iop33x/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765
Dan Williams285f5fa2006-12-07 02:59:39 +0100766source "arch/arm/mach-iop13xx/Kconfig"
767
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768source "arch/arm/mach-ixp4xx/Kconfig"
769
Santosh Shilimkar828989a2013-06-10 11:27:13 -0400770source "arch/arm/mach-keystone/Kconfig"
771
Russell King95b8f202010-01-14 11:43:54 +0000772source "arch/arm/mach-ks8695/Kconfig"
773
Carlo Caione3b8f5032014-09-10 22:16:59 +0200774source "arch/arm/mach-meson/Kconfig"
775
Jonas Jensen17723fd32013-12-18 13:58:45 +0100776source "arch/arm/mach-moxart/Kconfig"
777
Stanislav Samsonov794d15b2008-06-22 22:45:10 +0200778source "arch/arm/mach-mv78xx0/Kconfig"
779
Shawn Guo3995eb82012-09-13 19:48:07 +0800780source "arch/arm/mach-imx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781
Matthias Bruggerf682a212014-05-13 01:06:13 +0200782source "arch/arm/mach-mediatek/Kconfig"
783
Shawn Guo1d3f33d2010-12-13 20:55:03 +0800784source "arch/arm/mach-mxs/Kconfig"
785
Russell King95b8f202010-01-14 11:43:54 +0000786source "arch/arm/mach-netx/Kconfig"
Eric Miao49cbe782009-01-20 14:15:18 +0800787
Russell King95b8f202010-01-14 11:43:54 +0000788source "arch/arm/mach-nomadik/Kconfig"
Russell King95b8f202010-01-14 11:43:54 +0000789
Daniel Tang9851ca52013-06-11 18:40:17 +1000790source "arch/arm/mach-nspire/Kconfig"
791
Tony Lindgrend48af152005-07-10 19:58:17 +0100792source "arch/arm/plat-omap/Kconfig"
793
794source "arch/arm/mach-omap1/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795
Tony Lindgren1dbae812005-11-10 14:26:51 +0000796source "arch/arm/mach-omap2/Kconfig"
797
Lennert Buytenhek9dd0b192008-03-27 14:51:41 -0400798source "arch/arm/mach-orion5x/Kconfig"
Tzachi Perelstein585cf172007-10-23 15:14:41 -0400799
Rob Herring387798b2012-09-06 13:41:12 -0500800source "arch/arm/mach-picoxcell/Kconfig"
801
Russell King95b8f202010-01-14 11:43:54 +0000802source "arch/arm/mach-pxa/Kconfig"
803source "arch/arm/plat-pxa/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804
Russell King95b8f202010-01-14 11:43:54 +0000805source "arch/arm/mach-mmp/Kconfig"
806
Kumar Gala8fc1b0f2014-01-21 17:14:10 -0600807source "arch/arm/mach-qcom/Kconfig"
808
Russell King95b8f202010-01-14 11:43:54 +0000809source "arch/arm/mach-realview/Kconfig"
810
Heiko Stuebnerd63dc052013-06-02 23:09:41 +0200811source "arch/arm/mach-rockchip/Kconfig"
812
Russell King95b8f202010-01-14 11:43:54 +0000813source "arch/arm/mach-sa1100/Kconfig"
Saeed Bisharaedabd382009-08-06 15:12:43 +0300814
Rob Herring387798b2012-09-06 13:41:12 -0500815source "arch/arm/mach-socfpga/Kconfig"
816
Arnd Bergmanna7ed0992012-12-02 15:12:47 +0100817source "arch/arm/mach-spear/Kconfig"
Ben Dooksa21765a2007-02-11 18:31:01 +0100818
Srinivas Kandagatla65ebcc12013-06-25 12:15:10 +0100819source "arch/arm/mach-sti/Kconfig"
820
Kukjin Kim85fd6d62012-02-06 09:38:19 +0900821source "arch/arm/mach-s3c24xx/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700822
Ben Dooks431107e2010-01-26 10:11:04 +0900823source "arch/arm/mach-s3c64xx/Kconfig"
Ben Dooksa08ab632008-10-21 14:06:39 +0100824
Kukjin Kim170f4e42010-02-24 16:40:44 +0900825source "arch/arm/mach-s5pv210/Kconfig"
826
Kukjin Kim83014572011-11-06 13:54:56 +0900827source "arch/arm/mach-exynos/Kconfig"
Rob Herringe509b282014-06-10 09:06:09 -0500828source "arch/arm/plat-samsung/Kconfig"
Changhwan Youncc0e72b2010-07-16 12:15:38 +0900829
Russell King882d01f2010-03-02 23:40:15 +0000830source "arch/arm/mach-shmobile/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831
Maxime Ripard3b526342012-11-08 12:40:16 +0100832source "arch/arm/mach-sunxi/Kconfig"
833
Barry Song156a0992012-08-23 13:41:58 +0800834source "arch/arm/mach-prima2/Kconfig"
835
Marc Gonzalezd6de5b02015-12-15 10:41:13 +0100836source "arch/arm/mach-tango/Kconfig"
837
Erik Gillingc5f80062010-01-21 16:53:02 -0800838source "arch/arm/mach-tegra/Kconfig"
839
Russell King95b8f202010-01-14 11:43:54 +0000840source "arch/arm/mach-u300/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841
Masahiro Yamadaba56a982015-05-08 13:07:11 +0900842source "arch/arm/mach-uniphier/Kconfig"
843
Russell King95b8f202010-01-14 11:43:54 +0000844source "arch/arm/mach-ux500/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845
846source "arch/arm/mach-versatile/Kconfig"
847
Russell Kingceade892010-02-11 21:44:53 +0000848source "arch/arm/mach-vexpress/Kconfig"
Russell King420c34e2011-01-18 20:08:06 +0000849source "arch/arm/plat-versatile/Kconfig"
Russell Kingceade892010-02-11 21:44:53 +0000850
Tony Prisk6f35f9a2012-10-11 20:13:09 +1300851source "arch/arm/mach-vt8500/Kconfig"
852
wanzongshun7ec80dd2008-12-03 03:55:38 +0100853source "arch/arm/mach-w90x900/Kconfig"
854
Jun Nieacede512015-04-28 17:18:05 +0800855source "arch/arm/mach-zx/Kconfig"
856
Josh Cartwright9a45eb62012-11-19 11:38:29 -0600857source "arch/arm/mach-zynq/Kconfig"
858
Stefan Agner499f1642015-05-21 00:35:44 +0200859# ARMv7-M architecture
860config ARCH_EFM32
861 bool "Energy Micro efm32"
862 depends on ARM_SINGLE_ARMV7M
863 select ARCH_REQUIRE_GPIOLIB
864 help
865 Support for Energy Micro's (now Silicon Labs) efm32 Giant Gecko
866 processors.
867
868config ARCH_LPC18XX
869 bool "NXP LPC18xx/LPC43xx"
870 depends on ARM_SINGLE_ARMV7M
871 select ARCH_HAS_RESET_CONTROLLER
872 select ARM_AMBA
873 select CLKSRC_LPC32XX
874 select PINCTRL
875 help
876 Support for NXP's LPC18xx Cortex-M3 and LPC43xx Cortex-M4
877 high performance microcontrollers.
878
879config ARCH_STM32
880 bool "STMicrolectronics STM32"
881 depends on ARM_SINGLE_ARMV7M
882 select ARCH_HAS_RESET_CONTROLLER
883 select ARMV7M_SYSTICK
Maxime Coquelin25263182015-05-22 23:50:52 +0200884 select CLKSRC_STM32
Maxime Coquelinf64e9802015-10-14 18:32:42 +0200885 select PINCTRL
Stefan Agner499f1642015-05-21 00:35:44 +0200886 select RESET_CONTROLLER
887 help
888 Support for STMicroelectronics STM32 processors.
889
Maxime Coquelinfa65fc62015-10-14 18:21:32 +0200890config MACH_STM32F429
891 bool "STMicrolectronics STM32F429"
892 depends on ARCH_STM32
893 default y
894
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895# Definitions to make life easier
896config ARCH_ACORN
897 bool
898
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100899config PLAT_IOP
900 bool
Mikael Pettersson469d30442009-10-29 11:46:54 -0700901 select GENERIC_CLOCKEVENTS
Lennert Buytenhek7ae1f7e2006-09-18 23:12:53 +0100902
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400903config PLAT_ORION
904 bool
Russell Kingbfe45e02011-05-08 15:33:30 +0100905 select CLKSRC_MMIO
Russell Kingb1b3f492012-10-06 17:12:25 +0100906 select COMMON_CLK
Russell Kingdc7ad3b2011-05-22 10:01:21 +0100907 select GENERIC_IRQ_CHIP
Andrew Lunn278b45b2012-06-27 13:40:04 +0200908 select IRQ_DOMAIN
Lennert Buytenhek69b02f62008-03-27 14:51:39 -0400909
Thomas Petazzoniabcda1d2012-09-11 14:27:27 +0200910config PLAT_ORION_LEGACY
911 bool
912 select PLAT_ORION
913
Eric Miaobd5ce432009-01-20 12:06:01 +0800914config PLAT_PXA
915 bool
916
Russell Kingf4b8b312010-01-14 12:48:06 +0000917config PLAT_VERSATILE
918 bool
919
Alexandre Courbotd9a1bea2013-11-24 15:30:46 +0900920source "arch/arm/firmware/Kconfig"
921
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922source arch/arm/mm/Kconfig
923
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100924config IWMMXT
Sebastian Hesselbarthd93003e2014-04-24 22:58:30 +0100925 bool "Enable iWMMXt support"
926 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
927 default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
Lennert Buytenhekafe4b252006-12-03 18:51:14 +0100928 help
929 Enable support for iWMMXt context switching at run time if
930 running on a CPU that supports it.
931
eric miao52108642010-12-13 09:42:34 +0100932config MULTI_IRQ_HANDLER
933 bool
934 help
935 Allow each machine to specify it's own IRQ handler at run time.
936
Hyok S. Choi3b93e7b2006-06-22 11:48:56 +0100937if !MMU
938source "arch/arm/Kconfig-nommu"
939endif
940
Gregory CLEMENT3e0a07f2013-06-23 10:17:11 +0100941config PJ4B_ERRATA_4742
942 bool "PJ4B Errata 4742: IDLE Wake Up Commands can Cause the CPU Core to Cease Operation"
943 depends on CPU_PJ4B && MACH_ARMADA_370
944 default y
945 help
946 When coming out of either a Wait for Interrupt (WFI) or a Wait for
947 Event (WFE) IDLE states, a specific timing sensitivity exists between
948 the retiring WFI/WFE instructions and the newly issued subsequent
949 instructions. This sensitivity can result in a CPU hang scenario.
950 Workaround:
951 The software must insert either a Data Synchronization Barrier (DSB)
952 or Data Memory Barrier (DMB) command immediately after the WFI/WFE
953 instruction
954
Will Deaconf0c4b8d2012-04-20 17:20:08 +0100955config ARM_ERRATA_326103
956 bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
957 depends on CPU_V6
958 help
959 Executing a SWP instruction to read-only memory does not set bit 11
960 of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
961 treat the access as a read, preventing a COW from occurring and
962 causing the faulting task to livelock.
963
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100964config ARM_ERRATA_411920
965 bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
Russell Kinge399b1a2011-01-17 15:08:32 +0000966 depends on CPU_V6 || CPU_V6K
Catalin Marinas9cba3cc2009-04-30 17:06:03 +0100967 help
968 Invalidation of the Instruction Cache operation can
969 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
970 It does not affect the MPCore. This option enables the ARM Ltd.
971 recommended workaround.
972
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100973config ARM_ERRATA_430973
974 bool "ARM errata: Stale prediction on replaced interworking branch"
975 depends on CPU_V7
976 help
977 This option enables the workaround for the 430973 Cortex-A8
Russell King79403cd2015-04-13 16:14:37 +0100978 r1p* erratum. If a code sequence containing an ARM/Thumb
Catalin Marinas7ce236f2009-04-30 17:06:09 +0100979 interworking branch is replaced with another code sequence at the
980 same virtual address, whether due to self-modifying code or virtual
981 to physical address re-mapping, Cortex-A8 does not recover from the
982 stale interworking branch prediction. This results in Cortex-A8
983 executing the new code sequence in the incorrect ARM or Thumb state.
984 The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
985 and also flushes the branch target cache at every context switch.
986 Note that setting specific bits in the ACTLR register may not be
987 available in non-secure mode.
988
Catalin Marinas855c5512009-04-30 17:06:15 +0100989config ARM_ERRATA_458693
990 bool "ARM errata: Processor deadlock when a false hazard is created"
991 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +0100992 depends on !ARCH_MULTIPLATFORM
Catalin Marinas855c5512009-04-30 17:06:15 +0100993 help
994 This option enables the workaround for the 458693 Cortex-A8 (r2p0)
995 erratum. For very specific sequences of memory operations, it is
996 possible for a hazard condition intended for a cache line to instead
997 be incorrectly associated with a different cache line. This false
998 hazard might then cause a processor deadlock. The workaround enables
999 the L1 caching of the NEON accesses and disables the PLD instruction
1000 in the ACTLR register. Note that setting specific bits in the ACTLR
1001 register may not be available in non-secure mode.
1002
Catalin Marinas0516e462009-04-30 17:06:20 +01001003config ARM_ERRATA_460075
1004 bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
1005 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001006 depends on !ARCH_MULTIPLATFORM
Catalin Marinas0516e462009-04-30 17:06:20 +01001007 help
1008 This option enables the workaround for the 460075 Cortex-A8 (r2p0)
1009 erratum. Any asynchronous access to the L2 cache may encounter a
1010 situation in which recent store transactions to the L2 cache are lost
1011 and overwritten with stale memory contents from external memory. The
1012 workaround disables the write-allocate mode for the L2 cache via the
1013 ACTLR register. Note that setting specific bits in the ACTLR register
1014 may not be available in non-secure mode.
1015
Will Deacon9f050272010-09-14 09:51:43 +01001016config ARM_ERRATA_742230
1017 bool "ARM errata: DMB operation may be faulty"
1018 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001019 depends on !ARCH_MULTIPLATFORM
Will Deacon9f050272010-09-14 09:51:43 +01001020 help
1021 This option enables the workaround for the 742230 Cortex-A9
1022 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1023 between two write operations may not ensure the correct visibility
1024 ordering of the two writes. This workaround sets a specific bit in
1025 the diagnostic register of the Cortex-A9 which causes the DMB
1026 instruction to behave as a DSB, ensuring the correct behaviour of
1027 the two writes.
1028
Will Deacona672e992010-09-14 09:53:02 +01001029config ARM_ERRATA_742231
1030 bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
1031 depends on CPU_V7 && SMP
Rob Herring62e4d352012-12-21 22:42:40 +01001032 depends on !ARCH_MULTIPLATFORM
Will Deacona672e992010-09-14 09:53:02 +01001033 help
1034 This option enables the workaround for the 742231 Cortex-A9
1035 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1036 Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
1037 accessing some data located in the same cache line, may get corrupted
1038 data due to bad handling of the address hazard when the line gets
1039 replaced from one of the CPUs at the same time as another CPU is
1040 accessing it. This workaround sets specific bits in the diagnostic
1041 register of the Cortex-A9 which reduces the linefill issuing
1042 capabilities of the processor.
1043
Jon Medhurst69155792013-06-07 10:35:35 +01001044config ARM_ERRATA_643719
1045 bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
1046 depends on CPU_V7 && SMP
Russell Kinge5a5de42015-04-02 23:58:55 +01001047 default y
Jon Medhurst69155792013-06-07 10:35:35 +01001048 help
1049 This option enables the workaround for the 643719 Cortex-A9 (prior to
1050 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
1051 register returns zero when it should return one. The workaround
1052 corrects this value, ensuring cache maintenance operations which use
1053 it behave as intended and avoiding data corruption.
1054
Will Deaconcdf357f2010-08-05 11:20:51 +01001055config ARM_ERRATA_720789
1056 bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
Dave Martine66dc742011-12-08 13:37:46 +01001057 depends on CPU_V7
Will Deaconcdf357f2010-08-05 11:20:51 +01001058 help
1059 This option enables the workaround for the 720789 Cortex-A9 (prior to
1060 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1061 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
1062 As a consequence of this erratum, some TLB entries which should be
1063 invalidated are not, resulting in an incoherency in the system page
1064 tables. The workaround changes the TLB flushing routines to invalidate
1065 entries regardless of the ASID.
Will Deacon475d92f2010-09-28 14:02:02 +01001066
1067config ARM_ERRATA_743622
1068 bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
1069 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001070 depends on !ARCH_MULTIPLATFORM
Will Deacon475d92f2010-09-28 14:02:02 +01001071 help
1072 This option enables the workaround for the 743622 Cortex-A9
Will Deaconefbc74a2012-02-24 12:12:38 +01001073 (r2p*) erratum. Under very rare conditions, a faulty
Will Deacon475d92f2010-09-28 14:02:02 +01001074 optimisation in the Cortex-A9 Store Buffer may lead to data
1075 corruption. This workaround sets a specific bit in the diagnostic
1076 register of the Cortex-A9 which disables the Store Buffer
1077 optimisation, preventing the defect from occurring. This has no
1078 visible impact on the overall performance or power consumption of the
1079 processor.
1080
Will Deacon9a27c272011-02-18 16:36:35 +01001081config ARM_ERRATA_751472
1082 bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
Dave Martinba90c512011-12-08 13:41:06 +01001083 depends on CPU_V7
Rob Herring62e4d352012-12-21 22:42:40 +01001084 depends on !ARCH_MULTIPLATFORM
Will Deacon9a27c272011-02-18 16:36:35 +01001085 help
1086 This option enables the workaround for the 751472 Cortex-A9 (prior
1087 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1088 completion of a following broadcasted operation if the second
1089 operation is received by a CPU before the ICIALLUIS has completed,
1090 potentially leading to corrupted entries in the cache or TLB.
1091
Will Deaconfcbdc5fe2011-02-28 18:15:16 +01001092config ARM_ERRATA_754322
1093 bool "ARM errata: possible faulty MMU translations following an ASID switch"
1094 depends on CPU_V7
1095 help
1096 This option enables the workaround for the 754322 Cortex-A9 (r2p*,
1097 r3p*) erratum. A speculative memory access may cause a page table walk
1098 which starts prior to an ASID switch but completes afterwards. This
1099 can populate the micro-TLB with a stale entry which may be hit with
1100 the new ASID. This workaround places two dsb instructions in the mm
1101 switching code so that no page table walks can cross the ASID switch.
1102
Will Deacon5dab26af2011-03-04 12:38:54 +01001103config ARM_ERRATA_754327
1104 bool "ARM errata: no automatic Store Buffer drain"
1105 depends on CPU_V7 && SMP
1106 help
1107 This option enables the workaround for the 754327 Cortex-A9 (prior to
1108 r2p0) erratum. The Store Buffer does not have any automatic draining
1109 mechanism and therefore a livelock may occur if an external agent
1110 continuously polls a memory location waiting to observe an update.
1111 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1112 written polling loops from denying visibility of updates to memory.
1113
Catalin Marinas145e10e2011-08-15 11:04:41 +01001114config ARM_ERRATA_364296
1115 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
Fabio Estevamfd832472013-07-09 18:34:01 +01001116 depends on CPU_V6
Catalin Marinas145e10e2011-08-15 11:04:41 +01001117 help
1118 This options enables the workaround for the 364296 ARM1136
1119 r0p2 erratum (possible cache data corruption with
1120 hit-under-miss enabled). It sets the undocumented bit 31 in
1121 the auxiliary control register and the FI bit in the control
1122 register, thus disabling hit-under-miss without putting the
1123 processor into full low interrupt latency mode. ARM11MPCore
1124 is not affected.
1125
Will Deaconf630c1b2011-09-15 11:45:15 +01001126config ARM_ERRATA_764369
1127 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
1128 depends on CPU_V7 && SMP
1129 help
1130 This option enables the workaround for erratum 764369
1131 affecting Cortex-A9 MPCore with two or more processors (all
1132 current revisions). Under certain timing circumstances, a data
1133 cache line maintenance operation by MVA targeting an Inner
1134 Shareable memory region may fail to proceed up to either the
1135 Point of Coherency or to the Point of Unification of the
1136 system. This workaround adds a DSB instruction before the
1137 relevant cache maintenance functions and sets a specific bit
1138 in the diagnostic control register of the SCU.
1139
Simon Horman7253b852012-09-28 02:12:45 +01001140config ARM_ERRATA_775420
1141 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
1142 depends on CPU_V7
1143 help
1144 This option enables the workaround for the 775420 Cortex-A9 (r2p2,
1145 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance
1146 operation aborts with MMU exception, it might cause the processor
1147 to deadlock. This workaround puts DSB before executing ISB if
1148 an abort may occur on cache maintenance.
1149
Catalin Marinas93dc6882013-03-26 23:35:04 +01001150config ARM_ERRATA_798181
1151 bool "ARM errata: TLBI/DSB failure on Cortex-A15"
1152 depends on CPU_V7 && SMP
1153 help
1154 On Cortex-A15 (r0p0..r3p2) the TLBI*IS/DSB operations are not
1155 adequately shooting down all use of the old entries. This
1156 option enables the Linux kernel workaround for this erratum
1157 which sends an IPI to the CPUs that are running the same ASID
1158 as the one being invalidated.
1159
Will Deacon84b65042013-08-20 17:29:55 +01001160config ARM_ERRATA_773022
1161 bool "ARM errata: incorrect instructions may be executed from loop buffer"
1162 depends on CPU_V7
1163 help
1164 This option enables the workaround for the 773022 Cortex-A15
1165 (up to r0p4) erratum. In certain rare sequences of code, the
1166 loop buffer may deliver incorrect instructions. This
1167 workaround disables the loop buffer to avoid the erratum.
1168
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169endmenu
1170
1171source "arch/arm/common/Kconfig"
1172
Linus Torvalds1da177e2005-04-16 15:20:36 -07001173menu "Bus support"
1174
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175config ISA
1176 bool
Linus Torvalds1da177e2005-04-16 15:20:36 -07001177 help
1178 Find out whether you have ISA slots on your motherboard. ISA is the
1179 name of a bus system, i.e. the way the CPU talks to the other stuff
1180 inside your box. Other bus systems are PCI, EISA, MicroChannel
1181 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
1182 newer boards don't support it. If you have ISA, say Y, otherwise N.
1183
Russell King065909b2006-01-04 15:44:16 +00001184# Select ISA DMA controller support
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185config ISA_DMA
1186 bool
Russell King065909b2006-01-04 15:44:16 +00001187 select ISA_DMA_API
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188
Russell King065909b2006-01-04 15:44:16 +00001189# Select ISA DMA interface
Al Viro5cae8412005-05-04 05:39:22 +01001190config ISA_DMA_API
1191 bool
Al Viro5cae8412005-05-04 05:39:22 +01001192
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193config PCI
Hans Ulli Kroll0b05da72010-12-02 12:32:15 +01001194 bool "PCI support" if MIGHT_HAVE_PCI
Linus Torvalds1da177e2005-04-16 15:20:36 -07001195 help
1196 Find out whether you have a PCI motherboard. PCI is the name of a
1197 bus system, i.e. the way the CPU talks to the other stuff inside
1198 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
1199 VESA. If you have PCI, say Y, otherwise N.
1200
Anton Vorontsov52882172010-04-19 13:20:49 +01001201config PCI_DOMAINS
1202 bool
1203 depends on PCI
1204
Lorenzo Pieralisi8c7d14742014-11-21 11:29:26 +00001205config PCI_DOMAINS_GENERIC
1206 def_bool PCI_DOMAINS
1207
Marcelo Roberto Jimenezb080ac82010-12-16 21:34:51 +01001208config PCI_NANOENGINE
1209 bool "BSE nanoEngine PCI support"
1210 depends on SA1100_NANOENGINE
1211 help
1212 Enable PCI on the BSE nanoEngine board.
1213
Matthew Wilcox36e23592007-07-10 10:54:40 -06001214config PCI_SYSCALL
1215 def_bool PCI
1216
Mike Rapoporta0113a92007-11-25 08:55:34 +01001217config PCI_HOST_ITE8152
1218 bool
1219 depends on PCI && MACH_ARMCORE
1220 default y
1221 select DMABOUNCE
1222
Linus Torvalds1da177e2005-04-16 15:20:36 -07001223source "drivers/pci/Kconfig"
1224
1225source "drivers/pcmcia/Kconfig"
1226
1227endmenu
1228
1229menu "Kernel Features"
1230
Dave Martin3b556582011-12-07 15:38:04 +00001231config HAVE_SMP
1232 bool
1233 help
1234 This option should be selected by machines which have an SMP-
1235 capable CPU.
1236
1237 The only effect of this option is to make the SMP-related
1238 options available to the user for configuration.
1239
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240config SMP
Russell Kingbb2d8132011-05-12 09:52:02 +01001241 bool "Symmetric Multi-Processing"
Russell Kingfbb4dda2011-01-17 18:01:58 +00001242 depends on CPU_V6K || CPU_V7
Russell Kingbc282482009-05-17 18:58:34 +01001243 depends on GENERIC_CLOCKEVENTS
Dave Martin3b556582011-12-07 15:38:04 +00001244 depends on HAVE_SMP
Jonathan Austin801bb212013-02-22 18:56:04 +00001245 depends on MMU || ARM_MPU
Arnd Bergmann03617482015-05-26 15:36:58 +01001246 select IRQ_WORK
Linus Torvalds1da177e2005-04-16 15:20:36 -07001247 help
1248 This enables support for systems with more than one CPU. If you have
Robert Graffham4a474152014-01-23 15:55:29 -08001249 a system with only one CPU, say N. If you have a system with more
1250 than one CPU, say Y.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001251
Robert Graffham4a474152014-01-23 15:55:29 -08001252 If you say N here, the kernel will run on uni- and multiprocessor
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 machines, but will use only one CPU of a multiprocessor machine. If
Robert Graffham4a474152014-01-23 15:55:29 -08001254 you say Y here, the kernel will run on many, but not all,
1255 uniprocessor machines. On a uniprocessor machine, the kernel
1256 will run faster if you say N here.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257
Paul Bolle395cf962011-08-15 02:02:26 +02001258 See also <file:Documentation/x86/i386/IO-APIC.txt>,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259 <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
Justin P. Mattock50a23e62010-10-16 10:36:23 -07001260 <http://tldp.org/HOWTO/SMP-HOWTO.html>.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001261
1262 If you don't know what to do here, say N.
1263
Russell Kingf00ec482010-09-04 10:47:48 +01001264config SMP_ON_UP
Russell King5744ff42015-02-13 11:04:21 +00001265 bool "Allow booting SMP kernel on uniprocessor systems"
Jonathan Austin801bb212013-02-22 18:56:04 +00001266 depends on SMP && !XIP_KERNEL && MMU
Russell Kingf00ec482010-09-04 10:47:48 +01001267 default y
1268 help
1269 SMP kernels contain instructions which fail on non-SMP processors.
1270 Enabling this option allows the kernel to modify itself to make
1271 these instructions safe. Disabling it allows about 1K of space
1272 savings.
1273
1274 If you don't know what to do here, say Y.
1275
Vincent Guittotc9018aa2011-08-08 13:21:59 +01001276config ARM_CPU_TOPOLOGY
1277 bool "Support cpu topology definition"
1278 depends on SMP && CPU_V7
1279 default y
1280 help
1281 Support ARM cpu topology definition. The MPIDR register defines
1282 affinity between processors which is then used to describe the cpu
1283 topology of an ARM System.
1284
1285config SCHED_MC
1286 bool "Multi-core scheduler support"
1287 depends on ARM_CPU_TOPOLOGY
1288 help
1289 Multi-core scheduler support improves the CPU scheduler's decision
1290 making when dealing with multi-core CPU chips at a cost of slightly
1291 increased overhead in some places. If unsure say N here.
1292
1293config SCHED_SMT
1294 bool "SMT scheduler support"
1295 depends on ARM_CPU_TOPOLOGY
1296 help
1297 Improves the CPU scheduler's decision making when dealing with
1298 MultiThreading at a cost of slightly increased overhead in some
1299 places. If unsure say N here.
1300
Russell Kinga8cbcd92009-05-16 11:51:14 +01001301config HAVE_ARM_SCU
1302 bool
Russell Kinga8cbcd92009-05-16 11:51:14 +01001303 help
1304 This option enables support for the ARM system coherency unit
1305
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001306config HAVE_ARM_ARCH_TIMER
Marc Zyngier022c03a2012-01-11 17:25:17 +00001307 bool "Architected timer support"
1308 depends on CPU_V7
Mark Rutland8a4da6e2012-11-12 14:33:44 +00001309 select ARM_ARCH_TIMER
Will Deacon0c4034622013-11-19 15:46:17 +01001310 select GENERIC_CLOCKEVENTS
Marc Zyngier022c03a2012-01-11 17:25:17 +00001311 help
1312 This option enables support for the ARM architected timer
1313
Russell Kingf32f4ce2009-05-16 12:14:21 +01001314config HAVE_ARM_TWD
1315 bool
Rob Herringda4a6862013-02-06 21:17:47 -06001316 select CLKSRC_OF if OF
Russell Kingf32f4ce2009-05-16 12:14:21 +01001317 help
1318 This options enables support for the ARM timer and watchdog unit
1319
Nicolas Pitree8db2882012-04-12 02:45:22 -04001320config MCPM
1321 bool "Multi-Cluster Power Management"
1322 depends on CPU_V7 && SMP
1323 help
1324 This option provides the common power management infrastructure
1325 for (multi-)cluster based systems, such as big.LITTLE based
1326 systems.
1327
Haojian Zhuangebf4a5c2014-04-15 14:52:00 +08001328config MCPM_QUAD_CLUSTER
1329 bool
1330 depends on MCPM
1331 help
1332 To avoid wasting resources unnecessarily, MCPM only supports up
1333 to 2 clusters by default.
1334 Platforms with 3 or 4 clusters that use MCPM must select this
1335 option to allow the additional clusters to be managed.
1336
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001337config BIG_LITTLE
1338 bool "big.LITTLE support (Experimental)"
1339 depends on CPU_V7 && SMP
1340 select MCPM
1341 help
1342 This option enables support selections for the big.LITTLE
1343 system architecture.
1344
1345config BL_SWITCHER
1346 bool "big.LITTLE switcher support"
Arnd Bergmann6c044fe2015-11-19 15:49:23 +01001347 depends on BIG_LITTLE && MCPM && HOTPLUG_CPU && ARM_GIC
Russell King51aaf812014-04-22 22:26:27 +01001348 select CPU_PM
Nicolas Pitre1c33be52012-04-12 02:56:10 -04001349 help
1350 The big.LITTLE "switcher" provides the core functionality to
1351 transparently handle transition between a cluster of A15's
1352 and a cluster of A7's in a big.LITTLE system.
1353
Nicolas Pitreb22537c2012-04-12 03:04:28 -04001354config BL_SWITCHER_DUMMY_IF
1355 tristate "Simple big.LITTLE switcher user interface"
1356 depends on BL_SWITCHER && DEBUG_KERNEL
1357 help
1358 This is a simple and dummy char dev interface to control
1359 the big.LITTLE switcher core code. It is meant for
1360 debugging purposes only.
1361
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001362choice
1363 prompt "Memory split"
Russell King006fa252014-02-26 19:40:46 +00001364 depends on MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001365 default VMSPLIT_3G
1366 help
1367 Select the desired split between kernel and user memory.
1368
1369 If you are not absolutely sure what you are doing, leave this
1370 option alone!
1371
1372 config VMSPLIT_3G
1373 bool "3G/1G user/kernel split"
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001374 config VMSPLIT_3G_OPT
1375 bool "3G/1G user/kernel split (for full 1G low memory)"
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001376 config VMSPLIT_2G
1377 bool "2G/2G user/kernel split"
1378 config VMSPLIT_1G
1379 bool "1G/3G user/kernel split"
1380endchoice
1381
1382config PAGE_OFFSET
1383 hex
Russell King006fa252014-02-26 19:40:46 +00001384 default PHYS_OFFSET if !MMU
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001385 default 0x40000000 if VMSPLIT_1G
1386 default 0x80000000 if VMSPLIT_2G
Nicolas Pitre63ce4462015-09-13 03:30:11 +01001387 default 0xB0000000 if VMSPLIT_3G_OPT
Lennert Buytenhek8d5796d2008-08-25 21:03:32 +01001388 default 0xC0000000
1389
Linus Torvalds1da177e2005-04-16 15:20:36 -07001390config NR_CPUS
1391 int "Maximum number of CPUs (2-32)"
1392 range 2 32
1393 depends on SMP
1394 default "4"
1395
Russell Kinga054a812005-11-02 22:24:33 +00001396config HOTPLUG_CPU
Russell King00b7ded2012-10-22 22:54:30 +01001397 bool "Support for hot-pluggable CPUs"
Stephen Rothwell40b31362013-05-21 13:49:35 +10001398 depends on SMP
Russell Kinga054a812005-11-02 22:24:33 +00001399 help
1400 Say Y here to experiment with turning CPUs off and on. CPUs
1401 can be controlled through /sys/devices/system/cpu.
1402
Will Deacon2bdd4242012-12-12 19:20:52 +00001403config ARM_PSCI
1404 bool "Support for the ARM Power State Coordination Interface (PSCI)"
Jens Wiklandere6796602016-01-04 15:46:47 +01001405 depends on HAVE_ARM_SMCCC
Mark Rutlandbe120392015-07-31 15:46:19 +01001406 select ARM_PSCI_FW
Will Deacon2bdd4242012-12-12 19:20:52 +00001407 help
1408 Say Y here if you want Linux to communicate with system firmware
1409 implementing the PSCI specification for CPU-centric power
1410 management operations described in ARM document number ARM DEN
1411 0022A ("Power State Coordination Interface System Software on
1412 ARM processors").
1413
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001414# The GPIO number here must be sorted by descending number. In case of
1415# a multiplatform kernel, we just want the highest value required by the
1416# selected platforms.
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001417config ARCH_NR_GPIO
1418 int
Gregory Fongb35d2e52015-05-28 19:14:10 -07001419 default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \
1420 ARCH_ZYNQ
Tomasz Figaaa425872014-07-03 13:17:12 +02001421 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \
1422 SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210
Boris BREZILLONeb171a92014-04-10 15:52:46 +02001423 default 416 if ARCH_SUNXI
Olof Johansson06b851e2013-04-02 18:33:58 -07001424 default 392 if ARCH_U8500
Tony Prisk01bb9142013-03-09 18:22:30 +13001425 default 352 if ARCH_VT8500
Heiko Stuebner7b5da4c2014-05-26 00:13:51 +02001426 default 288 if ARCH_ROCKCHIP
Maxime Ripard2a6ad872013-02-03 12:24:48 +01001427 default 264 if MACH_H4700
Peter De Schrijver (NVIDIA)44986ab2011-12-21 10:48:45 +01001428 default 0
1429 help
1430 Maximum number of GPIOs in the system.
1431
1432 If unsure, leave the default value.
1433
Uwe Kleine-Königd45a3982009-08-13 20:38:17 +02001434source kernel/Kconfig.preempt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435
Russell Kingc9218b12013-04-27 23:31:10 +01001436config HZ_FIXED
Russell Kingf8065812006-03-02 22:41:59 +00001437 int
Kukjin Kim070b8b42014-07-02 07:50:15 +09001438 default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
Kukjin Kima73ddc62011-05-11 16:27:51 +09001439 ARCH_S5PV210 || ARCH_EXYNOS4
Alexandre Belloni1164f672015-03-13 22:57:24 +01001440 default 128 if SOC_AT91RM9200
Russell King47d84682013-09-10 23:47:55 +01001441 default 0
Russell Kingc9218b12013-04-27 23:31:10 +01001442
1443choice
Russell King47d84682013-09-10 23:47:55 +01001444 depends on HZ_FIXED = 0
Russell Kingc9218b12013-04-27 23:31:10 +01001445 prompt "Timer frequency"
1446
1447config HZ_100
1448 bool "100 Hz"
1449
1450config HZ_200
1451 bool "200 Hz"
1452
1453config HZ_250
1454 bool "250 Hz"
1455
1456config HZ_300
1457 bool "300 Hz"
1458
1459config HZ_500
1460 bool "500 Hz"
1461
1462config HZ_1000
1463 bool "1000 Hz"
1464
1465endchoice
1466
1467config HZ
1468 int
Russell King47d84682013-09-10 23:47:55 +01001469 default HZ_FIXED if HZ_FIXED != 0
Russell Kingc9218b12013-04-27 23:31:10 +01001470 default 100 if HZ_100
1471 default 200 if HZ_200
1472 default 250 if HZ_250
1473 default 300 if HZ_300
1474 default 500 if HZ_500
1475 default 1000
1476
1477config SCHED_HRTICK
1478 def_bool HIGH_RES_TIMERS
Russell Kingf8065812006-03-02 22:41:59 +00001479
Catalin Marinas16c79652009-07-24 12:33:02 +01001480config THUMB2_KERNEL
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001481 bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
Uwe Kleine-König4477ca42013-03-21 21:02:37 +01001482 depends on (CPU_V7 || CPU_V7M) && !CPU_V6 && !CPU_V6K
Uwe Kleine-Königbc7dea02011-12-09 20:52:10 +01001483 default y if CPU_THUMBONLY
Catalin Marinas16c79652009-07-24 12:33:02 +01001484 select AEABI
1485 select ARM_ASM_UNIFIED
Arnd Bergmann89bace62011-06-10 14:12:21 +00001486 select ARM_UNWIND
Catalin Marinas16c79652009-07-24 12:33:02 +01001487 help
1488 By enabling this option, the kernel will be compiled in
1489 Thumb-2 mode. A compiler/assembler that understand the unified
1490 ARM-Thumb syntax is needed.
1491
1492 If unsure, say N.
1493
Dave Martin6f685c52011-03-03 11:41:12 +01001494config THUMB2_AVOID_R_ARM_THM_JUMP11
1495 bool "Work around buggy Thumb-2 short branch relocations in gas"
1496 depends on THUMB2_KERNEL && MODULES
1497 default y
1498 help
1499 Various binutils versions can resolve Thumb-2 branches to
1500 locally-defined, preemptible global symbols as short-range "b.n"
1501 branch instructions.
1502
1503 This is a problem, because there's no guarantee the final
1504 destination of the symbol, or any candidate locations for a
1505 trampoline, are within range of the branch. For this reason, the
1506 kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
1507 relocation in modules at all, and it makes little sense to add
1508 support.
1509
1510 The symptom is that the kernel fails with an "unsupported
1511 relocation" error when loading some modules.
1512
1513 Until fixed tools are available, passing
1514 -fno-optimize-sibling-calls to gcc should prevent gcc generating
1515 code which hits this problem, at the cost of a bit of extra runtime
1516 stack usage in some cases.
1517
1518 The problem is described in more detail at:
1519 https://bugs.launchpad.net/binutils-linaro/+bug/725126
1520
1521 Only Thumb-2 kernels are affected.
1522
1523 Unless you are sure your tools don't have this problem, say Y.
1524
Catalin Marinas0becb082009-07-24 12:32:53 +01001525config ARM_ASM_UNIFIED
1526 bool
1527
Nicolas Pitre42f25bd2015-12-12 02:49:21 +01001528config ARM_PATCH_IDIV
1529 bool "Runtime patch udiv/sdiv instructions into __aeabi_{u}idiv()"
1530 depends on CPU_32v7 && !XIP_KERNEL
1531 default y
1532 help
1533 The ARM compiler inserts calls to __aeabi_idiv() and
1534 __aeabi_uidiv() when it needs to perform division on signed
1535 and unsigned integers. Some v7 CPUs have support for the sdiv
1536 and udiv instructions that can be used to implement those
1537 functions.
1538
1539 Enabling this option allows the kernel to modify itself to
1540 replace the first two instructions of these library functions
1541 with the sdiv or udiv plus "bx lr" instructions when the CPU
1542 it is running on supports them. Typically this will be faster
1543 and less power intensive than running the original library
1544 code to do integer division.
1545
Nicolas Pitre704bdda02006-01-14 16:33:50 +00001546config AEABI
1547 bool "Use the ARM EABI to compile the kernel"
1548 help
1549 This option allows for the kernel to be compiled using the latest
1550 ARM ABI (aka EABI). This is only useful if you are using a user
1551 space environment that is also compiled with EABI.
1552
1553 Since there are major incompatibilities between the legacy ABI and
1554 EABI, especially with regard to structure member alignment, this
1555 option also changes the kernel syscall calling convention to
1556 disambiguate both ABIs and allow for backward compatibility support
1557 (selected with CONFIG_OABI_COMPAT).
1558
1559 To use this you need GCC version 4.0.0 or later.
1560
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001561config OABI_COMPAT
Russell Kinga73a3ff2006-02-08 21:09:55 +00001562 bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08001563 depends on AEABI && !THUMB2_KERNEL
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001564 help
1565 This option preserves the old syscall interface along with the
1566 new (ARM EABI) one. It also provides a compatibility layer to
1567 intercept syscalls that have structure arguments which layout
1568 in memory differs between the legacy ABI and the new ARM EABI
1569 (only for non "thumb" binaries). This option adds a tiny
1570 overhead to all syscalls and produces a slightly larger kernel.
Kees Cook91702172013-11-09 00:51:56 +01001571
1572 The seccomp filter system will not be available when this is
1573 selected, since there is no way yet to sensibly distinguish
1574 between calling conventions during filtering.
1575
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001576 If you know you'll be using only pure EABI user space then you
1577 can say N here. If this option is not selected and you attempt
1578 to execute a legacy ABI binary then the result will be
1579 UNPREDICTABLE (in fact it can be predicted that it won't work
Kees Cookb02f8462013-11-09 00:31:11 +01001580 at all). If in doubt say N.
Nicolas Pitre6c90c872006-01-14 16:37:15 +00001581
Mel Gormaneb335752009-05-13 17:34:48 +01001582config ARCH_HAS_HOLES_MEMORYMODEL
Mel Gormane80d6a22008-08-14 11:10:14 +01001583 bool
Mel Gormane80d6a22008-08-14 11:10:14 +01001584
Russell King05944d72006-11-30 20:43:51 +00001585config ARCH_SPARSEMEM_ENABLE
1586 bool
1587
Russell King07a2f732008-10-01 21:39:58 +01001588config ARCH_SPARSEMEM_DEFAULT
1589 def_bool ARCH_SPARSEMEM_ENABLE
1590
Russell King05944d72006-11-30 20:43:51 +00001591config ARCH_SELECT_MEMORY_MODEL
Russell Kingbe370302010-05-07 17:40:33 +01001592 def_bool ARCH_SPARSEMEM_ENABLE
Yasunori Gotoc80d79d2006-04-10 22:53:53 -07001593
Will Deacon7b7bf492011-05-19 13:21:14 +01001594config HAVE_ARCH_PFN_VALID
1595 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
1596
Steve Capperb8cd51a2014-10-09 15:29:20 -07001597config HAVE_GENERIC_RCU_GUP
1598 def_bool y
1599 depends on ARM_LPAE
1600
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001601config HIGHMEM
Russell Kinge8db89a2011-05-12 09:53:05 +01001602 bool "High Memory Support"
1603 depends on MMU
Nicolas Pitre053a96c2008-09-19 00:36:12 -04001604 help
1605 The address space of ARM processors is only 4 Gigabytes large
1606 and it has to accommodate user address space, kernel address
1607 space as well as some memory mapped IO. That means that, if you
1608 have a large amount of physical memory and/or IO, not all of the
1609 memory can be "permanently mapped" by the kernel. The physical
1610 memory that is not permanently mapped is called "high memory".
1611
1612 Depending on the selected kernel/user memory split, minimum
1613 vmalloc space and actual amount of RAM, you may not need this
1614 option which should result in a slightly faster kernel.
1615
1616 If unsure, say n.
1617
Russell King65cec8e2009-08-17 20:02:06 +01001618config HIGHPTE
Russell King9a431bd2015-06-25 10:44:08 +01001619 bool "Allocate 2nd-level pagetables from highmem" if EXPERT
Russell King65cec8e2009-08-17 20:02:06 +01001620 depends on HIGHMEM
Russell King9a431bd2015-06-25 10:44:08 +01001621 default y
Russell Kingb4d103d2015-06-25 10:49:45 +01001622 help
1623 The VM uses one page of physical memory for each page table.
1624 For systems with a lot of processes, this can use a lot of
1625 precious low memory, eventually leading to low memory being
1626 consumed by page tables. Setting this option will allow
1627 user-space 2nd level page tables to reside in high memory.
Russell King65cec8e2009-08-17 20:02:06 +01001628
Russell Kinga5e090a2015-08-19 20:40:41 +01001629config CPU_SW_DOMAIN_PAN
1630 bool "Enable use of CPU domains to implement privileged no-access"
1631 depends on MMU && !ARM_LPAE
Jamie Iles1b8873a2010-02-02 20:25:44 +01001632 default y
1633 help
Russell Kinga5e090a2015-08-19 20:40:41 +01001634 Increase kernel security by ensuring that normal kernel accesses
1635 are unable to access userspace addresses. This can help prevent
1636 use-after-free bugs becoming an exploitable privilege escalation
1637 by ensuring that magic values (such as LIST_POISON) will always
1638 fault when dereferenced.
1639
1640 CPUs with low-vector mappings use a best-efforts implementation.
1641 Their lower 1MB needs to remain accessible for the vectors, but
1642 the remainder of userspace will become appropriately inaccessible.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001643
1644config HW_PERF_EVENTS
Mark Rutlandfa8ad782015-07-06 12:23:53 +01001645 def_bool y
1646 depends on ARM_PMU
Jamie Iles1b8873a2010-02-02 20:25:44 +01001647
Catalin Marinas1355e2a2012-07-25 14:32:38 +01001648config SYS_SUPPORTS_HUGETLBFS
1649 def_bool y
1650 depends on ARM_LPAE
1651
Catalin Marinas8d962502012-07-25 14:39:26 +01001652config HAVE_ARCH_TRANSPARENT_HUGEPAGE
1653 def_bool y
1654 depends on ARM_LPAE
1655
Steven Capper4bfab202013-07-26 14:58:22 +01001656config ARCH_WANT_GENERAL_HUGETLB
1657 def_bool y
1658
Ard Biesheuvel7d485f62014-11-24 16:54:35 +01001659config ARM_MODULE_PLTS
1660 bool "Use PLTs to allow module memory to spill over into vmalloc area"
1661 depends on MODULES
1662 help
1663 Allocate PLTs when loading modules so that jumps and calls whose
1664 targets are too far away for their relative offsets to be encoded
1665 in the instructions themselves can be bounced via veneers in the
1666 module's PLT. This allows modules to be allocated in the generic
1667 vmalloc area after the dedicated module memory area has been
1668 exhausted. The modules will use slightly more memory, but after
1669 rounding up to page size, the actual memory footprint is usually
1670 the same.
1671
1672 Say y if you are getting out of memory errors while loading modules
1673
Linus Torvalds1da177e2005-04-16 15:20:36 -07001674source "mm/Kconfig"
1675
Magnus Dammc1b2d972010-07-05 10:00:11 +01001676config FORCE_MAX_ZONEORDER
Ulrich Hecht36d6c922015-08-14 15:51:06 +02001677 int "Maximum zone order"
Yegor Yefremov898f08e2012-10-08 14:37:53 -07001678 default "12" if SOC_AM33XX
Uwe Kleine-König6d85e2b2011-11-17 14:36:23 +01001679 default "9" if SA1111 || ARCH_EFM32
Magnus Dammc1b2d972010-07-05 10:00:11 +01001680 default "11"
1681 help
1682 The kernel memory allocator divides physically contiguous memory
1683 blocks into "zones", where each zone is a power of two number of
1684 pages. This option selects the largest power of two that the kernel
1685 keeps in the memory allocator. If you need to allocate very large
1686 blocks of physically contiguous memory, then you may need to
1687 increase this value.
1688
1689 This config option is actually maximum order plus one. For example,
1690 a value of 11 means that the largest free memory block is 2^10 pages.
1691
Linus Torvalds1da177e2005-04-16 15:20:36 -07001692config ALIGNMENT_TRAP
1693 bool
Hyok S. Choif12d0d72006-09-26 17:36:37 +09001694 depends on CPU_CP15_MMU
Linus Torvalds1da177e2005-04-16 15:20:36 -07001695 default y if !ARCH_EBSA110
Russell Kinge119bff2010-01-10 17:23:29 +00001696 select HAVE_PROC_CPU if PROC_FS
Linus Torvalds1da177e2005-04-16 15:20:36 -07001697 help
Matt LaPlante84eb8d02006-10-03 22:53:09 +02001698 ARM processors cannot fetch/store information which is not
Linus Torvalds1da177e2005-04-16 15:20:36 -07001699 naturally aligned on the bus, i.e., a 4 byte fetch must start at an
1700 address divisible by 4. On 32-bit ARM processors, these non-aligned
1701 fetch/store instructions will be emulated in software if you say
1702 here, which has a severe performance impact. This is necessary for
1703 correct operation of some network protocols. With an IP-only
1704 configuration it is safe to say N, otherwise say Y.
1705
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001706config UACCESS_WITH_MEMCPY
Linus Walleij38ef2ad2012-09-10 16:36:37 +01001707 bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user()"
1708 depends on MMU
Lennert Buytenhek39ec58f2009-03-09 14:30:09 -04001709 default y if CPU_FEROCEON
1710 help
1711 Implement faster copy_to_user and clear_user methods for CPU
1712 cores where a 8-word STM instruction give significantly higher
1713 memory write throughput than a sequence of individual 32bit stores.
1714
1715 A possible side effect is a slight increase in scheduling latency
1716 between threads sharing the same address space if they invoke
1717 such copy operations with large buffers.
1718
1719 However, if the CPU data cache is using a write-allocate mode,
1720 this option is unlikely to provide any performance gain.
1721
Nicolas Pitre70c70d92010-08-26 15:08:35 -07001722config SECCOMP
1723 bool
1724 prompt "Enable seccomp to safely compute untrusted bytecode"
1725 ---help---
1726 This kernel feature is useful for number crunching applications
1727 that may need to compute untrusted bytecode during their
1728 execution. By using pipes or other transports made available to
1729 the process as file descriptors supporting the read/write
1730 syscalls, it's possible to isolate those applications in
1731 their own address space using seccomp. Once seccomp is
1732 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
1733 and the task is only allowed to execute a few safe syscalls
1734 defined by each seccomp mode.
1735
Stefano Stabellini06e62952013-10-15 15:47:14 +00001736config SWIOTLB
1737 def_bool y
1738
1739config IOMMU_HELPER
1740 def_bool SWIOTLB
1741
Stefano Stabellini02c24332015-11-23 10:32:57 +00001742config PARAVIRT
1743 bool "Enable paravirtualization code"
1744 help
1745 This changes the kernel so it can modify itself when it is run
1746 under a hypervisor, potentially improving performance significantly
1747 over full virtualization.
1748
1749config PARAVIRT_TIME_ACCOUNTING
1750 bool "Paravirtual steal time accounting"
1751 select PARAVIRT
1752 default n
1753 help
1754 Select this option to enable fine granularity task steal time
1755 accounting. Time spent executing other tasks in parallel with
1756 the current vCPU is discounted from the vCPU power. To account for
1757 that, there can be a small performance impact.
1758
1759 If in doubt, say N here.
1760
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001761config XEN_DOM0
1762 def_bool y
1763 depends on XEN
1764
1765config XEN
Julien Grallc2ba1f72014-09-17 14:07:06 -07001766 bool "Xen guest support on ARM"
Ian Campbell85323a92013-03-07 07:17:25 +00001767 depends on ARM && AEABI && OF
Arnd Bergmannf880b672012-10-09 10:33:52 +00001768 depends on CPU_V7 && !CPU_V6
Ian Campbell85323a92013-03-07 07:17:25 +00001769 depends on !GENERIC_ATOMIC64
Uwe Kleine-König7693dec2014-03-03 09:25:52 -05001770 depends on MMU
Russell King51aaf812014-04-22 22:26:27 +01001771 select ARCH_DMA_ADDR_T_64BIT
Stefano Stabellini17b7ab82013-04-24 18:47:18 +00001772 select ARM_PSCI
Stefano Stabellini83862cc2013-10-10 13:40:44 +00001773 select SWIOTLB_XEN
Stefano Stabellini02c24332015-11-23 10:32:57 +00001774 select PARAVIRT
Stefano Stabellinieff8d642012-09-17 14:58:17 +00001775 help
1776 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM.
1777
Linus Torvalds1da177e2005-04-16 15:20:36 -07001778endmenu
1779
1780menu "Boot options"
1781
Grant Likely9eb8f672011-04-28 14:27:20 -06001782config USE_OF
1783 bool "Flattened Device Tree support"
Russell Kingb1b3f492012-10-06 17:12:25 +01001784 select IRQ_DOMAIN
Grant Likely9eb8f672011-04-28 14:27:20 -06001785 select OF
Grant Likely9eb8f672011-04-28 14:27:20 -06001786 help
1787 Include support for flattened device tree machine descriptions.
1788
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001789config ATAGS
1790 bool "Support for the traditional ATAGS boot data passing" if USE_OF
1791 default y
1792 help
1793 This is the traditional way of passing data to the kernel at boot
1794 time. If you are solely relying on the flattened device tree (or
1795 the ARM_ATAG_DTB_COMPAT option) then you may unselect this option
1796 to remove ATAGS support from your kernel binary. If unsure,
1797 leave this to y.
1798
1799config DEPRECATED_PARAM_STRUCT
1800 bool "Provide old way to pass kernel parameters"
1801 depends on ATAGS
1802 help
1803 This was deprecated in 2001 and announced to live on for 5 years.
1804 Some old boot loaders still use this way.
1805
Linus Torvalds1da177e2005-04-16 15:20:36 -07001806# Compressed boot loader in ROM. Yes, we really want to ask about
1807# TEXT and BSS so we preserve their values in the config files.
1808config ZBOOT_ROM_TEXT
1809 hex "Compressed ROM boot loader base address"
1810 default "0"
1811 help
1812 The physical address at which the ROM-able zImage is to be
1813 placed in the target. Platforms which normally make use of
1814 ROM-able zImage formats normally set this to a suitable
1815 value in their defconfig file.
1816
1817 If ZBOOT_ROM is not enabled, this has no effect.
1818
1819config ZBOOT_ROM_BSS
1820 hex "Compressed ROM boot loader BSS address"
1821 default "0"
1822 help
Dan Fandrichf8c440b2006-09-20 23:28:51 +01001823 The base address of an area of read/write memory in the target
1824 for the ROM-able zImage which must be available while the
1825 decompressor is running. It must be large enough to hold the
1826 entire decompressed kernel plus an additional 128 KiB.
1827 Platforms which normally make use of ROM-able zImage formats
1828 normally set this to a suitable value in their defconfig file.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001829
1830 If ZBOOT_ROM is not enabled, this has no effect.
1831
1832config ZBOOT_ROM
1833 bool "Compressed boot loader in ROM/flash"
1834 depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
Russell King10968132014-01-01 11:59:44 +00001835 depends on !ARM_APPENDED_DTB && !XIP_KERNEL && !AUTO_ZRELADDR
Linus Torvalds1da177e2005-04-16 15:20:36 -07001836 help
1837 Say Y here if you intend to execute your compressed kernel image
1838 (zImage) directly from ROM or flash. If unsure, say N.
1839
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001840config ARM_APPENDED_DTB
1841 bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
Russell King10968132014-01-01 11:59:44 +00001842 depends on OF
John Bonesioe2a6a3a2011-05-27 18:45:50 -04001843 help
1844 With this option, the boot code will look for a device tree binary
1845 (DTB) appended to zImage
1846 (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
1847
1848 This is meant as a backward compatibility convenience for those
1849 systems with a bootloader that can't be upgraded to accommodate
1850 the documented boot protocol using a device tree.
1851
1852 Beware that there is very little in terms of protection against
1853 this option being confused by leftover garbage in memory that might
1854 look like a DTB header after a reboot if no actual DTB is appended
1855 to zImage. Do not leave this option active in a production kernel
1856 if you don't intend to always append a DTB. Proper passing of the
1857 location into r2 of a bootloader provided DTB is always preferable
1858 to this option.
1859
Nicolas Pitreb90b9a32011-09-13 22:37:07 -04001860config ARM_ATAG_DTB_COMPAT
1861 bool "Supplement the appended DTB with traditional ATAG information"
1862 depends on ARM_APPENDED_DTB
1863 help
1864 Some old bootloaders can't be updated to a DTB capable one, yet
1865 they provide ATAGs with memory configuration, the ramdisk address,
1866 the kernel cmdline string, etc. Such information is dynamically
1867 provided by the bootloader and can't always be stored in a static
1868 DTB. To allow a device tree enabled kernel to be used with such
1869 bootloaders, this option allows zImage to extract the information
1870 from the ATAG list and store it at run time into the appended DTB.
1871
Genoud Richardd0f34a112012-06-26 16:37:59 +01001872choice
1873 prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
1874 default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1875
1876config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
1877 bool "Use bootloader kernel arguments if available"
1878 help
1879 Uses the command-line options passed by the boot loader instead of
1880 the device tree bootargs property. If the boot loader doesn't provide
1881 any, the device tree bootargs property will be used.
1882
1883config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
1884 bool "Extend with bootloader kernel arguments"
1885 help
1886 The command-line arguments provided by the boot loader will be
1887 appended to the the device tree bootargs property.
1888
1889endchoice
1890
Linus Torvalds1da177e2005-04-16 15:20:36 -07001891config CMDLINE
1892 string "Default kernel command string"
1893 default ""
1894 help
1895 On some architectures (EBSA110 and CATS), there is currently no way
1896 for the boot loader to pass arguments to the kernel. For these
1897 architectures, you should supply some command-line options at build
1898 time by entering them here. As a minimum, you should specify the
1899 memory size and the root device (e.g., mem=64M root=/dev/nfs).
1900
Victor Boivie4394c122011-05-04 17:07:55 +01001901choice
1902 prompt "Kernel command line type" if CMDLINE != ""
1903 default CMDLINE_FROM_BOOTLOADER
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001904 depends on ATAGS
Victor Boivie4394c122011-05-04 17:07:55 +01001905
1906config CMDLINE_FROM_BOOTLOADER
1907 bool "Use bootloader kernel arguments if available"
1908 help
1909 Uses the command-line options passed by the boot loader. If
1910 the boot loader doesn't provide any, the default kernel command
1911 string provided in CMDLINE will be used.
1912
1913config CMDLINE_EXTEND
1914 bool "Extend bootloader kernel arguments"
1915 help
1916 The command-line arguments provided by the boot loader will be
1917 appended to the default kernel command string.
1918
Alexander Holler92d20402010-02-16 19:04:53 +01001919config CMDLINE_FORCE
1920 bool "Always use the default kernel command string"
Alexander Holler92d20402010-02-16 19:04:53 +01001921 help
1922 Always use the default kernel command string, even if the boot
1923 loader passes other arguments to the kernel.
1924 This is useful if you cannot or don't want to change the
1925 command-line options your boot loader passes to the kernel.
Victor Boivie4394c122011-05-04 17:07:55 +01001926endchoice
Alexander Holler92d20402010-02-16 19:04:53 +01001927
Linus Torvalds1da177e2005-04-16 15:20:36 -07001928config XIP_KERNEL
1929 bool "Kernel Execute-In-Place from ROM"
Russell King10968132014-01-01 11:59:44 +00001930 depends on !ARM_LPAE && !ARCH_MULTIPLATFORM
Linus Torvalds1da177e2005-04-16 15:20:36 -07001931 help
1932 Execute-In-Place allows the kernel to run from non-volatile storage
1933 directly addressable by the CPU, such as NOR flash. This saves RAM
1934 space since the text section of the kernel is not loaded from flash
1935 to RAM. Read-write sections, such as the data section and stack,
1936 are still copied to RAM. The XIP kernel is not compressed since
1937 it has to run directly from flash, so it will take more space to
1938 store it. The flash address used to link the kernel object files,
1939 and for storing it, is configuration dependent. Therefore, if you
1940 say Y here, you must know the proper physical address where to
1941 store the kernel image depending on your own flash memory usage.
1942
1943 Also note that the make target becomes "make xipImage" rather than
1944 "make zImage" or "make Image". The final kernel binary to put in
1945 ROM memory will be arch/arm/boot/xipImage.
1946
1947 If unsure, say N.
1948
1949config XIP_PHYS_ADDR
1950 hex "XIP Kernel Physical Location"
1951 depends on XIP_KERNEL
1952 default "0x00080000"
1953 help
1954 This is the physical address in your flash memory the kernel will
1955 be linked for and stored to. This address is dependent on your
1956 own flash usage.
1957
Richard Purdiec587e4a2007-02-06 21:29:00 +01001958config KEXEC
1959 bool "Kexec system call (EXPERIMENTAL)"
Stephen Warren19ab4282013-06-14 16:14:14 +01001960 depends on (!SMP || PM_SLEEP_SMP)
Arnd Bergmanncb1293e2015-05-26 15:40:44 +01001961 depends on !CPU_V7M
Dave Young2965faa2015-09-09 15:38:55 -07001962 select KEXEC_CORE
Richard Purdiec587e4a2007-02-06 21:29:00 +01001963 help
1964 kexec is a system call that implements the ability to shutdown your
1965 current kernel, and to start another kernel. It is like a reboot
Matt LaPlante01dd2fb2007-10-20 01:34:40 +02001966 but it is independent of the system firmware. And like a reboot
Richard Purdiec587e4a2007-02-06 21:29:00 +01001967 you can start any kernel with it, not just Linux.
1968
1969 It is an ongoing process to be certain the hardware in a machine
1970 is properly shutdown, so do not be surprised if this code does not
Geert Uytterhoevenbf220692013-08-20 21:38:03 +02001971 initially work for you.
Richard Purdiec587e4a2007-02-06 21:29:00 +01001972
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001973config ATAGS_PROC
1974 bool "Export atags in procfs"
Nicolas Pitrebd51e2f2012-09-01 03:03:25 +01001975 depends on ATAGS && KEXEC
Uli Luckasb98d7292008-02-22 16:45:18 +01001976 default y
Richard Purdie4cd9d6f2008-01-02 00:56:46 +01001977 help
1978 Should the atags used to boot the kernel be exported in an "atags"
1979 file in procfs. Useful with kexec.
1980
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01001981config CRASH_DUMP
1982 bool "Build kdump crash kernel (EXPERIMENTAL)"
Mika Westerbergcb5d39b2010-11-18 19:14:52 +01001983 help
1984 Generate crash dump after being started by kexec. This should
1985 be normally only set in special crash dump kernels which are
1986 loaded in the main kernel with kexec-tools into a specially
1987 reserved region and then later executed after a crash by
1988 kdump/kexec. The crash dump kernel must be compiled to a
1989 memory address not used by the main kernel
1990
1991 For more details see Documentation/kdump/kdump.txt
1992
Eric Miaoe69edc792010-07-05 15:56:50 +02001993config AUTO_ZRELADDR
1994 bool "Auto calculation of the decompressed kernel image address"
Eric Miaoe69edc792010-07-05 15:56:50 +02001995 help
1996 ZRELADDR is the physical address where the decompressed kernel
1997 image will be placed. If AUTO_ZRELADDR is selected, the address
1998 will be determined at run-time by masking the current IP with
1999 0xf8000000. This assumes the zImage being placed in the first 128MB
2000 from start of memory.
2001
Roy Franz81a0bc32015-09-23 20:17:54 -07002002config EFI_STUB
2003 bool
2004
2005config EFI
2006 bool "UEFI runtime support"
2007 depends on OF && !CPU_BIG_ENDIAN && MMU && AUTO_ZRELADDR && !XIP_KERNEL
2008 select UCS2_STRING
2009 select EFI_PARAMS_FROM_FDT
2010 select EFI_STUB
2011 select EFI_ARMSTUB
2012 select EFI_RUNTIME_WRAPPERS
2013 ---help---
2014 This option provides support for runtime services provided
2015 by UEFI firmware (such as non-volatile variables, realtime
2016 clock, and platform reset). A UEFI stub is also provided to
2017 allow the kernel to be booted as an EFI application. This
2018 is only useful for kernels that may run on systems that have
2019 UEFI firmware.
2020
Linus Torvalds1da177e2005-04-16 15:20:36 -07002021endmenu
2022
Russell Kingac9d7ef2008-08-18 17:26:00 +01002023menu "CPU Power Management"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002024
Linus Torvalds1da177e2005-04-16 15:20:36 -07002025source "drivers/cpufreq/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002026
Russell Kingac9d7ef2008-08-18 17:26:00 +01002027source "drivers/cpuidle/Kconfig"
2028
2029endmenu
2030
Linus Torvalds1da177e2005-04-16 15:20:36 -07002031menu "Floating point emulation"
2032
2033comment "At least one emulation must be selected"
2034
2035config FPE_NWFPE
2036 bool "NWFPE math emulation"
Dave Martin593c2522010-12-13 21:56:03 +01002037 depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
Linus Torvalds1da177e2005-04-16 15:20:36 -07002038 ---help---
2039 Say Y to include the NWFPE floating point emulator in the kernel.
2040 This is necessary to run most binaries. Linux does not currently
2041 support floating point hardware so you need to say Y here even if
2042 your machine has an FPA or floating point co-processor podule.
2043
2044 You may say N here if you are going to load the Acorn FPEmulator
2045 early in the bootup.
2046
2047config FPE_NWFPE_XP
2048 bool "Support extended precision"
Lennert Buytenhekbedf1422005-11-07 21:12:08 +00002049 depends on FPE_NWFPE
Linus Torvalds1da177e2005-04-16 15:20:36 -07002050 help
2051 Say Y to include 80-bit support in the kernel floating-point
2052 emulator. Otherwise, only 32 and 64-bit support is compiled in.
2053 Note that gcc does not generate 80-bit operations by default,
2054 so in most cases this option only enlarges the size of the
2055 floating point emulator without any good reason.
2056
2057 You almost surely want to say N here.
2058
2059config FPE_FASTFPE
2060 bool "FastFPE math emulation (EXPERIMENTAL)"
Kees Cookd6f94fa2013-01-16 18:53:14 -08002061 depends on (!AEABI || OABI_COMPAT) && !CPU_32v3
Linus Torvalds1da177e2005-04-16 15:20:36 -07002062 ---help---
2063 Say Y here to include the FAST floating point emulator in the kernel.
2064 This is an experimental much faster emulator which now also has full
2065 precision for the mantissa. It does not support any exceptions.
2066 It is very simple, and approximately 3-6 times faster than NWFPE.
2067
2068 It should be sufficient for most programs. It may be not suitable
2069 for scientific calculations, but you have to check this for yourself.
2070 If you do not feel you need a faster FP emulation you should better
2071 choose NWFPE.
2072
2073config VFP
2074 bool "VFP-format floating point maths"
Russell Kinge399b1a2011-01-17 15:08:32 +00002075 depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
Linus Torvalds1da177e2005-04-16 15:20:36 -07002076 help
2077 Say Y to include VFP support code in the kernel. This is needed
2078 if your hardware includes a VFP unit.
2079
2080 Please see <file:Documentation/arm/VFP/release-notes.txt> for
2081 release notes and additional status information.
2082
2083 Say N if your target does not have VFP hardware.
2084
Catalin Marinas25ebee02007-09-25 15:22:24 +01002085config VFPv3
2086 bool
2087 depends on VFP
2088 default y if CPU_V7
2089
Catalin Marinasb5872db2008-01-10 19:16:17 +01002090config NEON
2091 bool "Advanced SIMD (NEON) Extension support"
2092 depends on VFPv3 && CPU_V7
2093 help
2094 Say Y to include support code for NEON, the ARMv7 Advanced SIMD
2095 Extension.
2096
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002097config KERNEL_MODE_NEON
2098 bool "Support for NEON in kernel mode"
Russell Kingc4a30c32013-09-22 11:08:50 +01002099 depends on NEON && AEABI
Ard Biesheuvel73c132c2013-05-16 11:41:48 +02002100 help
2101 Say Y to include support for NEON in kernel mode.
2102
Linus Torvalds1da177e2005-04-16 15:20:36 -07002103endmenu
2104
2105menu "Userspace binary formats"
2106
2107source "fs/Kconfig.binfmt"
2108
Linus Torvalds1da177e2005-04-16 15:20:36 -07002109endmenu
2110
2111menu "Power management options"
2112
Russell Kingeceab4a2005-11-15 11:31:41 +00002113source "kernel/power/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002114
Johannes Bergf4cb5702007-12-08 02:14:00 +01002115config ARCH_SUSPEND_POSSIBLE
Ezequiel Garcia19a05192013-08-16 10:28:24 +01002116 depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
Uwe Kleine-Königf0d75152012-02-01 10:00:00 +01002117 CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
Johannes Bergf4cb5702007-12-08 02:14:00 +01002118 def_bool y
2119
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002120config ARM_CPU_SUSPEND
Lorenzo Pieralisi8b6f2492016-02-01 18:01:30 +01002121 def_bool PM_SLEEP || BL_SWITCHER || ARM_PSCI_FW
Lorenzo Pieralisi1b9bdf52016-02-01 18:01:29 +01002122 depends on ARCH_SUSPEND_POSSIBLE
Arnd Bergmann15e0d9e2011-10-01 21:09:39 +02002123
Sebastian Capella603fb422014-03-25 01:20:29 +01002124config ARCH_HIBERNATION_POSSIBLE
2125 bool
2126 depends on MMU
2127 default y if ARCH_SUSPEND_POSSIBLE
2128
Linus Torvalds1da177e2005-04-16 15:20:36 -07002129endmenu
2130
Sam Ravnborgd5950b42005-07-11 21:03:49 -07002131source "net/Kconfig"
2132
Uwe Kleine-Königac251502009-08-13 21:09:21 +02002133source "drivers/Kconfig"
Linus Torvalds1da177e2005-04-16 15:20:36 -07002134
Kumar Gala916f7432015-02-26 15:49:09 -06002135source "drivers/firmware/Kconfig"
2136
Linus Torvalds1da177e2005-04-16 15:20:36 -07002137source "fs/Kconfig"
2138
Linus Torvalds1da177e2005-04-16 15:20:36 -07002139source "arch/arm/Kconfig.debug"
2140
2141source "security/Kconfig"
2142
2143source "crypto/Kconfig"
Ard Biesheuvel652ccae2015-03-10 09:47:44 +01002144if CRYPTO
2145source "arch/arm/crypto/Kconfig"
2146endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07002147
2148source "lib/Kconfig"
Christoffer Dall749cf76c2013-01-20 18:28:06 -05002149
2150source "arch/arm/kvm/Kconfig"