Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_opti.c - ATI PATA for new ATA layer |
| 3 | * (C) 2005 Red Hat Inc |
| 4 | * Alan Cox <alan@redhat.com> |
| 5 | * |
| 6 | * Based on |
| 7 | * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002 |
| 8 | * |
| 9 | * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) |
| 10 | * |
| 11 | * Authors: |
| 12 | * Jaromir Koutek <miri@punknet.cz>, |
| 13 | * Jan Harkes <jaharkes@cwi.nl>, |
| 14 | * Mark Lord <mlord@pobox.com> |
| 15 | * Some parts of code are from ali14xx.c and from rz1000.c. |
| 16 | * |
| 17 | * Also consulted the FreeBSD prototype driver by Kevin Day to try |
| 18 | * and resolve some confusions. Further documentation can be found in |
| 19 | * Ralf Brown's interrupt list |
| 20 | * |
| 21 | * If you have other variants of the Opti range (Viper/Vendetta) please |
| 22 | * try this driver with those PCI idents and report back. For the later |
| 23 | * chips see the pata_optidma driver |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #include <linux/kernel.h> |
| 28 | #include <linux/module.h> |
| 29 | #include <linux/pci.h> |
| 30 | #include <linux/init.h> |
| 31 | #include <linux/blkdev.h> |
| 32 | #include <linux/delay.h> |
| 33 | #include <scsi/scsi_host.h> |
| 34 | #include <linux/libata.h> |
| 35 | |
| 36 | #define DRV_NAME "pata_opti" |
Jeff Garzik | a0fcdc0 | 2007-03-09 07:24:15 -0500 | [diff] [blame] | 37 | #define DRV_VERSION "0.2.9" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 38 | |
| 39 | enum { |
| 40 | READ_REG = 0, /* index of Read cycle timing register */ |
| 41 | WRITE_REG = 1, /* index of Write cycle timing register */ |
| 42 | CNTRL_REG = 3, /* index of Control register */ |
| 43 | STRAP_REG = 5, /* index of Strap register */ |
| 44 | MISC_REG = 6 /* index of Miscellaneous register */ |
| 45 | }; |
| 46 | |
| 47 | /** |
| 48 | * opti_pre_reset - probe begin |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 49 | * @link: ATA link |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 50 | * @deadline: deadline jiffies for the operation |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 51 | * |
| 52 | * Set up cable type and use generic probe init |
| 53 | */ |
| 54 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 55 | static int opti_pre_reset(struct ata_link *link, unsigned long deadline) |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 56 | { |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 57 | struct ata_port *ap = link->ap; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 58 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 59 | static const struct pci_bits opti_enable_bits[] = { |
| 60 | { 0x45, 1, 0x80, 0x00 }, |
| 61 | { 0x40, 1, 0x08, 0x00 } |
| 62 | }; |
| 63 | |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 64 | if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no])) |
| 65 | return -ENOENT; |
Tejun Heo | d4b2bab | 2007-02-02 16:50:52 +0900 | [diff] [blame] | 66 | |
Tejun Heo | cc0680a | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 67 | return ata_std_prereset(link, deadline); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | /** |
| 71 | * opti_probe_reset - probe reset |
| 72 | * @ap: ATA port |
| 73 | * |
| 74 | * Perform the ATA probe and bus reset sequence plus specific handling |
| 75 | * for this hardware. The Opti needs little handling - we have no UDMA66 |
| 76 | * capability that needs cable detection. All we must do is check the port |
| 77 | * is enabled. |
| 78 | */ |
| 79 | |
| 80 | static void opti_error_handler(struct ata_port *ap) |
| 81 | { |
| 82 | ata_bmdma_drive_eh(ap, opti_pre_reset, ata_std_softreset, NULL, ata_std_postreset); |
| 83 | } |
| 84 | |
| 85 | /** |
| 86 | * opti_write_reg - control register setup |
| 87 | * @ap: ATA port |
| 88 | * @value: value |
| 89 | * @reg: control register number |
| 90 | * |
| 91 | * The Opti uses magic 'trapdoor' register accesses to do configuration |
| 92 | * rather than using PCI space as other controllers do. The double inw |
| 93 | * on the error register activates configuration mode. We can then write |
| 94 | * the control register |
| 95 | */ |
| 96 | |
| 97 | static void opti_write_reg(struct ata_port *ap, u8 val, int reg) |
| 98 | { |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 99 | void __iomem *regio = ap->ioaddr.cmd_addr; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 100 | |
| 101 | /* These 3 unlock the control register access */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 102 | ioread16(regio + 1); |
| 103 | ioread16(regio + 1); |
| 104 | iowrite8(3, regio + 2); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 105 | |
| 106 | /* Do the I/O */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 107 | iowrite8(val, regio + reg); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 108 | |
| 109 | /* Relock */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 110 | iowrite8(0x83, regio + 2); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 111 | } |
| 112 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 113 | /** |
| 114 | * opti_set_piomode - set initial PIO mode data |
| 115 | * @ap: ATA interface |
| 116 | * @adev: ATA device |
| 117 | * |
| 118 | * Called to do the PIO mode setup. Timing numbers are taken from |
| 119 | * the FreeBSD driver then pre computed to keep the code clean. There |
| 120 | * are two tables depending on the hardware clock speed. |
| 121 | */ |
| 122 | |
| 123 | static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 124 | { |
| 125 | struct ata_device *pair = ata_dev_pair(adev); |
| 126 | int clock; |
| 127 | int pio = adev->pio_mode - XFER_PIO_0; |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 128 | void __iomem *regio = ap->ioaddr.cmd_addr; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 129 | u8 addr; |
| 130 | |
| 131 | /* Address table precomputed with prefetch off and a DCLK of 2 */ |
| 132 | static const u8 addr_timing[2][5] = { |
| 133 | { 0x30, 0x20, 0x20, 0x10, 0x10 }, |
| 134 | { 0x20, 0x20, 0x10, 0x10, 0x10 } |
| 135 | }; |
| 136 | static const u8 data_rec_timing[2][5] = { |
| 137 | { 0x6B, 0x56, 0x42, 0x32, 0x31 }, |
| 138 | { 0x58, 0x44, 0x32, 0x22, 0x21 } |
| 139 | }; |
| 140 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 141 | iowrite8(0xff, regio + 5); |
| 142 | clock = ioread16(regio + 5) & 1; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 143 | |
| 144 | /* |
| 145 | * As with many controllers the address setup time is shared |
| 146 | * and must suit both devices if present. |
| 147 | */ |
| 148 | |
| 149 | addr = addr_timing[clock][pio]; |
| 150 | if (pair) { |
| 151 | /* Hardware constraint */ |
| 152 | u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0]; |
| 153 | if (pair_addr > addr) |
| 154 | addr = pair_addr; |
| 155 | } |
| 156 | |
| 157 | /* Commence primary programming sequence */ |
| 158 | opti_write_reg(ap, adev->devno, MISC_REG); |
| 159 | opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG); |
| 160 | opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG); |
| 161 | opti_write_reg(ap, addr, MISC_REG); |
| 162 | |
| 163 | /* Programming sequence complete, override strapping */ |
| 164 | opti_write_reg(ap, 0x85, CNTRL_REG); |
| 165 | } |
| 166 | |
| 167 | static struct scsi_host_template opti_sht = { |
Tejun Heo | 68d1d07 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 168 | ATA_PIO_SHT(DRV_NAME), |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 169 | }; |
| 170 | |
| 171 | static struct ata_port_operations opti_port_ops = { |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame^] | 172 | .inherits = &ata_sff_port_ops, |
Jeff Garzik | a0fcdc0 | 2007-03-09 07:24:15 -0500 | [diff] [blame] | 173 | .cable_detect = ata_cable_40wire, |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame^] | 174 | .set_piomode = opti_set_piomode, |
| 175 | .error_handler = opti_error_handler, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 176 | }; |
| 177 | |
| 178 | static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id) |
| 179 | { |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 180 | static const struct ata_port_info info = { |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 181 | .sht = &opti_sht, |
Jeff Garzik | 1d2808f | 2007-05-28 06:59:48 -0400 | [diff] [blame] | 182 | .flags = ATA_FLAG_SLAVE_POSS, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 183 | .pio_mask = 0x1f, |
| 184 | .port_ops = &opti_port_ops |
| 185 | }; |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 186 | const struct ata_port_info *ppi[] = { &info, NULL }; |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 187 | static int printed_version; |
| 188 | |
| 189 | if (!printed_version++) |
| 190 | dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n"); |
| 191 | |
Tejun Heo | 1626aeb | 2007-05-04 12:43:58 +0200 | [diff] [blame] | 192 | return ata_pci_init_one(dev, ppi); |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 193 | } |
| 194 | |
| 195 | static const struct pci_device_id opti[] = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 196 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 }, |
| 197 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 }, |
| 198 | |
| 199 | { }, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 200 | }; |
| 201 | |
| 202 | static struct pci_driver opti_pci_driver = { |
Jeff Garzik | 2d2744f | 2006-09-28 20:21:59 -0400 | [diff] [blame] | 203 | .name = DRV_NAME, |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 204 | .id_table = opti, |
| 205 | .probe = opti_init_one, |
Alan | 30ced0f | 2006-11-22 16:57:36 +0000 | [diff] [blame] | 206 | .remove = ata_pci_remove_one, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 207 | #ifdef CONFIG_PM |
Alan | 30ced0f | 2006-11-22 16:57:36 +0000 | [diff] [blame] | 208 | .suspend = ata_pci_device_suspend, |
| 209 | .resume = ata_pci_device_resume, |
Tejun Heo | 438ac6d | 2007-03-02 17:31:26 +0900 | [diff] [blame] | 210 | #endif |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 211 | }; |
| 212 | |
| 213 | static int __init opti_init(void) |
| 214 | { |
| 215 | return pci_register_driver(&opti_pci_driver); |
| 216 | } |
| 217 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 218 | static void __exit opti_exit(void) |
| 219 | { |
| 220 | pci_unregister_driver(&opti_pci_driver); |
| 221 | } |
| 222 | |
| 223 | |
| 224 | MODULE_AUTHOR("Alan Cox"); |
| 225 | MODULE_DESCRIPTION("low-level driver for Opti 621/621X"); |
| 226 | MODULE_LICENSE("GPL"); |
| 227 | MODULE_DEVICE_TABLE(pci, opti); |
| 228 | MODULE_VERSION(DRV_VERSION); |
| 229 | |
| 230 | module_init(opti_init); |
| 231 | module_exit(opti_exit); |