blob: f1072ace0cfa6b4df3e9ed63f6d6f1da29c6530c [file] [log] [blame]
Isaku Yamahatae92e8c62008-05-19 22:13:36 +09001/******************************************************************************
2 * include/asm-ia64/native/inst.h
3 *
4 * Copyright (c) 2008 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
Isaku Yamahata02e32e32008-05-19 22:13:37 +090023#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN
24
Isaku Yamahatae92e8c62008-05-19 22:13:36 +090025#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK
26# define PARAVIRT_POISON 0xdeadbeefbaadf00d
27# define CLOBBER(clob) \
28 ;; \
29 movl clob = PARAVIRT_POISON; \
30 ;;
31#else
32# define CLOBBER(clob) /* nothing */
33#endif
34
35#define MOV_FROM_IFA(reg) \
36 mov reg = cr.ifa
37
38#define MOV_FROM_ITIR(reg) \
39 mov reg = cr.itir
40
41#define MOV_FROM_ISR(reg) \
42 mov reg = cr.isr
43
44#define MOV_FROM_IHA(reg) \
45 mov reg = cr.iha
46
47#define MOV_FROM_IPSR(pred, reg) \
48(pred) mov reg = cr.ipsr
49
50#define MOV_FROM_IIM(reg) \
51 mov reg = cr.iim
52
53#define MOV_FROM_IIP(reg) \
54 mov reg = cr.iip
55
56#define MOV_FROM_IVR(reg, clob) \
57 mov reg = cr.ivr \
58 CLOBBER(clob)
59
60#define MOV_FROM_PSR(pred, reg, clob) \
61(pred) mov reg = psr \
62 CLOBBER(clob)
63
64#define MOV_TO_IFA(reg, clob) \
65 mov cr.ifa = reg \
66 CLOBBER(clob)
67
68#define MOV_TO_ITIR(pred, reg, clob) \
69(pred) mov cr.itir = reg \
70 CLOBBER(clob)
71
72#define MOV_TO_IHA(pred, reg, clob) \
73(pred) mov cr.iha = reg \
74 CLOBBER(clob)
75
76#define MOV_TO_IPSR(pred, reg, clob) \
77(pred) mov cr.ipsr = reg \
78 CLOBBER(clob)
79
80#define MOV_TO_IFS(pred, reg, clob) \
81(pred) mov cr.ifs = reg \
82 CLOBBER(clob)
83
84#define MOV_TO_IIP(reg, clob) \
85 mov cr.iip = reg \
86 CLOBBER(clob)
87
88#define MOV_TO_KR(kr, reg, clob0, clob1) \
89 mov IA64_KR(kr) = reg \
90 CLOBBER(clob0) \
91 CLOBBER(clob1)
92
93#define ITC_I(pred, reg, clob) \
94(pred) itc.i reg \
95 CLOBBER(clob)
96
97#define ITC_D(pred, reg, clob) \
98(pred) itc.d reg \
99 CLOBBER(clob)
100
101#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \
102(pred_i) itc.i reg; \
103(pred_d) itc.d reg \
104 CLOBBER(clob)
105
106#define THASH(pred, reg0, reg1, clob) \
107(pred) thash reg0 = reg1 \
108 CLOBBER(clob)
109
110#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \
111 ssm psr.ic | PSR_DEFAULT_BITS \
112 CLOBBER(clob0) \
113 CLOBBER(clob1) \
114 ;; \
115 srlz.i /* guarantee that interruption collectin is on */ \
116 ;;
117
118#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \
119 ssm psr.ic \
120 CLOBBER(clob0) \
121 CLOBBER(clob1) \
122 ;; \
123 srlz.d
124
125#define RSM_PSR_IC(clob) \
126 rsm psr.ic \
127 CLOBBER(clob)
128
129#define SSM_PSR_I(pred, pred_clob, clob) \
130(pred) ssm psr.i \
131 CLOBBER(clob)
132
133#define RSM_PSR_I(pred, clob0, clob1) \
134(pred) rsm psr.i \
135 CLOBBER(clob0) \
136 CLOBBER(clob1)
137
138#define RSM_PSR_I_IC(clob0, clob1, clob2) \
139 rsm psr.i | psr.ic \
140 CLOBBER(clob0) \
141 CLOBBER(clob1) \
142 CLOBBER(clob2)
143
144#define RSM_PSR_DT \
145 rsm psr.dt
146
147#define SSM_PSR_DT_AND_SRLZ_I \
148 ssm psr.dt \
149 ;; \
150 srlz.i
151
152#define BSW_0(clob0, clob1, clob2) \
153 bsw.0 \
154 CLOBBER(clob0) \
155 CLOBBER(clob1) \
156 CLOBBER(clob2)
157
158#define BSW_1(clob0, clob1) \
159 bsw.1 \
160 CLOBBER(clob0) \
161 CLOBBER(clob1)
162
163#define COVER \
164 cover
165
166#define RFI \
167 rfi