blob: 51ff1bbff381de95120909b2ba9acf985e5bdea6 [file] [log] [blame]
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +05301/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
Kishon Vijay Abraham Ided017e2012-06-26 17:40:32 +053034#include <linux/err.h>
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +053035#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
39
40#include <linux/of.h>
41#include <linux/of_device.h>
42#include <linux/of_address.h>
43
44#include <plat/usb.h>
45
46#include "musb_core.h"
47
48/**
49 * avoid using musb_readx()/musb_writex() as glue layer should not be
50 * dependent on musb core layer symbols.
51 */
52static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
53 { return __raw_readb(addr + offset); }
54
55static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
56 { return __raw_readl(addr + offset); }
57
58static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
59 { __raw_writeb(data, addr + offset); }
60
61static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
62 { __raw_writel(data, addr + offset); }
63
64/**
65 * DSPS musb wrapper register offset.
66 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
67 * musb ips.
68 */
69struct dsps_musb_wrapper {
70 u16 revision;
71 u16 control;
72 u16 status;
73 u16 eoi;
74 u16 epintr_set;
75 u16 epintr_clear;
76 u16 epintr_status;
77 u16 coreintr_set;
78 u16 coreintr_clear;
79 u16 coreintr_status;
80 u16 phy_utmi;
81 u16 mode;
82
83 /* bit positions for control */
84 unsigned reset:5;
85
86 /* bit positions for interrupt */
87 unsigned usb_shift:5;
88 u32 usb_mask;
89 u32 usb_bitmap;
90 unsigned drvvbus:5;
91
92 unsigned txep_shift:5;
93 u32 txep_mask;
94 u32 txep_bitmap;
95
96 unsigned rxep_shift:5;
97 u32 rxep_mask;
98 u32 rxep_bitmap;
99
100 /* bit positions for phy_utmi */
101 unsigned otg_disable:5;
102
103 /* bit positions for mode */
104 unsigned iddig:5;
105 /* miscellaneous stuff */
106 u32 musb_core_offset;
107 u8 poll_seconds;
108};
109
110/**
111 * DSPS glue structure.
112 */
113struct dsps_glue {
114 struct device *dev;
115 struct platform_device *musb; /* child musb pdev */
116 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
117 struct timer_list timer; /* otg_workaround timer */
118};
119
120/**
121 * dsps_musb_enable - enable interrupts
122 */
123static void dsps_musb_enable(struct musb *musb)
124{
125 struct device *dev = musb->controller;
126 struct platform_device *pdev = to_platform_device(dev->parent);
127 struct dsps_glue *glue = platform_get_drvdata(pdev);
128 const struct dsps_musb_wrapper *wrp = glue->wrp;
129 void __iomem *reg_base = musb->ctrl_base;
130 u32 epmask, coremask;
131
132 /* Workaround: setup IRQs through both register sets. */
133 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
134 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
135 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
136
137 dsps_writel(reg_base, wrp->epintr_set, epmask);
138 dsps_writel(reg_base, wrp->coreintr_set, coremask);
139 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
Felipe Balbi032ec492011-11-24 15:46:26 +0200140 dsps_writel(reg_base, wrp->coreintr_set,
141 (1 << wrp->drvvbus) << wrp->usb_shift);
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530142}
143
144/**
145 * dsps_musb_disable - disable HDRC and flush interrupts
146 */
147static void dsps_musb_disable(struct musb *musb)
148{
149 struct device *dev = musb->controller;
150 struct platform_device *pdev = to_platform_device(dev->parent);
151 struct dsps_glue *glue = platform_get_drvdata(pdev);
152 const struct dsps_musb_wrapper *wrp = glue->wrp;
153 void __iomem *reg_base = musb->ctrl_base;
154
155 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
156 dsps_writel(reg_base, wrp->epintr_clear,
157 wrp->txep_bitmap | wrp->rxep_bitmap);
158 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
159 dsps_writel(reg_base, wrp->eoi, 0);
160}
161
162static void otg_timer(unsigned long _musb)
163{
164 struct musb *musb = (void *)_musb;
165 void __iomem *mregs = musb->mregs;
166 struct device *dev = musb->controller;
167 struct platform_device *pdev = to_platform_device(dev->parent);
168 struct dsps_glue *glue = platform_get_drvdata(pdev);
169 const struct dsps_musb_wrapper *wrp = glue->wrp;
170 u8 devctl;
171 unsigned long flags;
172
173 /*
174 * We poll because DSPS IP's won't expose several OTG-critical
175 * status change events (from the transceiver) otherwise.
176 */
177 devctl = dsps_readb(mregs, MUSB_DEVCTL);
178 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
179 otg_state_string(musb->xceiv->state));
180
181 spin_lock_irqsave(&musb->lock, flags);
182 switch (musb->xceiv->state) {
183 case OTG_STATE_A_WAIT_BCON:
184 devctl &= ~MUSB_DEVCTL_SESSION;
185 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
186
187 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
188 if (devctl & MUSB_DEVCTL_BDEVICE) {
189 musb->xceiv->state = OTG_STATE_B_IDLE;
190 MUSB_DEV_MODE(musb);
191 } else {
192 musb->xceiv->state = OTG_STATE_A_IDLE;
193 MUSB_HST_MODE(musb);
194 }
195 break;
196 case OTG_STATE_A_WAIT_VFALL:
197 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
198 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
199 MUSB_INTR_VBUSERROR << wrp->usb_shift);
200 break;
201 case OTG_STATE_B_IDLE:
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530202 devctl = dsps_readb(mregs, MUSB_DEVCTL);
203 if (devctl & MUSB_DEVCTL_BDEVICE)
204 mod_timer(&glue->timer,
205 jiffies + wrp->poll_seconds * HZ);
206 else
207 musb->xceiv->state = OTG_STATE_A_IDLE;
208 break;
209 default:
210 break;
211 }
212 spin_unlock_irqrestore(&musb->lock, flags);
213}
214
215static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
216{
217 struct device *dev = musb->controller;
218 struct platform_device *pdev = to_platform_device(dev->parent);
219 struct dsps_glue *glue = platform_get_drvdata(pdev);
220 static unsigned long last_timer;
221
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530222 if (timeout == 0)
223 timeout = jiffies + msecs_to_jiffies(3);
224
225 /* Never idle if active, or when VBUS timeout is not set as host */
226 if (musb->is_active || (musb->a_wait_bcon == 0 &&
227 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
228 dev_dbg(musb->controller, "%s active, deleting timer\n",
229 otg_state_string(musb->xceiv->state));
230 del_timer(&glue->timer);
231 last_timer = jiffies;
232 return;
233 }
234
235 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
236 dev_dbg(musb->controller,
237 "Longer idle timer already pending, ignoring...\n");
238 return;
239 }
240 last_timer = timeout;
241
242 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
243 otg_state_string(musb->xceiv->state),
244 jiffies_to_msecs(timeout - jiffies));
245 mod_timer(&glue->timer, timeout);
246}
247
248static irqreturn_t dsps_interrupt(int irq, void *hci)
249{
250 struct musb *musb = hci;
251 void __iomem *reg_base = musb->ctrl_base;
252 struct device *dev = musb->controller;
253 struct platform_device *pdev = to_platform_device(dev->parent);
254 struct dsps_glue *glue = platform_get_drvdata(pdev);
255 const struct dsps_musb_wrapper *wrp = glue->wrp;
256 unsigned long flags;
257 irqreturn_t ret = IRQ_NONE;
258 u32 epintr, usbintr;
259
260 spin_lock_irqsave(&musb->lock, flags);
261
262 /* Get endpoint interrupts */
263 epintr = dsps_readl(reg_base, wrp->epintr_status);
264 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
265 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
266
267 if (epintr)
268 dsps_writel(reg_base, wrp->epintr_status, epintr);
269
270 /* Get usb core interrupts */
271 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
272 if (!usbintr && !epintr)
273 goto eoi;
274
275 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
276 if (usbintr)
277 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
278
279 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
280 usbintr, epintr);
281 /*
282 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
283 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
284 * switch appropriately between halves of the OTG state machine.
285 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
286 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
287 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
288 */
Felipe Balbi032ec492011-11-24 15:46:26 +0200289 if (usbintr & MUSB_INTR_BABBLE)
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530290 pr_info("CAUTION: musb: Babble Interrupt Occured\n");
291
292 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
293 int drvvbus = dsps_readl(reg_base, wrp->status);
294 void __iomem *mregs = musb->mregs;
295 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
296 int err;
297
Felipe Balbi032ec492011-11-24 15:46:26 +0200298 err = musb->int_usb & MUSB_INTR_VBUSERROR;
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530299 if (err) {
300 /*
301 * The Mentor core doesn't debounce VBUS as needed
302 * to cope with device connect current spikes. This
303 * means it's not uncommon for bus-powered devices
304 * to get VBUS errors during enumeration.
305 *
306 * This is a workaround, but newer RTL from Mentor
307 * seems to allow a better one: "re"-starting sessions
308 * without waiting for VBUS to stop registering in
309 * devctl.
310 */
311 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
312 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
313 mod_timer(&glue->timer,
314 jiffies + wrp->poll_seconds * HZ);
315 WARNING("VBUS error workaround (delay coming)\n");
Felipe Balbi032ec492011-11-24 15:46:26 +0200316 } else if (drvvbus) {
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530317 musb->is_active = 1;
318 MUSB_HST_MODE(musb);
319 musb->xceiv->otg->default_a = 1;
320 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
321 del_timer(&glue->timer);
322 } else {
323 musb->is_active = 0;
324 MUSB_DEV_MODE(musb);
325 musb->xceiv->otg->default_a = 0;
326 musb->xceiv->state = OTG_STATE_B_IDLE;
327 }
328
329 /* NOTE: this must complete power-on within 100 ms. */
330 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
331 drvvbus ? "on" : "off",
332 otg_state_string(musb->xceiv->state),
333 err ? " ERROR" : "",
334 devctl);
335 ret = IRQ_HANDLED;
336 }
337
338 if (musb->int_tx || musb->int_rx || musb->int_usb)
339 ret |= musb_interrupt(musb);
340
341 eoi:
342 /* EOI needs to be written for the IRQ to be re-asserted. */
343 if (ret == IRQ_HANDLED || epintr || usbintr)
344 dsps_writel(reg_base, wrp->eoi, 1);
345
346 /* Poll for ID change */
Felipe Balbi032ec492011-11-24 15:46:26 +0200347 if (musb->xceiv->state == OTG_STATE_B_IDLE)
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530348 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
349
350 spin_unlock_irqrestore(&musb->lock, flags);
351
352 return ret;
353}
354
355static int dsps_musb_init(struct musb *musb)
356{
357 struct device *dev = musb->controller;
358 struct musb_hdrc_platform_data *plat = dev->platform_data;
359 struct platform_device *pdev = to_platform_device(dev->parent);
360 struct dsps_glue *glue = platform_get_drvdata(pdev);
361 const struct dsps_musb_wrapper *wrp = glue->wrp;
362 struct omap_musb_board_data *data = plat->board_data;
363 void __iomem *reg_base = musb->ctrl_base;
364 u32 rev, val;
365 int status;
366
367 /* mentor core register starts at offset of 0x400 from musb base */
368 musb->mregs += wrp->musb_core_offset;
369
370 /* NOP driver needs change if supporting dual instance */
371 usb_nop_xceiv_register();
Kishon Vijay Abraham I662dca52012-06-22 17:02:46 +0530372 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
Kishon Vijay Abraham Ided017e2012-06-26 17:40:32 +0530373 if (IS_ERR_OR_NULL(musb->xceiv))
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530374 return -ENODEV;
375
376 /* Returns zero if e.g. not clocked */
377 rev = dsps_readl(reg_base, wrp->revision);
378 if (!rev) {
379 status = -ENODEV;
380 goto err0;
381 }
382
Felipe Balbi032ec492011-11-24 15:46:26 +0200383 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530384
385 /* Reset the musb */
386 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
387
388 /* Start the on-chip PHY and its PLL. */
389 if (data->set_phy_power)
390 data->set_phy_power(1);
391
392 musb->isr = dsps_interrupt;
393
394 /* reset the otgdisable bit, needed for host mode to work */
395 val = dsps_readl(reg_base, wrp->phy_utmi);
396 val &= ~(1 << wrp->otg_disable);
397 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
398
399 /* clear level interrupt */
400 dsps_writel(reg_base, wrp->eoi, 0);
401
402 return 0;
403err0:
Kishon Vijay Abraham I721002e2012-06-22 17:02:45 +0530404 usb_put_phy(musb->xceiv);
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530405 usb_nop_xceiv_unregister();
406 return status;
407}
408
409static int dsps_musb_exit(struct musb *musb)
410{
411 struct device *dev = musb->controller;
412 struct musb_hdrc_platform_data *plat = dev->platform_data;
413 struct omap_musb_board_data *data = plat->board_data;
414 struct platform_device *pdev = to_platform_device(dev->parent);
415 struct dsps_glue *glue = platform_get_drvdata(pdev);
416
Felipe Balbi032ec492011-11-24 15:46:26 +0200417 del_timer_sync(&glue->timer);
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530418
419 /* Shutdown the on-chip PHY and its PLL. */
420 if (data->set_phy_power)
421 data->set_phy_power(0);
422
423 /* NOP driver needs change if supporting dual instance */
Kishon Vijay Abraham I721002e2012-06-22 17:02:45 +0530424 usb_put_phy(musb->xceiv);
Ajay Kumar Gupta9ecb8872012-03-12 19:30:22 +0530425 usb_nop_xceiv_unregister();
426
427 return 0;
428}
429
430static struct musb_platform_ops dsps_ops = {
431 .init = dsps_musb_init,
432 .exit = dsps_musb_exit,
433
434 .enable = dsps_musb_enable,
435 .disable = dsps_musb_disable,
436
437 .try_idle = dsps_musb_try_idle,
438};
439
440static u64 musb_dmamask = DMA_BIT_MASK(32);
441
442static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
443{
444 struct device *dev = glue->dev;
445 struct platform_device *pdev = to_platform_device(dev);
446 struct musb_hdrc_platform_data *pdata = dev->platform_data;
447 struct platform_device *musb;
448 struct resource *res;
449 struct resource resources[2];
450 char res_name[10];
451 int ret;
452
453 /* get memory resource */
454 sprintf(res_name, "musb%d", id);
455 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
456 if (!res) {
457 dev_err(dev, "%s get mem resource failed\n", res_name);
458 ret = -ENODEV;
459 goto err0;
460 }
461 res->parent = NULL;
462 resources[0] = *res;
463
464 /* get irq resource */
465 sprintf(res_name, "musb%d-irq", id);
466 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
467 if (!res) {
468 dev_err(dev, "%s get irq resource failed\n", res_name);
469 ret = -ENODEV;
470 goto err0;
471 }
472 strcpy((u8 *)res->name, "mc");
473 res->parent = NULL;
474 resources[1] = *res;
475
476 /* allocate the child platform device */
477 musb = platform_device_alloc("musb-hdrc", -1);
478 if (!musb) {
479 dev_err(dev, "failed to allocate musb device\n");
480 ret = -ENOMEM;
481 goto err0;
482 }
483
484 musb->dev.parent = dev;
485 musb->dev.dma_mask = &musb_dmamask;
486 musb->dev.coherent_dma_mask = musb_dmamask;
487
488 glue->musb = musb;
489
490 pdata->platform_ops = &dsps_ops;
491
492 ret = platform_device_add_resources(musb, resources, 2);
493 if (ret) {
494 dev_err(dev, "failed to add resources\n");
495 goto err1;
496 }
497
498 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
499 if (ret) {
500 dev_err(dev, "failed to add platform_data\n");
501 goto err1;
502 }
503
504 ret = platform_device_add(musb);
505 if (ret) {
506 dev_err(dev, "failed to register musb device\n");
507 goto err1;
508 }
509
510 return 0;
511
512err1:
513 platform_device_put(musb);
514err0:
515 return ret;
516}
517
518static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
519{
520 platform_device_del(glue->musb);
521 platform_device_put(glue->musb);
522}
523
524static int __devinit dsps_probe(struct platform_device *pdev)
525{
526 const struct platform_device_id *id = platform_get_device_id(pdev);
527 const struct dsps_musb_wrapper *wrp =
528 (struct dsps_musb_wrapper *)id->driver_data;
529 struct dsps_glue *glue;
530 struct resource *iomem;
531 int ret;
532
533 /* allocate glue */
534 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
535 if (!glue) {
536 dev_err(&pdev->dev, "unable to allocate glue memory\n");
537 ret = -ENOMEM;
538 goto err0;
539 }
540
541 /* get memory resource */
542 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
543 if (!iomem) {
544 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
545 ret = -ENODEV;
546 goto err1;
547 }
548
549 glue->dev = &pdev->dev;
550
551 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
552 if (!glue->wrp) {
553 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
554 ret = -ENOMEM;
555 goto err1;
556 }
557 platform_set_drvdata(pdev, glue);
558
559 /* create the child platform device for first instances of musb */
560 ret = dsps_create_musb_pdev(glue, 0);
561 if (ret != 0) {
562 dev_err(&pdev->dev, "failed to create child pdev\n");
563 goto err2;
564 }
565
566 /* enable the usbss clocks */
567 pm_runtime_enable(&pdev->dev);
568
569 ret = pm_runtime_get_sync(&pdev->dev);
570 if (ret < 0) {
571 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
572 goto err3;
573 }
574
575 return 0;
576
577err3:
578 pm_runtime_disable(&pdev->dev);
579err2:
580 kfree(glue->wrp);
581err1:
582 kfree(glue);
583err0:
584 return ret;
585}
586static int __devexit dsps_remove(struct platform_device *pdev)
587{
588 struct dsps_glue *glue = platform_get_drvdata(pdev);
589
590 /* delete the child platform device */
591 dsps_delete_musb_pdev(glue);
592
593 /* disable usbss clocks */
594 pm_runtime_put(&pdev->dev);
595 pm_runtime_disable(&pdev->dev);
596 kfree(glue->wrp);
597 kfree(glue);
598 return 0;
599}
600
601#ifdef CONFIG_PM_SLEEP
602static int dsps_suspend(struct device *dev)
603{
604 struct musb_hdrc_platform_data *plat = dev->platform_data;
605 struct omap_musb_board_data *data = plat->board_data;
606
607 /* Shutdown the on-chip PHY and its PLL. */
608 if (data->set_phy_power)
609 data->set_phy_power(0);
610
611 return 0;
612}
613
614static int dsps_resume(struct device *dev)
615{
616 struct musb_hdrc_platform_data *plat = dev->platform_data;
617 struct omap_musb_board_data *data = plat->board_data;
618
619 /* Start the on-chip PHY and its PLL. */
620 if (data->set_phy_power)
621 data->set_phy_power(1);
622
623 return 0;
624}
625#endif
626
627static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
628
629static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
630 .revision = 0x00,
631 .control = 0x14,
632 .status = 0x18,
633 .eoi = 0x24,
634 .epintr_set = 0x38,
635 .epintr_clear = 0x40,
636 .epintr_status = 0x30,
637 .coreintr_set = 0x3c,
638 .coreintr_clear = 0x44,
639 .coreintr_status = 0x34,
640 .phy_utmi = 0xe0,
641 .mode = 0xe8,
642 .reset = 0,
643 .otg_disable = 21,
644 .iddig = 8,
645 .usb_shift = 0,
646 .usb_mask = 0x1ff,
647 .usb_bitmap = (0x1ff << 0),
648 .drvvbus = 8,
649 .txep_shift = 0,
650 .txep_mask = 0xffff,
651 .txep_bitmap = (0xffff << 0),
652 .rxep_shift = 16,
653 .rxep_mask = 0xfffe,
654 .rxep_bitmap = (0xfffe << 16),
655 .musb_core_offset = 0x400,
656 .poll_seconds = 2,
657};
658
659static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
660 {
661 .name = "musb-ti81xx",
662 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
663 },
664 { }, /* Terminating Entry */
665};
666MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
667
668static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
669 { .compatible = "musb-ti81xx", },
670 { .compatible = "ti,ti81xx-musb", },
671 { .compatible = "ti,am335x-musb", },
672 { },
673};
674MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
675
676static struct platform_driver dsps_usbss_driver = {
677 .probe = dsps_probe,
678 .remove = __devexit_p(dsps_remove),
679 .driver = {
680 .name = "musb-dsps",
681 .pm = &dsps_pm_ops,
682 .of_match_table = musb_dsps_of_match,
683 },
684 .id_table = musb_dsps_id_table,
685};
686
687MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
688MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
689MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
690MODULE_LICENSE("GPL v2");
691
692static int __init dsps_init(void)
693{
694 return platform_driver_register(&dsps_usbss_driver);
695}
696subsys_initcall(dsps_init);
697
698static void __exit dsps_exit(void)
699{
700 platform_driver_unregister(&dsps_usbss_driver);
701}
702module_exit(dsps_exit);