Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2014 Roy Spliet |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Roy Spliet <rspliet@eclipso.eu> |
| 23 | * Ben Skeggs |
| 24 | */ |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 25 | #include "priv.h" |
| 26 | |
| 27 | struct ramxlat { |
| 28 | int id; |
| 29 | u8 enc; |
| 30 | }; |
| 31 | |
| 32 | static inline int |
| 33 | ramxlat(const struct ramxlat *xlat, int id) |
| 34 | { |
| 35 | while (xlat->id >= 0) { |
| 36 | if (xlat->id == id) |
| 37 | return xlat->enc; |
| 38 | xlat++; |
| 39 | } |
| 40 | return -EINVAL; |
| 41 | } |
| 42 | |
| 43 | static const struct ramxlat |
| 44 | ramddr2_cl[] = { |
| 45 | { 2, 2 }, { 3, 3 }, { 4, 4 }, { 5, 5 }, { 6, 6 }, |
| 46 | /* The following are available in some, but not all DDR2 docs */ |
| 47 | { 7, 7 }, |
| 48 | { -1 } |
| 49 | }; |
| 50 | |
| 51 | static const struct ramxlat |
| 52 | ramddr2_wr[] = { |
| 53 | { 2, 1 }, { 3, 2 }, { 4, 3 }, { 5, 4 }, { 6, 5 }, |
| 54 | /* The following are available in some, but not all DDR2 docs */ |
| 55 | { 7, 6 }, |
| 56 | { -1 } |
| 57 | }; |
| 58 | |
| 59 | int |
Ben Skeggs | 639c308 | 2015-01-14 14:52:58 +1000 | [diff] [blame] | 60 | nvkm_sddr2_calc(struct nvkm_ram *ram) |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 61 | { |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 62 | int CL, WR, DLL = 0, ODT = 0; |
| 63 | |
Ben Skeggs | c378eb7 | 2014-09-15 12:30:08 +1000 | [diff] [blame] | 64 | switch (ram->next->bios.timing_ver) { |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 65 | case 0x10: |
Ben Skeggs | c378eb7 | 2014-09-15 12:30:08 +1000 | [diff] [blame] | 66 | CL = ram->next->bios.timing_10_CL; |
| 67 | WR = ram->next->bios.timing_10_WR; |
Roy Spliet | 7164f4c | 2015-05-23 10:37:43 +0200 | [diff] [blame] | 68 | DLL = !ram->next->bios.ramcfg_DLLoff; |
Ben Skeggs | c378eb7 | 2014-09-15 12:30:08 +1000 | [diff] [blame] | 69 | ODT = ram->next->bios.timing_10_ODT & 3; |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 70 | break; |
| 71 | case 0x20: |
Ben Skeggs | c378eb7 | 2014-09-15 12:30:08 +1000 | [diff] [blame] | 72 | CL = (ram->next->bios.timing[1] & 0x0000001f); |
| 73 | WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 74 | break; |
| 75 | default: |
| 76 | return -ENOSYS; |
| 77 | } |
| 78 | |
Roy Spliet | 797eb6e | 2015-09-30 00:23:49 +0100 | [diff] [blame] | 79 | if (ram->next->bios.timing_ver == 0x20 || |
| 80 | ram->next->bios.ramcfg_timing == 0xff) { |
| 81 | ODT = (ram->mr[1] & 0x004) >> 2 | |
| 82 | (ram->mr[1] & 0x040) >> 5; |
| 83 | } |
| 84 | |
Roy Spliet | 50c4088 | 2014-09-05 02:41:46 +0200 | [diff] [blame] | 85 | CL = ramxlat(ramddr2_cl, CL); |
| 86 | WR = ramxlat(ramddr2_wr, WR); |
| 87 | if (CL < 0 || WR < 0) |
| 88 | return -EINVAL; |
| 89 | |
| 90 | ram->mr[0] &= ~0xf70; |
| 91 | ram->mr[0] |= (WR & 0x07) << 9; |
| 92 | ram->mr[0] |= (CL & 0x07) << 4; |
| 93 | |
| 94 | ram->mr[1] &= ~0x045; |
| 95 | ram->mr[1] |= (ODT & 0x1) << 2; |
| 96 | ram->mr[1] |= (ODT & 0x2) << 5; |
| 97 | ram->mr[1] |= !DLL; |
| 98 | return 0; |
| 99 | } |