Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Allwinner EMAC MDIO interface driver |
| 3 | * |
| 4 | * Copyright 2012-2013 Stefan Roese <sr@denx.de> |
| 5 | * Copyright 2013 Maxime Ripard <maxime.ripard@free-electrons.com> |
| 6 | * |
| 7 | * Based on the Linux driver provided by Allwinner: |
| 8 | * Copyright (C) 1997 Sten Wang |
| 9 | * |
| 10 | * This file is licensed under the terms of the GNU General Public |
| 11 | * License version 2. This program is licensed "as is" without any |
| 12 | * warranty of any kind, whether express or implied. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/init.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/mutex.h> |
| 20 | #include <linux/of_address.h> |
| 21 | #include <linux/of_mdio.h> |
| 22 | #include <linux/phy.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/regulator/consumer.h> |
| 25 | |
| 26 | #define EMAC_MAC_MCMD_REG (0x00) |
| 27 | #define EMAC_MAC_MADR_REG (0x04) |
| 28 | #define EMAC_MAC_MWTD_REG (0x08) |
| 29 | #define EMAC_MAC_MRDD_REG (0x0c) |
| 30 | #define EMAC_MAC_MIND_REG (0x10) |
| 31 | #define EMAC_MAC_SSRR_REG (0x14) |
| 32 | |
| 33 | #define MDIO_TIMEOUT (msecs_to_jiffies(100)) |
| 34 | |
| 35 | struct sun4i_mdio_data { |
| 36 | void __iomem *membase; |
| 37 | struct regulator *regulator; |
| 38 | }; |
| 39 | |
| 40 | static int sun4i_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
| 41 | { |
| 42 | struct sun4i_mdio_data *data = bus->priv; |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 43 | unsigned long timeout_jiffies; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 44 | int value; |
| 45 | |
| 46 | /* issue the phy address and reg */ |
| 47 | writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG); |
| 48 | /* pull up the phy io line */ |
| 49 | writel(0x1, data->membase + EMAC_MAC_MCMD_REG); |
| 50 | |
| 51 | /* Wait read complete */ |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 52 | timeout_jiffies = jiffies + MDIO_TIMEOUT; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 53 | while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) { |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 54 | if (time_is_before_jiffies(timeout_jiffies)) |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 55 | return -ETIMEDOUT; |
| 56 | msleep(1); |
| 57 | } |
| 58 | |
| 59 | /* push down the phy io line */ |
| 60 | writel(0x0, data->membase + EMAC_MAC_MCMD_REG); |
| 61 | /* and read data */ |
| 62 | value = readl(data->membase + EMAC_MAC_MRDD_REG); |
| 63 | |
| 64 | return value; |
| 65 | } |
| 66 | |
| 67 | static int sun4i_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
| 68 | u16 value) |
| 69 | { |
| 70 | struct sun4i_mdio_data *data = bus->priv; |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 71 | unsigned long timeout_jiffies; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 72 | |
| 73 | /* issue the phy address and reg */ |
| 74 | writel((mii_id << 8) | regnum, data->membase + EMAC_MAC_MADR_REG); |
| 75 | /* pull up the phy io line */ |
| 76 | writel(0x1, data->membase + EMAC_MAC_MCMD_REG); |
| 77 | |
| 78 | /* Wait read complete */ |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 79 | timeout_jiffies = jiffies + MDIO_TIMEOUT; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 80 | while (readl(data->membase + EMAC_MAC_MIND_REG) & 0x1) { |
Emilio López | 2bf420a | 2013-07-22 22:09:18 -0300 | [diff] [blame] | 81 | if (time_is_before_jiffies(timeout_jiffies)) |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 82 | return -ETIMEDOUT; |
| 83 | msleep(1); |
| 84 | } |
| 85 | |
| 86 | /* push down the phy io line */ |
| 87 | writel(0x0, data->membase + EMAC_MAC_MCMD_REG); |
| 88 | /* and write data */ |
| 89 | writel(value, data->membase + EMAC_MAC_MWTD_REG); |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | static int sun4i_mdio_reset(struct mii_bus *bus) |
| 95 | { |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | static int sun4i_mdio_probe(struct platform_device *pdev) |
| 100 | { |
| 101 | struct device_node *np = pdev->dev.of_node; |
| 102 | struct mii_bus *bus; |
| 103 | struct sun4i_mdio_data *data; |
Jisheng Zhang | 03536cc | 2013-08-26 21:11:57 +0800 | [diff] [blame^] | 104 | struct resource *res; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 105 | int ret, i; |
| 106 | |
| 107 | bus = mdiobus_alloc_size(sizeof(*data)); |
| 108 | if (!bus) |
| 109 | return -ENOMEM; |
| 110 | |
| 111 | bus->name = "sun4i_mii_bus"; |
| 112 | bus->read = &sun4i_mdio_read; |
| 113 | bus->write = &sun4i_mdio_write; |
| 114 | bus->reset = &sun4i_mdio_reset; |
| 115 | snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(&pdev->dev)); |
| 116 | bus->parent = &pdev->dev; |
| 117 | |
Jisheng Zhang | 03536cc | 2013-08-26 21:11:57 +0800 | [diff] [blame^] | 118 | bus->irq = devm_kzalloc(&pdev->dev, sizeof(int) * PHY_MAX_ADDR, |
| 119 | GFP_KERNEL); |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 120 | if (!bus->irq) { |
| 121 | ret = -ENOMEM; |
| 122 | goto err_out_free_mdiobus; |
| 123 | } |
| 124 | |
| 125 | for (i = 0; i < PHY_MAX_ADDR; i++) |
| 126 | bus->irq[i] = PHY_POLL; |
| 127 | |
| 128 | data = bus->priv; |
Jisheng Zhang | 03536cc | 2013-08-26 21:11:57 +0800 | [diff] [blame^] | 129 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 130 | data->membase = devm_ioremap_resource(&pdev->dev, res); |
| 131 | if (IS_ERR(data->membase)) { |
| 132 | ret = PTR_ERR(data->membase); |
| 133 | goto err_out_free_mdiobus; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | data->regulator = devm_regulator_get(&pdev->dev, "phy"); |
| 137 | if (IS_ERR(data->regulator)) { |
| 138 | if (PTR_ERR(data->regulator) == -EPROBE_DEFER) |
| 139 | return -EPROBE_DEFER; |
| 140 | |
| 141 | dev_info(&pdev->dev, "no regulator found\n"); |
| 142 | } else { |
| 143 | ret = regulator_enable(data->regulator); |
| 144 | if (ret) |
Jisheng Zhang | 03536cc | 2013-08-26 21:11:57 +0800 | [diff] [blame^] | 145 | goto err_out_free_mdiobus; |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | ret = of_mdiobus_register(bus, np); |
| 149 | if (ret < 0) |
| 150 | goto err_out_disable_regulator; |
| 151 | |
| 152 | platform_set_drvdata(pdev, bus); |
| 153 | |
| 154 | return 0; |
| 155 | |
| 156 | err_out_disable_regulator: |
| 157 | regulator_disable(data->regulator); |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 158 | err_out_free_mdiobus: |
| 159 | mdiobus_free(bus); |
| 160 | return ret; |
| 161 | } |
| 162 | |
| 163 | static int sun4i_mdio_remove(struct platform_device *pdev) |
| 164 | { |
| 165 | struct mii_bus *bus = platform_get_drvdata(pdev); |
| 166 | |
| 167 | mdiobus_unregister(bus); |
Maxime Ripard | 4bdcb1d | 2013-05-30 03:49:21 +0000 | [diff] [blame] | 168 | mdiobus_free(bus); |
| 169 | |
| 170 | return 0; |
| 171 | } |
| 172 | |
| 173 | static const struct of_device_id sun4i_mdio_dt_ids[] = { |
| 174 | { .compatible = "allwinner,sun4i-mdio" }, |
| 175 | { } |
| 176 | }; |
| 177 | MODULE_DEVICE_TABLE(of, sun4i_mdio_dt_ids); |
| 178 | |
| 179 | static struct platform_driver sun4i_mdio_driver = { |
| 180 | .probe = sun4i_mdio_probe, |
| 181 | .remove = sun4i_mdio_remove, |
| 182 | .driver = { |
| 183 | .name = "sun4i-mdio", |
| 184 | .of_match_table = sun4i_mdio_dt_ids, |
| 185 | }, |
| 186 | }; |
| 187 | |
| 188 | module_platform_driver(sun4i_mdio_driver); |
| 189 | |
| 190 | MODULE_DESCRIPTION("Allwinner EMAC MDIO interface driver"); |
| 191 | MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); |
| 192 | MODULE_LICENSE("GPL"); |