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Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -07001#ifndef _SMU_H
2#define _SMU_H
3
Linus Torvalds1da177e2005-04-16 15:20:36 -07004/*
5 * Definitions for talking to the SMU chip in newer G5 PowerMacs
6 */
7
8#include <linux/config.h>
Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -07009#include <linux/list.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010
11/*
Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -070012 * Known SMU commands
13 *
14 * Most of what is below comes from looking at the Open Firmware driver,
15 * though this is still incomplete and could use better documentation here
16 * or there...
17 */
18
19
20/*
21 * Partition info commands
22 *
23 * I do not know what those are for at this point
24 */
25#define SMU_CMD_PARTITION_COMMAND 0x3e
26
27
28/*
29 * Fan control
30 *
31 * This is a "mux" for fan control commands, first byte is the
32 * "sub" command.
33 */
34#define SMU_CMD_FAN_COMMAND 0x4a
35
36
37/*
38 * Battery access
39 *
40 * Same command number as the PMU, could it be same syntax ?
41 */
42#define SMU_CMD_BATTERY_COMMAND 0x6f
43#define SMU_CMD_GET_BATTERY_INFO 0x00
44
45/*
46 * Real time clock control
47 *
48 * This is a "mux", first data byte contains the "sub" command.
49 * The "RTC" part of the SMU controls the date, time, powerup
50 * timer, but also a PRAM
51 *
52 * Dates are in BCD format on 7 bytes:
53 * [sec] [min] [hour] [weekday] [month day] [month] [year]
54 * with month being 1 based and year minus 100
55 */
56#define SMU_CMD_RTC_COMMAND 0x8e
57#define SMU_CMD_RTC_SET_PWRUP_TIMER 0x00 /* i: 7 bytes date */
58#define SMU_CMD_RTC_GET_PWRUP_TIMER 0x01 /* o: 7 bytes date */
59#define SMU_CMD_RTC_STOP_PWRUP_TIMER 0x02
60#define SMU_CMD_RTC_SET_PRAM_BYTE_ACC 0x20 /* i: 1 byte (address?) */
61#define SMU_CMD_RTC_SET_PRAM_AUTOINC 0x21 /* i: 1 byte (data?) */
62#define SMU_CMD_RTC_SET_PRAM_LO_BYTES 0x22 /* i: 10 bytes */
63#define SMU_CMD_RTC_SET_PRAM_HI_BYTES 0x23 /* i: 10 bytes */
64#define SMU_CMD_RTC_GET_PRAM_BYTE 0x28 /* i: 1 bytes (address?) */
65#define SMU_CMD_RTC_GET_PRAM_LO_BYTES 0x29 /* o: 10 bytes */
66#define SMU_CMD_RTC_GET_PRAM_HI_BYTES 0x2a /* o: 10 bytes */
67#define SMU_CMD_RTC_SET_DATETIME 0x80 /* i: 7 bytes date */
68#define SMU_CMD_RTC_GET_DATETIME 0x81 /* o: 7 bytes date */
69
70 /*
71 * i2c commands
72 *
73 * To issue an i2c command, first is to send a parameter block to the
74 * the SMU. This is a command of type 0x9a with 9 bytes of header
75 * eventually followed by data for a write:
76 *
77 * 0: bus number (from device-tree usually, SMU has lots of busses !)
78 * 1: transfer type/format (see below)
79 * 2: device address. For combined and combined4 type transfers, this
80 * is the "write" version of the address (bit 0x01 cleared)
81 * 3: subaddress length (0..3)
82 * 4: subaddress byte 0 (or only byte for subaddress length 1)
83 * 5: subaddress byte 1
84 * 6: subaddress byte 2
85 * 7: combined address (device address for combined mode data phase)
86 * 8: data length
87 *
88 * The transfer types are the same good old Apple ones it seems,
89 * that is:
90 * - 0x00: Simple transfer
91 * - 0x01: Subaddress transfer (addr write + data tx, no restart)
92 * - 0x02: Combined transfer (addr write + restart + data tx)
93 *
94 * This is then followed by actual data for a write.
95 *
96 * At this point, the OF driver seems to have a limitation on transfer
97 * sizes of 0xd bytes on reads and 0x5 bytes on writes. I do not know
98 * wether this is just an OF limit due to some temporary buffer size
99 * or if this is an SMU imposed limit. This driver has the same limitation
100 * for now as I use a 0x10 bytes temporary buffer as well
101 *
102 * Once that is completed, a response is expected from the SMU. This is
103 * obtained via a command of type 0x9a with a length of 1 byte containing
104 * 0 as the data byte. OF also fills the rest of the data buffer with 0xff's
105 * though I can't tell yet if this is actually necessary. Once this command
106 * is complete, at this point, all I can tell is what OF does. OF tests
107 * byte 0 of the reply:
108 * - on read, 0xfe or 0xfc : bus is busy, wait (see below) or nak ?
109 * - on read, 0x00 or 0x01 : reply is in buffer (after the byte 0)
110 * - on write, < 0 -> failure (immediate exit)
111 * - else, OF just exists (without error, weird)
112 *
113 * So on read, there is this wait-for-busy thing when getting a 0xfc or
114 * 0xfe result. OF does a loop of up to 64 retries, waiting 20ms and
115 * doing the above again until either the retries expire or the result
116 * is no longer 0xfe or 0xfc
117 *
118 * The Darwin I2C driver is less subtle though. On any non-success status
119 * from the response command, it waits 5ms and tries again up to 20 times,
120 * it doesn't differenciate between fatal errors or "busy" status.
121 *
122 * This driver provides an asynchronous paramblock based i2c command
123 * interface to be used either directly by low level code or by a higher
124 * level driver interfacing to the linux i2c layer. The current
125 * implementation of this relies on working timers & timer interrupts
126 * though, so be careful of calling context for now. This may be "fixed"
127 * in the future by adding a polling facility.
128 */
129#define SMU_CMD_I2C_COMMAND 0x9a
130 /* transfer types */
131#define SMU_I2C_TRANSFER_SIMPLE 0x00
132#define SMU_I2C_TRANSFER_STDSUB 0x01
133#define SMU_I2C_TRANSFER_COMBINED 0x02
134
135/*
136 * Power supply control
137 *
138 * The "sub" command is an ASCII string in the data, the
139 * data lenght is that of the string.
140 *
141 * The VSLEW command can be used to get or set the voltage slewing.
142 * - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of
143 * reply at data offset 6, 7 and 8.
144 * - lenght 8 ("VSLEWxyz") has 3 additional bytes appended, and is
145 * used to set the voltage slewing point. The SMU replies with "DONE"
146 * I yet have to figure out their exact meaning of those 3 bytes in
147 * both cases.
148 *
149 */
150#define SMU_CMD_POWER_COMMAND 0xaa
151#define SMU_CMD_POWER_RESTART "RESTART"
152#define SMU_CMD_POWER_SHUTDOWN "SHUTDOWN"
153#define SMU_CMD_POWER_VOLTAGE_SLEW "VSLEW"
154
155/* Misc commands
156 *
157 * This command seem to be a grab bag of various things
158 */
159#define SMU_CMD_MISC_df_COMMAND 0xdf
160#define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02 /* i: 1 byte */
161#define SMU_CMD_MISC_df_NMI_OPTION 0x04
162
163/*
164 * Version info commands
165 *
166 * I haven't quite tried to figure out how these work
167 */
168#define SMU_CMD_VERSION_COMMAND 0xea
169
170
171/*
172 * Misc commands
173 *
174 * This command seem to be a grab bag of various things
175 */
176#define SMU_CMD_MISC_ee_COMMAND 0xee
177#define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02
178#define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */
179#define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */
180
181
182
183/*
184 * - Kernel side interface -
185 */
186
187#ifdef __KERNEL__
188
189/*
190 * Asynchronous SMU commands
191 *
192 * Fill up this structure and submit it via smu_queue_command(),
193 * and get notified by the optional done() callback, or because
194 * status becomes != 1
195 */
196
197struct smu_cmd;
198
199struct smu_cmd
200{
201 /* public */
202 u8 cmd; /* command */
203 int data_len; /* data len */
204 int reply_len; /* reply len */
205 void *data_buf; /* data buffer */
206 void *reply_buf; /* reply buffer */
207 int status; /* command status */
208 void (*done)(struct smu_cmd *cmd, void *misc);
209 void *misc;
210
211 /* private */
212 struct list_head link;
213};
214
215/*
216 * Queues an SMU command, all fields have to be initialized
217 */
218extern int smu_queue_cmd(struct smu_cmd *cmd);
219
220/*
221 * Simple command wrapper. This structure embeds a small buffer
222 * to ease sending simple SMU commands from the stack
223 */
224struct smu_simple_cmd
225{
226 struct smu_cmd cmd;
227 u8 buffer[16];
228};
229
230/*
231 * Queues a simple command. All fields will be initialized by that
232 * function
233 */
234extern int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
235 unsigned int data_len,
236 void (*done)(struct smu_cmd *cmd, void *misc),
237 void *misc,
238 ...);
239
240/*
241 * Completion helper. Pass it to smu_queue_simple or as 'done'
242 * member to smu_queue_cmd, it will call complete() on the struct
243 * completion passed in the "misc" argument
244 */
245extern void smu_done_complete(struct smu_cmd *cmd, void *misc);
246
247/*
248 * Synchronous helpers. Will spin-wait for completion of a command
249 */
250extern void smu_spinwait_cmd(struct smu_cmd *cmd);
251
252static inline void smu_spinwait_simple(struct smu_simple_cmd *scmd)
253{
254 smu_spinwait_cmd(&scmd->cmd);
255}
256
257/*
258 * Poll routine to call if blocked with irqs off
259 */
260extern void smu_poll(void);
261
262
263/*
264 * Init routine, presence check....
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265 */
266extern int smu_init(void);
267extern int smu_present(void);
Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -0700268struct of_device;
269extern struct of_device *smu_get_ofdev(void);
270
271
272/*
273 * Common command wrappers
274 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275extern void smu_shutdown(void);
276extern void smu_restart(void);
Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -0700277struct rtc_time;
278extern int smu_get_rtc_time(struct rtc_time *time, int spinwait);
279extern int smu_set_rtc_time(struct rtc_time *time, int spinwait);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280
281/*
282 * SMU command buffer absolute address, exported by pmac_setup,
283 * this is allocated very early during boot.
284 */
285extern unsigned long smu_cmdbuf_abs;
Benjamin Herrenschmidt0365ba72005-09-22 21:44:06 -0700286
287
288/*
289 * Kenrel asynchronous i2c interface
290 */
291
292/* SMU i2c header, exactly matches i2c header on wire */
293struct smu_i2c_param
294{
295 u8 bus; /* SMU bus ID (from device tree) */
296 u8 type; /* i2c transfer type */
297 u8 devaddr; /* device address (includes direction) */
298 u8 sublen; /* subaddress length */
299 u8 subaddr[3]; /* subaddress */
300 u8 caddr; /* combined address, filled by SMU driver */
301 u8 datalen; /* length of transfer */
302 u8 data[7]; /* data */
303};
304
305#define SMU_I2C_READ_MAX 0x0d
306#define SMU_I2C_WRITE_MAX 0x05
307
308struct smu_i2c_cmd
309{
310 /* public */
311 struct smu_i2c_param info;
312 void (*done)(struct smu_i2c_cmd *cmd, void *misc);
313 void *misc;
314 int status; /* 1 = pending, 0 = ok, <0 = fail */
315
316 /* private */
317 struct smu_cmd scmd;
318 int read;
319 int stage;
320 int retries;
321 u8 pdata[0x10];
322 struct list_head link;
323};
324
325/*
326 * Call this to queue an i2c command to the SMU. You must fill info,
327 * including info.data for a write, done and misc.
328 * For now, no polling interface is provided so you have to use completion
329 * callback.
330 */
331extern int smu_queue_i2c(struct smu_i2c_cmd *cmd);
332
333
334#endif /* __KERNEL__ */
335
336/*
337 * - Userland interface -
338 */
339
340/*
341 * A given instance of the device can be configured for 2 different
342 * things at the moment:
343 *
344 * - sending SMU commands (default at open() time)
345 * - receiving SMU events (not yet implemented)
346 *
347 * Commands are written with write() of a command block. They can be
348 * "driver" commands (for example to switch to event reception mode)
349 * or real SMU commands. They are made of a header followed by command
350 * data if any.
351 *
352 * For SMU commands (not for driver commands), you can then read() back
353 * a reply. The reader will be blocked or not depending on how the device
354 * file is opened. poll() isn't implemented yet. The reply will consist
355 * of a header as well, followed by the reply data if any. You should
356 * always provide a buffer large enough for the maximum reply data, I
357 * recommand one page.
358 *
359 * It is illegal to send SMU commands through a file descriptor configured
360 * for events reception
361 *
362 */
363struct smu_user_cmd_hdr
364{
365 __u32 cmdtype;
366#define SMU_CMDTYPE_SMU 0 /* SMU command */
367#define SMU_CMDTYPE_WANTS_EVENTS 1 /* switch fd to events mode */
368
369 __u8 cmd; /* SMU command byte */
370 __u32 data_len; /* Lenght of data following */
371};
372
373struct smu_user_reply_hdr
374{
375 __u32 status; /* Command status */
376 __u32 reply_len; /* Lenght of data follwing */
377};
378
379#endif /* _SMU_H */