blob: 9870badfd3691462c4472227c8f24bb1c99d1cda [file] [log] [blame]
Catalin Marinas08e875c2012-03-05 11:49:30 +00001/*
2 * SMP initialisation and IPI support
3 * Based on arch/arm/kernel/smp.c
4 *
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +010020#include <linux/acpi.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000021#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/spinlock.h>
24#include <linux/sched.h>
25#include <linux/interrupt.h>
26#include <linux/cache.h>
27#include <linux/profile.h>
28#include <linux/errno.h>
29#include <linux/mm.h>
30#include <linux/err.h>
31#include <linux/cpu.h>
32#include <linux/smp.h>
33#include <linux/seq_file.h>
34#include <linux/irq.h>
35#include <linux/percpu.h>
36#include <linux/clockchips.h>
37#include <linux/completion.h>
38#include <linux/of.h>
Larry Basseleb631bb2014-05-12 16:48:51 +010039#include <linux/irq_work.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000040
Andre Przywarae039ee42014-11-14 15:54:08 +000041#include <asm/alternative.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000042#include <asm/atomic.h>
43#include <asm/cacheflush.h>
Mark Rutlanddf857412014-07-16 16:32:44 +010044#include <asm/cpu.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000045#include <asm/cputype.h>
Mark Rutlandcd1aebf2013-10-24 20:30:15 +010046#include <asm/cpu_ops.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000047#include <asm/mmu_context.h>
Ganapatrao Kulkarni1a2db302016-04-08 15:50:27 -070048#include <asm/numa.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000049#include <asm/pgtable.h>
50#include <asm/pgalloc.h>
51#include <asm/processor.h>
Javi Merino4c7aa002012-08-29 09:47:19 +010052#include <asm/smp_plat.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000053#include <asm/sections.h>
54#include <asm/tlbflush.h>
55#include <asm/ptrace.h>
Jonas Rabenstein377bcff2015-07-29 12:07:57 +010056#include <asm/virt.h>
Catalin Marinas08e875c2012-03-05 11:49:30 +000057
Nicolas Pitre45ed6952014-07-25 16:05:32 -040058#define CREATE_TRACE_POINTS
59#include <trace/events/ipi.h>
60
Mark Rutland75c9d932016-11-03 20:23:11 +000061DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number);
62EXPORT_PER_CPU_SYMBOL(cpu_number);
63
Catalin Marinas08e875c2012-03-05 11:49:30 +000064/*
65 * as from 2.5, kernels no longer have an init_tasks structure
66 * so we need some other way of telling a new secondary core
67 * where to place its SVC stack
68 */
69struct secondary_data secondary_data;
Suzuki K Poulosebb905272016-02-23 10:31:42 +000070/* Number of CPUs which aren't online, but looping in kernel text. */
71int cpus_stuck_in_kernel;
Catalin Marinas08e875c2012-03-05 11:49:30 +000072
73enum ipi_msg_type {
74 IPI_RESCHEDULE,
75 IPI_CALL_FUNC,
Catalin Marinas08e875c2012-03-05 11:49:30 +000076 IPI_CPU_STOP,
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +010077 IPI_TIMER,
Larry Basseleb631bb2014-05-12 16:48:51 +010078 IPI_IRQ_WORK,
Lorenzo Pieralisi5e89c552016-01-26 11:10:38 +000079 IPI_WAKEUP
Catalin Marinas08e875c2012-03-05 11:49:30 +000080};
81
Suzuki K Pouloseac1ad202016-04-13 14:41:33 +010082#ifdef CONFIG_ARM64_VHE
83
84/* Whether the boot CPU is running in HYP mode or not*/
85static bool boot_cpu_hyp_mode;
86
87static inline void save_boot_cpu_run_el(void)
88{
89 boot_cpu_hyp_mode = is_kernel_in_hyp_mode();
90}
91
92static inline bool is_boot_cpu_in_hyp_mode(void)
93{
94 return boot_cpu_hyp_mode;
95}
96
97/*
98 * Verify that a secondary CPU is running the kernel at the same
99 * EL as that of the boot CPU.
100 */
101void verify_cpu_run_el(void)
102{
103 bool in_el2 = is_kernel_in_hyp_mode();
104 bool boot_cpu_el2 = is_boot_cpu_in_hyp_mode();
105
106 if (in_el2 ^ boot_cpu_el2) {
107 pr_crit("CPU%d: mismatched Exception Level(EL%d) with boot CPU(EL%d)\n",
108 smp_processor_id(),
109 in_el2 ? 2 : 1,
110 boot_cpu_el2 ? 2 : 1);
111 cpu_panic_kernel();
112 }
113}
114
115#else
116static inline void save_boot_cpu_run_el(void) {}
117#endif
118
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000119#ifdef CONFIG_HOTPLUG_CPU
120static int op_cpu_kill(unsigned int cpu);
121#else
122static inline int op_cpu_kill(unsigned int cpu)
123{
124 return -ENOSYS;
125}
126#endif
127
128
Catalin Marinas08e875c2012-03-05 11:49:30 +0000129/*
130 * Boot a secondary CPU, and assign it the specified idle task.
131 * This also gives us the initial stack to use for this CPU.
132 */
Paul Gortmakerb8c64532013-06-18 10:18:31 -0400133static int boot_secondary(unsigned int cpu, struct task_struct *idle)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000134{
Mark Rutland652af892013-10-24 20:30:16 +0100135 if (cpu_ops[cpu]->cpu_boot)
136 return cpu_ops[cpu]->cpu_boot(cpu);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000137
Mark Rutland652af892013-10-24 20:30:16 +0100138 return -EOPNOTSUPP;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000139}
140
141static DECLARE_COMPLETION(cpu_running);
142
Paul Gortmakerb8c64532013-06-18 10:18:31 -0400143int __cpu_up(unsigned int cpu, struct task_struct *idle)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000144{
145 int ret;
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000146 long status;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000147
148 /*
149 * We need to tell the secondary core where to find its stack and the
150 * page tables.
151 */
Mark Rutland5b7e8f72016-11-03 20:23:13 +0000152 secondary_data.task = idle;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000153 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000154 update_cpu_boot_status(CPU_MMU_OFF);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000155 __flush_dcache_area(&secondary_data, sizeof(secondary_data));
156
157 /*
158 * Now bring the CPU into our world.
159 */
160 ret = boot_secondary(cpu, idle);
161 if (ret == 0) {
162 /*
163 * CPU was successfully started, wait for it to come online or
164 * time out.
165 */
166 wait_for_completion_timeout(&cpu_running,
167 msecs_to_jiffies(1000));
168
169 if (!cpu_online(cpu)) {
170 pr_crit("CPU%u: failed to come online\n", cpu);
171 ret = -EIO;
172 }
173 } else {
174 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
175 }
176
Mark Rutland5b7e8f72016-11-03 20:23:13 +0000177 secondary_data.task = NULL;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000178 secondary_data.stack = NULL;
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000179 status = READ_ONCE(secondary_data.status);
180 if (ret && status) {
181
182 if (status == CPU_MMU_OFF)
183 status = READ_ONCE(__early_cpu_boot_status);
184
185 switch (status) {
186 default:
187 pr_err("CPU%u: failed in unknown state : 0x%lx\n",
188 cpu, status);
189 break;
190 case CPU_KILL_ME:
191 if (!op_cpu_kill(cpu)) {
192 pr_crit("CPU%u: died during early boot\n", cpu);
193 break;
194 }
195 /* Fall through */
196 pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
197 case CPU_STUCK_IN_KERNEL:
198 pr_crit("CPU%u: is stuck in kernel\n", cpu);
199 cpus_stuck_in_kernel++;
200 break;
201 case CPU_PANIC_KERNEL:
202 panic("CPU%u detected unsupported configuration\n", cpu);
203 }
204 }
Catalin Marinas08e875c2012-03-05 11:49:30 +0000205
206 return ret;
207}
208
209/*
210 * This is the secondary CPU boot entry. We're using this CPUs
211 * idle thread stack, but a set of temporary page tables.
212 */
Paul Gortmakerb8c64532013-06-18 10:18:31 -0400213asmlinkage void secondary_start_kernel(void)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000214{
215 struct mm_struct *mm = &init_mm;
Mark Rutlande9865e52016-11-03 20:23:10 +0000216 unsigned int cpu;
217
218 cpu = task_cpu(current);
219 set_my_cpu_offset(per_cpu_offset(cpu));
Catalin Marinas08e875c2012-03-05 11:49:30 +0000220
Catalin Marinas08e875c2012-03-05 11:49:30 +0000221 /*
222 * All kernel threads share the same mm context; grab a
223 * reference and switch to it.
224 */
225 atomic_inc(&mm->mm_count);
226 current->active_mm = mm;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000227
228 /*
229 * TTBR0 is only used for the identity mapping at this stage. Make it
230 * point to zero page to avoid speculatively fetching new entries.
231 */
Mark Rutland9e8e8652016-01-25 11:44:58 +0000232 cpu_uninstall_idmap();
Catalin Marinas08e875c2012-03-05 11:49:30 +0000233
234 preempt_disable();
235 trace_hardirqs_off();
236
Suzuki K. Poulosedbb4e152015-10-19 14:24:50 +0100237 /*
238 * If the system has established the capabilities, make sure
239 * this CPU ticks all of those. If it doesn't, the CPU will
240 * fail to come online.
241 */
Suzuki K Poulosec47a1902016-09-09 14:07:10 +0100242 check_local_cpu_capabilities();
Suzuki K. Poulosedbb4e152015-10-19 14:24:50 +0100243
Mark Rutland652af892013-10-24 20:30:16 +0100244 if (cpu_ops[cpu]->cpu_postboot)
245 cpu_ops[cpu]->cpu_postboot();
Catalin Marinas08e875c2012-03-05 11:49:30 +0000246
247 /*
Mark Rutlanddf857412014-07-16 16:32:44 +0100248 * Log the CPU info before it is marked online and might get read.
249 */
250 cpuinfo_store_cpu();
251
252 /*
Marc Zyngier7ade67b2013-11-04 16:55:22 +0000253 * Enable GIC and timers.
254 */
255 notify_cpu_starting(cpu);
256
David Daneyc18df0a2016-09-20 11:46:35 -0700257 store_cpu_topology(cpu);
Mark Brownf6e763b2014-03-04 07:51:17 +0000258
Marc Zyngier7ade67b2013-11-04 16:55:22 +0000259 /*
Catalin Marinas08e875c2012-03-05 11:49:30 +0000260 * OK, now it's safe to let the boot CPU continue. Wait for
261 * the CPU migration code to notice that the CPU is online
262 * before we continue.
263 */
Suzuki K. Poulose64f17812015-10-19 14:24:38 +0100264 pr_info("CPU%u: Booted secondary processor [%08x]\n",
265 cpu, read_cpuid_id());
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000266 update_cpu_boot_status(CPU_BOOT_SUCCESS);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000267 set_cpu_online(cpu, true);
Will Deaconb3770b32012-11-07 17:00:05 +0000268 complete(&cpu_running);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000269
Catalin Marinas53ae3ac2013-07-19 15:08:15 +0100270 local_irq_enable();
Catalin Marinasb3bf6aa2013-11-21 14:46:17 +0000271 local_async_enable();
Catalin Marinas53ae3ac2013-07-19 15:08:15 +0100272
273 /*
Catalin Marinas08e875c2012-03-05 11:49:30 +0000274 * OK, it's off to the idle thread for us
275 */
Thomas Gleixnerfc6d73d2016-02-26 18:43:40 +0000276 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000277}
278
Mark Rutland9327e2c2013-10-24 20:30:18 +0100279#ifdef CONFIG_HOTPLUG_CPU
280static int op_cpu_disable(unsigned int cpu)
281{
282 /*
283 * If we don't have a cpu_die method, abort before we reach the point
284 * of no return. CPU0 may not have an cpu_ops, so test for it.
285 */
286 if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
287 return -EOPNOTSUPP;
288
289 /*
290 * We may need to abort a hot unplug for some other mechanism-specific
291 * reason.
292 */
293 if (cpu_ops[cpu]->cpu_disable)
294 return cpu_ops[cpu]->cpu_disable(cpu);
295
296 return 0;
297}
298
299/*
300 * __cpu_disable runs on the processor to be shutdown.
301 */
302int __cpu_disable(void)
303{
304 unsigned int cpu = smp_processor_id();
305 int ret;
306
307 ret = op_cpu_disable(cpu);
308 if (ret)
309 return ret;
310
311 /*
312 * Take this CPU offline. Once we clear this, we can't return,
313 * and we must not schedule until we're ready to give up the cpu.
314 */
315 set_cpu_online(cpu, false);
316
317 /*
318 * OK - migrate IRQs away from this CPU
319 */
Yang Yingliang217d4532015-09-24 17:32:14 +0800320 irq_migrate_all_off_this_cpu();
321
Mark Rutland9327e2c2013-10-24 20:30:18 +0100322 return 0;
323}
324
Ashwin Chaugulec814ca02014-05-07 10:18:36 -0400325static int op_cpu_kill(unsigned int cpu)
326{
327 /*
328 * If we have no means of synchronising with the dying CPU, then assume
329 * that it is really dead. We can only wait for an arbitrary length of
330 * time and hope that it's dead, so let's skip the wait and just hope.
331 */
332 if (!cpu_ops[cpu]->cpu_kill)
Mark Rutland6b99c68c2015-04-20 17:55:30 +0100333 return 0;
Ashwin Chaugulec814ca02014-05-07 10:18:36 -0400334
335 return cpu_ops[cpu]->cpu_kill(cpu);
336}
337
Mark Rutland9327e2c2013-10-24 20:30:18 +0100338/*
339 * called on the thread which is asking for a CPU to be shutdown -
340 * waits until shutdown has completed, or it is timed out.
341 */
342void __cpu_die(unsigned int cpu)
343{
Mark Rutland6b99c68c2015-04-20 17:55:30 +0100344 int err;
345
Paul E. McKenney05981272015-05-12 14:50:05 -0700346 if (!cpu_wait_death(cpu, 5)) {
Mark Rutland9327e2c2013-10-24 20:30:18 +0100347 pr_crit("CPU%u: cpu didn't die\n", cpu);
348 return;
349 }
350 pr_notice("CPU%u: shutdown\n", cpu);
Ashwin Chaugulec814ca02014-05-07 10:18:36 -0400351
352 /*
353 * Now that the dying CPU is beyond the point of no return w.r.t.
354 * in-kernel synchronisation, try to get the firwmare to help us to
355 * verify that it has really left the kernel before we consider
356 * clobbering anything it might still be using.
357 */
Mark Rutland6b99c68c2015-04-20 17:55:30 +0100358 err = op_cpu_kill(cpu);
359 if (err)
360 pr_warn("CPU%d may not have shut down cleanly: %d\n",
361 cpu, err);
Mark Rutland9327e2c2013-10-24 20:30:18 +0100362}
363
364/*
365 * Called from the idle thread for the CPU which has been shutdown.
366 *
367 * Note that we disable IRQs here, but do not re-enable them
368 * before returning to the caller. This is also the behaviour
369 * of the other hotplug-cpu capable cores, so presumably coming
370 * out of idle fixes this.
371 */
372void cpu_die(void)
373{
374 unsigned int cpu = smp_processor_id();
375
376 idle_task_exit();
377
378 local_irq_disable();
379
380 /* Tell __cpu_die() that this CPU is now safe to dispose of */
Paul E. McKenney05981272015-05-12 14:50:05 -0700381 (void)cpu_report_death();
Mark Rutland9327e2c2013-10-24 20:30:18 +0100382
383 /*
384 * Actually shutdown the CPU. This must never fail. The specific hotplug
385 * mechanism must perform all required cache maintenance to ensure that
386 * no dirty lines are lost in the process of shutting down the CPU.
387 */
388 cpu_ops[cpu]->cpu_die(cpu);
389
390 BUG();
391}
392#endif
393
Suzuki K Poulosefce63612016-02-23 10:31:41 +0000394/*
395 * Kill the calling secondary CPU, early in bringup before it is turned
396 * online.
397 */
398void cpu_die_early(void)
399{
400 int cpu = smp_processor_id();
401
402 pr_crit("CPU%d: will not boot\n", cpu);
403
404 /* Mark this CPU absent */
405 set_cpu_present(cpu, 0);
406
407#ifdef CONFIG_HOTPLUG_CPU
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000408 update_cpu_boot_status(CPU_KILL_ME);
Suzuki K Poulosefce63612016-02-23 10:31:41 +0000409 /* Check if we can park ourselves */
410 if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_die)
411 cpu_ops[cpu]->cpu_die(cpu);
412#endif
Suzuki K Poulosebb905272016-02-23 10:31:42 +0000413 update_cpu_boot_status(CPU_STUCK_IN_KERNEL);
Suzuki K Poulosefce63612016-02-23 10:31:41 +0000414
415 cpu_park_loop();
416}
417
Jonas Rabenstein377bcff2015-07-29 12:07:57 +0100418static void __init hyp_mode_check(void)
419{
420 if (is_hyp_mode_available())
421 pr_info("CPU: All CPU(s) started at EL2\n");
422 else if (is_hyp_mode_mismatched())
423 WARN_TAINT(1, TAINT_CPU_OUT_OF_SPEC,
424 "CPU: CPUs started in inconsistent modes");
425 else
426 pr_info("CPU: All CPU(s) started at EL1\n");
427}
428
Catalin Marinas08e875c2012-03-05 11:49:30 +0000429void __init smp_cpus_done(unsigned int max_cpus)
430{
Will Deacon326b16d2013-08-30 18:06:48 +0100431 pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
Suzuki K. Poulose3a755782015-10-19 14:24:39 +0100432 setup_cpu_features();
Jonas Rabenstein377bcff2015-07-29 12:07:57 +0100433 hyp_mode_check();
434 apply_alternatives_all();
Catalin Marinas08e875c2012-03-05 11:49:30 +0000435}
436
437void __init smp_prepare_boot_cpu(void)
438{
Suzuki K Poulose9113c2a2016-07-21 11:12:55 +0100439 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
Catalin Marinasefd9e032016-09-05 18:25:48 +0100440 /*
441 * Initialise the static keys early as they may be enabled by the
442 * cpufeature code.
443 */
444 jump_label_init();
Suzuki K. Poulose4b998ff2015-10-19 14:24:40 +0100445 cpuinfo_store_boot_cpu();
Suzuki K Pouloseac1ad202016-04-13 14:41:33 +0100446 save_boot_cpu_run_el();
Suzuki K Poulosec47a1902016-09-09 14:07:10 +0100447 /*
448 * Run the errata work around checks on the boot CPU, once we have
449 * initialised the cpu feature infrastructure from
450 * cpuinfo_store_boot_cpu() above.
451 */
452 update_cpu_errata_workarounds();
Catalin Marinas08e875c2012-03-05 11:49:30 +0000453}
454
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100455static u64 __init of_get_cpu_mpidr(struct device_node *dn)
456{
457 const __be32 *cell;
458 u64 hwid;
459
460 /*
461 * A cpu node with missing "reg" property is
462 * considered invalid to build a cpu_logical_map
463 * entry.
464 */
465 cell = of_get_property(dn, "reg", NULL);
466 if (!cell) {
467 pr_err("%s: missing reg property\n", dn->full_name);
468 return INVALID_HWID;
469 }
470
471 hwid = of_read_number(cell, of_n_addr_cells(dn));
472 /*
473 * Non affinity bits must be set to 0 in the DT
474 */
475 if (hwid & ~MPIDR_HWID_BITMASK) {
476 pr_err("%s: invalid reg property\n", dn->full_name);
477 return INVALID_HWID;
478 }
479 return hwid;
480}
481
482/*
483 * Duplicate MPIDRs are a recipe for disaster. Scan all initialized
484 * entries and check for duplicates. If any is found just ignore the
485 * cpu. cpu_logical_map was initialized to INVALID_HWID to avoid
486 * matching valid MPIDR values.
487 */
488static bool __init is_mpidr_duplicate(unsigned int cpu, u64 hwid)
489{
490 unsigned int i;
491
492 for (i = 1; (i < cpu) && (i < NR_CPUS); i++)
493 if (cpu_logical_map(i) == hwid)
494 return true;
495 return false;
496}
497
Catalin Marinas08e875c2012-03-05 11:49:30 +0000498/*
Lorenzo Pieralisi819a8822015-05-13 14:12:46 +0100499 * Initialize cpu operations for a logical cpu and
500 * set it in the possible mask on success
501 */
502static int __init smp_cpu_setup(int cpu)
503{
504 if (cpu_read_ops(cpu))
505 return -ENODEV;
506
507 if (cpu_ops[cpu]->cpu_init(cpu))
508 return -ENODEV;
509
510 set_cpu_possible(cpu, true);
511
512 return 0;
513}
514
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100515static bool bootcpu_valid __initdata;
516static unsigned int cpu_count = 1;
517
518#ifdef CONFIG_ACPI
519/*
520 * acpi_map_gic_cpu_interface - parse processor MADT entry
521 *
522 * Carry out sanity checks on MADT processor entry and initialize
523 * cpu_logical_map on success
524 */
525static void __init
526acpi_map_gic_cpu_interface(struct acpi_madt_generic_interrupt *processor)
527{
528 u64 hwid = processor->arm_mpidr;
529
Hanjun Guof9058922015-07-03 15:29:06 +0800530 if (!(processor->flags & ACPI_MADT_ENABLED)) {
531 pr_debug("skipping disabled CPU entry with 0x%llx MPIDR\n", hwid);
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100532 return;
533 }
534
Hanjun Guof9058922015-07-03 15:29:06 +0800535 if (hwid & ~MPIDR_HWID_BITMASK || hwid == INVALID_HWID) {
536 pr_err("skipping CPU entry with invalid MPIDR 0x%llx\n", hwid);
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100537 return;
538 }
539
540 if (is_mpidr_duplicate(cpu_count, hwid)) {
541 pr_err("duplicate CPU MPIDR 0x%llx in MADT\n", hwid);
542 return;
543 }
544
545 /* Check if GICC structure of boot CPU is available in the MADT */
546 if (cpu_logical_map(0) == hwid) {
547 if (bootcpu_valid) {
548 pr_err("duplicate boot CPU MPIDR: 0x%llx in MADT\n",
549 hwid);
550 return;
551 }
552 bootcpu_valid = true;
Lorenzo Pieralisibaa55672016-10-17 15:18:48 +0100553 early_map_cpu_to_node(0, acpi_numa_get_nid(0, hwid));
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100554 return;
555 }
556
557 if (cpu_count >= NR_CPUS)
558 return;
559
560 /* map the logical cpu id to cpu MPIDR */
561 cpu_logical_map(cpu_count) = hwid;
562
Lorenzo Pieralisi5e89c552016-01-26 11:10:38 +0000563 /*
564 * Set-up the ACPI parking protocol cpu entries
565 * while initializing the cpu_logical_map to
566 * avoid parsing MADT entries multiple times for
567 * nothing (ie a valid cpu_logical_map entry should
568 * contain a valid parking protocol data set to
569 * initialize the cpu if the parking protocol is
570 * the only available enable method).
571 */
572 acpi_set_mailbox_entry(cpu_count, processor);
573
Hanjun Guod8b47fc2016-05-24 15:35:44 -0700574 early_map_cpu_to_node(cpu_count, acpi_numa_get_nid(cpu_count, hwid));
575
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100576 cpu_count++;
577}
578
579static int __init
580acpi_parse_gic_cpu_interface(struct acpi_subtable_header *header,
581 const unsigned long end)
582{
583 struct acpi_madt_generic_interrupt *processor;
584
585 processor = (struct acpi_madt_generic_interrupt *)header;
Al Stone99e3e3a2015-07-06 17:16:48 -0600586 if (BAD_MADT_GICC_ENTRY(processor, end))
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100587 return -EINVAL;
588
589 acpi_table_print_madt_entry(header);
590
591 acpi_map_gic_cpu_interface(processor);
592
593 return 0;
594}
595#else
596#define acpi_table_parse_madt(...) do { } while (0)
597#endif
598
Lorenzo Pieralisi819a8822015-05-13 14:12:46 +0100599/*
Javi Merino4c7aa002012-08-29 09:47:19 +0100600 * Enumerate the possible CPU set from the device tree and build the
601 * cpu logical map array containing MPIDR values related to logical
602 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
Catalin Marinas08e875c2012-03-05 11:49:30 +0000603 */
Jisheng Zhang29b83022015-11-12 20:04:42 +0800604static void __init of_parse_and_init_cpus(void)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000605{
Catalin Marinas08e875c2012-03-05 11:49:30 +0000606 struct device_node *dn = NULL;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000607
608 while ((dn = of_find_node_by_type(dn, "cpu"))) {
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100609 u64 hwid = of_get_cpu_mpidr(dn);
Javi Merino4c7aa002012-08-29 09:47:19 +0100610
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100611 if (hwid == INVALID_HWID)
Javi Merino4c7aa002012-08-29 09:47:19 +0100612 goto next;
Javi Merino4c7aa002012-08-29 09:47:19 +0100613
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100614 if (is_mpidr_duplicate(cpu_count, hwid)) {
615 pr_err("%s: duplicate cpu reg properties in the DT\n",
616 dn->full_name);
Javi Merino4c7aa002012-08-29 09:47:19 +0100617 goto next;
618 }
619
620 /*
Javi Merino4c7aa002012-08-29 09:47:19 +0100621 * The numbering scheme requires that the boot CPU
622 * must be assigned logical id 0. Record it so that
623 * the logical map built from DT is validated and can
624 * be used.
625 */
626 if (hwid == cpu_logical_map(0)) {
627 if (bootcpu_valid) {
628 pr_err("%s: duplicate boot cpu reg property in DT\n",
629 dn->full_name);
630 goto next;
631 }
632
633 bootcpu_valid = true;
Zhen Lei7ba5f602016-09-01 14:55:04 +0800634 early_map_cpu_to_node(0, of_node_to_nid(dn));
Javi Merino4c7aa002012-08-29 09:47:19 +0100635
636 /*
637 * cpu_logical_map has already been
638 * initialized and the boot cpu doesn't need
639 * the enable-method so continue without
640 * incrementing cpu.
641 */
642 continue;
643 }
644
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100645 if (cpu_count >= NR_CPUS)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000646 goto next;
647
Javi Merino4c7aa002012-08-29 09:47:19 +0100648 pr_debug("cpu logical map 0x%llx\n", hwid);
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100649 cpu_logical_map(cpu_count) = hwid;
Ganapatrao Kulkarni1a2db302016-04-08 15:50:27 -0700650
651 early_map_cpu_to_node(cpu_count, of_node_to_nid(dn));
Catalin Marinas08e875c2012-03-05 11:49:30 +0000652next:
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100653 cpu_count++;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000654 }
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100655}
Catalin Marinas08e875c2012-03-05 11:49:30 +0000656
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100657/*
658 * Enumerate the possible CPU set from the device tree or ACPI and build the
659 * cpu logical map array containing MPIDR values related to logical
660 * cpus. Assumes that cpu_logical_map(0) has already been initialized.
661 */
662void __init smp_init_cpus(void)
663{
664 int i;
665
666 if (acpi_disabled)
667 of_parse_and_init_cpus();
668 else
669 /*
670 * do a walk of MADT to determine how many CPUs
671 * we have including disabled CPUs, and get information
672 * we need for SMP init
673 */
674 acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
675 acpi_parse_gic_cpu_interface, 0);
676
Kefeng Wang50ee91b2016-08-09 10:30:49 +0800677 if (cpu_count > nr_cpu_ids)
678 pr_warn("Number of cores (%d) exceeds configured maximum of %d - clipping\n",
679 cpu_count, nr_cpu_ids);
Javi Merino4c7aa002012-08-29 09:47:19 +0100680
681 if (!bootcpu_valid) {
Lorenzo Pieralisi0f078332015-05-13 14:12:47 +0100682 pr_err("missing boot CPU MPIDR, not enabling secondaries\n");
Javi Merino4c7aa002012-08-29 09:47:19 +0100683 return;
684 }
685
686 /*
Lorenzo Pieralisi819a8822015-05-13 14:12:46 +0100687 * We need to set the cpu_logical_map entries before enabling
688 * the cpus so that cpu processor description entries (DT cpu nodes
689 * and ACPI MADT entries) can be retrieved by matching the cpu hwid
690 * with entries in cpu_logical_map while initializing the cpus.
691 * If the cpu set-up fails, invalidate the cpu_logical_map entry.
Javi Merino4c7aa002012-08-29 09:47:19 +0100692 */
Kefeng Wang50ee91b2016-08-09 10:30:49 +0800693 for (i = 1; i < nr_cpu_ids; i++) {
Lorenzo Pieralisi819a8822015-05-13 14:12:46 +0100694 if (cpu_logical_map(i) != INVALID_HWID) {
695 if (smp_cpu_setup(i))
696 cpu_logical_map(i) = INVALID_HWID;
697 }
698 }
Catalin Marinas08e875c2012-03-05 11:49:30 +0000699}
700
701void __init smp_prepare_cpus(unsigned int max_cpus)
702{
Mark Rutlandcd1aebf2013-10-24 20:30:15 +0100703 int err;
Suzuki K Poulose44dbcc92016-04-22 12:25:35 +0100704 unsigned int cpu;
David Daneyc18df0a2016-09-20 11:46:35 -0700705 unsigned int this_cpu;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000706
Mark Brownf6e763b2014-03-04 07:51:17 +0000707 init_cpu_topology();
708
David Daneyc18df0a2016-09-20 11:46:35 -0700709 this_cpu = smp_processor_id();
710 store_cpu_topology(this_cpu);
711 numa_store_cpu_info(this_cpu);
Mark Brownf6e763b2014-03-04 07:51:17 +0000712
Catalin Marinas08e875c2012-03-05 11:49:30 +0000713 /*
Suzuki K Poulosee75118a2016-07-21 11:15:27 +0100714 * If UP is mandated by "nosmp" (which implies "maxcpus=0"), don't set
715 * secondary CPUs present.
716 */
717 if (max_cpus == 0)
718 return;
719
720 /*
Catalin Marinas08e875c2012-03-05 11:49:30 +0000721 * Initialise the present map (which describes the set of CPUs
722 * actually populated at the present time) and release the
723 * secondaries from the bootloader.
724 */
725 for_each_possible_cpu(cpu) {
Catalin Marinas08e875c2012-03-05 11:49:30 +0000726
Mark Rutland75c9d932016-11-03 20:23:11 +0000727 per_cpu(cpu_number, cpu) = cpu;
728
Marc Zyngierd329de32013-01-02 15:24:22 +0000729 if (cpu == smp_processor_id())
Catalin Marinas08e875c2012-03-05 11:49:30 +0000730 continue;
731
Mark Rutlandcd1aebf2013-10-24 20:30:15 +0100732 if (!cpu_ops[cpu])
Marc Zyngierd329de32013-01-02 15:24:22 +0000733 continue;
734
Mark Rutlandcd1aebf2013-10-24 20:30:15 +0100735 err = cpu_ops[cpu]->cpu_prepare(cpu);
Marc Zyngierd329de32013-01-02 15:24:22 +0000736 if (err)
737 continue;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000738
739 set_cpu_present(cpu, true);
David Daneyc18df0a2016-09-20 11:46:35 -0700740 numa_store_cpu_info(cpu);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000741 }
Catalin Marinas08e875c2012-03-05 11:49:30 +0000742}
743
Frederic Weisbecker36310732014-08-16 18:48:05 +0200744void (*__smp_cross_call)(const struct cpumask *, unsigned int);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000745
746void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
747{
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400748 __smp_cross_call = fn;
Catalin Marinas08e875c2012-03-05 11:49:30 +0000749}
750
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400751static const char *ipi_types[NR_IPI] __tracepoint_string = {
752#define S(x,s) [x] = s
Catalin Marinas08e875c2012-03-05 11:49:30 +0000753 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
754 S(IPI_CALL_FUNC, "Function call interrupts"),
Catalin Marinas08e875c2012-03-05 11:49:30 +0000755 S(IPI_CPU_STOP, "CPU stop interrupts"),
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +0100756 S(IPI_TIMER, "Timer broadcast interrupts"),
Larry Basseleb631bb2014-05-12 16:48:51 +0100757 S(IPI_IRQ_WORK, "IRQ work interrupts"),
Lorenzo Pieralisi5e89c552016-01-26 11:10:38 +0000758 S(IPI_WAKEUP, "CPU wake-up interrupts"),
Catalin Marinas08e875c2012-03-05 11:49:30 +0000759};
760
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400761static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
762{
763 trace_ipi_raise(target, ipi_types[ipinr]);
764 __smp_cross_call(target, ipinr);
765}
766
Catalin Marinas08e875c2012-03-05 11:49:30 +0000767void show_ipi_list(struct seq_file *p, int prec)
768{
769 unsigned int cpu, i;
770
771 for (i = 0; i < NR_IPI; i++) {
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400772 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
Catalin Marinas08e875c2012-03-05 11:49:30 +0000773 prec >= 4 ? " " : "");
Sudeep KarkadaNagesha67317c22013-11-07 15:25:44 +0000774 for_each_online_cpu(cpu)
Catalin Marinas08e875c2012-03-05 11:49:30 +0000775 seq_printf(p, "%10u ",
776 __get_irq_stat(cpu, ipi_irqs[i]));
777 seq_printf(p, " %s\n", ipi_types[i]);
778 }
779}
780
781u64 smp_irq_stat_cpu(unsigned int cpu)
782{
783 u64 sum = 0;
784 int i;
785
786 for (i = 0; i < NR_IPI; i++)
787 sum += __get_irq_stat(cpu, ipi_irqs[i]);
788
789 return sum;
790}
791
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400792void arch_send_call_function_ipi_mask(const struct cpumask *mask)
793{
794 smp_cross_call(mask, IPI_CALL_FUNC);
795}
796
797void arch_send_call_function_single_ipi(int cpu)
798{
Jiang Liu0aaf0da2015-01-23 05:36:42 +0000799 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400800}
801
Lorenzo Pieralisi5e89c552016-01-26 11:10:38 +0000802#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
803void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
804{
805 smp_cross_call(mask, IPI_WAKEUP);
806}
807#endif
808
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400809#ifdef CONFIG_IRQ_WORK
810void arch_irq_work_raise(void)
811{
812 if (__smp_cross_call)
813 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
814}
815#endif
816
Catalin Marinas08e875c2012-03-05 11:49:30 +0000817/*
818 * ipi_cpu_stop - handle IPI from smp_send_stop()
819 */
820static void ipi_cpu_stop(unsigned int cpu)
821{
Catalin Marinas08e875c2012-03-05 11:49:30 +0000822 set_cpu_online(cpu, false);
823
Catalin Marinas08e875c2012-03-05 11:49:30 +0000824 local_irq_disable();
825
826 while (1)
827 cpu_relax();
828}
829
830/*
831 * Main handler for inter-processor interrupts
832 */
833void handle_IPI(int ipinr, struct pt_regs *regs)
834{
835 unsigned int cpu = smp_processor_id();
836 struct pt_regs *old_regs = set_irq_regs(regs);
837
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400838 if ((unsigned)ipinr < NR_IPI) {
Stephen Boydbe081d92015-06-24 13:14:18 -0700839 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400840 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
841 }
Catalin Marinas08e875c2012-03-05 11:49:30 +0000842
843 switch (ipinr) {
844 case IPI_RESCHEDULE:
845 scheduler_ipi();
846 break;
847
848 case IPI_CALL_FUNC:
849 irq_enter();
850 generic_smp_call_function_interrupt();
851 irq_exit();
852 break;
853
Catalin Marinas08e875c2012-03-05 11:49:30 +0000854 case IPI_CPU_STOP:
855 irq_enter();
856 ipi_cpu_stop(cpu);
857 irq_exit();
858 break;
859
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +0100860#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
861 case IPI_TIMER:
862 irq_enter();
863 tick_receive_broadcast();
864 irq_exit();
865 break;
866#endif
867
Larry Basseleb631bb2014-05-12 16:48:51 +0100868#ifdef CONFIG_IRQ_WORK
869 case IPI_IRQ_WORK:
870 irq_enter();
871 irq_work_run();
872 irq_exit();
873 break;
874#endif
875
Lorenzo Pieralisi5e89c552016-01-26 11:10:38 +0000876#ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL
877 case IPI_WAKEUP:
878 WARN_ONCE(!acpi_parking_protocol_valid(cpu),
879 "CPU%u: Wake-up IPI outside the ACPI parking protocol\n",
880 cpu);
881 break;
882#endif
883
Catalin Marinas08e875c2012-03-05 11:49:30 +0000884 default:
885 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
886 break;
887 }
Nicolas Pitre45ed6952014-07-25 16:05:32 -0400888
889 if ((unsigned)ipinr < NR_IPI)
Stephen Boydbe081d92015-06-24 13:14:18 -0700890 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000891 set_irq_regs(old_regs);
892}
893
894void smp_send_reschedule(int cpu)
895{
896 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
897}
898
Lorenzo Pieralisi1f850082013-09-04 10:55:17 +0100899#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
900void tick_broadcast(const struct cpumask *mask)
901{
902 smp_cross_call(mask, IPI_TIMER);
903}
904#endif
905
Catalin Marinas08e875c2012-03-05 11:49:30 +0000906void smp_send_stop(void)
907{
908 unsigned long timeout;
909
910 if (num_online_cpus() > 1) {
911 cpumask_t mask;
912
913 cpumask_copy(&mask, cpu_online_mask);
Rusty Russell434ed7f2015-03-05 10:49:18 +1030914 cpumask_clear_cpu(smp_processor_id(), &mask);
Catalin Marinas08e875c2012-03-05 11:49:30 +0000915
Jan Glauber82611c12016-04-18 09:43:33 +0200916 if (system_state == SYSTEM_BOOTING ||
917 system_state == SYSTEM_RUNNING)
918 pr_crit("SMP: stopping secondary CPUs\n");
Catalin Marinas08e875c2012-03-05 11:49:30 +0000919 smp_cross_call(&mask, IPI_CPU_STOP);
920 }
921
922 /* Wait up to one second for other CPUs to stop */
923 timeout = USEC_PER_SEC;
924 while (num_online_cpus() > 1 && timeout--)
925 udelay(1);
926
927 if (num_online_cpus() > 1)
Jan Glauber82611c12016-04-18 09:43:33 +0200928 pr_warning("SMP: failed to stop secondary CPUs %*pbl\n",
929 cpumask_pr_args(cpu_online_mask));
Catalin Marinas08e875c2012-03-05 11:49:30 +0000930}
931
932/*
933 * not supported here
934 */
935int setup_profiling_timer(unsigned int multiplier)
936{
937 return -EINVAL;
938}
James Morse5c492c32016-06-22 10:06:12 +0100939
940static bool have_cpu_die(void)
941{
942#ifdef CONFIG_HOTPLUG_CPU
943 int any_cpu = raw_smp_processor_id();
944
Mark Salter982d8d92017-03-24 09:53:56 -0400945 if (cpu_ops[any_cpu] && cpu_ops[any_cpu]->cpu_die)
James Morse5c492c32016-06-22 10:06:12 +0100946 return true;
947#endif
948 return false;
949}
950
951bool cpus_are_stuck_in_kernel(void)
952{
953 bool smp_spin_tables = (num_possible_cpus() > 1 && !have_cpu_die());
954
955 return !!cpus_stuck_in_kernel || smp_spin_tables;
956}