David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 1 | #ifndef _ASM_X86_BARRIER_H |
| 2 | #define _ASM_X86_BARRIER_H |
| 3 | |
| 4 | #include <asm/alternative.h> |
| 5 | #include <asm/nops.h> |
| 6 | |
| 7 | /* |
| 8 | * Force strict CPU ordering. |
Michael S. Tsirkin | 57d9b1b | 2016-01-28 19:02:44 +0200 | [diff] [blame] | 9 | * And yes, this might be required on UP too when we're talking |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 10 | * to devices. |
| 11 | */ |
| 12 | |
| 13 | #ifdef CONFIG_X86_32 |
Michael S. Tsirkin | bd92247 | 2016-01-28 19:02:29 +0200 | [diff] [blame] | 14 | #define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \ |
| 15 | X86_FEATURE_XMM2) ::: "memory", "cc") |
| 16 | #define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \ |
| 17 | X86_FEATURE_XMM2) ::: "memory", "cc") |
| 18 | #define wmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "sfence", \ |
| 19 | X86_FEATURE_XMM2) ::: "memory", "cc") |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 20 | #else |
| 21 | #define mb() asm volatile("mfence":::"memory") |
| 22 | #define rmb() asm volatile("lfence":::"memory") |
| 23 | #define wmb() asm volatile("sfence" ::: "memory") |
| 24 | #endif |
| 25 | |
Dan Williams | 8c33e2d | 2018-01-29 17:02:28 -0800 | [diff] [blame] | 26 | /** |
| 27 | * array_index_mask_nospec() - generate a mask that is ~0UL when the |
| 28 | * bounds check succeeds and 0 otherwise |
| 29 | * @index: array element index |
| 30 | * @size: number of elements in array |
| 31 | * |
| 32 | * Returns: |
| 33 | * 0 - (index < size) |
| 34 | */ |
| 35 | static inline unsigned long array_index_mask_nospec(unsigned long index, |
| 36 | unsigned long size) |
| 37 | { |
| 38 | unsigned long mask; |
| 39 | |
Dan Williams | 995cddc | 2018-06-07 09:13:48 -0700 | [diff] [blame] | 40 | asm volatile ("cmp %1,%2; sbb %0,%0;" |
Dan Williams | 8c33e2d | 2018-01-29 17:02:28 -0800 | [diff] [blame] | 41 | :"=r" (mask) |
Dan Williams | be1ea50 | 2018-02-06 18:22:40 -0800 | [diff] [blame] | 42 | :"g"(size),"r" (index) |
Dan Williams | 8c33e2d | 2018-01-29 17:02:28 -0800 | [diff] [blame] | 43 | :"cc"); |
| 44 | return mask; |
| 45 | } |
| 46 | |
| 47 | /* Override the default implementation from linux/nospec.h. */ |
| 48 | #define array_index_mask_nospec array_index_mask_nospec |
| 49 | |
Dan Williams | 1f03d14 | 2018-01-29 17:02:33 -0800 | [diff] [blame] | 50 | /* Prevent speculative execution past this barrier. */ |
| 51 | #define barrier_nospec() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \ |
| 52 | "lfence", X86_FEATURE_LFENCE_RDTSC) |
| 53 | |
Alexander Duyck | 1077fa3 | 2014-12-11 15:02:06 -0800 | [diff] [blame] | 54 | #ifdef CONFIG_X86_PPRO_FENCE |
| 55 | #define dma_rmb() rmb() |
| 56 | #else |
| 57 | #define dma_rmb() barrier() |
| 58 | #endif |
| 59 | #define dma_wmb() barrier() |
| 60 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 61 | #define __smp_mb() mb() |
| 62 | #define __smp_rmb() dma_rmb() |
| 63 | #define __smp_wmb() barrier() |
| 64 | #define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0) |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 65 | |
Dave Jones | 09df7c4 | 2014-03-10 19:32:22 -0400 | [diff] [blame] | 66 | #if defined(CONFIG_X86_PPRO_FENCE) |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 67 | |
| 68 | /* |
Peter Zijlstra | 4f3aaf2 | 2014-06-11 11:01:45 +0200 | [diff] [blame] | 69 | * For this option x86 doesn't have a strong TSO memory |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 70 | * model and we should fall back to full barriers. |
| 71 | */ |
| 72 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 73 | #define __smp_store_release(p, v) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 74 | do { \ |
| 75 | compiletime_assert_atomic_type(*p); \ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 76 | __smp_mb(); \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 77 | WRITE_ONCE(*p, v); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 78 | } while (0) |
| 79 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 80 | #define __smp_load_acquire(p) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 81 | ({ \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 82 | typeof(*p) ___p1 = READ_ONCE(*p); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 83 | compiletime_assert_atomic_type(*p); \ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 84 | __smp_mb(); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 85 | ___p1; \ |
| 86 | }) |
| 87 | |
| 88 | #else /* regular x86 TSO memory ordering */ |
| 89 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 90 | #define __smp_store_release(p, v) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 91 | do { \ |
| 92 | compiletime_assert_atomic_type(*p); \ |
| 93 | barrier(); \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 94 | WRITE_ONCE(*p, v); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 95 | } while (0) |
| 96 | |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 97 | #define __smp_load_acquire(p) \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 98 | ({ \ |
Andrey Konovalov | 76695af | 2015-08-02 17:11:04 +0200 | [diff] [blame] | 99 | typeof(*p) ___p1 = READ_ONCE(*p); \ |
Peter Zijlstra | 47933ad | 2013-11-06 14:57:36 +0100 | [diff] [blame] | 100 | compiletime_assert_atomic_type(*p); \ |
| 101 | barrier(); \ |
| 102 | ___p1; \ |
| 103 | }) |
| 104 | |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 105 | #endif |
| 106 | |
Peter Zijlstra | d00a569 | 2014-03-13 19:00:35 +0100 | [diff] [blame] | 107 | /* Atomic operations are already serializing on x86 */ |
Michael S. Tsirkin | 1638fb7 | 2015-12-27 15:04:42 +0200 | [diff] [blame] | 108 | #define __smp_mb__before_atomic() barrier() |
| 109 | #define __smp_mb__after_atomic() barrier() |
Peter Zijlstra | d00a569 | 2014-03-13 19:00:35 +0100 | [diff] [blame] | 110 | |
Michael S. Tsirkin | 300b06d | 2015-12-21 09:22:18 +0200 | [diff] [blame] | 111 | #include <asm-generic/barrier.h> |
| 112 | |
David Howells | f05e798 | 2012-03-28 18:11:12 +0100 | [diff] [blame] | 113 | #endif /* _ASM_X86_BARRIER_H */ |