Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Google, Inc. |
| 3 | * Author: Colin Cross <ccross@android.com> |
| 4 | * |
| 5 | * This software is licensed under the terms of the GNU General Public |
| 6 | * License version 2, as published by the Free Software Foundation, and |
| 7 | * may be copied, distributed, and modified under those terms. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/ptrace.h> |
| 17 | #include <asm/stacktrace.h> |
| 18 | |
| 19 | #include "fiq_debugger_priv.h" |
| 20 | |
| 21 | static char *mode_name(const struct pt_regs *regs) |
| 22 | { |
| 23 | if (compat_user_mode(regs)) { |
| 24 | return "USR"; |
| 25 | } else { |
| 26 | switch (processor_mode(regs)) { |
| 27 | case PSR_MODE_EL0t: return "EL0t"; |
| 28 | case PSR_MODE_EL1t: return "EL1t"; |
| 29 | case PSR_MODE_EL1h: return "EL1h"; |
| 30 | case PSR_MODE_EL2t: return "EL2t"; |
| 31 | case PSR_MODE_EL2h: return "EL2h"; |
| 32 | default: return "???"; |
| 33 | } |
| 34 | } |
| 35 | } |
| 36 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 37 | void fiq_debugger_dump_pc(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 38 | const struct pt_regs *regs) |
| 39 | { |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 40 | output->printf(output, " pc %016lx cpsr %08lx mode %s\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 41 | regs->pc, regs->pstate, mode_name(regs)); |
| 42 | } |
| 43 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 44 | void fiq_debugger_dump_regs_aarch32(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 45 | const struct pt_regs *regs) |
| 46 | { |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 47 | output->printf(output, " r0 %08x r1 %08x r2 %08x r3 %08x\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 48 | regs->compat_usr(0), regs->compat_usr(1), |
| 49 | regs->compat_usr(2), regs->compat_usr(3)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 50 | output->printf(output, " r4 %08x r5 %08x r6 %08x r7 %08x\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 51 | regs->compat_usr(4), regs->compat_usr(5), |
| 52 | regs->compat_usr(6), regs->compat_usr(7)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 53 | output->printf(output, " r8 %08x r9 %08x r10 %08x r11 %08x\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 54 | regs->compat_usr(8), regs->compat_usr(9), |
| 55 | regs->compat_usr(10), regs->compat_usr(11)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 56 | output->printf(output, " ip %08x sp %08x lr %08x pc %08x\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 57 | regs->compat_usr(12), regs->compat_sp, |
| 58 | regs->compat_lr, regs->pc); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 59 | output->printf(output, " cpsr %08x (%s)\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 60 | regs->pstate, mode_name(regs)); |
| 61 | } |
| 62 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 63 | void fiq_debugger_dump_regs_aarch64(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 64 | const struct pt_regs *regs) |
| 65 | { |
| 66 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 67 | output->printf(output, " x0 %016lx x1 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 68 | regs->regs[0], regs->regs[1]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 69 | output->printf(output, " x2 %016lx x3 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 70 | regs->regs[2], regs->regs[3]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 71 | output->printf(output, " x4 %016lx x5 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 72 | regs->regs[4], regs->regs[5]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 73 | output->printf(output, " x6 %016lx x7 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 74 | regs->regs[6], regs->regs[7]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 75 | output->printf(output, " x8 %016lx x9 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 76 | regs->regs[8], regs->regs[9]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 77 | output->printf(output, " x10 %016lx x11 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 78 | regs->regs[10], regs->regs[11]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 79 | output->printf(output, " x12 %016lx x13 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 80 | regs->regs[12], regs->regs[13]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 81 | output->printf(output, " x14 %016lx x15 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 82 | regs->regs[14], regs->regs[15]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 83 | output->printf(output, " x16 %016lx x17 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 84 | regs->regs[16], regs->regs[17]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 85 | output->printf(output, " x18 %016lx x19 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 86 | regs->regs[18], regs->regs[19]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 87 | output->printf(output, " x20 %016lx x21 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 88 | regs->regs[20], regs->regs[21]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 89 | output->printf(output, " x22 %016lx x23 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 90 | regs->regs[22], regs->regs[23]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 91 | output->printf(output, " x24 %016lx x25 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 92 | regs->regs[24], regs->regs[25]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 93 | output->printf(output, " x26 %016lx x27 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 94 | regs->regs[26], regs->regs[27]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 95 | output->printf(output, " x28 %016lx x29 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 96 | regs->regs[28], regs->regs[29]); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 97 | output->printf(output, " x30 %016lx sp %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 98 | regs->regs[30], regs->sp); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 99 | output->printf(output, " pc %016lx cpsr %08x (%s)\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 100 | regs->pc, regs->pstate, mode_name(regs)); |
| 101 | } |
| 102 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 103 | void fiq_debugger_dump_regs(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 104 | const struct pt_regs *regs) |
| 105 | { |
| 106 | if (compat_user_mode(regs)) |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 107 | fiq_debugger_dump_regs_aarch32(output, regs); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 108 | else |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 109 | fiq_debugger_dump_regs_aarch64(output, regs); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | #define READ_SPECIAL_REG(x) ({ \ |
| 113 | u64 val; \ |
| 114 | asm volatile ("mrs %0, " # x : "=r"(val)); \ |
| 115 | val; \ |
| 116 | }) |
| 117 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 118 | void fiq_debugger_dump_allregs(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 119 | const struct pt_regs *regs) |
| 120 | { |
| 121 | u32 pstate = READ_SPECIAL_REG(CurrentEl); |
| 122 | bool in_el2 = (pstate & PSR_MODE_MASK) >= PSR_MODE_EL2t; |
| 123 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 124 | fiq_debugger_dump_regs(output, regs); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 125 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 126 | output->printf(output, " sp_el0 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 127 | READ_SPECIAL_REG(sp_el0)); |
| 128 | |
| 129 | if (in_el2) |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 130 | output->printf(output, " sp_el1 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 131 | READ_SPECIAL_REG(sp_el1)); |
| 132 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 133 | output->printf(output, " elr_el1 %016lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 134 | READ_SPECIAL_REG(elr_el1)); |
| 135 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 136 | output->printf(output, " spsr_el1 %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 137 | READ_SPECIAL_REG(spsr_el1)); |
| 138 | |
| 139 | if (in_el2) { |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 140 | output->printf(output, " spsr_irq %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 141 | READ_SPECIAL_REG(spsr_irq)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 142 | output->printf(output, " spsr_abt %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 143 | READ_SPECIAL_REG(spsr_abt)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 144 | output->printf(output, " spsr_und %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 145 | READ_SPECIAL_REG(spsr_und)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 146 | output->printf(output, " spsr_fiq %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 147 | READ_SPECIAL_REG(spsr_fiq)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 148 | output->printf(output, " spsr_el2 %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 149 | READ_SPECIAL_REG(elr_el2)); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 150 | output->printf(output, " spsr_el2 %08lx\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 151 | READ_SPECIAL_REG(spsr_el2)); |
| 152 | } |
| 153 | } |
| 154 | |
| 155 | struct stacktrace_state { |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 156 | struct fiq_debugger_output *output; |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 157 | unsigned int depth; |
| 158 | }; |
| 159 | |
| 160 | static int report_trace(struct stackframe *frame, void *d) |
| 161 | { |
| 162 | struct stacktrace_state *sts = d; |
| 163 | |
| 164 | if (sts->depth) { |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 165 | sts->output->printf(sts->output, "%pF:\n", frame->pc); |
| 166 | sts->output->printf(sts->output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 167 | " pc %016lx sp %016lx fp %016lx\n", |
| 168 | frame->pc, frame->sp, frame->fp); |
| 169 | sts->depth--; |
| 170 | return 0; |
| 171 | } |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 172 | sts->output->printf(sts->output, " ...\n"); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 173 | |
| 174 | return sts->depth == 0; |
| 175 | } |
| 176 | |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 177 | void fiq_debugger_dump_stacktrace(struct fiq_debugger_output *output, |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 178 | const struct pt_regs *regs, unsigned int depth, void *ssp) |
| 179 | { |
| 180 | struct thread_info *real_thread_info = THREAD_INFO(ssp); |
| 181 | struct stacktrace_state sts; |
| 182 | |
| 183 | sts.depth = depth; |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 184 | sts.output = output; |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 185 | *current_thread_info() = *real_thread_info; |
| 186 | |
| 187 | if (!current) |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 188 | output->printf(output, "current NULL\n"); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 189 | else |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 190 | output->printf(output, "pid: %d comm: %s\n", |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 191 | current->pid, current->comm); |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 192 | fiq_debugger_dump_regs(output, regs); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 193 | |
| 194 | if (!user_mode(regs)) { |
| 195 | struct stackframe frame; |
| 196 | frame.fp = regs->regs[29]; |
| 197 | frame.sp = regs->sp; |
| 198 | frame.pc = regs->pc; |
Arve Hjønnevåg | e073df6 | 2014-05-02 19:52:54 -0700 | [diff] [blame] | 199 | output->printf(output, "\n"); |
Jeff Vander Stoep | a33d9f9 | 2016-09-18 21:39:28 -0700 | [diff] [blame] | 200 | walk_stackframe(current, &frame, report_trace, &sts); |
Colin Cross | 516b14d | 2014-04-02 18:49:39 -0700 | [diff] [blame] | 201 | } |
| 202 | } |