blob: 97f8c26f970933988279eb54c6296efeba2cc3ab [file] [log] [blame]
Kim Phillips7a4da6f2012-07-26 10:08:53 -05001/*
2 * P5040 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of this
32 * software, even if advised of the possibility of such damage.
33 */
34
35&lbc {
36 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
37 interrupts = <25 2 0 0>;
38 #address-cells = <2>;
39 #size-cells = <1>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 clock-frequency = <33333333>;
50 interrupts = <16 2 1 15>;
Timur Tabi04087532013-01-17 16:34:33 -060051 fsl,iommu-parent = <&pamu0>;
Kim Phillips7a4da6f2012-07-26 10:08:53 -050052 pcie@0 {
53 reg = <0 0 0 0 0>;
54 #interrupt-cells = <1>;
55 #size-cells = <2>;
56 #address-cells = <3>;
57 device_type = "pci";
58 interrupts = <16 2 1 15>;
59 interrupt-map-mask = <0xf800 0 0 7>;
60 interrupt-map = <
61 /* IDSEL 0x0 */
62 0000 0 0 1 &mpic 40 1 0 0
63 0000 0 0 2 &mpic 1 1 0 0
64 0000 0 0 3 &mpic 2 1 0 0
65 0000 0 0 4 &mpic 3 1 0 0
66 >;
67 };
68};
69
70/* controller at 0x201000 */
71&pci1 {
72 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
73 device_type = "pci";
74 #size-cells = <2>;
75 #address-cells = <3>;
76 bus-range = <0 0xff>;
77 clock-frequency = <33333333>;
78 interrupts = <16 2 1 14>;
Timur Tabi04087532013-01-17 16:34:33 -060079 fsl,iommu-parent = <&pamu0>;
Kim Phillips7a4da6f2012-07-26 10:08:53 -050080 pcie@0 {
81 reg = <0 0 0 0 0>;
82 #interrupt-cells = <1>;
83 #size-cells = <2>;
84 #address-cells = <3>;
85 device_type = "pci";
86 interrupts = <16 2 1 14>;
87 interrupt-map-mask = <0xf800 0 0 7>;
88 interrupt-map = <
89 /* IDSEL 0x0 */
90 0000 0 0 1 &mpic 41 1 0 0
91 0000 0 0 2 &mpic 5 1 0 0
92 0000 0 0 3 &mpic 6 1 0 0
93 0000 0 0 4 &mpic 7 1 0 0
94 >;
95 };
96};
97
98/* controller at 0x202000 */
99&pci2 {
100 compatible = "fsl,p5040-pcie", "fsl,qoriq-pcie-v2.4";
101 device_type = "pci";
102 #size-cells = <2>;
103 #address-cells = <3>;
104 bus-range = <0x0 0xff>;
105 clock-frequency = <33333333>;
106 interrupts = <16 2 1 13>;
Timur Tabi04087532013-01-17 16:34:33 -0600107 fsl,iommu-parent = <&pamu0>;
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500108 pcie@0 {
109 reg = <0 0 0 0 0>;
110 #interrupt-cells = <1>;
111 #size-cells = <2>;
112 #address-cells = <3>;
113 device_type = "pci";
114 interrupts = <16 2 1 13>;
115 interrupt-map-mask = <0xf800 0 0 7>;
116 interrupt-map = <
117 /* IDSEL 0x0 */
118 0000 0 0 1 &mpic 42 1 0 0
119 0000 0 0 2 &mpic 9 1 0 0
120 0000 0 0 3 &mpic 10 1 0 0
121 0000 0 0 4 &mpic 11 1 0 0
122 >;
123 };
124};
125
126&dcsr {
127 #address-cells = <1>;
128 #size-cells = <1>;
129 compatible = "fsl,dcsr", "simple-bus";
130
131 dcsr-epu@0 {
132 compatible = "fsl,dcsr-epu";
133 interrupts = <52 2 0 0
134 84 2 0 0
135 85 2 0 0>;
136 reg = <0x0 0x1000>;
137 };
138 dcsr-npc {
139 compatible = "fsl,dcsr-npc";
140 reg = <0x1000 0x1000 0x1000000 0x8000>;
141 };
142 dcsr-nxc@2000 {
143 compatible = "fsl,dcsr-nxc";
144 reg = <0x2000 0x1000>;
145 };
146 dcsr-corenet {
147 compatible = "fsl,dcsr-corenet";
148 reg = <0x8000 0x1000 0xB0000 0x1000>;
149 };
150 dcsr-dpaa@9000 {
151 compatible = "fsl,p5040-dcsr-dpaa", "fsl,dcsr-dpaa";
152 reg = <0x9000 0x1000>;
153 };
154 dcsr-ocn@11000 {
155 compatible = "fsl,p5040-dcsr-ocn", "fsl,dcsr-ocn";
156 reg = <0x11000 0x1000>;
157 };
158 dcsr-ddr@12000 {
159 compatible = "fsl,dcsr-ddr";
160 dev-handle = <&ddr1>;
161 reg = <0x12000 0x1000>;
162 };
163 dcsr-ddr@13000 {
164 compatible = "fsl,dcsr-ddr";
165 dev-handle = <&ddr2>;
166 reg = <0x13000 0x1000>;
167 };
168 dcsr-nal@18000 {
169 compatible = "fsl,p5040-dcsr-nal", "fsl,dcsr-nal";
170 reg = <0x18000 0x1000>;
171 };
172 dcsr-rcpm@22000 {
173 compatible = "fsl,p5040-dcsr-rcpm", "fsl,dcsr-rcpm";
174 reg = <0x22000 0x1000>;
175 };
176 dcsr-cpu-sb-proxy@40000 {
177 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
178 cpu-handle = <&cpu0>;
179 reg = <0x40000 0x1000>;
180 };
181 dcsr-cpu-sb-proxy@41000 {
182 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
183 cpu-handle = <&cpu1>;
184 reg = <0x41000 0x1000>;
185 };
186 dcsr-cpu-sb-proxy@42000 {
187 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
188 cpu-handle = <&cpu2>;
189 reg = <0x42000 0x1000>;
190 };
191 dcsr-cpu-sb-proxy@43000 {
192 compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
193 cpu-handle = <&cpu3>;
194 reg = <0x43000 0x1000>;
195 };
196};
197
198&soc {
199 #address-cells = <1>;
200 #size-cells = <1>;
201 device_type = "soc";
202 compatible = "simple-bus";
203
204 soc-sram-error {
205 compatible = "fsl,soc-sram-error";
206 interrupts = <16 2 1 29>;
207 };
208
209 corenet-law@0 {
210 compatible = "fsl,corenet-law";
211 reg = <0x0 0x1000>;
212 fsl,num-laws = <32>;
213 };
214
215 ddr1: memory-controller@8000 {
216 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
217 reg = <0x8000 0x1000>;
218 interrupts = <16 2 1 23>;
219 };
220
221 ddr2: memory-controller@9000 {
222 compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller";
223 reg = <0x9000 0x1000>;
224 interrupts = <16 2 1 22>;
225 };
226
227 cpc: l3-cache-controller@10000 {
228 compatible = "fsl,p5040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
229 reg = <0x10000 0x1000
230 0x11000 0x1000>;
231 interrupts = <16 2 1 27
232 16 2 1 26>;
233 };
234
235 corenet-cf@18000 {
236 compatible = "fsl,corenet-cf";
237 reg = <0x18000 0x1000>;
238 interrupts = <16 2 1 31>;
239 fsl,ccf-num-csdids = <32>;
240 fsl,ccf-num-snoopids = <32>;
241 };
242
243 iommu@20000 {
244 compatible = "fsl,pamu-v1.0", "fsl,pamu";
Timur Tabi04087532013-01-17 16:34:33 -0600245 reg = <0x20000 0x5000>; /* for compatibility with older PAMU drivers */
246 ranges = <0 0x20000 0x5000>;
247 #address-cells = <1>;
248 #size-cells = <1>;
249 interrupts = <24 2 0 0
250 16 2 1 30>;
251
252 pamu0: pamu@0 {
253 reg = <0 0x1000>;
254 fsl,primary-cache-geometry = <32 1>;
255 fsl,secondary-cache-geometry = <128 2>;
256 };
257
258 pamu1: pamu@1000 {
259 reg = <0x1000 0x1000>;
260 fsl,primary-cache-geometry = <32 1>;
261 fsl,secondary-cache-geometry = <128 2>;
262 };
263
264 pamu2: pamu@2000 {
265 reg = <0x2000 0x1000>;
266 fsl,primary-cache-geometry = <32 1>;
267 fsl,secondary-cache-geometry = <128 2>;
268 };
269
270 pamu3: pamu@3000 {
271 reg = <0x3000 0x1000>;
272 fsl,primary-cache-geometry = <32 1>;
273 fsl,secondary-cache-geometry = <128 2>;
274 };
275
276 pamu4: pamu@4000 {
277 reg = <0x4000 0x1000>;
278 fsl,primary-cache-geometry = <32 1>;
279 fsl,secondary-cache-geometry = <128 2>;
280 };
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500281 };
282
283/include/ "qoriq-mpic.dtsi"
284
285 guts: global-utilities@e0000 {
286 compatible = "fsl,p5040-device-config", "fsl,qoriq-device-config-1.0";
287 reg = <0xe0000 0xe00>;
288 fsl,has-rstcr;
289 #sleep-cells = <1>;
290 fsl,liodn-bits = <12>;
291 };
292
293 pins: global-utilities@e0e00 {
294 compatible = "fsl,p5040-pin-control", "fsl,qoriq-pin-control-1.0";
295 reg = <0xe0e00 0x200>;
296 #sleep-cells = <2>;
297 };
298
299 clockgen: global-utilities@e1000 {
300 compatible = "fsl,p5040-clockgen", "fsl,qoriq-clockgen-1.0";
301 reg = <0xe1000 0x1000>;
302 clock-frequency = <0>;
303 };
304
305 rcpm: global-utilities@e2000 {
306 compatible = "fsl,p5040-rcpm", "fsl,qoriq-rcpm-1.0";
307 reg = <0xe2000 0x1000>;
308 #sleep-cells = <1>;
309 };
310
311 sfp: sfp@e8000 {
312 compatible = "fsl,p5040-sfp", "fsl,qoriq-sfp-1.0";
313 reg = <0xe8000 0x1000>;
314 };
315
316 serdes: serdes@ea000 {
317 compatible = "fsl,p5040-serdes";
318 reg = <0xea000 0x1000>;
319 };
320
321/include/ "qoriq-dma-0.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600322 dma@100300 {
323 fsl,iommu-parent = <&pamu0>;
324 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
325 };
326
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500327/include/ "qoriq-dma-1.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600328 dma@101300 {
329 fsl,iommu-parent = <&pamu0>;
330 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
331 };
332
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500333/include/ "qoriq-espi-0.dtsi"
334 spi@110000 {
335 fsl,espi-num-chipselects = <4>;
336 };
337
338/include/ "qoriq-esdhc-0.dtsi"
339 sdhc@114000 {
Timur Tabi04087532013-01-17 16:34:33 -0600340 fsl,iommu-parent = <&pamu2>;
341 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500342 sdhci,auto-cmd12;
343 };
344
345/include/ "qoriq-i2c-0.dtsi"
346/include/ "qoriq-i2c-1.dtsi"
347/include/ "qoriq-duart-0.dtsi"
348/include/ "qoriq-duart-1.dtsi"
349/include/ "qoriq-gpio-0.dtsi"
350/include/ "qoriq-usb2-mph-0.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600351 usb0: usb@210000 {
352 compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
353 fsl,iommu-parent = <&pamu4>;
354 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
355 phy_type = "utmi";
356 port0;
357 };
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500358
359/include/ "qoriq-usb2-dr-0.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600360 usb1: usb@211000 {
361 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
362 fsl,iommu-parent = <&pamu4>;
363 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
364 dr_mode = "host";
365 phy_type = "utmi";
366 };
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500367
368/include/ "qoriq-sata2-0.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600369 sata@220000 {
370 fsl,iommu-parent = <&pamu4>;
371 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
372 };
373
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500374/include/ "qoriq-sata2-1.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600375 sata@221000 {
376 fsl,iommu-parent = <&pamu4>;
377 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
378 };
379
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500380/include/ "qoriq-sec5.2-0.dtsi"
Timur Tabi04087532013-01-17 16:34:33 -0600381 crypto@300000 {
382 fsl,iommu-parent = <&pamu4>;
383 };
Kim Phillips7a4da6f2012-07-26 10:08:53 -0500384};