huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2014-2015 Hisilicon Limited. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | */ |
| 9 | |
| 10 | #ifndef __HNAE_H |
| 11 | #define __HNAE_H |
| 12 | |
| 13 | /* Names used in this framework: |
| 14 | * ae handle (handle): |
| 15 | * a set of queues provided by AE |
| 16 | * ring buffer queue (rbq): |
| 17 | * the channel between upper layer and the AE, can do tx and rx |
| 18 | * ring: |
| 19 | * a tx or rx channel within a rbq |
| 20 | * ring description (desc): |
| 21 | * an element in the ring with packet information |
| 22 | * buffer: |
| 23 | * a memory region referred by desc with the full packet payload |
| 24 | * |
| 25 | * "num" means a static number set as a parameter, "count" mean a dynamic |
| 26 | * number set while running |
| 27 | * "cb" means control block |
| 28 | */ |
| 29 | |
| 30 | #include <linux/delay.h> |
| 31 | #include <linux/device.h> |
| 32 | #include <linux/module.h> |
| 33 | #include <linux/netdevice.h> |
| 34 | #include <linux/notifier.h> |
huangdaode | 99dcc7d | 2015-10-10 17:20:38 +0800 | [diff] [blame] | 35 | #include <linux/phy.h> |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 36 | #include <linux/types.h> |
| 37 | |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 38 | #define HNAE_DRIVER_VERSION "2.0" |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 39 | #define HNAE_DRIVER_NAME "hns" |
| 40 | #define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation." |
| 41 | #define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver" |
| 42 | #define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem" |
| 43 | |
| 44 | #ifdef DEBUG |
| 45 | |
| 46 | #ifndef assert |
| 47 | #define assert(expr) \ |
| 48 | do { \ |
| 49 | if (!(expr)) { \ |
| 50 | pr_err("Assertion failed! %s, %s, %s, line %d\n", \ |
| 51 | #expr, __FILE__, __func__, __LINE__); \ |
| 52 | } \ |
| 53 | } while (0) |
| 54 | #endif |
| 55 | |
| 56 | #else |
| 57 | |
| 58 | #ifndef assert |
| 59 | #define assert(expr) |
| 60 | #endif |
| 61 | |
| 62 | #endif |
| 63 | |
| 64 | #define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0') |
| 65 | #define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0') |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 66 | #define AE_IS_VER1(ver) ((ver) == AE_VERSION_1) |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 67 | #define AE_NAME_SIZE 16 |
| 68 | |
| 69 | /* some said the RX and TX RCB format should not be the same in the future. But |
| 70 | * it is the same now... |
| 71 | */ |
| 72 | #define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */ |
| 73 | #define RCB_REG_BASEADDR_H 0x04 |
| 74 | #define RCB_REG_BD_NUM 0x08 |
| 75 | #define RCB_REG_BD_LEN 0x0C |
| 76 | #define RCB_REG_PKTLINE 0x10 |
| 77 | #define RCB_REG_TAIL 0x18 |
| 78 | #define RCB_REG_HEAD 0x1C |
| 79 | #define RCB_REG_FBDNUM 0x20 |
| 80 | #define RCB_REG_OFFSET 0x24 /* pkt num to be handled */ |
| 81 | #define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */ |
| 82 | |
| 83 | #define HNS_RX_HEAD_SIZE 256 |
| 84 | |
| 85 | #define HNAE_AE_REGISTER 0x1 |
| 86 | |
| 87 | #define RCB_RING_NAME_LEN 16 |
| 88 | |
| 89 | enum hnae_led_state { |
| 90 | HNAE_LED_INACTIVE, |
| 91 | HNAE_LED_ACTIVE, |
| 92 | HNAE_LED_ON, |
| 93 | HNAE_LED_OFF |
| 94 | }; |
| 95 | |
| 96 | #define HNS_RX_FLAG_VLAN_PRESENT 0x1 |
| 97 | #define HNS_RX_FLAG_L3ID_IPV4 0x0 |
| 98 | #define HNS_RX_FLAG_L3ID_IPV6 0x1 |
| 99 | #define HNS_RX_FLAG_L4ID_UDP 0x0 |
| 100 | #define HNS_RX_FLAG_L4ID_TCP 0x1 |
| 101 | |
| 102 | #define HNS_TXD_ASID_S 0 |
| 103 | #define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S) |
| 104 | #define HNS_TXD_BUFNUM_S 8 |
| 105 | #define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S) |
| 106 | #define HNS_TXD_PORTID_S 10 |
| 107 | #define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S) |
| 108 | |
| 109 | #define HNS_TXD_RA_B 8 |
| 110 | #define HNS_TXD_RI_B 9 |
| 111 | #define HNS_TXD_L4CS_B 10 |
| 112 | #define HNS_TXD_L3CS_B 11 |
| 113 | #define HNS_TXD_FE_B 12 |
| 114 | #define HNS_TXD_VLD_B 13 |
| 115 | #define HNS_TXD_IPOFFSET_S 14 |
| 116 | #define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) |
| 117 | |
| 118 | #define HNS_RXD_IPOFFSET_S 0 |
| 119 | #define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S) |
| 120 | #define HNS_RXD_BUFNUM_S 8 |
| 121 | #define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S) |
| 122 | #define HNS_RXD_PORTID_S 10 |
| 123 | #define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S) |
| 124 | #define HNS_RXD_DMAC_S 13 |
| 125 | #define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S) |
| 126 | #define HNS_RXD_VLAN_S 15 |
| 127 | #define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S) |
| 128 | #define HNS_RXD_L3ID_S 17 |
| 129 | #define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S) |
| 130 | #define HNS_RXD_L4ID_S 21 |
| 131 | #define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S) |
| 132 | #define HNS_RXD_FE_B 25 |
| 133 | #define HNS_RXD_FRAG_B 26 |
| 134 | #define HNS_RXD_VLD_B 27 |
| 135 | #define HNS_RXD_L2E_B 28 |
| 136 | #define HNS_RXD_L3E_B 29 |
| 137 | #define HNS_RXD_L4E_B 30 |
| 138 | #define HNS_RXD_DROP_B 31 |
| 139 | |
| 140 | #define HNS_RXD_VLANID_S 8 |
| 141 | #define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S) |
| 142 | #define HNS_RXD_CFI_B 20 |
| 143 | #define HNS_RXD_PRI_S 21 |
| 144 | #define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S) |
| 145 | #define HNS_RXD_ASID_S 24 |
| 146 | #define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S) |
| 147 | |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 148 | #define HNSV2_TXD_BUFNUM_S 0 |
| 149 | #define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S) |
Sheng Li | f8a1a63 | 2016-03-22 16:06:23 +0800 | [diff] [blame] | 150 | #define HNSV2_TXD_PORTID_S 4 |
| 151 | #define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S) |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 152 | #define HNSV2_TXD_RI_B 1 |
| 153 | #define HNSV2_TXD_L4CS_B 2 |
| 154 | #define HNSV2_TXD_L3CS_B 3 |
| 155 | #define HNSV2_TXD_FE_B 4 |
| 156 | #define HNSV2_TXD_VLD_B 5 |
| 157 | |
| 158 | #define HNSV2_TXD_TSE_B 0 |
| 159 | #define HNSV2_TXD_VLAN_EN_B 1 |
| 160 | #define HNSV2_TXD_SNAP_B 2 |
| 161 | #define HNSV2_TXD_IPV6_B 3 |
| 162 | #define HNSV2_TXD_SCTP_B 4 |
| 163 | |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 164 | /* hardware spec ring buffer format */ |
| 165 | struct __packed hnae_desc { |
| 166 | __le64 addr; |
| 167 | union { |
| 168 | struct { |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 169 | union { |
| 170 | __le16 asid_bufnum_pid; |
| 171 | __le16 asid; |
| 172 | }; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 173 | __le16 send_size; |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 174 | union { |
| 175 | __le32 flag_ipoffset; |
| 176 | struct { |
| 177 | __u8 bn_pid; |
| 178 | __u8 ra_ri_cs_fe_vld; |
| 179 | __u8 ip_offset; |
| 180 | __u8 tse_vlan_snap_v6_sctp_nth; |
| 181 | }; |
| 182 | }; |
| 183 | __le16 mss; |
| 184 | __u8 l4_len; |
| 185 | __u8 reserved1; |
| 186 | __le16 paylen; |
| 187 | __u8 vmid; |
| 188 | __u8 qid; |
| 189 | __le32 reserved2[2]; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 190 | } tx; |
| 191 | |
| 192 | struct { |
| 193 | __le32 ipoff_bnum_pid_flag; |
| 194 | __le16 pkt_len; |
| 195 | __le16 size; |
Salil | 13ac695 | 2015-12-03 12:17:53 +0000 | [diff] [blame] | 196 | union { |
| 197 | __le32 vlan_pri_asid; |
| 198 | struct { |
| 199 | __le16 asid; |
| 200 | __le16 vlan_cfi_pri; |
| 201 | }; |
| 202 | }; |
| 203 | __le32 rss_hash; |
| 204 | __le32 reserved_1[2]; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 205 | } rx; |
| 206 | }; |
| 207 | }; |
| 208 | |
| 209 | struct hnae_desc_cb { |
| 210 | dma_addr_t dma; /* dma address of this desc */ |
| 211 | void *buf; /* cpu addr for a desc */ |
| 212 | |
| 213 | /* priv data for the desc, e.g. skb when use with ip stack*/ |
| 214 | void *priv; |
| 215 | u16 page_offset; |
| 216 | u16 reuse_flag; |
| 217 | |
| 218 | u16 length; /* length of the buffer */ |
| 219 | |
| 220 | /* desc type, used by the ring user to mark the type of the priv data */ |
| 221 | u16 type; |
| 222 | }; |
| 223 | |
| 224 | #define setflags(flags, bits) ((flags) |= (bits)) |
| 225 | #define unsetflags(flags, bits) ((flags) &= ~(bits)) |
| 226 | |
| 227 | /* hnae_ring->flags fields */ |
| 228 | #define RINGF_DIR 0x1 /* TX or RX ring, set if TX */ |
| 229 | #define is_tx_ring(ring) ((ring)->flags & RINGF_DIR) |
| 230 | #define is_rx_ring(ring) (!is_tx_ring(ring)) |
| 231 | #define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \ |
| 232 | DMA_TO_DEVICE : DMA_FROM_DEVICE) |
| 233 | |
| 234 | struct ring_stats { |
| 235 | u64 io_err_cnt; |
| 236 | u64 sw_err_cnt; |
| 237 | u64 seg_pkt_cnt; |
| 238 | union { |
| 239 | struct { |
| 240 | u64 tx_pkts; |
| 241 | u64 tx_bytes; |
| 242 | u64 tx_err_cnt; |
| 243 | u64 restart_queue; |
| 244 | u64 tx_busy; |
| 245 | }; |
| 246 | struct { |
| 247 | u64 rx_pkts; |
| 248 | u64 rx_bytes; |
| 249 | u64 rx_err_cnt; |
| 250 | u64 reuse_pg_cnt; |
| 251 | u64 err_pkt_len; |
| 252 | u64 non_vld_descs; |
| 253 | u64 err_bd_num; |
| 254 | u64 l2_err; |
| 255 | u64 l3l4_csum_err; |
| 256 | }; |
| 257 | }; |
| 258 | }; |
| 259 | |
| 260 | struct hnae_queue; |
| 261 | |
| 262 | struct hnae_ring { |
| 263 | u8 __iomem *io_base; /* base io address for the ring */ |
| 264 | struct hnae_desc *desc; /* dma map address space */ |
| 265 | struct hnae_desc_cb *desc_cb; |
| 266 | struct hnae_queue *q; |
| 267 | int irq; |
| 268 | char ring_name[RCB_RING_NAME_LEN]; |
| 269 | |
| 270 | /* statistic */ |
| 271 | struct ring_stats stats; |
| 272 | |
| 273 | dma_addr_t desc_dma_addr; |
| 274 | u32 buf_size; /* size for hnae_desc->addr, preset by AE */ |
| 275 | u16 desc_num; /* total number of desc */ |
| 276 | u16 max_desc_num_per_pkt; |
| 277 | u16 max_raw_data_sz_per_desc; |
| 278 | u16 max_pkt_size; |
| 279 | int next_to_use; /* idx of next spare desc */ |
| 280 | |
| 281 | /* idx of lastest sent desc, the ring is empty when equal to |
| 282 | * next_to_use |
| 283 | */ |
| 284 | int next_to_clean; |
| 285 | |
| 286 | int flags; /* ring attribute */ |
| 287 | int irq_init_flag; |
| 288 | }; |
| 289 | |
| 290 | #define ring_ptr_move_fw(ring, p) \ |
| 291 | ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) |
| 292 | #define ring_ptr_move_bw(ring, p) \ |
| 293 | ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) |
| 294 | |
| 295 | enum hns_desc_type { |
| 296 | DESC_TYPE_SKB, |
| 297 | DESC_TYPE_PAGE, |
| 298 | }; |
| 299 | |
| 300 | #define assert_is_ring_idx(ring, idx) \ |
| 301 | assert((idx) >= 0 && (idx) < (ring)->desc_num) |
| 302 | |
| 303 | /* the distance between [begin, end) in a ring buffer |
| 304 | * note: there is a unuse slot between the begin and the end |
| 305 | */ |
| 306 | static inline int ring_dist(struct hnae_ring *ring, int begin, int end) |
| 307 | { |
| 308 | assert_is_ring_idx(ring, begin); |
| 309 | assert_is_ring_idx(ring, end); |
| 310 | |
| 311 | return (end - begin + ring->desc_num) % ring->desc_num; |
| 312 | } |
| 313 | |
| 314 | static inline int ring_space(struct hnae_ring *ring) |
| 315 | { |
| 316 | return ring->desc_num - |
| 317 | ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1; |
| 318 | } |
| 319 | |
| 320 | static inline int is_ring_empty(struct hnae_ring *ring) |
| 321 | { |
| 322 | assert_is_ring_idx(ring, ring->next_to_use); |
| 323 | assert_is_ring_idx(ring, ring->next_to_clean); |
| 324 | |
| 325 | return ring->next_to_use == ring->next_to_clean; |
| 326 | } |
| 327 | |
| 328 | #define hnae_buf_size(_ring) ((_ring)->buf_size) |
| 329 | #define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring))) |
| 330 | #define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring)) |
| 331 | |
| 332 | struct hnae_handle; |
| 333 | |
| 334 | /* allocate and dma map space for hnae desc */ |
| 335 | struct hnae_buf_ops { |
| 336 | int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); |
| 337 | void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); |
| 338 | int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); |
| 339 | void (*unmap_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb); |
| 340 | }; |
| 341 | |
| 342 | struct hnae_queue { |
| 343 | void __iomem *io_base; |
| 344 | phys_addr_t phy_base; |
| 345 | struct hnae_ae_dev *dev; /* the device who use this queue */ |
yankejian | 9cbe9fd | 2015-12-08 11:02:31 +0800 | [diff] [blame] | 346 | struct hnae_ring rx_ring ____cacheline_internodealigned_in_smp; |
| 347 | struct hnae_ring tx_ring ____cacheline_internodealigned_in_smp; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 348 | struct hnae_handle *handle; |
| 349 | }; |
| 350 | |
| 351 | /*hnae loop mode*/ |
| 352 | enum hnae_loop { |
| 353 | MAC_INTERNALLOOP_MAC = 0, |
| 354 | MAC_INTERNALLOOP_SERDES, |
| 355 | MAC_INTERNALLOOP_PHY, |
| 356 | MAC_LOOP_NONE, |
| 357 | }; |
| 358 | |
| 359 | /*hnae port type*/ |
| 360 | enum hnae_port_type { |
| 361 | HNAE_PORT_SERVICE = 0, |
| 362 | HNAE_PORT_DEBUG |
| 363 | }; |
| 364 | |
| 365 | /* This struct defines the operation on the handle. |
| 366 | * |
| 367 | * get_handle(): (mandatory) |
| 368 | * Get a handle from AE according to its name and options. |
| 369 | * the AE driver should manage the space used by handle and its queues while |
| 370 | * the HNAE framework will allocate desc and desc_cb for all rings in the |
| 371 | * queues. |
| 372 | * put_handle(): |
| 373 | * Release the handle. |
| 374 | * start(): |
| 375 | * Enable the hardware, include all queues |
| 376 | * stop(): |
| 377 | * Disable the hardware |
| 378 | * set_opts(): (mandatory) |
| 379 | * Set options to the AE |
| 380 | * get_opts(): (mandatory) |
| 381 | * Get options from the AE |
| 382 | * get_status(): |
| 383 | * Get the carrier state of the back channel of the handle, 1 for ok, 0 for |
| 384 | * non-ok |
| 385 | * toggle_ring_irq(): (mandatory) |
| 386 | * Set the ring irq to be enabled(0) or disable(1) |
| 387 | * toggle_queue_status(): (mandatory) |
| 388 | * Set the queue to be enabled(1) or disable(0), this will not change the |
| 389 | * ring irq state |
| 390 | * adjust_link() |
| 391 | * adjust link status |
| 392 | * set_loopback() |
| 393 | * set loopback |
| 394 | * get_ring_bdnum_limit() |
| 395 | * get ring bd number limit |
| 396 | * get_pauseparam() |
| 397 | * get tx and rx of pause frame use |
| 398 | * set_autoneg() |
| 399 | * set auto autonegotiation of pause frame use |
| 400 | * get_autoneg() |
| 401 | * get auto autonegotiation of pause frame use |
| 402 | * set_pauseparam() |
| 403 | * set tx and rx of pause frame use |
| 404 | * get_coalesce_usecs() |
| 405 | * get usecs to delay a TX interrupt after a packet is sent |
| 406 | * get_rx_max_coalesced_frames() |
| 407 | * get Maximum number of packets to be sent before a TX interrupt. |
| 408 | * set_coalesce_usecs() |
| 409 | * set usecs to delay a TX interrupt after a packet is sent |
| 410 | * set_coalesce_frames() |
| 411 | * set Maximum number of packets to be sent before a TX interrupt. |
| 412 | * get_ringnum() |
| 413 | * get RX/TX ring number |
| 414 | * get_max_ringnum() |
| 415 | * get RX/TX ring maximum number |
| 416 | * get_mac_addr() |
| 417 | * get mac address |
| 418 | * set_mac_addr() |
| 419 | * set mac address |
| 420 | * set_mc_addr() |
| 421 | * set multicast mode |
| 422 | * set_mtu() |
| 423 | * set mtu |
| 424 | * update_stats() |
| 425 | * update Old network device statistics |
| 426 | * get_ethtool_stats() |
| 427 | * get ethtool network device statistics |
| 428 | * get_strings() |
| 429 | * get a set of strings that describe the requested objects |
| 430 | * get_sset_count() |
| 431 | * get number of strings that @get_strings will write |
| 432 | * update_led_status() |
| 433 | * update the led status |
| 434 | * set_led_id() |
| 435 | * set led id |
| 436 | * get_regs() |
| 437 | * get regs dump |
| 438 | * get_regs_len() |
| 439 | * get the len of the regs dump |
| 440 | */ |
| 441 | struct hnae_ae_ops { |
| 442 | struct hnae_handle *(*get_handle)(struct hnae_ae_dev *dev, |
| 443 | u32 port_id); |
| 444 | void (*put_handle)(struct hnae_handle *handle); |
| 445 | void (*init_queue)(struct hnae_queue *q); |
| 446 | void (*fini_queue)(struct hnae_queue *q); |
| 447 | int (*start)(struct hnae_handle *handle); |
| 448 | void (*stop)(struct hnae_handle *handle); |
| 449 | void (*reset)(struct hnae_handle *handle); |
| 450 | int (*set_opts)(struct hnae_handle *handle, int type, void *opts); |
| 451 | int (*get_opts)(struct hnae_handle *handle, int type, void **opts); |
| 452 | int (*get_status)(struct hnae_handle *handle); |
| 453 | int (*get_info)(struct hnae_handle *handle, |
| 454 | u8 *auto_neg, u16 *speed, u8 *duplex); |
| 455 | void (*toggle_ring_irq)(struct hnae_ring *ring, u32 val); |
| 456 | void (*toggle_queue_status)(struct hnae_queue *queue, u32 val); |
| 457 | void (*adjust_link)(struct hnae_handle *handle, int speed, int duplex); |
| 458 | int (*set_loopback)(struct hnae_handle *handle, |
| 459 | enum hnae_loop loop_mode, int en); |
| 460 | void (*get_ring_bdnum_limit)(struct hnae_queue *queue, |
| 461 | u32 *uplimit); |
| 462 | void (*get_pauseparam)(struct hnae_handle *handle, |
| 463 | u32 *auto_neg, u32 *rx_en, u32 *tx_en); |
| 464 | int (*set_autoneg)(struct hnae_handle *handle, u8 enable); |
| 465 | int (*get_autoneg)(struct hnae_handle *handle); |
| 466 | int (*set_pauseparam)(struct hnae_handle *handle, |
| 467 | u32 auto_neg, u32 rx_en, u32 tx_en); |
| 468 | void (*get_coalesce_usecs)(struct hnae_handle *handle, |
| 469 | u32 *tx_usecs, u32 *rx_usecs); |
| 470 | void (*get_rx_max_coalesced_frames)(struct hnae_handle *handle, |
| 471 | u32 *tx_frames, u32 *rx_frames); |
Lisheng | 9832ce4 | 2016-03-28 18:40:57 +0800 | [diff] [blame] | 472 | int (*set_coalesce_usecs)(struct hnae_handle *handle, u32 timeout); |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 473 | int (*set_coalesce_frames)(struct hnae_handle *handle, |
| 474 | u32 coalesce_frames); |
yankejian | 4568637 | 2015-10-13 09:53:45 +0800 | [diff] [blame] | 475 | void (*set_promisc_mode)(struct hnae_handle *handle, u32 en); |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 476 | int (*get_mac_addr)(struct hnae_handle *handle, void **p); |
| 477 | int (*set_mac_addr)(struct hnae_handle *handle, void *p); |
| 478 | int (*set_mc_addr)(struct hnae_handle *handle, void *addr); |
| 479 | int (*set_mtu)(struct hnae_handle *handle, int new_mtu); |
Salil | 64353af | 2015-12-03 12:17:55 +0000 | [diff] [blame] | 480 | void (*set_tso_stats)(struct hnae_handle *handle, int enable); |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 481 | void (*update_stats)(struct hnae_handle *handle, |
| 482 | struct net_device_stats *net_stats); |
| 483 | void (*get_stats)(struct hnae_handle *handle, u64 *data); |
| 484 | void (*get_strings)(struct hnae_handle *handle, |
| 485 | u32 stringset, u8 *data); |
| 486 | int (*get_sset_count)(struct hnae_handle *handle, int stringset); |
| 487 | void (*update_led_status)(struct hnae_handle *handle); |
| 488 | int (*set_led_id)(struct hnae_handle *handle, |
| 489 | enum hnae_led_state status); |
| 490 | void (*get_regs)(struct hnae_handle *handle, void *data); |
| 491 | int (*get_regs_len)(struct hnae_handle *handle); |
Salil | 6bc0ce7 | 2015-12-03 12:17:54 +0000 | [diff] [blame] | 492 | u32 (*get_rss_key_size)(struct hnae_handle *handle); |
| 493 | u32 (*get_rss_indir_size)(struct hnae_handle *handle); |
| 494 | int (*get_rss)(struct hnae_handle *handle, u32 *indir, u8 *key, |
| 495 | u8 *hfunc); |
| 496 | int (*set_rss)(struct hnae_handle *handle, const u32 *indir, |
| 497 | const u8 *key, const u8 hfunc); |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 498 | }; |
| 499 | |
| 500 | struct hnae_ae_dev { |
| 501 | struct device cls_dev; /* the class dev */ |
| 502 | struct device *dev; /* the presented dev */ |
| 503 | struct hnae_ae_ops *ops; |
| 504 | struct list_head node; |
| 505 | struct module *owner; /* the module who provides this dev */ |
| 506 | int id; |
| 507 | char name[AE_NAME_SIZE]; |
| 508 | struct list_head handle_list; |
| 509 | spinlock_t lock; /* lock to protect the handle_list */ |
| 510 | }; |
| 511 | |
| 512 | struct hnae_handle { |
| 513 | struct device *owner_dev; /* the device which make use of this handle */ |
| 514 | struct hnae_ae_dev *dev; /* the device who provides this handle */ |
| 515 | struct device_node *phy_node; |
| 516 | phy_interface_t phy_if; |
| 517 | u32 if_support; |
| 518 | int q_num; |
| 519 | int vf_id; |
| 520 | u32 eport_id; |
Sheng Li | f8a1a63 | 2016-03-22 16:06:23 +0800 | [diff] [blame] | 521 | u32 dport_id; /* v2 tx bd should fill the dport_id */ |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 522 | enum hnae_port_type port_type; |
| 523 | struct list_head node; /* list to hnae_ae_dev->handle_list */ |
| 524 | struct hnae_buf_ops *bops; /* operation for the buffer */ |
| 525 | struct hnae_queue **qs; /* array base of all queues */ |
| 526 | }; |
| 527 | |
| 528 | #define ring_to_dev(ring) ((ring)->q->dev->dev) |
| 529 | |
yankejian | 48189d6 | 2016-01-20 16:00:19 +0800 | [diff] [blame] | 530 | struct hnae_handle *hnae_get_handle(struct device *owner_dev, |
| 531 | const struct device_node *ae_node, |
| 532 | u32 port_id, |
| 533 | struct hnae_buf_ops *bops); |
| 534 | |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 535 | void hnae_put_handle(struct hnae_handle *handle); |
| 536 | int hnae_ae_register(struct hnae_ae_dev *dev, struct module *owner); |
| 537 | void hnae_ae_unregister(struct hnae_ae_dev *dev); |
| 538 | |
| 539 | int hnae_register_notifier(struct notifier_block *nb); |
| 540 | void hnae_unregister_notifier(struct notifier_block *nb); |
| 541 | int hnae_reinit_handle(struct hnae_handle *handle); |
| 542 | |
| 543 | #define hnae_queue_xmit(q, buf_num) writel_relaxed(buf_num, \ |
| 544 | (q)->tx_ring.io_base + RCB_REG_TAIL) |
| 545 | |
| 546 | #ifndef assert |
| 547 | #define assert(cond) |
| 548 | #endif |
| 549 | |
| 550 | static inline int hnae_reserve_buffer_map(struct hnae_ring *ring, |
| 551 | struct hnae_desc_cb *cb) |
| 552 | { |
| 553 | struct hnae_buf_ops *bops = ring->q->handle->bops; |
| 554 | int ret; |
| 555 | |
| 556 | ret = bops->alloc_buffer(ring, cb); |
| 557 | if (ret) |
| 558 | goto out; |
| 559 | |
| 560 | ret = bops->map_buffer(ring, cb); |
| 561 | if (ret) |
| 562 | goto out_with_buf; |
| 563 | |
| 564 | return 0; |
| 565 | |
| 566 | out_with_buf: |
| 567 | bops->free_buffer(ring, cb); |
| 568 | out: |
| 569 | return ret; |
| 570 | } |
| 571 | |
| 572 | static inline int hnae_alloc_buffer_attach(struct hnae_ring *ring, int i) |
| 573 | { |
| 574 | int ret = hnae_reserve_buffer_map(ring, &ring->desc_cb[i]); |
| 575 | |
| 576 | if (ret) |
| 577 | return ret; |
| 578 | |
| 579 | ring->desc[i].addr = (__le64)ring->desc_cb[i].dma; |
| 580 | |
| 581 | return 0; |
| 582 | } |
| 583 | |
| 584 | static inline void hnae_buffer_detach(struct hnae_ring *ring, int i) |
| 585 | { |
| 586 | ring->q->handle->bops->unmap_buffer(ring, &ring->desc_cb[i]); |
| 587 | ring->desc[i].addr = 0; |
| 588 | } |
| 589 | |
| 590 | static inline void hnae_free_buffer_detach(struct hnae_ring *ring, int i) |
| 591 | { |
| 592 | struct hnae_buf_ops *bops = ring->q->handle->bops; |
| 593 | struct hnae_desc_cb *cb = &ring->desc_cb[i]; |
| 594 | |
| 595 | if (!ring->desc_cb[i].dma) |
| 596 | return; |
| 597 | |
| 598 | hnae_buffer_detach(ring, i); |
| 599 | bops->free_buffer(ring, cb); |
| 600 | } |
| 601 | |
| 602 | /* detach a in-used buffer and replace with a reserved one */ |
| 603 | static inline void hnae_replace_buffer(struct hnae_ring *ring, int i, |
| 604 | struct hnae_desc_cb *res_cb) |
| 605 | { |
| 606 | struct hnae_buf_ops *bops = ring->q->handle->bops; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 607 | |
| 608 | bops->unmap_buffer(ring, &ring->desc_cb[i]); |
| 609 | ring->desc_cb[i] = *res_cb; |
huangdaode | 6fe6611 | 2015-09-17 14:51:48 +0800 | [diff] [blame] | 610 | ring->desc[i].addr = (__le64)ring->desc_cb[i].dma; |
| 611 | ring->desc[i].rx.ipoff_bnum_pid_flag = 0; |
| 612 | } |
| 613 | |
| 614 | static inline void hnae_reuse_buffer(struct hnae_ring *ring, int i) |
| 615 | { |
| 616 | ring->desc_cb[i].reuse_flag = 0; |
| 617 | ring->desc[i].addr = (__le64)(ring->desc_cb[i].dma |
| 618 | + ring->desc_cb[i].page_offset); |
| 619 | ring->desc[i].rx.ipoff_bnum_pid_flag = 0; |
| 620 | } |
| 621 | |
| 622 | #define hnae_set_field(origin, mask, shift, val) \ |
| 623 | do { \ |
| 624 | (origin) &= (~(mask)); \ |
| 625 | (origin) |= ((val) << (shift)) & (mask); \ |
| 626 | } while (0) |
| 627 | |
| 628 | #define hnae_set_bit(origin, shift, val) \ |
| 629 | hnae_set_field((origin), (0x1 << (shift)), (shift), (val)) |
| 630 | |
| 631 | #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) |
| 632 | |
| 633 | #define hnae_get_bit(origin, shift) \ |
| 634 | hnae_get_field((origin), (0x1 << (shift)), (shift)) |
| 635 | |
| 636 | #endif |