blob: 2aa6aa97b40c1f7290ddf01e3b049cab9a364953 [file] [log] [blame]
Dan Williamsb94d5232015-05-19 22:54:31 -04001/*
2 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of version 2 of the GNU General Public License as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
12 */
13#include <linux/list_sort.h>
14#include <linux/libnvdimm.h>
15#include <linux/module.h>
Ross Zwisler047fc8a2015-06-25 04:21:02 -040016#include <linux/mutex.h>
Dan Williams62232e452015-06-08 14:27:06 -040017#include <linux/ndctl.h>
Dan Williamsb94d5232015-05-19 22:54:31 -040018#include <linux/list.h>
19#include <linux/acpi.h>
Dan Williamseaf96152015-05-01 13:11:27 -040020#include <linux/sort.h>
Ross Zwisler047fc8a2015-06-25 04:21:02 -040021#include <linux/io.h>
Dan Williamsb94d5232015-05-19 22:54:31 -040022#include "nfit.h"
23
Ross Zwisler047fc8a2015-06-25 04:21:02 -040024/*
25 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
26 * irrelevant.
27 */
28#include <asm-generic/io-64-nonatomic-hi-lo.h>
29
Dan Williams4d88a972015-05-31 14:41:48 -040030static bool force_enable_dimms;
31module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
32MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
33
Dan Williamsb94d5232015-05-19 22:54:31 -040034static u8 nfit_uuid[NFIT_UUID_MAX][16];
35
36static const u8 *to_nfit_uuid(enum nfit_uuids id)
37{
38 return nfit_uuid[id];
39}
40
Dan Williams62232e452015-06-08 14:27:06 -040041static struct acpi_nfit_desc *to_acpi_nfit_desc(
42 struct nvdimm_bus_descriptor *nd_desc)
43{
44 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
45}
46
47static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
48{
49 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
50
51 /*
52 * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
53 * acpi_device.
54 */
55 if (!nd_desc->provider_name
56 || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
57 return NULL;
58
59 return to_acpi_device(acpi_desc->dev);
60}
61
Dan Williamsb94d5232015-05-19 22:54:31 -040062static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
63 struct nvdimm *nvdimm, unsigned int cmd, void *buf,
64 unsigned int buf_len)
65{
Dan Williams62232e452015-06-08 14:27:06 -040066 struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
67 const struct nd_cmd_desc *desc = NULL;
68 union acpi_object in_obj, in_buf, *out_obj;
69 struct device *dev = acpi_desc->dev;
70 const char *cmd_name, *dimm_name;
71 unsigned long dsm_mask;
72 acpi_handle handle;
73 const u8 *uuid;
74 u32 offset;
75 int rc, i;
76
77 if (nvdimm) {
78 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
79 struct acpi_device *adev = nfit_mem->adev;
80
81 if (!adev)
82 return -ENOTTY;
Ross Zwisler047fc8a2015-06-25 04:21:02 -040083 dimm_name = nvdimm_name(nvdimm);
Dan Williams62232e452015-06-08 14:27:06 -040084 cmd_name = nvdimm_cmd_name(cmd);
85 dsm_mask = nfit_mem->dsm_mask;
86 desc = nd_cmd_dimm_desc(cmd);
87 uuid = to_nfit_uuid(NFIT_DEV_DIMM);
88 handle = adev->handle;
89 } else {
90 struct acpi_device *adev = to_acpi_dev(acpi_desc);
91
92 cmd_name = nvdimm_bus_cmd_name(cmd);
93 dsm_mask = nd_desc->dsm_mask;
94 desc = nd_cmd_bus_desc(cmd);
95 uuid = to_nfit_uuid(NFIT_DEV_BUS);
96 handle = adev->handle;
97 dimm_name = "bus";
98 }
99
100 if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
101 return -ENOTTY;
102
103 if (!test_bit(cmd, &dsm_mask))
104 return -ENOTTY;
105
106 in_obj.type = ACPI_TYPE_PACKAGE;
107 in_obj.package.count = 1;
108 in_obj.package.elements = &in_buf;
109 in_buf.type = ACPI_TYPE_BUFFER;
110 in_buf.buffer.pointer = buf;
111 in_buf.buffer.length = 0;
112
113 /* libnvdimm has already validated the input envelope */
114 for (i = 0; i < desc->in_num; i++)
115 in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
116 i, buf);
117
118 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
119 dev_dbg(dev, "%s:%s cmd: %s input length: %d\n", __func__,
120 dimm_name, cmd_name, in_buf.buffer.length);
121 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
122 4, in_buf.buffer.pointer, min_t(u32, 128,
123 in_buf.buffer.length), true);
124 }
125
126 out_obj = acpi_evaluate_dsm(handle, uuid, 1, cmd, &in_obj);
127 if (!out_obj) {
128 dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
129 cmd_name);
130 return -EINVAL;
131 }
132
133 if (out_obj->package.type != ACPI_TYPE_BUFFER) {
134 dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
135 __func__, dimm_name, cmd_name, out_obj->type);
136 rc = -EINVAL;
137 goto out;
138 }
139
140 if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
141 dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
142 dimm_name, cmd_name, out_obj->buffer.length);
143 print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
144 4, out_obj->buffer.pointer, min_t(u32, 128,
145 out_obj->buffer.length), true);
146 }
147
148 for (i = 0, offset = 0; i < desc->out_num; i++) {
149 u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
150 (u32 *) out_obj->buffer.pointer);
151
152 if (offset + out_size > out_obj->buffer.length) {
153 dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
154 __func__, dimm_name, cmd_name, i);
155 break;
156 }
157
158 if (in_buf.buffer.length + offset + out_size > buf_len) {
159 dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
160 __func__, dimm_name, cmd_name, i);
161 rc = -ENXIO;
162 goto out;
163 }
164 memcpy(buf + in_buf.buffer.length + offset,
165 out_obj->buffer.pointer + offset, out_size);
166 offset += out_size;
167 }
168 if (offset + in_buf.buffer.length < buf_len) {
169 if (i >= 1) {
170 /*
171 * status valid, return the number of bytes left
172 * unfilled in the output buffer
173 */
174 rc = buf_len - offset - in_buf.buffer.length;
175 } else {
176 dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
177 __func__, dimm_name, cmd_name, buf_len,
178 offset);
179 rc = -ENXIO;
180 }
181 } else
182 rc = 0;
183
184 out:
185 ACPI_FREE(out_obj);
186
187 return rc;
Dan Williamsb94d5232015-05-19 22:54:31 -0400188}
189
190static const char *spa_type_name(u16 type)
191{
192 static const char *to_name[] = {
193 [NFIT_SPA_VOLATILE] = "volatile",
194 [NFIT_SPA_PM] = "pmem",
195 [NFIT_SPA_DCR] = "dimm-control-region",
196 [NFIT_SPA_BDW] = "block-data-window",
197 [NFIT_SPA_VDISK] = "volatile-disk",
198 [NFIT_SPA_VCD] = "volatile-cd",
199 [NFIT_SPA_PDISK] = "persistent-disk",
200 [NFIT_SPA_PCD] = "persistent-cd",
201
202 };
203
204 if (type > NFIT_SPA_PCD)
205 return "unknown";
206
207 return to_name[type];
208}
209
210static int nfit_spa_type(struct acpi_nfit_system_address *spa)
211{
212 int i;
213
214 for (i = 0; i < NFIT_UUID_MAX; i++)
215 if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
216 return i;
217 return -1;
218}
219
220static bool add_spa(struct acpi_nfit_desc *acpi_desc,
221 struct acpi_nfit_system_address *spa)
222{
223 struct device *dev = acpi_desc->dev;
224 struct nfit_spa *nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa),
225 GFP_KERNEL);
226
227 if (!nfit_spa)
228 return false;
229 INIT_LIST_HEAD(&nfit_spa->list);
230 nfit_spa->spa = spa;
231 list_add_tail(&nfit_spa->list, &acpi_desc->spas);
232 dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
233 spa->range_index,
234 spa_type_name(nfit_spa_type(spa)));
235 return true;
236}
237
238static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
239 struct acpi_nfit_memory_map *memdev)
240{
241 struct device *dev = acpi_desc->dev;
242 struct nfit_memdev *nfit_memdev = devm_kzalloc(dev,
243 sizeof(*nfit_memdev), GFP_KERNEL);
244
245 if (!nfit_memdev)
246 return false;
247 INIT_LIST_HEAD(&nfit_memdev->list);
248 nfit_memdev->memdev = memdev;
249 list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
250 dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
251 __func__, memdev->device_handle, memdev->range_index,
252 memdev->region_index);
253 return true;
254}
255
256static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
257 struct acpi_nfit_control_region *dcr)
258{
259 struct device *dev = acpi_desc->dev;
260 struct nfit_dcr *nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr),
261 GFP_KERNEL);
262
263 if (!nfit_dcr)
264 return false;
265 INIT_LIST_HEAD(&nfit_dcr->list);
266 nfit_dcr->dcr = dcr;
267 list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
268 dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
269 dcr->region_index, dcr->windows);
270 return true;
271}
272
273static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
274 struct acpi_nfit_data_region *bdw)
275{
276 struct device *dev = acpi_desc->dev;
277 struct nfit_bdw *nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw),
278 GFP_KERNEL);
279
280 if (!nfit_bdw)
281 return false;
282 INIT_LIST_HEAD(&nfit_bdw->list);
283 nfit_bdw->bdw = bdw;
284 list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
285 dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
286 bdw->region_index, bdw->windows);
287 return true;
288}
289
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400290static bool add_idt(struct acpi_nfit_desc *acpi_desc,
291 struct acpi_nfit_interleave *idt)
292{
293 struct device *dev = acpi_desc->dev;
294 struct nfit_idt *nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt),
295 GFP_KERNEL);
296
297 if (!nfit_idt)
298 return false;
299 INIT_LIST_HEAD(&nfit_idt->list);
300 nfit_idt->idt = idt;
301 list_add_tail(&nfit_idt->list, &acpi_desc->idts);
302 dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
303 idt->interleave_index, idt->line_count);
304 return true;
305}
306
Dan Williamsb94d5232015-05-19 22:54:31 -0400307static void *add_table(struct acpi_nfit_desc *acpi_desc, void *table,
308 const void *end)
309{
310 struct device *dev = acpi_desc->dev;
311 struct acpi_nfit_header *hdr;
312 void *err = ERR_PTR(-ENOMEM);
313
314 if (table >= end)
315 return NULL;
316
317 hdr = table;
318 switch (hdr->type) {
319 case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
320 if (!add_spa(acpi_desc, table))
321 return err;
322 break;
323 case ACPI_NFIT_TYPE_MEMORY_MAP:
324 if (!add_memdev(acpi_desc, table))
325 return err;
326 break;
327 case ACPI_NFIT_TYPE_CONTROL_REGION:
328 if (!add_dcr(acpi_desc, table))
329 return err;
330 break;
331 case ACPI_NFIT_TYPE_DATA_REGION:
332 if (!add_bdw(acpi_desc, table))
333 return err;
334 break;
Dan Williamsb94d5232015-05-19 22:54:31 -0400335 case ACPI_NFIT_TYPE_INTERLEAVE:
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400336 if (!add_idt(acpi_desc, table))
337 return err;
Dan Williamsb94d5232015-05-19 22:54:31 -0400338 break;
339 case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
340 dev_dbg(dev, "%s: flush\n", __func__);
341 break;
342 case ACPI_NFIT_TYPE_SMBIOS:
343 dev_dbg(dev, "%s: smbios\n", __func__);
344 break;
345 default:
346 dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
347 break;
348 }
349
350 return table + hdr->length;
351}
352
353static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
354 struct nfit_mem *nfit_mem)
355{
356 u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
357 u16 dcr = nfit_mem->dcr->region_index;
358 struct nfit_spa *nfit_spa;
359
360 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
361 u16 range_index = nfit_spa->spa->range_index;
362 int type = nfit_spa_type(nfit_spa->spa);
363 struct nfit_memdev *nfit_memdev;
364
365 if (type != NFIT_SPA_BDW)
366 continue;
367
368 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
369 if (nfit_memdev->memdev->range_index != range_index)
370 continue;
371 if (nfit_memdev->memdev->device_handle != device_handle)
372 continue;
373 if (nfit_memdev->memdev->region_index != dcr)
374 continue;
375
376 nfit_mem->spa_bdw = nfit_spa->spa;
377 return;
378 }
379 }
380
381 dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
382 nfit_mem->spa_dcr->range_index);
383 nfit_mem->bdw = NULL;
384}
385
386static int nfit_mem_add(struct acpi_nfit_desc *acpi_desc,
387 struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
388{
389 u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400390 struct nfit_memdev *nfit_memdev;
Dan Williamsb94d5232015-05-19 22:54:31 -0400391 struct nfit_dcr *nfit_dcr;
392 struct nfit_bdw *nfit_bdw;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400393 struct nfit_idt *nfit_idt;
394 u16 idt_idx, range_index;
Dan Williamsb94d5232015-05-19 22:54:31 -0400395
396 list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
397 if (nfit_dcr->dcr->region_index != dcr)
398 continue;
399 nfit_mem->dcr = nfit_dcr->dcr;
400 break;
401 }
402
403 if (!nfit_mem->dcr) {
404 dev_dbg(acpi_desc->dev, "SPA %d missing:%s%s\n",
405 spa->range_index, __to_nfit_memdev(nfit_mem)
406 ? "" : " MEMDEV", nfit_mem->dcr ? "" : " DCR");
407 return -ENODEV;
408 }
409
410 /*
411 * We've found enough to create an nvdimm, optionally
412 * find an associated BDW
413 */
414 list_add(&nfit_mem->list, &acpi_desc->dimms);
415
416 list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
417 if (nfit_bdw->bdw->region_index != dcr)
418 continue;
419 nfit_mem->bdw = nfit_bdw->bdw;
420 break;
421 }
422
423 if (!nfit_mem->bdw)
424 return 0;
425
426 nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400427
428 if (!nfit_mem->spa_bdw)
429 return 0;
430
431 range_index = nfit_mem->spa_bdw->range_index;
432 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
433 if (nfit_memdev->memdev->range_index != range_index ||
434 nfit_memdev->memdev->region_index != dcr)
435 continue;
436 nfit_mem->memdev_bdw = nfit_memdev->memdev;
437 idt_idx = nfit_memdev->memdev->interleave_index;
438 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
439 if (nfit_idt->idt->interleave_index != idt_idx)
440 continue;
441 nfit_mem->idt_bdw = nfit_idt->idt;
442 break;
443 }
444 break;
445 }
446
Dan Williamsb94d5232015-05-19 22:54:31 -0400447 return 0;
448}
449
450static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
451 struct acpi_nfit_system_address *spa)
452{
453 struct nfit_mem *nfit_mem, *found;
454 struct nfit_memdev *nfit_memdev;
455 int type = nfit_spa_type(spa);
456 u16 dcr;
457
458 switch (type) {
459 case NFIT_SPA_DCR:
460 case NFIT_SPA_PM:
461 break;
462 default:
463 return 0;
464 }
465
466 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
467 int rc;
468
469 if (nfit_memdev->memdev->range_index != spa->range_index)
470 continue;
471 found = NULL;
472 dcr = nfit_memdev->memdev->region_index;
473 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
474 if (__to_nfit_memdev(nfit_mem)->region_index == dcr) {
475 found = nfit_mem;
476 break;
477 }
478
479 if (found)
480 nfit_mem = found;
481 else {
482 nfit_mem = devm_kzalloc(acpi_desc->dev,
483 sizeof(*nfit_mem), GFP_KERNEL);
484 if (!nfit_mem)
485 return -ENOMEM;
486 INIT_LIST_HEAD(&nfit_mem->list);
487 }
488
489 if (type == NFIT_SPA_DCR) {
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400490 struct nfit_idt *nfit_idt;
491 u16 idt_idx;
492
Dan Williamsb94d5232015-05-19 22:54:31 -0400493 /* multiple dimms may share a SPA when interleaved */
494 nfit_mem->spa_dcr = spa;
495 nfit_mem->memdev_dcr = nfit_memdev->memdev;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400496 idt_idx = nfit_memdev->memdev->interleave_index;
497 list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
498 if (nfit_idt->idt->interleave_index != idt_idx)
499 continue;
500 nfit_mem->idt_dcr = nfit_idt->idt;
501 break;
502 }
Dan Williamsb94d5232015-05-19 22:54:31 -0400503 } else {
504 /*
505 * A single dimm may belong to multiple SPA-PM
506 * ranges, record at least one in addition to
507 * any SPA-DCR range.
508 */
509 nfit_mem->memdev_pmem = nfit_memdev->memdev;
510 }
511
512 if (found)
513 continue;
514
515 rc = nfit_mem_add(acpi_desc, nfit_mem, spa);
516 if (rc)
517 return rc;
518 }
519
520 return 0;
521}
522
523static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
524{
525 struct nfit_mem *a = container_of(_a, typeof(*a), list);
526 struct nfit_mem *b = container_of(_b, typeof(*b), list);
527 u32 handleA, handleB;
528
529 handleA = __to_nfit_memdev(a)->device_handle;
530 handleB = __to_nfit_memdev(b)->device_handle;
531 if (handleA < handleB)
532 return -1;
533 else if (handleA > handleB)
534 return 1;
535 return 0;
536}
537
538static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
539{
540 struct nfit_spa *nfit_spa;
541
542 /*
543 * For each SPA-DCR or SPA-PMEM address range find its
544 * corresponding MEMDEV(s). From each MEMDEV find the
545 * corresponding DCR. Then, if we're operating on a SPA-DCR,
546 * try to find a SPA-BDW and a corresponding BDW that references
547 * the DCR. Throw it all into an nfit_mem object. Note, that
548 * BDWs are optional.
549 */
550 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
551 int rc;
552
553 rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
554 if (rc)
555 return rc;
556 }
557
558 list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
559
560 return 0;
561}
562
Dan Williams45def222015-04-26 19:26:48 -0400563static ssize_t revision_show(struct device *dev,
564 struct device_attribute *attr, char *buf)
565{
566 struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
567 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
568 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
569
570 return sprintf(buf, "%d\n", acpi_desc->nfit->header.revision);
571}
572static DEVICE_ATTR_RO(revision);
573
574static struct attribute *acpi_nfit_attributes[] = {
575 &dev_attr_revision.attr,
576 NULL,
577};
578
579static struct attribute_group acpi_nfit_attribute_group = {
580 .name = "nfit",
581 .attrs = acpi_nfit_attributes,
582};
583
584static const struct attribute_group *acpi_nfit_attribute_groups[] = {
585 &nvdimm_bus_attribute_group,
586 &acpi_nfit_attribute_group,
587 NULL,
588};
589
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400590static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
591{
592 struct nvdimm *nvdimm = to_nvdimm(dev);
593 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
594
595 return __to_nfit_memdev(nfit_mem);
596}
597
598static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
599{
600 struct nvdimm *nvdimm = to_nvdimm(dev);
601 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
602
603 return nfit_mem->dcr;
604}
605
606static ssize_t handle_show(struct device *dev,
607 struct device_attribute *attr, char *buf)
608{
609 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
610
611 return sprintf(buf, "%#x\n", memdev->device_handle);
612}
613static DEVICE_ATTR_RO(handle);
614
615static ssize_t phys_id_show(struct device *dev,
616 struct device_attribute *attr, char *buf)
617{
618 struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
619
620 return sprintf(buf, "%#x\n", memdev->physical_id);
621}
622static DEVICE_ATTR_RO(phys_id);
623
624static ssize_t vendor_show(struct device *dev,
625 struct device_attribute *attr, char *buf)
626{
627 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
628
629 return sprintf(buf, "%#x\n", dcr->vendor_id);
630}
631static DEVICE_ATTR_RO(vendor);
632
633static ssize_t rev_id_show(struct device *dev,
634 struct device_attribute *attr, char *buf)
635{
636 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
637
638 return sprintf(buf, "%#x\n", dcr->revision_id);
639}
640static DEVICE_ATTR_RO(rev_id);
641
642static ssize_t device_show(struct device *dev,
643 struct device_attribute *attr, char *buf)
644{
645 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
646
647 return sprintf(buf, "%#x\n", dcr->device_id);
648}
649static DEVICE_ATTR_RO(device);
650
651static ssize_t format_show(struct device *dev,
652 struct device_attribute *attr, char *buf)
653{
654 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
655
656 return sprintf(buf, "%#x\n", dcr->code);
657}
658static DEVICE_ATTR_RO(format);
659
660static ssize_t serial_show(struct device *dev,
661 struct device_attribute *attr, char *buf)
662{
663 struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
664
665 return sprintf(buf, "%#x\n", dcr->serial_number);
666}
667static DEVICE_ATTR_RO(serial);
668
669static struct attribute *acpi_nfit_dimm_attributes[] = {
670 &dev_attr_handle.attr,
671 &dev_attr_phys_id.attr,
672 &dev_attr_vendor.attr,
673 &dev_attr_device.attr,
674 &dev_attr_format.attr,
675 &dev_attr_serial.attr,
676 &dev_attr_rev_id.attr,
677 NULL,
678};
679
680static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
681 struct attribute *a, int n)
682{
683 struct device *dev = container_of(kobj, struct device, kobj);
684
685 if (to_nfit_dcr(dev))
686 return a->mode;
687 else
688 return 0;
689}
690
691static struct attribute_group acpi_nfit_dimm_attribute_group = {
692 .name = "nfit",
693 .attrs = acpi_nfit_dimm_attributes,
694 .is_visible = acpi_nfit_dimm_attr_visible,
695};
696
697static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
Dan Williams62232e452015-06-08 14:27:06 -0400698 &nvdimm_attribute_group,
Dan Williams4d88a972015-05-31 14:41:48 -0400699 &nd_device_attribute_group,
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400700 &acpi_nfit_dimm_attribute_group,
701 NULL,
702};
703
704static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
705 u32 device_handle)
706{
707 struct nfit_mem *nfit_mem;
708
709 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
710 if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
711 return nfit_mem->nvdimm;
712
713 return NULL;
714}
715
Dan Williams62232e452015-06-08 14:27:06 -0400716static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
717 struct nfit_mem *nfit_mem, u32 device_handle)
718{
719 struct acpi_device *adev, *adev_dimm;
720 struct device *dev = acpi_desc->dev;
721 const u8 *uuid = to_nfit_uuid(NFIT_DEV_DIMM);
722 unsigned long long sta;
723 int i, rc = -ENODEV;
724 acpi_status status;
725
726 nfit_mem->dsm_mask = acpi_desc->dimm_dsm_force_en;
727 adev = to_acpi_dev(acpi_desc);
728 if (!adev)
729 return 0;
730
731 adev_dimm = acpi_find_child_device(adev, device_handle, false);
732 nfit_mem->adev = adev_dimm;
733 if (!adev_dimm) {
734 dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
735 device_handle);
Dan Williams4d88a972015-05-31 14:41:48 -0400736 return force_enable_dimms ? 0 : -ENODEV;
Dan Williams62232e452015-06-08 14:27:06 -0400737 }
738
739 status = acpi_evaluate_integer(adev_dimm->handle, "_STA", NULL, &sta);
740 if (status == AE_NOT_FOUND) {
741 dev_dbg(dev, "%s missing _STA, assuming enabled...\n",
742 dev_name(&adev_dimm->dev));
743 rc = 0;
744 } else if (ACPI_FAILURE(status))
745 dev_err(dev, "%s failed to retrieve_STA, disabling...\n",
746 dev_name(&adev_dimm->dev));
747 else if ((sta & ACPI_STA_DEVICE_ENABLED) == 0)
748 dev_info(dev, "%s disabled by firmware\n",
749 dev_name(&adev_dimm->dev));
750 else
751 rc = 0;
752
753 for (i = ND_CMD_SMART; i <= ND_CMD_VENDOR; i++)
754 if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
755 set_bit(i, &nfit_mem->dsm_mask);
756
Dan Williams4d88a972015-05-31 14:41:48 -0400757 return force_enable_dimms ? 0 : rc;
Dan Williams62232e452015-06-08 14:27:06 -0400758}
759
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400760static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
761{
762 struct nfit_mem *nfit_mem;
Dan Williams4d88a972015-05-31 14:41:48 -0400763 int dimm_count = 0;
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400764
765 list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
766 struct nvdimm *nvdimm;
767 unsigned long flags = 0;
768 u32 device_handle;
Dan Williams62232e452015-06-08 14:27:06 -0400769 int rc;
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400770
771 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
772 nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
773 if (nvdimm) {
774 /*
775 * If for some reason we find multiple DCRs the
776 * first one wins
777 */
778 dev_err(acpi_desc->dev, "duplicate DCR detected: %s\n",
779 nvdimm_name(nvdimm));
780 continue;
781 }
782
783 if (nfit_mem->bdw && nfit_mem->memdev_pmem)
784 flags |= NDD_ALIASING;
785
Dan Williams62232e452015-06-08 14:27:06 -0400786 rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
787 if (rc)
788 continue;
789
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400790 nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
Dan Williams62232e452015-06-08 14:27:06 -0400791 acpi_nfit_dimm_attribute_groups,
792 flags, &nfit_mem->dsm_mask);
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400793 if (!nvdimm)
794 return -ENOMEM;
795
796 nfit_mem->nvdimm = nvdimm;
Dan Williams4d88a972015-05-31 14:41:48 -0400797 dimm_count++;
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400798 }
799
Dan Williams4d88a972015-05-31 14:41:48 -0400800 return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
Dan Williamse6dfb2d2015-04-25 03:56:17 -0400801}
802
Dan Williams62232e452015-06-08 14:27:06 -0400803static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
804{
805 struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
806 const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
807 struct acpi_device *adev;
808 int i;
809
810 adev = to_acpi_dev(acpi_desc);
811 if (!adev)
812 return;
813
814 for (i = ND_CMD_ARS_CAP; i <= ND_CMD_ARS_STATUS; i++)
815 if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
816 set_bit(i, &nd_desc->dsm_mask);
817}
818
Dan Williams1f7df6f2015-06-09 20:13:14 -0400819static ssize_t range_index_show(struct device *dev,
820 struct device_attribute *attr, char *buf)
821{
822 struct nd_region *nd_region = to_nd_region(dev);
823 struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
824
825 return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
826}
827static DEVICE_ATTR_RO(range_index);
828
829static struct attribute *acpi_nfit_region_attributes[] = {
830 &dev_attr_range_index.attr,
831 NULL,
832};
833
834static struct attribute_group acpi_nfit_region_attribute_group = {
835 .name = "nfit",
836 .attrs = acpi_nfit_region_attributes,
837};
838
839static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
840 &nd_region_attribute_group,
841 &nd_mapping_attribute_group,
Dan Williams3d880022015-05-31 15:02:11 -0400842 &nd_device_attribute_group,
Dan Williams1f7df6f2015-06-09 20:13:14 -0400843 &acpi_nfit_region_attribute_group,
844 NULL,
845};
846
Dan Williamseaf96152015-05-01 13:11:27 -0400847/* enough info to uniquely specify an interleave set */
848struct nfit_set_info {
849 struct nfit_set_info_map {
850 u64 region_offset;
851 u32 serial_number;
852 u32 pad;
853 } mapping[0];
854};
855
856static size_t sizeof_nfit_set_info(int num_mappings)
857{
858 return sizeof(struct nfit_set_info)
859 + num_mappings * sizeof(struct nfit_set_info_map);
860}
861
862static int cmp_map(const void *m0, const void *m1)
863{
864 const struct nfit_set_info_map *map0 = m0;
865 const struct nfit_set_info_map *map1 = m1;
866
867 return memcmp(&map0->region_offset, &map1->region_offset,
868 sizeof(u64));
869}
870
871/* Retrieve the nth entry referencing this spa */
872static struct acpi_nfit_memory_map *memdev_from_spa(
873 struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
874{
875 struct nfit_memdev *nfit_memdev;
876
877 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
878 if (nfit_memdev->memdev->range_index == range_index)
879 if (n-- == 0)
880 return nfit_memdev->memdev;
881 return NULL;
882}
883
884static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
885 struct nd_region_desc *ndr_desc,
886 struct acpi_nfit_system_address *spa)
887{
888 int i, spa_type = nfit_spa_type(spa);
889 struct device *dev = acpi_desc->dev;
890 struct nd_interleave_set *nd_set;
891 u16 nr = ndr_desc->num_mappings;
892 struct nfit_set_info *info;
893
894 if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
895 /* pass */;
896 else
897 return 0;
898
899 nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
900 if (!nd_set)
901 return -ENOMEM;
902
903 info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
904 if (!info)
905 return -ENOMEM;
906 for (i = 0; i < nr; i++) {
907 struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
908 struct nfit_set_info_map *map = &info->mapping[i];
909 struct nvdimm *nvdimm = nd_mapping->nvdimm;
910 struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
911 struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
912 spa->range_index, i);
913
914 if (!memdev || !nfit_mem->dcr) {
915 dev_err(dev, "%s: failed to find DCR\n", __func__);
916 return -ENODEV;
917 }
918
919 map->region_offset = memdev->region_offset;
920 map->serial_number = nfit_mem->dcr->serial_number;
921 }
922
923 sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
924 cmp_map, NULL);
925 nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
926 ndr_desc->nd_set = nd_set;
927 devm_kfree(dev, info);
928
929 return 0;
930}
931
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400932static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
933{
934 struct acpi_nfit_interleave *idt = mmio->idt;
935 u32 sub_line_offset, line_index, line_offset;
936 u64 line_no, table_skip_count, table_offset;
937
938 line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
939 table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
940 line_offset = idt->line_offset[line_index]
941 * mmio->line_size;
942 table_offset = table_skip_count * mmio->table_size;
943
944 return mmio->base_offset + line_offset + table_offset + sub_line_offset;
945}
946
947static u64 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
948{
949 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
950 u64 offset = nfit_blk->stat_offset + mmio->size * bw;
951
952 if (mmio->num_lines)
953 offset = to_interleave_offset(offset, mmio);
954
955 return readq(mmio->base + offset);
956}
957
958static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
959 resource_size_t dpa, unsigned int len, unsigned int write)
960{
961 u64 cmd, offset;
962 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
963
964 enum {
965 BCW_OFFSET_MASK = (1ULL << 48)-1,
966 BCW_LEN_SHIFT = 48,
967 BCW_LEN_MASK = (1ULL << 8) - 1,
968 BCW_CMD_SHIFT = 56,
969 };
970
971 cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
972 len = len >> L1_CACHE_SHIFT;
973 cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
974 cmd |= ((u64) write) << BCW_CMD_SHIFT;
975
976 offset = nfit_blk->cmd_offset + mmio->size * bw;
977 if (mmio->num_lines)
978 offset = to_interleave_offset(offset, mmio);
979
980 writeq(cmd, mmio->base + offset);
981 /* FIXME: conditionally perform read-back if mandated by firmware */
982}
983
984static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
985 resource_size_t dpa, void *iobuf, size_t len, int rw,
986 unsigned int lane)
987{
988 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
989 unsigned int copied = 0;
990 u64 base_offset;
991 int rc;
992
993 base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
994 + lane * mmio->size;
995 /* TODO: non-temporal access, flush hints, cache management etc... */
996 write_blk_ctl(nfit_blk, lane, dpa, len, rw);
997 while (len) {
998 unsigned int c;
999 u64 offset;
1000
1001 if (mmio->num_lines) {
1002 u32 line_offset;
1003
1004 offset = to_interleave_offset(base_offset + copied,
1005 mmio);
1006 div_u64_rem(offset, mmio->line_size, &line_offset);
1007 c = min_t(size_t, len, mmio->line_size - line_offset);
1008 } else {
1009 offset = base_offset + nfit_blk->bdw_offset;
1010 c = len;
1011 }
1012
1013 if (rw)
1014 memcpy(mmio->aperture + offset, iobuf + copied, c);
1015 else
1016 memcpy(iobuf + copied, mmio->aperture + offset, c);
1017
1018 copied += c;
1019 len -= c;
1020 }
1021 rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
1022 return rc;
1023}
1024
1025static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
1026 resource_size_t dpa, void *iobuf, u64 len, int rw)
1027{
1028 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1029 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
1030 struct nd_region *nd_region = nfit_blk->nd_region;
1031 unsigned int lane, copied = 0;
1032 int rc = 0;
1033
1034 lane = nd_region_acquire_lane(nd_region);
1035 while (len) {
1036 u64 c = min(len, mmio->size);
1037
1038 rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
1039 iobuf + copied, c, rw, lane);
1040 if (rc)
1041 break;
1042
1043 copied += c;
1044 len -= c;
1045 }
1046 nd_region_release_lane(nd_region, lane);
1047
1048 return rc;
1049}
1050
1051static void nfit_spa_mapping_release(struct kref *kref)
1052{
1053 struct nfit_spa_mapping *spa_map = to_spa_map(kref);
1054 struct acpi_nfit_system_address *spa = spa_map->spa;
1055 struct acpi_nfit_desc *acpi_desc = spa_map->acpi_desc;
1056
1057 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1058 dev_dbg(acpi_desc->dev, "%s: SPA%d\n", __func__, spa->range_index);
1059 iounmap(spa_map->iomem);
1060 release_mem_region(spa->address, spa->length);
1061 list_del(&spa_map->list);
1062 kfree(spa_map);
1063}
1064
1065static struct nfit_spa_mapping *find_spa_mapping(
1066 struct acpi_nfit_desc *acpi_desc,
1067 struct acpi_nfit_system_address *spa)
1068{
1069 struct nfit_spa_mapping *spa_map;
1070
1071 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1072 list_for_each_entry(spa_map, &acpi_desc->spa_maps, list)
1073 if (spa_map->spa == spa)
1074 return spa_map;
1075
1076 return NULL;
1077}
1078
1079static void nfit_spa_unmap(struct acpi_nfit_desc *acpi_desc,
1080 struct acpi_nfit_system_address *spa)
1081{
1082 struct nfit_spa_mapping *spa_map;
1083
1084 mutex_lock(&acpi_desc->spa_map_mutex);
1085 spa_map = find_spa_mapping(acpi_desc, spa);
1086
1087 if (spa_map)
1088 kref_put(&spa_map->kref, nfit_spa_mapping_release);
1089 mutex_unlock(&acpi_desc->spa_map_mutex);
1090}
1091
1092static void __iomem *__nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
1093 struct acpi_nfit_system_address *spa)
1094{
1095 resource_size_t start = spa->address;
1096 resource_size_t n = spa->length;
1097 struct nfit_spa_mapping *spa_map;
1098 struct resource *res;
1099
1100 WARN_ON(!mutex_is_locked(&acpi_desc->spa_map_mutex));
1101
1102 spa_map = find_spa_mapping(acpi_desc, spa);
1103 if (spa_map) {
1104 kref_get(&spa_map->kref);
1105 return spa_map->iomem;
1106 }
1107
1108 spa_map = kzalloc(sizeof(*spa_map), GFP_KERNEL);
1109 if (!spa_map)
1110 return NULL;
1111
1112 INIT_LIST_HEAD(&spa_map->list);
1113 spa_map->spa = spa;
1114 kref_init(&spa_map->kref);
1115 spa_map->acpi_desc = acpi_desc;
1116
1117 res = request_mem_region(start, n, dev_name(acpi_desc->dev));
1118 if (!res)
1119 goto err_mem;
1120
1121 /* TODO: cacheability based on the spa type */
1122 spa_map->iomem = ioremap_nocache(start, n);
1123 if (!spa_map->iomem)
1124 goto err_map;
1125
1126 list_add_tail(&spa_map->list, &acpi_desc->spa_maps);
1127 return spa_map->iomem;
1128
1129 err_map:
1130 release_mem_region(start, n);
1131 err_mem:
1132 kfree(spa_map);
1133 return NULL;
1134}
1135
1136/**
1137 * nfit_spa_map - interleave-aware managed-mappings of acpi_nfit_system_address ranges
1138 * @nvdimm_bus: NFIT-bus that provided the spa table entry
1139 * @nfit_spa: spa table to map
1140 *
1141 * In the case where block-data-window apertures and
1142 * dimm-control-regions are interleaved they will end up sharing a
1143 * single request_mem_region() + ioremap() for the address range. In
1144 * the style of devm nfit_spa_map() mappings are automatically dropped
1145 * when all region devices referencing the same mapping are disabled /
1146 * unbound.
1147 */
1148static void __iomem *nfit_spa_map(struct acpi_nfit_desc *acpi_desc,
1149 struct acpi_nfit_system_address *spa)
1150{
1151 void __iomem *iomem;
1152
1153 mutex_lock(&acpi_desc->spa_map_mutex);
1154 iomem = __nfit_spa_map(acpi_desc, spa);
1155 mutex_unlock(&acpi_desc->spa_map_mutex);
1156
1157 return iomem;
1158}
1159
1160static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
1161 struct acpi_nfit_interleave *idt, u16 interleave_ways)
1162{
1163 if (idt) {
1164 mmio->num_lines = idt->line_count;
1165 mmio->line_size = idt->line_size;
1166 if (interleave_ways == 0)
1167 return -ENXIO;
1168 mmio->table_size = mmio->num_lines * interleave_ways
1169 * mmio->line_size;
1170 }
1171
1172 return 0;
1173}
1174
1175static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
1176 struct device *dev)
1177{
1178 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1179 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1180 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1181 struct nfit_blk_mmio *mmio;
1182 struct nfit_blk *nfit_blk;
1183 struct nfit_mem *nfit_mem;
1184 struct nvdimm *nvdimm;
1185 int rc;
1186
1187 nvdimm = nd_blk_region_to_dimm(ndbr);
1188 nfit_mem = nvdimm_provider_data(nvdimm);
1189 if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
1190 dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
1191 nfit_mem ? "" : " nfit_mem",
1192 nfit_mem->dcr ? "" : " dcr",
1193 nfit_mem->bdw ? "" : " bdw");
1194 return -ENXIO;
1195 }
1196
1197 nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
1198 if (!nfit_blk)
1199 return -ENOMEM;
1200 nd_blk_region_set_provider_data(ndbr, nfit_blk);
1201 nfit_blk->nd_region = to_nd_region(dev);
1202
1203 /* map block aperture memory */
1204 nfit_blk->bdw_offset = nfit_mem->bdw->offset;
1205 mmio = &nfit_blk->mmio[BDW];
1206 mmio->base = nfit_spa_map(acpi_desc, nfit_mem->spa_bdw);
1207 if (!mmio->base) {
1208 dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
1209 nvdimm_name(nvdimm));
1210 return -ENOMEM;
1211 }
1212 mmio->size = nfit_mem->bdw->size;
1213 mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
1214 mmio->idt = nfit_mem->idt_bdw;
1215 mmio->spa = nfit_mem->spa_bdw;
1216 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
1217 nfit_mem->memdev_bdw->interleave_ways);
1218 if (rc) {
1219 dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
1220 __func__, nvdimm_name(nvdimm));
1221 return rc;
1222 }
1223
1224 /* map block control memory */
1225 nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
1226 nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
1227 mmio = &nfit_blk->mmio[DCR];
1228 mmio->base = nfit_spa_map(acpi_desc, nfit_mem->spa_dcr);
1229 if (!mmio->base) {
1230 dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
1231 nvdimm_name(nvdimm));
1232 return -ENOMEM;
1233 }
1234 mmio->size = nfit_mem->dcr->window_size;
1235 mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
1236 mmio->idt = nfit_mem->idt_dcr;
1237 mmio->spa = nfit_mem->spa_dcr;
1238 rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
1239 nfit_mem->memdev_dcr->interleave_ways);
1240 if (rc) {
1241 dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
1242 __func__, nvdimm_name(nvdimm));
1243 return rc;
1244 }
1245
1246 if (mmio->line_size == 0)
1247 return 0;
1248
1249 if ((u32) nfit_blk->cmd_offset % mmio->line_size
1250 + 8 > mmio->line_size) {
1251 dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
1252 return -ENXIO;
1253 } else if ((u32) nfit_blk->stat_offset % mmio->line_size
1254 + 8 > mmio->line_size) {
1255 dev_dbg(dev, "stat_offset crosses interleave boundary\n");
1256 return -ENXIO;
1257 }
1258
1259 return 0;
1260}
1261
1262static void acpi_nfit_blk_region_disable(struct nvdimm_bus *nvdimm_bus,
1263 struct device *dev)
1264{
1265 struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
1266 struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
1267 struct nd_blk_region *ndbr = to_nd_blk_region(dev);
1268 struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
1269 int i;
1270
1271 if (!nfit_blk)
1272 return; /* never enabled */
1273
1274 /* auto-free BLK spa mappings */
1275 for (i = 0; i < 2; i++) {
1276 struct nfit_blk_mmio *mmio = &nfit_blk->mmio[i];
1277
1278 if (mmio->base)
1279 nfit_spa_unmap(acpi_desc, mmio->spa);
1280 }
1281 nd_blk_region_set_provider_data(ndbr, NULL);
1282 /* devm will free nfit_blk */
1283}
1284
Dan Williams1f7df6f2015-06-09 20:13:14 -04001285static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
1286 struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
1287 struct acpi_nfit_memory_map *memdev,
1288 struct acpi_nfit_system_address *spa)
1289{
1290 struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
1291 memdev->device_handle);
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001292 struct nd_blk_region_desc *ndbr_desc;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001293 struct nfit_mem *nfit_mem;
1294 int blk_valid = 0;
1295
1296 if (!nvdimm) {
1297 dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
1298 spa->range_index, memdev->device_handle);
1299 return -ENODEV;
1300 }
1301
1302 nd_mapping->nvdimm = nvdimm;
1303 switch (nfit_spa_type(spa)) {
1304 case NFIT_SPA_PM:
1305 case NFIT_SPA_VOLATILE:
1306 nd_mapping->start = memdev->address;
1307 nd_mapping->size = memdev->region_size;
1308 break;
1309 case NFIT_SPA_DCR:
1310 nfit_mem = nvdimm_provider_data(nvdimm);
1311 if (!nfit_mem || !nfit_mem->bdw) {
1312 dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
1313 spa->range_index, nvdimm_name(nvdimm));
1314 } else {
1315 nd_mapping->size = nfit_mem->bdw->capacity;
1316 nd_mapping->start = nfit_mem->bdw->start_address;
Vishal Verma5212e112015-06-25 04:20:32 -04001317 ndr_desc->num_lanes = nfit_mem->bdw->windows;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001318 blk_valid = 1;
1319 }
1320
1321 ndr_desc->nd_mapping = nd_mapping;
1322 ndr_desc->num_mappings = blk_valid;
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001323 ndbr_desc = to_blk_region_desc(ndr_desc);
1324 ndbr_desc->enable = acpi_nfit_blk_region_enable;
1325 ndbr_desc->disable = acpi_nfit_blk_region_disable;
1326 ndbr_desc->do_io = acpi_nfit_blk_region_do_io;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001327 if (!nvdimm_blk_region_create(acpi_desc->nvdimm_bus, ndr_desc))
1328 return -ENOMEM;
1329 break;
1330 }
1331
1332 return 0;
1333}
1334
1335static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
1336 struct nfit_spa *nfit_spa)
1337{
1338 static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
1339 struct acpi_nfit_system_address *spa = nfit_spa->spa;
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001340 struct nd_blk_region_desc ndbr_desc;
1341 struct nd_region_desc *ndr_desc;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001342 struct nfit_memdev *nfit_memdev;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001343 struct nvdimm_bus *nvdimm_bus;
1344 struct resource res;
Dan Williamseaf96152015-05-01 13:11:27 -04001345 int count = 0, rc;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001346
1347 if (spa->range_index == 0) {
1348 dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
1349 __func__);
1350 return 0;
1351 }
1352
1353 memset(&res, 0, sizeof(res));
1354 memset(&nd_mappings, 0, sizeof(nd_mappings));
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001355 memset(&ndbr_desc, 0, sizeof(ndbr_desc));
Dan Williams1f7df6f2015-06-09 20:13:14 -04001356 res.start = spa->address;
1357 res.end = res.start + spa->length - 1;
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001358 ndr_desc = &ndbr_desc.ndr_desc;
1359 ndr_desc->res = &res;
1360 ndr_desc->provider_data = nfit_spa;
1361 ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001362 list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
1363 struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
1364 struct nd_mapping *nd_mapping;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001365
1366 if (memdev->range_index != spa->range_index)
1367 continue;
1368 if (count >= ND_MAX_MAPPINGS) {
1369 dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
1370 spa->range_index, ND_MAX_MAPPINGS);
1371 return -ENXIO;
1372 }
1373 nd_mapping = &nd_mappings[count++];
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001374 rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
Dan Williams1f7df6f2015-06-09 20:13:14 -04001375 memdev, spa);
1376 if (rc)
1377 return rc;
1378 }
1379
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001380 ndr_desc->nd_mapping = nd_mappings;
1381 ndr_desc->num_mappings = count;
1382 rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
Dan Williamseaf96152015-05-01 13:11:27 -04001383 if (rc)
1384 return rc;
1385
Dan Williams1f7df6f2015-06-09 20:13:14 -04001386 nvdimm_bus = acpi_desc->nvdimm_bus;
1387 if (nfit_spa_type(spa) == NFIT_SPA_PM) {
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001388 if (!nvdimm_pmem_region_create(nvdimm_bus, ndr_desc))
Dan Williams1f7df6f2015-06-09 20:13:14 -04001389 return -ENOMEM;
1390 } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001391 if (!nvdimm_volatile_region_create(nvdimm_bus, ndr_desc))
Dan Williams1f7df6f2015-06-09 20:13:14 -04001392 return -ENOMEM;
1393 }
1394 return 0;
1395}
1396
1397static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
1398{
1399 struct nfit_spa *nfit_spa;
1400
1401 list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
1402 int rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
1403
1404 if (rc)
1405 return rc;
1406 }
1407 return 0;
1408}
1409
Dan Williamsb94d5232015-05-19 22:54:31 -04001410static int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, acpi_size sz)
1411{
1412 struct device *dev = acpi_desc->dev;
1413 const void *end;
1414 u8 *data;
Dan Williams1f7df6f2015-06-09 20:13:14 -04001415 int rc;
Dan Williamsb94d5232015-05-19 22:54:31 -04001416
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001417 INIT_LIST_HEAD(&acpi_desc->spa_maps);
Dan Williamsb94d5232015-05-19 22:54:31 -04001418 INIT_LIST_HEAD(&acpi_desc->spas);
1419 INIT_LIST_HEAD(&acpi_desc->dcrs);
1420 INIT_LIST_HEAD(&acpi_desc->bdws);
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001421 INIT_LIST_HEAD(&acpi_desc->idts);
Dan Williamsb94d5232015-05-19 22:54:31 -04001422 INIT_LIST_HEAD(&acpi_desc->memdevs);
1423 INIT_LIST_HEAD(&acpi_desc->dimms);
Ross Zwisler047fc8a2015-06-25 04:21:02 -04001424 mutex_init(&acpi_desc->spa_map_mutex);
Dan Williamsb94d5232015-05-19 22:54:31 -04001425
1426 data = (u8 *) acpi_desc->nfit;
1427 end = data + sz;
1428 data += sizeof(struct acpi_table_nfit);
1429 while (!IS_ERR_OR_NULL(data))
1430 data = add_table(acpi_desc, data, end);
1431
1432 if (IS_ERR(data)) {
1433 dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
1434 PTR_ERR(data));
1435 return PTR_ERR(data);
1436 }
1437
1438 if (nfit_mem_init(acpi_desc) != 0)
1439 return -ENOMEM;
1440
Dan Williams62232e452015-06-08 14:27:06 -04001441 acpi_nfit_init_dsms(acpi_desc);
1442
Dan Williams1f7df6f2015-06-09 20:13:14 -04001443 rc = acpi_nfit_register_dimms(acpi_desc);
1444 if (rc)
1445 return rc;
1446
1447 return acpi_nfit_register_regions(acpi_desc);
Dan Williamsb94d5232015-05-19 22:54:31 -04001448}
1449
1450static int acpi_nfit_add(struct acpi_device *adev)
1451{
1452 struct nvdimm_bus_descriptor *nd_desc;
1453 struct acpi_nfit_desc *acpi_desc;
1454 struct device *dev = &adev->dev;
1455 struct acpi_table_header *tbl;
1456 acpi_status status = AE_OK;
1457 acpi_size sz;
1458 int rc;
1459
1460 status = acpi_get_table_with_size("NFIT", 0, &tbl, &sz);
1461 if (ACPI_FAILURE(status)) {
1462 dev_err(dev, "failed to find NFIT\n");
1463 return -ENXIO;
1464 }
1465
1466 acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
1467 if (!acpi_desc)
1468 return -ENOMEM;
1469
1470 dev_set_drvdata(dev, acpi_desc);
1471 acpi_desc->dev = dev;
1472 acpi_desc->nfit = (struct acpi_table_nfit *) tbl;
1473 nd_desc = &acpi_desc->nd_desc;
1474 nd_desc->provider_name = "ACPI.NFIT";
1475 nd_desc->ndctl = acpi_nfit_ctl;
Dan Williams45def222015-04-26 19:26:48 -04001476 nd_desc->attr_groups = acpi_nfit_attribute_groups;
Dan Williamsb94d5232015-05-19 22:54:31 -04001477
1478 acpi_desc->nvdimm_bus = nvdimm_bus_register(dev, nd_desc);
1479 if (!acpi_desc->nvdimm_bus)
1480 return -ENXIO;
1481
1482 rc = acpi_nfit_init(acpi_desc, sz);
1483 if (rc) {
1484 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1485 return rc;
1486 }
1487 return 0;
1488}
1489
1490static int acpi_nfit_remove(struct acpi_device *adev)
1491{
1492 struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
1493
1494 nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
1495 return 0;
1496}
1497
1498static const struct acpi_device_id acpi_nfit_ids[] = {
1499 { "ACPI0012", 0 },
1500 { "", 0 },
1501};
1502MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
1503
1504static struct acpi_driver acpi_nfit_driver = {
1505 .name = KBUILD_MODNAME,
1506 .ids = acpi_nfit_ids,
1507 .ops = {
1508 .add = acpi_nfit_add,
1509 .remove = acpi_nfit_remove,
1510 },
1511};
1512
1513static __init int nfit_init(void)
1514{
1515 BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
1516 BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
1517 BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
1518 BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
1519 BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
1520 BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
1521 BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
1522
1523 acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
1524 acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
1525 acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
1526 acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
1527 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
1528 acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
1529 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
1530 acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
1531 acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
1532 acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
1533
1534 return acpi_bus_register_driver(&acpi_nfit_driver);
1535}
1536
1537static __exit void nfit_exit(void)
1538{
1539 acpi_bus_unregister_driver(&acpi_nfit_driver);
1540}
1541
1542module_init(nfit_init);
1543module_exit(nfit_exit);
1544MODULE_LICENSE("GPL v2");
1545MODULE_AUTHOR("Intel Corporation");